linux/drivers/usb/gadget/udc/pxa27x_udc.c
<<
>>
Prefs
   1/*
   2 * Handles the Intel 27x USB Device Controller (UDC)
   3 *
   4 * Inspired by original driver by Frank Becker, David Brownell, and others.
   5 * Copyright (C) 2008 Robert Jarzmik
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 2 of the License, or
  10 * (at your option) any later version.
  11 */
  12#include <linux/module.h>
  13#include <linux/kernel.h>
  14#include <linux/types.h>
  15#include <linux/errno.h>
  16#include <linux/err.h>
  17#include <linux/platform_device.h>
  18#include <linux/delay.h>
  19#include <linux/list.h>
  20#include <linux/interrupt.h>
  21#include <linux/proc_fs.h>
  22#include <linux/clk.h>
  23#include <linux/irq.h>
  24#include <linux/gpio.h>
  25#include <linux/gpio/consumer.h>
  26#include <linux/slab.h>
  27#include <linux/prefetch.h>
  28#include <linux/byteorder/generic.h>
  29#include <linux/platform_data/pxa2xx_udc.h>
  30#include <linux/of_device.h>
  31#include <linux/of_gpio.h>
  32
  33#include <linux/usb.h>
  34#include <linux/usb/ch9.h>
  35#include <linux/usb/gadget.h>
  36#include <linux/usb/phy.h>
  37
  38#include "pxa27x_udc.h"
  39
  40/*
  41 * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
  42 * series processors.
  43 *
  44 * Such controller drivers work with a gadget driver.  The gadget driver
  45 * returns descriptors, implements configuration and data protocols used
  46 * by the host to interact with this device, and allocates endpoints to
  47 * the different protocol interfaces.  The controller driver virtualizes
  48 * usb hardware so that the gadget drivers will be more portable.
  49 *
  50 * This UDC hardware wants to implement a bit too much USB protocol. The
  51 * biggest issues are:  that the endpoints have to be set up before the
  52 * controller can be enabled (minor, and not uncommon); and each endpoint
  53 * can only have one configuration, interface and alternative interface
  54 * number (major, and very unusual). Once set up, these cannot be changed
  55 * without a controller reset.
  56 *
  57 * The workaround is to setup all combinations necessary for the gadgets which
  58 * will work with this driver. This is done in pxa_udc structure, statically.
  59 * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep.
  60 * (You could modify this if needed.  Some drivers have a "fifo_mode" module
  61 * parameter to facilitate such changes.)
  62 *
  63 * The combinations have been tested with these gadgets :
  64 *  - zero gadget
  65 *  - file storage gadget
  66 *  - ether gadget
  67 *
  68 * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is
  69 * made of UDC's double buffering either. USB "On-The-Go" is not implemented.
  70 *
  71 * All the requests are handled the same way :
  72 *  - the drivers tries to handle the request directly to the IO
  73 *  - if the IO fifo is not big enough, the remaining is send/received in
  74 *    interrupt handling.
  75 */
  76
  77#define DRIVER_VERSION  "2008-04-18"
  78#define DRIVER_DESC     "PXA 27x USB Device Controller driver"
  79
  80static const char driver_name[] = "pxa27x_udc";
  81static struct pxa_udc *the_controller;
  82
  83static void handle_ep(struct pxa_ep *ep);
  84
  85/*
  86 * Debug filesystem
  87 */
  88#ifdef CONFIG_USB_GADGET_DEBUG_FS
  89
  90#include <linux/debugfs.h>
  91#include <linux/uaccess.h>
  92#include <linux/seq_file.h>
  93
  94static int state_dbg_show(struct seq_file *s, void *p)
  95{
  96        struct pxa_udc *udc = s->private;
  97        u32 tmp;
  98
  99        if (!udc->driver)
 100                return -ENODEV;
 101
 102        /* basic device status */
 103        seq_printf(s, DRIVER_DESC "\n"
 104                   "%s version: %s\n"
 105                   "Gadget driver: %s\n",
 106                   driver_name, DRIVER_VERSION,
 107                   udc->driver ? udc->driver->driver.name : "(none)");
 108
 109        tmp = udc_readl(udc, UDCCR);
 110        seq_printf(s,
 111                   "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), con=%d,inter=%d,altinter=%d\n",
 112                   tmp,
 113                   (tmp & UDCCR_OEN) ? " oen":"",
 114                   (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
 115                   (tmp & UDCCR_AHNP) ? " rem" : "",
 116                   (tmp & UDCCR_BHNP) ? " rstir" : "",
 117                   (tmp & UDCCR_DWRE) ? " dwre" : "",
 118                   (tmp & UDCCR_SMAC) ? " smac" : "",
 119                   (tmp & UDCCR_EMCE) ? " emce" : "",
 120                   (tmp & UDCCR_UDR) ? " udr" : "",
 121                   (tmp & UDCCR_UDA) ? " uda" : "",
 122                   (tmp & UDCCR_UDE) ? " ude" : "",
 123                   (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
 124                   (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
 125                   (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
 126        /* registers for device and ep0 */
 127        seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
 128                   udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
 129        seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
 130                   udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
 131        seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
 132        seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, reconfig=%lu\n",
 133                   udc->stats.irqs_reset, udc->stats.irqs_suspend,
 134                   udc->stats.irqs_resume, udc->stats.irqs_reconfig);
 135
 136        return 0;
 137}
 138
 139static int queues_dbg_show(struct seq_file *s, void *p)
 140{
 141        struct pxa_udc *udc = s->private;
 142        struct pxa_ep *ep;
 143        struct pxa27x_request *req;
 144        int i, maxpkt;
 145
 146        if (!udc->driver)
 147                return -ENODEV;
 148
 149        /* dump endpoint queues */
 150        for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
 151                ep = &udc->pxa_ep[i];
 152                maxpkt = ep->fifo_size;
 153                seq_printf(s,  "%-12s max_pkt=%d %s\n",
 154                           EPNAME(ep), maxpkt, "pio");
 155
 156                if (list_empty(&ep->queue)) {
 157                        seq_puts(s, "\t(nothing queued)\n");
 158                        continue;
 159                }
 160
 161                list_for_each_entry(req, &ep->queue, queue) {
 162                        seq_printf(s,  "\treq %p len %d/%d buf %p\n",
 163                                   &req->req, req->req.actual,
 164                                   req->req.length, req->req.buf);
 165                }
 166        }
 167
 168        return 0;
 169}
 170
 171static int eps_dbg_show(struct seq_file *s, void *p)
 172{
 173        struct pxa_udc *udc = s->private;
 174        struct pxa_ep *ep;
 175        int i;
 176        u32 tmp;
 177
 178        if (!udc->driver)
 179                return -ENODEV;
 180
 181        ep = &udc->pxa_ep[0];
 182        tmp = udc_ep_readl(ep, UDCCSR);
 183        seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n",
 184                   tmp,
 185                   (tmp & UDCCSR0_SA) ? " sa" : "",
 186                   (tmp & UDCCSR0_RNE) ? " rne" : "",
 187                   (tmp & UDCCSR0_FST) ? " fst" : "",
 188                   (tmp & UDCCSR0_SST) ? " sst" : "",
 189                   (tmp & UDCCSR0_DME) ? " dme" : "",
 190                   (tmp & UDCCSR0_IPR) ? " ipr" : "",
 191                   (tmp & UDCCSR0_OPC) ? " opc" : "");
 192        for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
 193                ep = &udc->pxa_ep[i];
 194                tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
 195                seq_printf(s, "%-12s: IN %lu(%lu reqs), OUT %lu(%lu reqs), irqs=%lu, udccr=0x%08x, udccsr=0x%03x, udcbcr=%d\n",
 196                           EPNAME(ep),
 197                           ep->stats.in_bytes, ep->stats.in_ops,
 198                           ep->stats.out_bytes, ep->stats.out_ops,
 199                           ep->stats.irqs,
 200                           tmp, udc_ep_readl(ep, UDCCSR),
 201                           udc_ep_readl(ep, UDCBCR));
 202        }
 203
 204        return 0;
 205}
 206
 207static int eps_dbg_open(struct inode *inode, struct file *file)
 208{
 209        return single_open(file, eps_dbg_show, inode->i_private);
 210}
 211
 212static int queues_dbg_open(struct inode *inode, struct file *file)
 213{
 214        return single_open(file, queues_dbg_show, inode->i_private);
 215}
 216
 217static int state_dbg_open(struct inode *inode, struct file *file)
 218{
 219        return single_open(file, state_dbg_show, inode->i_private);
 220}
 221
 222static const struct file_operations state_dbg_fops = {
 223        .owner          = THIS_MODULE,
 224        .open           = state_dbg_open,
 225        .llseek         = seq_lseek,
 226        .read           = seq_read,
 227        .release        = single_release,
 228};
 229
 230static const struct file_operations queues_dbg_fops = {
 231        .owner          = THIS_MODULE,
 232        .open           = queues_dbg_open,
 233        .llseek         = seq_lseek,
 234        .read           = seq_read,
 235        .release        = single_release,
 236};
 237
 238static const struct file_operations eps_dbg_fops = {
 239        .owner          = THIS_MODULE,
 240        .open           = eps_dbg_open,
 241        .llseek         = seq_lseek,
 242        .read           = seq_read,
 243        .release        = single_release,
 244};
 245
 246static void pxa_init_debugfs(struct pxa_udc *udc)
 247{
 248        struct dentry *root, *state, *queues, *eps;
 249
 250        root = debugfs_create_dir(udc->gadget.name, NULL);
 251        if (IS_ERR(root) || !root)
 252                goto err_root;
 253
 254        state = debugfs_create_file("udcstate", 0400, root, udc,
 255                        &state_dbg_fops);
 256        if (!state)
 257                goto err_state;
 258        queues = debugfs_create_file("queues", 0400, root, udc,
 259                        &queues_dbg_fops);
 260        if (!queues)
 261                goto err_queues;
 262        eps = debugfs_create_file("epstate", 0400, root, udc,
 263                        &eps_dbg_fops);
 264        if (!eps)
 265                goto err_eps;
 266
 267        udc->debugfs_root = root;
 268        udc->debugfs_state = state;
 269        udc->debugfs_queues = queues;
 270        udc->debugfs_eps = eps;
 271        return;
 272err_eps:
 273        debugfs_remove(eps);
 274err_queues:
 275        debugfs_remove(queues);
 276err_state:
 277        debugfs_remove(root);
 278err_root:
 279        dev_err(udc->dev, "debugfs is not available\n");
 280}
 281
 282static void pxa_cleanup_debugfs(struct pxa_udc *udc)
 283{
 284        debugfs_remove(udc->debugfs_eps);
 285        debugfs_remove(udc->debugfs_queues);
 286        debugfs_remove(udc->debugfs_state);
 287        debugfs_remove(udc->debugfs_root);
 288        udc->debugfs_eps = NULL;
 289        udc->debugfs_queues = NULL;
 290        udc->debugfs_state = NULL;
 291        udc->debugfs_root = NULL;
 292}
 293
 294#else
 295static inline void pxa_init_debugfs(struct pxa_udc *udc)
 296{
 297}
 298
 299static inline void pxa_cleanup_debugfs(struct pxa_udc *udc)
 300{
 301}
 302#endif
 303
 304/**
 305 * is_match_usb_pxa - check if usb_ep and pxa_ep match
 306 * @udc_usb_ep: usb endpoint
 307 * @ep: pxa endpoint
 308 * @config: configuration required in pxa_ep
 309 * @interface: interface required in pxa_ep
 310 * @altsetting: altsetting required in pxa_ep
 311 *
 312 * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise
 313 */
 314static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep,
 315                int config, int interface, int altsetting)
 316{
 317        if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr)
 318                return 0;
 319        if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in)
 320                return 0;
 321        if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type)
 322                return 0;
 323        if ((ep->config != config) || (ep->interface != interface)
 324                        || (ep->alternate != altsetting))
 325                return 0;
 326        return 1;
 327}
 328
 329/**
 330 * find_pxa_ep - find pxa_ep structure matching udc_usb_ep
 331 * @udc: pxa udc
 332 * @udc_usb_ep: udc_usb_ep structure
 333 *
 334 * Match udc_usb_ep and all pxa_ep available, to see if one matches.
 335 * This is necessary because of the strong pxa hardware restriction requiring
 336 * that once pxa endpoints are initialized, their configuration is freezed, and
 337 * no change can be made to their address, direction, or in which configuration,
 338 * interface or altsetting they are active ... which differs from more usual
 339 * models which have endpoints be roughly just addressable fifos, and leave
 340 * configuration events up to gadget drivers (like all control messages).
 341 *
 342 * Note that there is still a blurred point here :
 343 *   - we rely on UDCCR register "active interface" and "active altsetting".
 344 *     This is a nonsense in regard of USB spec, where multiple interfaces are
 345 *     active at the same time.
 346 *   - if we knew for sure that the pxa can handle multiple interface at the
 347 *     same time, assuming Intel's Developer Guide is wrong, this function
 348 *     should be reviewed, and a cache of couples (iface, altsetting) should
 349 *     be kept in the pxa_udc structure. In this case this function would match
 350 *     against the cache of couples instead of the "last altsetting" set up.
 351 *
 352 * Returns the matched pxa_ep structure or NULL if none found
 353 */
 354static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc,
 355                struct udc_usb_ep *udc_usb_ep)
 356{
 357        int i;
 358        struct pxa_ep *ep;
 359        int cfg = udc->config;
 360        int iface = udc->last_interface;
 361        int alt = udc->last_alternate;
 362
 363        if (udc_usb_ep == &udc->udc_usb_ep[0])
 364                return &udc->pxa_ep[0];
 365
 366        for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
 367                ep = &udc->pxa_ep[i];
 368                if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt))
 369                        return ep;
 370        }
 371        return NULL;
 372}
 373
 374/**
 375 * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep
 376 * @udc: pxa udc
 377 *
 378 * Context: in_interrupt()
 379 *
 380 * Updates all pxa_ep fields in udc_usb_ep structures, if this field was
 381 * previously set up (and is not NULL). The update is necessary is a
 382 * configuration change or altsetting change was issued by the USB host.
 383 */
 384static void update_pxa_ep_matches(struct pxa_udc *udc)
 385{
 386        int i;
 387        struct udc_usb_ep *udc_usb_ep;
 388
 389        for (i = 1; i < NR_USB_ENDPOINTS; i++) {
 390                udc_usb_ep = &udc->udc_usb_ep[i];
 391                if (udc_usb_ep->pxa_ep)
 392                        udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep);
 393        }
 394}
 395
 396/**
 397 * pio_irq_enable - Enables irq generation for one endpoint
 398 * @ep: udc endpoint
 399 */
 400static void pio_irq_enable(struct pxa_ep *ep)
 401{
 402        struct pxa_udc *udc = ep->dev;
 403        int index = EPIDX(ep);
 404        u32 udcicr0 = udc_readl(udc, UDCICR0);
 405        u32 udcicr1 = udc_readl(udc, UDCICR1);
 406
 407        if (index < 16)
 408                udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2)));
 409        else
 410                udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2)));
 411}
 412
 413/**
 414 * pio_irq_disable - Disables irq generation for one endpoint
 415 * @ep: udc endpoint
 416 */
 417static void pio_irq_disable(struct pxa_ep *ep)
 418{
 419        struct pxa_udc *udc = ep->dev;
 420        int index = EPIDX(ep);
 421        u32 udcicr0 = udc_readl(udc, UDCICR0);
 422        u32 udcicr1 = udc_readl(udc, UDCICR1);
 423
 424        if (index < 16)
 425                udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2)));
 426        else
 427                udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2)));
 428}
 429
 430/**
 431 * udc_set_mask_UDCCR - set bits in UDCCR
 432 * @udc: udc device
 433 * @mask: bits to set in UDCCR
 434 *
 435 * Sets bits in UDCCR, leaving DME and FST bits as they were.
 436 */
 437static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask)
 438{
 439        u32 udccr = udc_readl(udc, UDCCR);
 440        udc_writel(udc, UDCCR,
 441                        (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS));
 442}
 443
 444/**
 445 * udc_clear_mask_UDCCR - clears bits in UDCCR
 446 * @udc: udc device
 447 * @mask: bit to clear in UDCCR
 448 *
 449 * Clears bits in UDCCR, leaving DME and FST bits as they were.
 450 */
 451static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask)
 452{
 453        u32 udccr = udc_readl(udc, UDCCR);
 454        udc_writel(udc, UDCCR,
 455                        (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS));
 456}
 457
 458/**
 459 * ep_write_UDCCSR - set bits in UDCCSR
 460 * @udc: udc device
 461 * @mask: bits to set in UDCCR
 462 *
 463 * Sets bits in UDCCSR (UDCCSR0 and UDCCSR*).
 464 *
 465 * A specific case is applied to ep0 : the ACM bit is always set to 1, for
 466 * SET_INTERFACE and SET_CONFIGURATION.
 467 */
 468static inline void ep_write_UDCCSR(struct pxa_ep *ep, int mask)
 469{
 470        if (is_ep0(ep))
 471                mask |= UDCCSR0_ACM;
 472        udc_ep_writel(ep, UDCCSR, mask);
 473}
 474
 475/**
 476 * ep_count_bytes_remain - get how many bytes in udc endpoint
 477 * @ep: udc endpoint
 478 *
 479 * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP)
 480 */
 481static int ep_count_bytes_remain(struct pxa_ep *ep)
 482{
 483        if (ep->dir_in)
 484                return -EOPNOTSUPP;
 485        return udc_ep_readl(ep, UDCBCR) & 0x3ff;
 486}
 487
 488/**
 489 * ep_is_empty - checks if ep has byte ready for reading
 490 * @ep: udc endpoint
 491 *
 492 * If endpoint is the control endpoint, checks if there are bytes in the
 493 * control endpoint fifo. If endpoint is a data endpoint, checks if bytes
 494 * are ready for reading on OUT endpoint.
 495 *
 496 * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint
 497 */
 498static int ep_is_empty(struct pxa_ep *ep)
 499{
 500        int ret;
 501
 502        if (!is_ep0(ep) && ep->dir_in)
 503                return -EOPNOTSUPP;
 504        if (is_ep0(ep))
 505                ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE);
 506        else
 507                ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE);
 508        return ret;
 509}
 510
 511/**
 512 * ep_is_full - checks if ep has place to write bytes
 513 * @ep: udc endpoint
 514 *
 515 * If endpoint is not the control endpoint and is an IN endpoint, checks if
 516 * there is place to write bytes into the endpoint.
 517 *
 518 * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint
 519 */
 520static int ep_is_full(struct pxa_ep *ep)
 521{
 522        if (is_ep0(ep))
 523                return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR);
 524        if (!ep->dir_in)
 525                return -EOPNOTSUPP;
 526        return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF));
 527}
 528
 529/**
 530 * epout_has_pkt - checks if OUT endpoint fifo has a packet available
 531 * @ep: pxa endpoint
 532 *
 533 * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep.
 534 */
 535static int epout_has_pkt(struct pxa_ep *ep)
 536{
 537        if (!is_ep0(ep) && ep->dir_in)
 538                return -EOPNOTSUPP;
 539        if (is_ep0(ep))
 540                return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC);
 541        return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC);
 542}
 543
 544/**
 545 * set_ep0state - Set ep0 automata state
 546 * @dev: udc device
 547 * @state: state
 548 */
 549static void set_ep0state(struct pxa_udc *udc, int state)
 550{
 551        struct pxa_ep *ep = &udc->pxa_ep[0];
 552        char *old_stname = EP0_STNAME(udc);
 553
 554        udc->ep0state = state;
 555        ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname,
 556                EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR),
 557                udc_ep_readl(ep, UDCBCR));
 558}
 559
 560/**
 561 * ep0_idle - Put control endpoint into idle state
 562 * @dev: udc device
 563 */
 564static void ep0_idle(struct pxa_udc *dev)
 565{
 566        set_ep0state(dev, WAIT_FOR_SETUP);
 567}
 568
 569/**
 570 * inc_ep_stats_reqs - Update ep stats counts
 571 * @ep: physical endpoint
 572 * @req: usb request
 573 * @is_in: ep direction (USB_DIR_IN or 0)
 574 *
 575 */
 576static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in)
 577{
 578        if (is_in)
 579                ep->stats.in_ops++;
 580        else
 581                ep->stats.out_ops++;
 582}
 583
 584/**
 585 * inc_ep_stats_bytes - Update ep stats counts
 586 * @ep: physical endpoint
 587 * @count: bytes transferred on endpoint
 588 * @is_in: ep direction (USB_DIR_IN or 0)
 589 */
 590static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in)
 591{
 592        if (is_in)
 593                ep->stats.in_bytes += count;
 594        else
 595                ep->stats.out_bytes += count;
 596}
 597
 598/**
 599 * pxa_ep_setup - Sets up an usb physical endpoint
 600 * @ep: pxa27x physical endpoint
 601 *
 602 * Find the physical pxa27x ep, and setup its UDCCR
 603 */
 604static void pxa_ep_setup(struct pxa_ep *ep)
 605{
 606        u32 new_udccr;
 607
 608        new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN)
 609                | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
 610                | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN)
 611                | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN)
 612                | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET)
 613                | ((ep->dir_in) ? UDCCONR_ED : 0)
 614                | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS)
 615                | UDCCONR_EE;
 616
 617        udc_ep_writel(ep, UDCCR, new_udccr);
 618}
 619
 620/**
 621 * pxa_eps_setup - Sets up all usb physical endpoints
 622 * @dev: udc device
 623 *
 624 * Setup all pxa physical endpoints, except ep0
 625 */
 626static void pxa_eps_setup(struct pxa_udc *dev)
 627{
 628        unsigned int i;
 629
 630        dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev);
 631
 632        for (i = 1; i < NR_PXA_ENDPOINTS; i++)
 633                pxa_ep_setup(&dev->pxa_ep[i]);
 634}
 635
 636/**
 637 * pxa_ep_alloc_request - Allocate usb request
 638 * @_ep: usb endpoint
 639 * @gfp_flags:
 640 *
 641 * For the pxa27x, these can just wrap kmalloc/kfree.  gadget drivers
 642 * must still pass correctly initialized endpoints, since other controller
 643 * drivers may care about how it's currently set up (dma issues etc).
 644  */
 645static struct usb_request *
 646pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
 647{
 648        struct pxa27x_request *req;
 649
 650        req = kzalloc(sizeof *req, gfp_flags);
 651        if (!req)
 652                return NULL;
 653
 654        INIT_LIST_HEAD(&req->queue);
 655        req->in_use = 0;
 656        req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
 657
 658        return &req->req;
 659}
 660
 661/**
 662 * pxa_ep_free_request - Free usb request
 663 * @_ep: usb endpoint
 664 * @_req: usb request
 665 *
 666 * Wrapper around kfree to free _req
 667 */
 668static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
 669{
 670        struct pxa27x_request *req;
 671
 672        req = container_of(_req, struct pxa27x_request, req);
 673        WARN_ON(!list_empty(&req->queue));
 674        kfree(req);
 675}
 676
 677/**
 678 * ep_add_request - add a request to the endpoint's queue
 679 * @ep: usb endpoint
 680 * @req: usb request
 681 *
 682 * Context: ep->lock held
 683 *
 684 * Queues the request in the endpoint's queue, and enables the interrupts
 685 * on the endpoint.
 686 */
 687static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req)
 688{
 689        if (unlikely(!req))
 690                return;
 691        ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
 692                req->req.length, udc_ep_readl(ep, UDCCSR));
 693
 694        req->in_use = 1;
 695        list_add_tail(&req->queue, &ep->queue);
 696        pio_irq_enable(ep);
 697}
 698
 699/**
 700 * ep_del_request - removes a request from the endpoint's queue
 701 * @ep: usb endpoint
 702 * @req: usb request
 703 *
 704 * Context: ep->lock held
 705 *
 706 * Unqueue the request from the endpoint's queue. If there are no more requests
 707 * on the endpoint, and if it's not the control endpoint, interrupts are
 708 * disabled on the endpoint.
 709 */
 710static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req)
 711{
 712        if (unlikely(!req))
 713                return;
 714        ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
 715                req->req.length, udc_ep_readl(ep, UDCCSR));
 716
 717        list_del_init(&req->queue);
 718        req->in_use = 0;
 719        if (!is_ep0(ep) && list_empty(&ep->queue))
 720                pio_irq_disable(ep);
 721}
 722
 723/**
 724 * req_done - Complete an usb request
 725 * @ep: pxa physical endpoint
 726 * @req: pxa request
 727 * @status: usb request status sent to gadget API
 728 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
 729 *
 730 * Context: ep->lock held if flags not NULL, else ep->lock released
 731 *
 732 * Retire a pxa27x usb request. Endpoint must be locked.
 733 */
 734static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status,
 735        unsigned long *pflags)
 736{
 737        unsigned long   flags;
 738
 739        ep_del_request(ep, req);
 740        if (likely(req->req.status == -EINPROGRESS))
 741                req->req.status = status;
 742        else
 743                status = req->req.status;
 744
 745        if (status && status != -ESHUTDOWN)
 746                ep_dbg(ep, "complete req %p stat %d len %u/%u\n",
 747                        &req->req, status,
 748                        req->req.actual, req->req.length);
 749
 750        if (pflags)
 751                spin_unlock_irqrestore(&ep->lock, *pflags);
 752        local_irq_save(flags);
 753        usb_gadget_giveback_request(&req->udc_usb_ep->usb_ep, &req->req);
 754        local_irq_restore(flags);
 755        if (pflags)
 756                spin_lock_irqsave(&ep->lock, *pflags);
 757}
 758
 759/**
 760 * ep_end_out_req - Ends endpoint OUT request
 761 * @ep: physical endpoint
 762 * @req: pxa request
 763 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
 764 *
 765 * Context: ep->lock held or released (see req_done())
 766 *
 767 * Ends endpoint OUT request (completes usb request).
 768 */
 769static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
 770        unsigned long *pflags)
 771{
 772        inc_ep_stats_reqs(ep, !USB_DIR_IN);
 773        req_done(ep, req, 0, pflags);
 774}
 775
 776/**
 777 * ep0_end_out_req - Ends control endpoint OUT request (ends data stage)
 778 * @ep: physical endpoint
 779 * @req: pxa request
 780 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
 781 *
 782 * Context: ep->lock held or released (see req_done())
 783 *
 784 * Ends control endpoint OUT request (completes usb request), and puts
 785 * control endpoint into idle state
 786 */
 787static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
 788        unsigned long *pflags)
 789{
 790        set_ep0state(ep->dev, OUT_STATUS_STAGE);
 791        ep_end_out_req(ep, req, pflags);
 792        ep0_idle(ep->dev);
 793}
 794
 795/**
 796 * ep_end_in_req - Ends endpoint IN request
 797 * @ep: physical endpoint
 798 * @req: pxa request
 799 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
 800 *
 801 * Context: ep->lock held or released (see req_done())
 802 *
 803 * Ends endpoint IN request (completes usb request).
 804 */
 805static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
 806        unsigned long *pflags)
 807{
 808        inc_ep_stats_reqs(ep, USB_DIR_IN);
 809        req_done(ep, req, 0, pflags);
 810}
 811
 812/**
 813 * ep0_end_in_req - Ends control endpoint IN request (ends data stage)
 814 * @ep: physical endpoint
 815 * @req: pxa request
 816 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
 817 *
 818 * Context: ep->lock held or released (see req_done())
 819 *
 820 * Ends control endpoint IN request (completes usb request), and puts
 821 * control endpoint into status state
 822 */
 823static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
 824        unsigned long *pflags)
 825{
 826        set_ep0state(ep->dev, IN_STATUS_STAGE);
 827        ep_end_in_req(ep, req, pflags);
 828}
 829
 830/**
 831 * nuke - Dequeue all requests
 832 * @ep: pxa endpoint
 833 * @status: usb request status
 834 *
 835 * Context: ep->lock released
 836 *
 837 * Dequeues all requests on an endpoint. As a side effect, interrupts will be
 838 * disabled on that endpoint (because no more requests).
 839 */
 840static void nuke(struct pxa_ep *ep, int status)
 841{
 842        struct pxa27x_request   *req;
 843        unsigned long           flags;
 844
 845        spin_lock_irqsave(&ep->lock, flags);
 846        while (!list_empty(&ep->queue)) {
 847                req = list_entry(ep->queue.next, struct pxa27x_request, queue);
 848                req_done(ep, req, status, &flags);
 849        }
 850        spin_unlock_irqrestore(&ep->lock, flags);
 851}
 852
 853/**
 854 * read_packet - transfer 1 packet from an OUT endpoint into request
 855 * @ep: pxa physical endpoint
 856 * @req: usb request
 857 *
 858 * Takes bytes from OUT endpoint and transfers them info the usb request.
 859 * If there is less space in request than bytes received in OUT endpoint,
 860 * bytes are left in the OUT endpoint.
 861 *
 862 * Returns how many bytes were actually transferred
 863 */
 864static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req)
 865{
 866        u32 *buf;
 867        int bytes_ep, bufferspace, count, i;
 868
 869        bytes_ep = ep_count_bytes_remain(ep);
 870        bufferspace = req->req.length - req->req.actual;
 871
 872        buf = (u32 *)(req->req.buf + req->req.actual);
 873        prefetchw(buf);
 874
 875        if (likely(!ep_is_empty(ep)))
 876                count = min(bytes_ep, bufferspace);
 877        else /* zlp */
 878                count = 0;
 879
 880        for (i = count; i > 0; i -= 4)
 881                *buf++ = udc_ep_readl(ep, UDCDR);
 882        req->req.actual += count;
 883
 884        ep_write_UDCCSR(ep, UDCCSR_PC);
 885
 886        return count;
 887}
 888
 889/**
 890 * write_packet - transfer 1 packet from request into an IN endpoint
 891 * @ep: pxa physical endpoint
 892 * @req: usb request
 893 * @max: max bytes that fit into endpoint
 894 *
 895 * Takes bytes from usb request, and transfers them into the physical
 896 * endpoint. If there are no bytes to transfer, doesn't write anything
 897 * to physical endpoint.
 898 *
 899 * Returns how many bytes were actually transferred.
 900 */
 901static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req,
 902                        unsigned int max)
 903{
 904        int length, count, remain, i;
 905        u32 *buf;
 906        u8 *buf_8;
 907
 908        buf = (u32 *)(req->req.buf + req->req.actual);
 909        prefetch(buf);
 910
 911        length = min(req->req.length - req->req.actual, max);
 912        req->req.actual += length;
 913
 914        remain = length & 0x3;
 915        count = length & ~(0x3);
 916        for (i = count; i > 0 ; i -= 4)
 917                udc_ep_writel(ep, UDCDR, *buf++);
 918
 919        buf_8 = (u8 *)buf;
 920        for (i = remain; i > 0; i--)
 921                udc_ep_writeb(ep, UDCDR, *buf_8++);
 922
 923        ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain,
 924                udc_ep_readl(ep, UDCCSR));
 925
 926        return length;
 927}
 928
 929/**
 930 * read_fifo - Transfer packets from OUT endpoint into usb request
 931 * @ep: pxa physical endpoint
 932 * @req: usb request
 933 *
 934 * Context: callable when in_interrupt()
 935 *
 936 * Unload as many packets as possible from the fifo we use for usb OUT
 937 * transfers and put them into the request. Caller should have made sure
 938 * there's at least one packet ready.
 939 * Doesn't complete the request, that's the caller's job
 940 *
 941 * Returns 1 if the request completed, 0 otherwise
 942 */
 943static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
 944{
 945        int count, is_short, completed = 0;
 946
 947        while (epout_has_pkt(ep)) {
 948                count = read_packet(ep, req);
 949                inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
 950
 951                is_short = (count < ep->fifo_size);
 952                ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
 953                        udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
 954                        &req->req, req->req.actual, req->req.length);
 955
 956                /* completion */
 957                if (is_short || req->req.actual == req->req.length) {
 958                        completed = 1;
 959                        break;
 960                }
 961                /* finished that packet.  the next one may be waiting... */
 962        }
 963        return completed;
 964}
 965
 966/**
 967 * write_fifo - transfer packets from usb request into an IN endpoint
 968 * @ep: pxa physical endpoint
 969 * @req: pxa usb request
 970 *
 971 * Write to an IN endpoint fifo, as many packets as possible.
 972 * irqs will use this to write the rest later.
 973 * caller guarantees at least one packet buffer is ready (or a zlp).
 974 * Doesn't complete the request, that's the caller's job
 975 *
 976 * Returns 1 if request fully transferred, 0 if partial transfer
 977 */
 978static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
 979{
 980        unsigned max;
 981        int count, is_short, is_last = 0, completed = 0, totcount = 0;
 982        u32 udccsr;
 983
 984        max = ep->fifo_size;
 985        do {
 986                is_short = 0;
 987
 988                udccsr = udc_ep_readl(ep, UDCCSR);
 989                if (udccsr & UDCCSR_PC) {
 990                        ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n",
 991                                udccsr);
 992                        ep_write_UDCCSR(ep, UDCCSR_PC);
 993                }
 994                if (udccsr & UDCCSR_TRN) {
 995                        ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n",
 996                                udccsr);
 997                        ep_write_UDCCSR(ep, UDCCSR_TRN);
 998                }
 999
1000                count = write_packet(ep, req, max);
1001                inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1002                totcount += count;
1003
1004                /* last packet is usually short (or a zlp) */
1005                if (unlikely(count < max)) {
1006                        is_last = 1;
1007                        is_short = 1;
1008                } else {
1009                        if (likely(req->req.length > req->req.actual)
1010                                        || req->req.zero)
1011                                is_last = 0;
1012                        else
1013                                is_last = 1;
1014                        /* interrupt/iso maxpacket may not fill the fifo */
1015                        is_short = unlikely(max < ep->fifo_size);
1016                }
1017
1018                if (is_short)
1019                        ep_write_UDCCSR(ep, UDCCSR_SP);
1020
1021                /* requests complete when all IN data is in the FIFO */
1022                if (is_last) {
1023                        completed = 1;
1024                        break;
1025                }
1026        } while (!ep_is_full(ep));
1027
1028        ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n",
1029                        totcount, is_last ? "/L" : "", is_short ? "/S" : "",
1030                        req->req.length - req->req.actual, &req->req);
1031
1032        return completed;
1033}
1034
1035/**
1036 * read_ep0_fifo - Transfer packets from control endpoint into usb request
1037 * @ep: control endpoint
1038 * @req: pxa usb request
1039 *
1040 * Special ep0 version of the above read_fifo. Reads as many bytes from control
1041 * endpoint as can be read, and stores them into usb request (limited by request
1042 * maximum length).
1043 *
1044 * Returns 0 if usb request only partially filled, 1 if fully filled
1045 */
1046static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1047{
1048        int count, is_short, completed = 0;
1049
1050        while (epout_has_pkt(ep)) {
1051                count = read_packet(ep, req);
1052                ep_write_UDCCSR(ep, UDCCSR0_OPC);
1053                inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
1054
1055                is_short = (count < ep->fifo_size);
1056                ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
1057                        udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
1058                        &req->req, req->req.actual, req->req.length);
1059
1060                if (is_short || req->req.actual >= req->req.length) {
1061                        completed = 1;
1062                        break;
1063                }
1064        }
1065
1066        return completed;
1067}
1068
1069/**
1070 * write_ep0_fifo - Send a request to control endpoint (ep0 in)
1071 * @ep: control endpoint
1072 * @req: request
1073 *
1074 * Context: callable when in_interrupt()
1075 *
1076 * Sends a request (or a part of the request) to the control endpoint (ep0 in).
1077 * If the request doesn't fit, the remaining part will be sent from irq.
1078 * The request is considered fully written only if either :
1079 *   - last write transferred all remaining bytes, but fifo was not fully filled
1080 *   - last write was a 0 length write
1081 *
1082 * Returns 1 if request fully written, 0 if request only partially sent
1083 */
1084static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1085{
1086        unsigned        count;
1087        int             is_last, is_short;
1088
1089        count = write_packet(ep, req, EP0_FIFO_SIZE);
1090        inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1091
1092        is_short = (count < EP0_FIFO_SIZE);
1093        is_last = ((count == 0) || (count < EP0_FIFO_SIZE));
1094
1095        /* Sends either a short packet or a 0 length packet */
1096        if (unlikely(is_short))
1097                ep_write_UDCCSR(ep, UDCCSR0_IPR);
1098
1099        ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1100                count, is_short ? "/S" : "", is_last ? "/L" : "",
1101                req->req.length - req->req.actual,
1102                &req->req, udc_ep_readl(ep, UDCCSR));
1103
1104        return is_last;
1105}
1106
1107/**
1108 * pxa_ep_queue - Queue a request into an IN endpoint
1109 * @_ep: usb endpoint
1110 * @_req: usb request
1111 * @gfp_flags: flags
1112 *
1113 * Context: normally called when !in_interrupt, but callable when in_interrupt()
1114 * in the special case of ep0 setup :
1115 *   (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue)
1116 *
1117 * Returns 0 if succedeed, error otherwise
1118 */
1119static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1120                        gfp_t gfp_flags)
1121{
1122        struct udc_usb_ep       *udc_usb_ep;
1123        struct pxa_ep           *ep;
1124        struct pxa27x_request   *req;
1125        struct pxa_udc          *dev;
1126        unsigned long           flags;
1127        int                     rc = 0;
1128        int                     is_first_req;
1129        unsigned                length;
1130        int                     recursion_detected;
1131
1132        req = container_of(_req, struct pxa27x_request, req);
1133        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1134
1135        if (unlikely(!_req || !_req->complete || !_req->buf))
1136                return -EINVAL;
1137
1138        if (unlikely(!_ep))
1139                return -EINVAL;
1140
1141        dev = udc_usb_ep->dev;
1142        ep = udc_usb_ep->pxa_ep;
1143        if (unlikely(!ep))
1144                return -EINVAL;
1145
1146        dev = ep->dev;
1147        if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1148                ep_dbg(ep, "bogus device state\n");
1149                return -ESHUTDOWN;
1150        }
1151
1152        /* iso is always one packet per request, that's the only way
1153         * we can report per-packet status.  that also helps with dma.
1154         */
1155        if (unlikely(EPXFERTYPE_is_ISO(ep)
1156                        && req->req.length > ep->fifo_size))
1157                return -EMSGSIZE;
1158
1159        spin_lock_irqsave(&ep->lock, flags);
1160        recursion_detected = ep->in_handle_ep;
1161
1162        is_first_req = list_empty(&ep->queue);
1163        ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n",
1164                        _req, is_first_req ? "yes" : "no",
1165                        _req->length, _req->buf);
1166
1167        if (!ep->enabled) {
1168                _req->status = -ESHUTDOWN;
1169                rc = -ESHUTDOWN;
1170                goto out_locked;
1171        }
1172
1173        if (req->in_use) {
1174                ep_err(ep, "refusing to queue req %p (already queued)\n", req);
1175                goto out_locked;
1176        }
1177
1178        length = _req->length;
1179        _req->status = -EINPROGRESS;
1180        _req->actual = 0;
1181
1182        ep_add_request(ep, req);
1183        spin_unlock_irqrestore(&ep->lock, flags);
1184
1185        if (is_ep0(ep)) {
1186                switch (dev->ep0state) {
1187                case WAIT_ACK_SET_CONF_INTERF:
1188                        if (length == 0) {
1189                                ep_end_in_req(ep, req, NULL);
1190                        } else {
1191                                ep_err(ep, "got a request of %d bytes while"
1192                                        "in state WAIT_ACK_SET_CONF_INTERF\n",
1193                                        length);
1194                                ep_del_request(ep, req);
1195                                rc = -EL2HLT;
1196                        }
1197                        ep0_idle(ep->dev);
1198                        break;
1199                case IN_DATA_STAGE:
1200                        if (!ep_is_full(ep))
1201                                if (write_ep0_fifo(ep, req))
1202                                        ep0_end_in_req(ep, req, NULL);
1203                        break;
1204                case OUT_DATA_STAGE:
1205                        if ((length == 0) || !epout_has_pkt(ep))
1206                                if (read_ep0_fifo(ep, req))
1207                                        ep0_end_out_req(ep, req, NULL);
1208                        break;
1209                default:
1210                        ep_err(ep, "odd state %s to send me a request\n",
1211                                EP0_STNAME(ep->dev));
1212                        ep_del_request(ep, req);
1213                        rc = -EL2HLT;
1214                        break;
1215                }
1216        } else {
1217                if (!recursion_detected)
1218                        handle_ep(ep);
1219        }
1220
1221out:
1222        return rc;
1223out_locked:
1224        spin_unlock_irqrestore(&ep->lock, flags);
1225        goto out;
1226}
1227
1228/**
1229 * pxa_ep_dequeue - Dequeue one request
1230 * @_ep: usb endpoint
1231 * @_req: usb request
1232 *
1233 * Return 0 if no error, -EINVAL or -ECONNRESET otherwise
1234 */
1235static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1236{
1237        struct pxa_ep           *ep;
1238        struct udc_usb_ep       *udc_usb_ep;
1239        struct pxa27x_request   *req;
1240        unsigned long           flags;
1241        int                     rc = -EINVAL;
1242
1243        if (!_ep)
1244                return rc;
1245        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1246        ep = udc_usb_ep->pxa_ep;
1247        if (!ep || is_ep0(ep))
1248                return rc;
1249
1250        spin_lock_irqsave(&ep->lock, flags);
1251
1252        /* make sure it's actually queued on this endpoint */
1253        list_for_each_entry(req, &ep->queue, queue) {
1254                if (&req->req == _req) {
1255                        rc = 0;
1256                        break;
1257                }
1258        }
1259
1260        spin_unlock_irqrestore(&ep->lock, flags);
1261        if (!rc)
1262                req_done(ep, req, -ECONNRESET, NULL);
1263        return rc;
1264}
1265
1266/**
1267 * pxa_ep_set_halt - Halts operations on one endpoint
1268 * @_ep: usb endpoint
1269 * @value:
1270 *
1271 * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise
1272 */
1273static int pxa_ep_set_halt(struct usb_ep *_ep, int value)
1274{
1275        struct pxa_ep           *ep;
1276        struct udc_usb_ep       *udc_usb_ep;
1277        unsigned long flags;
1278        int rc;
1279
1280
1281        if (!_ep)
1282                return -EINVAL;
1283        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1284        ep = udc_usb_ep->pxa_ep;
1285        if (!ep || is_ep0(ep))
1286                return -EINVAL;
1287
1288        if (value == 0) {
1289                /*
1290                 * This path (reset toggle+halt) is needed to implement
1291                 * SET_INTERFACE on normal hardware.  but it can't be
1292                 * done from software on the PXA UDC, and the hardware
1293                 * forgets to do it as part of SET_INTERFACE automagic.
1294                 */
1295                ep_dbg(ep, "only host can clear halt\n");
1296                return -EROFS;
1297        }
1298
1299        spin_lock_irqsave(&ep->lock, flags);
1300
1301        rc = -EAGAIN;
1302        if (ep->dir_in  && (ep_is_full(ep) || !list_empty(&ep->queue)))
1303                goto out;
1304
1305        /* FST, FEF bits are the same for control and non control endpoints */
1306        rc = 0;
1307        ep_write_UDCCSR(ep, UDCCSR_FST | UDCCSR_FEF);
1308        if (is_ep0(ep))
1309                set_ep0state(ep->dev, STALL);
1310
1311out:
1312        spin_unlock_irqrestore(&ep->lock, flags);
1313        return rc;
1314}
1315
1316/**
1317 * pxa_ep_fifo_status - Get how many bytes in physical endpoint
1318 * @_ep: usb endpoint
1319 *
1320 * Returns number of bytes in OUT fifos. Broken for IN fifos.
1321 */
1322static int pxa_ep_fifo_status(struct usb_ep *_ep)
1323{
1324        struct pxa_ep           *ep;
1325        struct udc_usb_ep       *udc_usb_ep;
1326
1327        if (!_ep)
1328                return -ENODEV;
1329        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1330        ep = udc_usb_ep->pxa_ep;
1331        if (!ep || is_ep0(ep))
1332                return -ENODEV;
1333
1334        if (ep->dir_in)
1335                return -EOPNOTSUPP;
1336        if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep))
1337                return 0;
1338        else
1339                return ep_count_bytes_remain(ep) + 1;
1340}
1341
1342/**
1343 * pxa_ep_fifo_flush - Flushes one endpoint
1344 * @_ep: usb endpoint
1345 *
1346 * Discards all data in one endpoint(IN or OUT), except control endpoint.
1347 */
1348static void pxa_ep_fifo_flush(struct usb_ep *_ep)
1349{
1350        struct pxa_ep           *ep;
1351        struct udc_usb_ep       *udc_usb_ep;
1352        unsigned long           flags;
1353
1354        if (!_ep)
1355                return;
1356        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1357        ep = udc_usb_ep->pxa_ep;
1358        if (!ep || is_ep0(ep))
1359                return;
1360
1361        spin_lock_irqsave(&ep->lock, flags);
1362
1363        if (unlikely(!list_empty(&ep->queue)))
1364                ep_dbg(ep, "called while queue list not empty\n");
1365        ep_dbg(ep, "called\n");
1366
1367        /* for OUT, just read and discard the FIFO contents. */
1368        if (!ep->dir_in) {
1369                while (!ep_is_empty(ep))
1370                        udc_ep_readl(ep, UDCDR);
1371        } else {
1372                /* most IN status is the same, but ISO can't stall */
1373                ep_write_UDCCSR(ep,
1374                                UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN
1375                                | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST));
1376        }
1377
1378        spin_unlock_irqrestore(&ep->lock, flags);
1379}
1380
1381/**
1382 * pxa_ep_enable - Enables usb endpoint
1383 * @_ep: usb endpoint
1384 * @desc: usb endpoint descriptor
1385 *
1386 * Nothing much to do here, as ep configuration is done once and for all
1387 * before udc is enabled. After udc enable, no physical endpoint configuration
1388 * can be changed.
1389 * Function makes sanity checks and flushes the endpoint.
1390 */
1391static int pxa_ep_enable(struct usb_ep *_ep,
1392        const struct usb_endpoint_descriptor *desc)
1393{
1394        struct pxa_ep           *ep;
1395        struct udc_usb_ep       *udc_usb_ep;
1396        struct pxa_udc          *udc;
1397
1398        if (!_ep || !desc)
1399                return -EINVAL;
1400
1401        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1402        if (udc_usb_ep->pxa_ep) {
1403                ep = udc_usb_ep->pxa_ep;
1404                ep_warn(ep, "usb_ep %s already enabled, doing nothing\n",
1405                        _ep->name);
1406        } else {
1407                ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep);
1408        }
1409
1410        if (!ep || is_ep0(ep)) {
1411                dev_err(udc_usb_ep->dev->dev,
1412                        "unable to match pxa_ep for ep %s\n",
1413                        _ep->name);
1414                return -EINVAL;
1415        }
1416
1417        if ((desc->bDescriptorType != USB_DT_ENDPOINT)
1418                        || (ep->type != usb_endpoint_type(desc))) {
1419                ep_err(ep, "type mismatch\n");
1420                return -EINVAL;
1421        }
1422
1423        if (ep->fifo_size < usb_endpoint_maxp(desc)) {
1424                ep_err(ep, "bad maxpacket\n");
1425                return -ERANGE;
1426        }
1427
1428        udc_usb_ep->pxa_ep = ep;
1429        udc = ep->dev;
1430
1431        if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1432                ep_err(ep, "bogus device state\n");
1433                return -ESHUTDOWN;
1434        }
1435
1436        ep->enabled = 1;
1437
1438        /* flush fifo (mostly for OUT buffers) */
1439        pxa_ep_fifo_flush(_ep);
1440
1441        ep_dbg(ep, "enabled\n");
1442        return 0;
1443}
1444
1445/**
1446 * pxa_ep_disable - Disable usb endpoint
1447 * @_ep: usb endpoint
1448 *
1449 * Same as for pxa_ep_enable, no physical endpoint configuration can be
1450 * changed.
1451 * Function flushes the endpoint and related requests.
1452 */
1453static int pxa_ep_disable(struct usb_ep *_ep)
1454{
1455        struct pxa_ep           *ep;
1456        struct udc_usb_ep       *udc_usb_ep;
1457
1458        if (!_ep)
1459                return -EINVAL;
1460
1461        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1462        ep = udc_usb_ep->pxa_ep;
1463        if (!ep || is_ep0(ep) || !list_empty(&ep->queue))
1464                return -EINVAL;
1465
1466        ep->enabled = 0;
1467        nuke(ep, -ESHUTDOWN);
1468
1469        pxa_ep_fifo_flush(_ep);
1470        udc_usb_ep->pxa_ep = NULL;
1471
1472        ep_dbg(ep, "disabled\n");
1473        return 0;
1474}
1475
1476static struct usb_ep_ops pxa_ep_ops = {
1477        .enable         = pxa_ep_enable,
1478        .disable        = pxa_ep_disable,
1479
1480        .alloc_request  = pxa_ep_alloc_request,
1481        .free_request   = pxa_ep_free_request,
1482
1483        .queue          = pxa_ep_queue,
1484        .dequeue        = pxa_ep_dequeue,
1485
1486        .set_halt       = pxa_ep_set_halt,
1487        .fifo_status    = pxa_ep_fifo_status,
1488        .fifo_flush     = pxa_ep_fifo_flush,
1489};
1490
1491/**
1492 * dplus_pullup - Connect or disconnect pullup resistor to D+ pin
1493 * @udc: udc device
1494 * @on: 0 if disconnect pullup resistor, 1 otherwise
1495 * Context: any
1496 *
1497 * Handle D+ pullup resistor, make the device visible to the usb bus, and
1498 * declare it as a full speed usb device
1499 */
1500static void dplus_pullup(struct pxa_udc *udc, int on)
1501{
1502        if (udc->gpiod) {
1503                gpiod_set_value(udc->gpiod, on);
1504        } else if (udc->udc_command) {
1505                if (on)
1506                        udc->udc_command(PXA2XX_UDC_CMD_CONNECT);
1507                else
1508                        udc->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
1509        }
1510        udc->pullup_on = on;
1511}
1512
1513/**
1514 * pxa_udc_get_frame - Returns usb frame number
1515 * @_gadget: usb gadget
1516 */
1517static int pxa_udc_get_frame(struct usb_gadget *_gadget)
1518{
1519        struct pxa_udc *udc = to_gadget_udc(_gadget);
1520
1521        return (udc_readl(udc, UDCFNR) & 0x7ff);
1522}
1523
1524/**
1525 * pxa_udc_wakeup - Force udc device out of suspend
1526 * @_gadget: usb gadget
1527 *
1528 * Returns 0 if successful, error code otherwise
1529 */
1530static int pxa_udc_wakeup(struct usb_gadget *_gadget)
1531{
1532        struct pxa_udc *udc = to_gadget_udc(_gadget);
1533
1534        /* host may not have enabled remote wakeup */
1535        if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
1536                return -EHOSTUNREACH;
1537        udc_set_mask_UDCCR(udc, UDCCR_UDR);
1538        return 0;
1539}
1540
1541static void udc_enable(struct pxa_udc *udc);
1542static void udc_disable(struct pxa_udc *udc);
1543
1544/**
1545 * should_enable_udc - Tells if UDC should be enabled
1546 * @udc: udc device
1547 * Context: any
1548 *
1549 * The UDC should be enabled if :
1550
1551 *  - the pullup resistor is connected
1552 *  - and a gadget driver is bound
1553 *  - and vbus is sensed (or no vbus sense is available)
1554 *
1555 * Returns 1 if UDC should be enabled, 0 otherwise
1556 */
1557static int should_enable_udc(struct pxa_udc *udc)
1558{
1559        int put_on;
1560
1561        put_on = ((udc->pullup_on) && (udc->driver));
1562        put_on &= ((udc->vbus_sensed) || (IS_ERR_OR_NULL(udc->transceiver)));
1563        return put_on;
1564}
1565
1566/**
1567 * should_disable_udc - Tells if UDC should be disabled
1568 * @udc: udc device
1569 * Context: any
1570 *
1571 * The UDC should be disabled if :
1572 *  - the pullup resistor is not connected
1573 *  - or no gadget driver is bound
1574 *  - or no vbus is sensed (when vbus sesing is available)
1575 *
1576 * Returns 1 if UDC should be disabled
1577 */
1578static int should_disable_udc(struct pxa_udc *udc)
1579{
1580        int put_off;
1581
1582        put_off = ((!udc->pullup_on) || (!udc->driver));
1583        put_off |= ((!udc->vbus_sensed) && (!IS_ERR_OR_NULL(udc->transceiver)));
1584        return put_off;
1585}
1586
1587/**
1588 * pxa_udc_pullup - Offer manual D+ pullup control
1589 * @_gadget: usb gadget using the control
1590 * @is_active: 0 if disconnect, else connect D+ pullup resistor
1591 * Context: !in_interrupt()
1592 *
1593 * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
1594 */
1595static int pxa_udc_pullup(struct usb_gadget *_gadget, int is_active)
1596{
1597        struct pxa_udc *udc = to_gadget_udc(_gadget);
1598
1599        if (!udc->gpiod && !udc->udc_command)
1600                return -EOPNOTSUPP;
1601
1602        dplus_pullup(udc, is_active);
1603
1604        if (should_enable_udc(udc))
1605                udc_enable(udc);
1606        if (should_disable_udc(udc))
1607                udc_disable(udc);
1608        return 0;
1609}
1610
1611static void udc_enable(struct pxa_udc *udc);
1612static void udc_disable(struct pxa_udc *udc);
1613
1614/**
1615 * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc
1616 * @_gadget: usb gadget
1617 * @is_active: 0 if should disable the udc, 1 if should enable
1618 *
1619 * Enables the udc, and optionnaly activates D+ pullup resistor. Or disables the
1620 * udc, and deactivates D+ pullup resistor.
1621 *
1622 * Returns 0
1623 */
1624static int pxa_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1625{
1626        struct pxa_udc *udc = to_gadget_udc(_gadget);
1627
1628        udc->vbus_sensed = is_active;
1629        if (should_enable_udc(udc))
1630                udc_enable(udc);
1631        if (should_disable_udc(udc))
1632                udc_disable(udc);
1633
1634        return 0;
1635}
1636
1637/**
1638 * pxa_udc_vbus_draw - Called by gadget driver after SET_CONFIGURATION completed
1639 * @_gadget: usb gadget
1640 * @mA: current drawn
1641 *
1642 * Context: !in_interrupt()
1643 *
1644 * Called after a configuration was chosen by a USB host, to inform how much
1645 * current can be drawn by the device from VBus line.
1646 *
1647 * Returns 0 or -EOPNOTSUPP if no transceiver is handling the udc
1648 */
1649static int pxa_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1650{
1651        struct pxa_udc *udc;
1652
1653        udc = to_gadget_udc(_gadget);
1654        if (!IS_ERR_OR_NULL(udc->transceiver))
1655                return usb_phy_set_power(udc->transceiver, mA);
1656        return -EOPNOTSUPP;
1657}
1658
1659/**
1660 * pxa_udc_phy_event - Called by phy upon VBus event
1661 * @nb: notifier block
1662 * @action: phy action, is vbus connect or disconnect
1663 * @data: the usb_gadget structure in pxa_udc
1664 *
1665 * Called by the USB Phy when a cable connect or disconnect is sensed.
1666 *
1667 * Returns 0
1668 */
1669static int pxa_udc_phy_event(struct notifier_block *nb, unsigned long action,
1670                             void *data)
1671{
1672        struct usb_gadget *gadget = data;
1673
1674        switch (action) {
1675        case USB_EVENT_VBUS:
1676                usb_gadget_vbus_connect(gadget);
1677                return NOTIFY_OK;
1678        case USB_EVENT_NONE:
1679                usb_gadget_vbus_disconnect(gadget);
1680                return NOTIFY_OK;
1681        default:
1682                return NOTIFY_DONE;
1683        }
1684}
1685
1686static struct notifier_block pxa27x_udc_phy = {
1687        .notifier_call = pxa_udc_phy_event,
1688};
1689
1690static int pxa27x_udc_start(struct usb_gadget *g,
1691                struct usb_gadget_driver *driver);
1692static int pxa27x_udc_stop(struct usb_gadget *g);
1693
1694static const struct usb_gadget_ops pxa_udc_ops = {
1695        .get_frame      = pxa_udc_get_frame,
1696        .wakeup         = pxa_udc_wakeup,
1697        .pullup         = pxa_udc_pullup,
1698        .vbus_session   = pxa_udc_vbus_session,
1699        .vbus_draw      = pxa_udc_vbus_draw,
1700        .udc_start      = pxa27x_udc_start,
1701        .udc_stop       = pxa27x_udc_stop,
1702};
1703
1704/**
1705 * udc_disable - disable udc device controller
1706 * @udc: udc device
1707 * Context: any
1708 *
1709 * Disables the udc device : disables clocks, udc interrupts, control endpoint
1710 * interrupts.
1711 */
1712static void udc_disable(struct pxa_udc *udc)
1713{
1714        if (!udc->enabled)
1715                return;
1716
1717        udc_writel(udc, UDCICR0, 0);
1718        udc_writel(udc, UDCICR1, 0);
1719
1720        udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1721
1722        ep0_idle(udc);
1723        udc->gadget.speed = USB_SPEED_UNKNOWN;
1724        clk_disable(udc->clk);
1725
1726        udc->enabled = 0;
1727}
1728
1729/**
1730 * udc_init_data - Initialize udc device data structures
1731 * @dev: udc device
1732 *
1733 * Initializes gadget endpoint list, endpoints locks. No action is taken
1734 * on the hardware.
1735 */
1736static void udc_init_data(struct pxa_udc *dev)
1737{
1738        int i;
1739        struct pxa_ep *ep;
1740
1741        /* device/ep0 records init */
1742        INIT_LIST_HEAD(&dev->gadget.ep_list);
1743        INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1744        dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0];
1745        dev->gadget.quirk_altset_not_supp = 1;
1746        ep0_idle(dev);
1747
1748        /* PXA endpoints init */
1749        for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
1750                ep = &dev->pxa_ep[i];
1751
1752                ep->enabled = is_ep0(ep);
1753                INIT_LIST_HEAD(&ep->queue);
1754                spin_lock_init(&ep->lock);
1755        }
1756
1757        /* USB endpoints init */
1758        for (i = 1; i < NR_USB_ENDPOINTS; i++) {
1759                list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list,
1760                                &dev->gadget.ep_list);
1761                usb_ep_set_maxpacket_limit(&dev->udc_usb_ep[i].usb_ep,
1762                                           dev->udc_usb_ep[i].usb_ep.maxpacket);
1763        }
1764}
1765
1766/**
1767 * udc_enable - Enables the udc device
1768 * @dev: udc device
1769 *
1770 * Enables the udc device : enables clocks, udc interrupts, control endpoint
1771 * interrupts, sets usb as UDC client and setups endpoints.
1772 */
1773static void udc_enable(struct pxa_udc *udc)
1774{
1775        if (udc->enabled)
1776                return;
1777
1778        clk_enable(udc->clk);
1779        udc_writel(udc, UDCICR0, 0);
1780        udc_writel(udc, UDCICR1, 0);
1781        udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1782
1783        ep0_idle(udc);
1784        udc->gadget.speed = USB_SPEED_FULL;
1785        memset(&udc->stats, 0, sizeof(udc->stats));
1786
1787        pxa_eps_setup(udc);
1788        udc_set_mask_UDCCR(udc, UDCCR_UDE);
1789        ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_ACM);
1790        udelay(2);
1791        if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
1792                dev_err(udc->dev, "Configuration errors, udc disabled\n");
1793
1794        /*
1795         * Caller must be able to sleep in order to cope with startup transients
1796         */
1797        msleep(100);
1798
1799        /* enable suspend/resume and reset irqs */
1800        udc_writel(udc, UDCICR1,
1801                        UDCICR1_IECC | UDCICR1_IERU
1802                        | UDCICR1_IESU | UDCICR1_IERS);
1803
1804        /* enable ep0 irqs */
1805        pio_irq_enable(&udc->pxa_ep[0]);
1806
1807        udc->enabled = 1;
1808}
1809
1810/**
1811 * pxa27x_start - Register gadget driver
1812 * @driver: gadget driver
1813 * @bind: bind function
1814 *
1815 * When a driver is successfully registered, it will receive control requests
1816 * including set_configuration(), which enables non-control requests.  Then
1817 * usb traffic follows until a disconnect is reported.  Then a host may connect
1818 * again, or the driver might get unbound.
1819 *
1820 * Note that the udc is not automatically enabled. Check function
1821 * should_enable_udc().
1822 *
1823 * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise
1824 */
1825static int pxa27x_udc_start(struct usb_gadget *g,
1826                struct usb_gadget_driver *driver)
1827{
1828        struct pxa_udc *udc = to_pxa(g);
1829        int retval;
1830
1831        /* first hook up the driver ... */
1832        udc->driver = driver;
1833
1834        if (!IS_ERR_OR_NULL(udc->transceiver)) {
1835                retval = otg_set_peripheral(udc->transceiver->otg,
1836                                                &udc->gadget);
1837                if (retval) {
1838                        dev_err(udc->dev, "can't bind to transceiver\n");
1839                        goto fail;
1840                }
1841        }
1842
1843        if (should_enable_udc(udc))
1844                udc_enable(udc);
1845        return 0;
1846
1847fail:
1848        udc->driver = NULL;
1849        return retval;
1850}
1851
1852/**
1853 * stop_activity - Stops udc endpoints
1854 * @udc: udc device
1855 * @driver: gadget driver
1856 *
1857 * Disables all udc endpoints (even control endpoint), report disconnect to
1858 * the gadget user.
1859 */
1860static void stop_activity(struct pxa_udc *udc)
1861{
1862        int i;
1863
1864        udc->gadget.speed = USB_SPEED_UNKNOWN;
1865
1866        for (i = 0; i < NR_USB_ENDPOINTS; i++)
1867                pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep);
1868}
1869
1870/**
1871 * pxa27x_udc_stop - Unregister the gadget driver
1872 * @driver: gadget driver
1873 *
1874 * Returns 0 if no error, -ENODEV, -EINVAL otherwise
1875 */
1876static int pxa27x_udc_stop(struct usb_gadget *g)
1877{
1878        struct pxa_udc *udc = to_pxa(g);
1879
1880        stop_activity(udc);
1881        udc_disable(udc);
1882
1883        udc->driver = NULL;
1884
1885        if (!IS_ERR_OR_NULL(udc->transceiver))
1886                return otg_set_peripheral(udc->transceiver->otg, NULL);
1887        return 0;
1888}
1889
1890/**
1891 * handle_ep0_ctrl_req - handle control endpoint control request
1892 * @udc: udc device
1893 * @req: control request
1894 */
1895static void handle_ep0_ctrl_req(struct pxa_udc *udc,
1896                                struct pxa27x_request *req)
1897{
1898        struct pxa_ep *ep = &udc->pxa_ep[0];
1899        union {
1900                struct usb_ctrlrequest  r;
1901                u32                     word[2];
1902        } u;
1903        int i;
1904        int have_extrabytes = 0;
1905        unsigned long flags;
1906
1907        nuke(ep, -EPROTO);
1908        spin_lock_irqsave(&ep->lock, flags);
1909
1910        /*
1911         * In the PXA320 manual, in the section about Back-to-Back setup
1912         * packets, it describes this situation.  The solution is to set OPC to
1913         * get rid of the status packet, and then continue with the setup
1914         * packet. Generalize to pxa27x CPUs.
1915         */
1916        if (epout_has_pkt(ep) && (ep_count_bytes_remain(ep) == 0))
1917                ep_write_UDCCSR(ep, UDCCSR0_OPC);
1918
1919        /* read SETUP packet */
1920        for (i = 0; i < 2; i++) {
1921                if (unlikely(ep_is_empty(ep)))
1922                        goto stall;
1923                u.word[i] = udc_ep_readl(ep, UDCDR);
1924        }
1925
1926        have_extrabytes = !ep_is_empty(ep);
1927        while (!ep_is_empty(ep)) {
1928                i = udc_ep_readl(ep, UDCDR);
1929                ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i);
1930        }
1931
1932        ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1933                u.r.bRequestType, u.r.bRequest,
1934                le16_to_cpu(u.r.wValue), le16_to_cpu(u.r.wIndex),
1935                le16_to_cpu(u.r.wLength));
1936        if (unlikely(have_extrabytes))
1937                goto stall;
1938
1939        if (u.r.bRequestType & USB_DIR_IN)
1940                set_ep0state(udc, IN_DATA_STAGE);
1941        else
1942                set_ep0state(udc, OUT_DATA_STAGE);
1943
1944        /* Tell UDC to enter Data Stage */
1945        ep_write_UDCCSR(ep, UDCCSR0_SA | UDCCSR0_OPC);
1946
1947        spin_unlock_irqrestore(&ep->lock, flags);
1948        i = udc->driver->setup(&udc->gadget, &u.r);
1949        spin_lock_irqsave(&ep->lock, flags);
1950        if (i < 0)
1951                goto stall;
1952out:
1953        spin_unlock_irqrestore(&ep->lock, flags);
1954        return;
1955stall:
1956        ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n",
1957                udc_ep_readl(ep, UDCCSR), i);
1958        ep_write_UDCCSR(ep, UDCCSR0_FST | UDCCSR0_FTF);
1959        set_ep0state(udc, STALL);
1960        goto out;
1961}
1962
1963/**
1964 * handle_ep0 - Handle control endpoint data transfers
1965 * @udc: udc device
1966 * @fifo_irq: 1 if triggered by fifo service type irq
1967 * @opc_irq: 1 if triggered by output packet complete type irq
1968 *
1969 * Context : when in_interrupt() or with ep->lock held
1970 *
1971 * Tries to transfer all pending request data into the endpoint and/or
1972 * transfer all pending data in the endpoint into usb requests.
1973 * Handles states of ep0 automata.
1974 *
1975 * PXA27x hardware handles several standard usb control requests without
1976 * driver notification.  The requests fully handled by hardware are :
1977 *  SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE,
1978 *  GET_STATUS
1979 * The requests handled by hardware, but with irq notification are :
1980 *  SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE
1981 * The remaining standard requests really handled by handle_ep0 are :
1982 *  GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests.
1983 * Requests standardized outside of USB 2.0 chapter 9 are handled more
1984 * uniformly, by gadget drivers.
1985 *
1986 * The control endpoint state machine is _not_ USB spec compliant, it's even
1987 * hardly compliant with Intel PXA270 developers guide.
1988 * The key points which inferred this state machine are :
1989 *   - on every setup token, bit UDCCSR0_SA is raised and held until cleared by
1990 *     software.
1991 *   - on every OUT packet received, UDCCSR0_OPC is raised and held until
1992 *     cleared by software.
1993 *   - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it
1994 *     before reading ep0.
1995 *     This is true only for PXA27x. This is not true anymore for PXA3xx family
1996 *     (check Back-to-Back setup packet in developers guide).
1997 *   - irq can be called on a "packet complete" event (opc_irq=1), while
1998 *     UDCCSR0_OPC is not yet raised (delta can be as big as 100ms
1999 *     from experimentation).
2000 *   - as UDCCSR0_SA can be activated while in irq handling, and clearing
2001 *     UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC
2002 *     => we never actually read the "status stage" packet of an IN data stage
2003 *     => this is not documented in Intel documentation
2004 *   - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA
2005 *     STAGE. The driver add STATUS STAGE to send last zero length packet in
2006 *     OUT_STATUS_STAGE.
2007 *   - special attention was needed for IN_STATUS_STAGE. If a packet complete
2008 *     event is detected, we terminate the status stage without ackowledging the
2009 *     packet (not to risk to loose a potential SETUP packet)
2010 */
2011static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq)
2012{
2013        u32                     udccsr0;
2014        struct pxa_ep           *ep = &udc->pxa_ep[0];
2015        struct pxa27x_request   *req = NULL;
2016        int                     completed = 0;
2017
2018        if (!list_empty(&ep->queue))
2019                req = list_entry(ep->queue.next, struct pxa27x_request, queue);
2020
2021        udccsr0 = udc_ep_readl(ep, UDCCSR);
2022        ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
2023                EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR),
2024                (fifo_irq << 1 | opc_irq));
2025
2026        if (udccsr0 & UDCCSR0_SST) {
2027                ep_dbg(ep, "clearing stall status\n");
2028                nuke(ep, -EPIPE);
2029                ep_write_UDCCSR(ep, UDCCSR0_SST);
2030                ep0_idle(udc);
2031        }
2032
2033        if (udccsr0 & UDCCSR0_SA) {
2034                nuke(ep, 0);
2035                set_ep0state(udc, SETUP_STAGE);
2036        }
2037
2038        switch (udc->ep0state) {
2039        case WAIT_FOR_SETUP:
2040                /*
2041                 * Hardware bug : beware, we cannot clear OPC, since we would
2042                 * miss a potential OPC irq for a setup packet.
2043                 * So, we only do ... nothing, and hope for a next irq with
2044                 * UDCCSR0_SA set.
2045                 */
2046                break;
2047        case SETUP_STAGE:
2048                udccsr0 &= UDCCSR0_CTRL_REQ_MASK;
2049                if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK))
2050                        handle_ep0_ctrl_req(udc, req);
2051                break;
2052        case IN_DATA_STAGE:                     /* GET_DESCRIPTOR */
2053                if (epout_has_pkt(ep))
2054                        ep_write_UDCCSR(ep, UDCCSR0_OPC);
2055                if (req && !ep_is_full(ep))
2056                        completed = write_ep0_fifo(ep, req);
2057                if (completed)
2058                        ep0_end_in_req(ep, req, NULL);
2059                break;
2060        case OUT_DATA_STAGE:                    /* SET_DESCRIPTOR */
2061                if (epout_has_pkt(ep) && req)
2062                        completed = read_ep0_fifo(ep, req);
2063                if (completed)
2064                        ep0_end_out_req(ep, req, NULL);
2065                break;
2066        case STALL:
2067                ep_write_UDCCSR(ep, UDCCSR0_FST);
2068                break;
2069        case IN_STATUS_STAGE:
2070                /*
2071                 * Hardware bug : beware, we cannot clear OPC, since we would
2072                 * miss a potential PC irq for a setup packet.
2073                 * So, we only put the ep0 into WAIT_FOR_SETUP state.
2074                 */
2075                if (opc_irq)
2076                        ep0_idle(udc);
2077                break;
2078        case OUT_STATUS_STAGE:
2079        case WAIT_ACK_SET_CONF_INTERF:
2080                ep_warn(ep, "should never get in %s state here!!!\n",
2081                                EP0_STNAME(ep->dev));
2082                ep0_idle(udc);
2083                break;
2084        }
2085}
2086
2087/**
2088 * handle_ep - Handle endpoint data tranfers
2089 * @ep: pxa physical endpoint
2090 *
2091 * Tries to transfer all pending request data into the endpoint and/or
2092 * transfer all pending data in the endpoint into usb requests.
2093 *
2094 * Is always called when in_interrupt() and with ep->lock released.
2095 */
2096static void handle_ep(struct pxa_ep *ep)
2097{
2098        struct pxa27x_request   *req;
2099        int completed;
2100        u32 udccsr;
2101        int is_in = ep->dir_in;
2102        int loop = 0;
2103        unsigned long           flags;
2104
2105        spin_lock_irqsave(&ep->lock, flags);
2106        if (ep->in_handle_ep)
2107                goto recursion_detected;
2108        ep->in_handle_ep = 1;
2109
2110        do {
2111                completed = 0;
2112                udccsr = udc_ep_readl(ep, UDCCSR);
2113
2114                if (likely(!list_empty(&ep->queue)))
2115                        req = list_entry(ep->queue.next,
2116                                        struct pxa27x_request, queue);
2117                else
2118                        req = NULL;
2119
2120                ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n",
2121                                req, udccsr, loop++);
2122
2123                if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN)))
2124                        udc_ep_writel(ep, UDCCSR,
2125                                        udccsr & (UDCCSR_SST | UDCCSR_TRN));
2126                if (!req)
2127                        break;
2128
2129                if (unlikely(is_in)) {
2130                        if (likely(!ep_is_full(ep)))
2131                                completed = write_fifo(ep, req);
2132                } else {
2133                        if (likely(epout_has_pkt(ep)))
2134                                completed = read_fifo(ep, req);
2135                }
2136
2137                if (completed) {
2138                        if (is_in)
2139                                ep_end_in_req(ep, req, &flags);
2140                        else
2141                                ep_end_out_req(ep, req, &flags);
2142                }
2143        } while (completed);
2144
2145        ep->in_handle_ep = 0;
2146recursion_detected:
2147        spin_unlock_irqrestore(&ep->lock, flags);
2148}
2149
2150/**
2151 * pxa27x_change_configuration - Handle SET_CONF usb request notification
2152 * @udc: udc device
2153 * @config: usb configuration
2154 *
2155 * Post the request to upper level.
2156 * Don't use any pxa specific harware configuration capabilities
2157 */
2158static void pxa27x_change_configuration(struct pxa_udc *udc, int config)
2159{
2160        struct usb_ctrlrequest req ;
2161
2162        dev_dbg(udc->dev, "config=%d\n", config);
2163
2164        udc->config = config;
2165        udc->last_interface = 0;
2166        udc->last_alternate = 0;
2167
2168        req.bRequestType = 0;
2169        req.bRequest = USB_REQ_SET_CONFIGURATION;
2170        req.wValue = config;
2171        req.wIndex = 0;
2172        req.wLength = 0;
2173
2174        set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2175        udc->driver->setup(&udc->gadget, &req);
2176        ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2177}
2178
2179/**
2180 * pxa27x_change_interface - Handle SET_INTERF usb request notification
2181 * @udc: udc device
2182 * @iface: interface number
2183 * @alt: alternate setting number
2184 *
2185 * Post the request to upper level.
2186 * Don't use any pxa specific harware configuration capabilities
2187 */
2188static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt)
2189{
2190        struct usb_ctrlrequest  req;
2191
2192        dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt);
2193
2194        udc->last_interface = iface;
2195        udc->last_alternate = alt;
2196
2197        req.bRequestType = USB_RECIP_INTERFACE;
2198        req.bRequest = USB_REQ_SET_INTERFACE;
2199        req.wValue = alt;
2200        req.wIndex = iface;
2201        req.wLength = 0;
2202
2203        set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2204        udc->driver->setup(&udc->gadget, &req);
2205        ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2206}
2207
2208/*
2209 * irq_handle_data - Handle data transfer
2210 * @irq: irq IRQ number
2211 * @udc: dev pxa_udc device structure
2212 *
2213 * Called from irq handler, transferts data to or from endpoint to queue
2214 */
2215static void irq_handle_data(int irq, struct pxa_udc *udc)
2216{
2217        int i;
2218        struct pxa_ep *ep;
2219        u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK;
2220        u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK;
2221
2222        if (udcisr0 & UDCISR_INT_MASK) {
2223                udc->pxa_ep[0].stats.irqs++;
2224                udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK));
2225                handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR),
2226                                !!(udcisr0 & UDCICR_PKTCOMPL));
2227        }
2228
2229        udcisr0 >>= 2;
2230        for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) {
2231                if (!(udcisr0 & UDCISR_INT_MASK))
2232                        continue;
2233
2234                udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK));
2235
2236                WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2237                if (i < ARRAY_SIZE(udc->pxa_ep)) {
2238                        ep = &udc->pxa_ep[i];
2239                        ep->stats.irqs++;
2240                        handle_ep(ep);
2241                }
2242        }
2243
2244        for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) {
2245                udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK));
2246                if (!(udcisr1 & UDCISR_INT_MASK))
2247                        continue;
2248
2249                WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2250                if (i < ARRAY_SIZE(udc->pxa_ep)) {
2251                        ep = &udc->pxa_ep[i];
2252                        ep->stats.irqs++;
2253                        handle_ep(ep);
2254                }
2255        }
2256
2257}
2258
2259/**
2260 * irq_udc_suspend - Handle IRQ "UDC Suspend"
2261 * @udc: udc device
2262 */
2263static void irq_udc_suspend(struct pxa_udc *udc)
2264{
2265        udc_writel(udc, UDCISR1, UDCISR1_IRSU);
2266        udc->stats.irqs_suspend++;
2267
2268        if (udc->gadget.speed != USB_SPEED_UNKNOWN
2269                        && udc->driver && udc->driver->suspend)
2270                udc->driver->suspend(&udc->gadget);
2271        ep0_idle(udc);
2272}
2273
2274/**
2275  * irq_udc_resume - Handle IRQ "UDC Resume"
2276  * @udc: udc device
2277  */
2278static void irq_udc_resume(struct pxa_udc *udc)
2279{
2280        udc_writel(udc, UDCISR1, UDCISR1_IRRU);
2281        udc->stats.irqs_resume++;
2282
2283        if (udc->gadget.speed != USB_SPEED_UNKNOWN
2284                        && udc->driver && udc->driver->resume)
2285                udc->driver->resume(&udc->gadget);
2286}
2287
2288/**
2289 * irq_udc_reconfig - Handle IRQ "UDC Change Configuration"
2290 * @udc: udc device
2291 */
2292static void irq_udc_reconfig(struct pxa_udc *udc)
2293{
2294        unsigned config, interface, alternate, config_change;
2295        u32 udccr = udc_readl(udc, UDCCR);
2296
2297        udc_writel(udc, UDCISR1, UDCISR1_IRCC);
2298        udc->stats.irqs_reconfig++;
2299
2300        config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S;
2301        config_change = (config != udc->config);
2302        pxa27x_change_configuration(udc, config);
2303
2304        interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S;
2305        alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S;
2306        pxa27x_change_interface(udc, interface, alternate);
2307
2308        if (config_change)
2309                update_pxa_ep_matches(udc);
2310        udc_set_mask_UDCCR(udc, UDCCR_SMAC);
2311}
2312
2313/**
2314 * irq_udc_reset - Handle IRQ "UDC Reset"
2315 * @udc: udc device
2316 */
2317static void irq_udc_reset(struct pxa_udc *udc)
2318{
2319        u32 udccr = udc_readl(udc, UDCCR);
2320        struct pxa_ep *ep = &udc->pxa_ep[0];
2321
2322        dev_info(udc->dev, "USB reset\n");
2323        udc_writel(udc, UDCISR1, UDCISR1_IRRS);
2324        udc->stats.irqs_reset++;
2325
2326        if ((udccr & UDCCR_UDA) == 0) {
2327                dev_dbg(udc->dev, "USB reset start\n");
2328                stop_activity(udc);
2329        }
2330        udc->gadget.speed = USB_SPEED_FULL;
2331        memset(&udc->stats, 0, sizeof udc->stats);
2332
2333        nuke(ep, -EPROTO);
2334        ep_write_UDCCSR(ep, UDCCSR0_FTF | UDCCSR0_OPC);
2335        ep0_idle(udc);
2336}
2337
2338/**
2339 * pxa_udc_irq - Main irq handler
2340 * @irq: irq number
2341 * @_dev: udc device
2342 *
2343 * Handles all udc interrupts
2344 */
2345static irqreturn_t pxa_udc_irq(int irq, void *_dev)
2346{
2347        struct pxa_udc *udc = _dev;
2348        u32 udcisr0 = udc_readl(udc, UDCISR0);
2349        u32 udcisr1 = udc_readl(udc, UDCISR1);
2350        u32 udccr = udc_readl(udc, UDCCR);
2351        u32 udcisr1_spec;
2352
2353        dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2354                 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
2355
2356        udcisr1_spec = udcisr1 & 0xf8000000;
2357        if (unlikely(udcisr1_spec & UDCISR1_IRSU))
2358                irq_udc_suspend(udc);
2359        if (unlikely(udcisr1_spec & UDCISR1_IRRU))
2360                irq_udc_resume(udc);
2361        if (unlikely(udcisr1_spec & UDCISR1_IRCC))
2362                irq_udc_reconfig(udc);
2363        if (unlikely(udcisr1_spec & UDCISR1_IRRS))
2364                irq_udc_reset(udc);
2365
2366        if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK))
2367                irq_handle_data(irq, udc);
2368
2369        return IRQ_HANDLED;
2370}
2371
2372static struct pxa_udc memory = {
2373        .gadget = {
2374                .ops            = &pxa_udc_ops,
2375                .ep0            = &memory.udc_usb_ep[0].usb_ep,
2376                .name           = driver_name,
2377                .dev = {
2378                        .init_name      = "gadget",
2379                },
2380        },
2381
2382        .udc_usb_ep = {
2383                USB_EP_CTRL,
2384                USB_EP_OUT_BULK(1),
2385                USB_EP_IN_BULK(2),
2386                USB_EP_IN_ISO(3),
2387                USB_EP_OUT_ISO(4),
2388                USB_EP_IN_INT(5),
2389        },
2390
2391        .pxa_ep = {
2392                PXA_EP_CTRL,
2393                /* Endpoints for gadget zero */
2394                PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2395                PXA_EP_IN_BULK(2,  2, 3, 0, 0),
2396                /* Endpoints for ether gadget, file storage gadget */
2397                PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2398                PXA_EP_IN_BULK(4,  2, 1, 0, 0),
2399                PXA_EP_IN_ISO(5,   3, 1, 0, 0),
2400                PXA_EP_OUT_ISO(6,  4, 1, 0, 0),
2401                PXA_EP_IN_INT(7,   5, 1, 0, 0),
2402                /* Endpoints for RNDIS, serial */
2403                PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2404                PXA_EP_IN_BULK(9,  2, 2, 0, 0),
2405                PXA_EP_IN_INT(10,  5, 2, 0, 0),
2406                /*
2407                 * All the following endpoints are only for completion.  They
2408                 * won't never work, as multiple interfaces are really broken on
2409                 * the pxa.
2410                */
2411                PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2412                PXA_EP_IN_BULK(12,  2, 2, 1, 0),
2413                /* Endpoint for CDC Ether */
2414                PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2415                PXA_EP_IN_BULK(14,  2, 1, 1, 1),
2416        }
2417};
2418
2419#if defined(CONFIG_OF)
2420static const struct of_device_id udc_pxa_dt_ids[] = {
2421        { .compatible = "marvell,pxa270-udc" },
2422        {}
2423};
2424MODULE_DEVICE_TABLE(of, udc_pxa_dt_ids);
2425#endif
2426
2427/**
2428 * pxa_udc_probe - probes the udc device
2429 * @_dev: platform device
2430 *
2431 * Perform basic init : allocates udc clock, creates sysfs files, requests
2432 * irq.
2433 */
2434static int pxa_udc_probe(struct platform_device *pdev)
2435{
2436        struct resource *regs;
2437        struct pxa_udc *udc = &memory;
2438        int retval = 0, gpio;
2439        struct pxa2xx_udc_mach_info *mach = dev_get_platdata(&pdev->dev);
2440        unsigned long gpio_flags;
2441
2442        if (mach) {
2443                gpio_flags = mach->gpio_pullup_inverted ? GPIOF_ACTIVE_LOW : 0;
2444                gpio = mach->gpio_pullup;
2445                if (gpio_is_valid(gpio)) {
2446                        retval = devm_gpio_request_one(&pdev->dev, gpio,
2447                                                       gpio_flags,
2448                                                       "USB D+ pullup");
2449                        if (retval)
2450                                return retval;
2451                        udc->gpiod = gpio_to_desc(mach->gpio_pullup);
2452                }
2453                udc->udc_command = mach->udc_command;
2454        } else {
2455                udc->gpiod = devm_gpiod_get(&pdev->dev, NULL, GPIOD_ASIS);
2456        }
2457
2458        regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2459        udc->regs = devm_ioremap_resource(&pdev->dev, regs);
2460        if (IS_ERR(udc->regs))
2461                return PTR_ERR(udc->regs);
2462        udc->irq = platform_get_irq(pdev, 0);
2463        if (udc->irq < 0)
2464                return udc->irq;
2465
2466        udc->dev = &pdev->dev;
2467        if (of_have_populated_dt()) {
2468                udc->transceiver =
2469                        devm_usb_get_phy_by_phandle(udc->dev, "phys", 0);
2470                if (IS_ERR(udc->transceiver))
2471                        return PTR_ERR(udc->transceiver);
2472        } else {
2473                udc->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
2474        }
2475
2476        if (IS_ERR(udc->gpiod)) {
2477                dev_err(&pdev->dev, "Couldn't find or request D+ gpio : %ld\n",
2478                        PTR_ERR(udc->gpiod));
2479                return PTR_ERR(udc->gpiod);
2480        }
2481        if (udc->gpiod)
2482                gpiod_direction_output(udc->gpiod, 0);
2483
2484        udc->clk = devm_clk_get(&pdev->dev, NULL);
2485        if (IS_ERR(udc->clk))
2486                return PTR_ERR(udc->clk);
2487
2488        retval = clk_prepare(udc->clk);
2489        if (retval)
2490                return retval;
2491
2492        udc->vbus_sensed = 0;
2493
2494        the_controller = udc;
2495        platform_set_drvdata(pdev, udc);
2496        udc_init_data(udc);
2497
2498        /* irq setup after old hardware state is cleaned up */
2499        retval = devm_request_irq(&pdev->dev, udc->irq, pxa_udc_irq,
2500                                  IRQF_SHARED, driver_name, udc);
2501        if (retval != 0) {
2502                dev_err(udc->dev, "%s: can't get irq %i, err %d\n",
2503                        driver_name, udc->irq, retval);
2504                goto err;
2505        }
2506
2507        if (!IS_ERR_OR_NULL(udc->transceiver))
2508                usb_register_notifier(udc->transceiver, &pxa27x_udc_phy);
2509        retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2510        if (retval)
2511                goto err_add_gadget;
2512
2513        pxa_init_debugfs(udc);
2514        if (should_enable_udc(udc))
2515                udc_enable(udc);
2516        return 0;
2517
2518err_add_gadget:
2519        if (!IS_ERR_OR_NULL(udc->transceiver))
2520                usb_unregister_notifier(udc->transceiver, &pxa27x_udc_phy);
2521err:
2522        clk_unprepare(udc->clk);
2523        return retval;
2524}
2525
2526/**
2527 * pxa_udc_remove - removes the udc device driver
2528 * @_dev: platform device
2529 */
2530static int pxa_udc_remove(struct platform_device *_dev)
2531{
2532        struct pxa_udc *udc = platform_get_drvdata(_dev);
2533
2534        usb_del_gadget_udc(&udc->gadget);
2535        pxa_cleanup_debugfs(udc);
2536
2537        if (!IS_ERR_OR_NULL(udc->transceiver))
2538                usb_unregister_notifier(udc->transceiver, &pxa27x_udc_phy);
2539        usb_put_phy(udc->transceiver);
2540
2541        udc->transceiver = NULL;
2542        the_controller = NULL;
2543        clk_unprepare(udc->clk);
2544
2545        return 0;
2546}
2547
2548static void pxa_udc_shutdown(struct platform_device *_dev)
2549{
2550        struct pxa_udc *udc = platform_get_drvdata(_dev);
2551
2552        if (udc_readl(udc, UDCCR) & UDCCR_UDE)
2553                udc_disable(udc);
2554}
2555
2556#ifdef CONFIG_PXA27x
2557extern void pxa27x_clear_otgph(void);
2558#else
2559#define pxa27x_clear_otgph()   do {} while (0)
2560#endif
2561
2562#ifdef CONFIG_PM
2563/**
2564 * pxa_udc_suspend - Suspend udc device
2565 * @_dev: platform device
2566 * @state: suspend state
2567 *
2568 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
2569 * device.
2570 */
2571static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state)
2572{
2573        struct pxa_udc *udc = platform_get_drvdata(_dev);
2574        struct pxa_ep *ep;
2575
2576        ep = &udc->pxa_ep[0];
2577        udc->udccsr0 = udc_ep_readl(ep, UDCCSR);
2578
2579        udc_disable(udc);
2580        udc->pullup_resume = udc->pullup_on;
2581        dplus_pullup(udc, 0);
2582
2583        if (udc->driver)
2584                udc->driver->disconnect(&udc->gadget);
2585
2586        return 0;
2587}
2588
2589/**
2590 * pxa_udc_resume - Resume udc device
2591 * @_dev: platform device
2592 *
2593 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc
2594 * device.
2595 */
2596static int pxa_udc_resume(struct platform_device *_dev)
2597{
2598        struct pxa_udc *udc = platform_get_drvdata(_dev);
2599        struct pxa_ep *ep;
2600
2601        ep = &udc->pxa_ep[0];
2602        udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME));
2603
2604        dplus_pullup(udc, udc->pullup_resume);
2605        if (should_enable_udc(udc))
2606                udc_enable(udc);
2607        /*
2608         * We do not handle OTG yet.
2609         *
2610         * OTGPH bit is set when sleep mode is entered.
2611         * it indicates that OTG pad is retaining its state.
2612         * Upon exit from sleep mode and before clearing OTGPH,
2613         * Software must configure the USB OTG pad, UDC, and UHC
2614         * to the state they were in before entering sleep mode.
2615         */
2616        pxa27x_clear_otgph();
2617
2618        return 0;
2619}
2620#endif
2621
2622/* work with hotplug and coldplug */
2623MODULE_ALIAS("platform:pxa27x-udc");
2624
2625static struct platform_driver udc_driver = {
2626        .driver         = {
2627                .name   = "pxa27x-udc",
2628                .of_match_table = of_match_ptr(udc_pxa_dt_ids),
2629        },
2630        .probe          = pxa_udc_probe,
2631        .remove         = pxa_udc_remove,
2632        .shutdown       = pxa_udc_shutdown,
2633#ifdef CONFIG_PM
2634        .suspend        = pxa_udc_suspend,
2635        .resume         = pxa_udc_resume
2636#endif
2637};
2638
2639module_platform_driver(udc_driver);
2640
2641MODULE_DESCRIPTION(DRIVER_DESC);
2642MODULE_AUTHOR("Robert Jarzmik");
2643MODULE_LICENSE("GPL");
2644
lxr.linux.no kindly hosted by Redpill Linpro AS, provider of Linux consulting and operations services since 1995.