linux/drivers/tty/serial/uartlite.c
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   1/*
   2 * uartlite.c: Serial driver for Xilinx uartlite serial controller
   3 *
   4 * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
   5 * Copyright (C) 2007 Secret Lab Technologies Ltd.
   6 *
   7 * This file is licensed under the terms of the GNU General Public License
   8 * version 2.  This program is licensed "as is" without any warranty of any
   9 * kind, whether express or implied.
  10 */
  11
  12#include <linux/platform_device.h>
  13#include <linux/module.h>
  14#include <linux/console.h>
  15#include <linux/serial.h>
  16#include <linux/serial_core.h>
  17#include <linux/tty.h>
  18#include <linux/tty_flip.h>
  19#include <linux/delay.h>
  20#include <linux/interrupt.h>
  21#include <linux/init.h>
  22#include <linux/io.h>
  23#include <linux/of.h>
  24#include <linux/of_address.h>
  25#include <linux/of_device.h>
  26#include <linux/of_platform.h>
  27
  28#define ULITE_NAME              "ttyUL"
  29#define ULITE_MAJOR             204
  30#define ULITE_MINOR             187
  31#define ULITE_NR_UARTS          4
  32
  33/* ---------------------------------------------------------------------
  34 * Register definitions
  35 *
  36 * For register details see datasheet:
  37 * http://www.xilinx.com/support/documentation/ip_documentation/opb_uartlite.pdf
  38 */
  39
  40#define ULITE_RX                0x00
  41#define ULITE_TX                0x04
  42#define ULITE_STATUS            0x08
  43#define ULITE_CONTROL           0x0c
  44
  45#define ULITE_REGION            16
  46
  47#define ULITE_STATUS_RXVALID    0x01
  48#define ULITE_STATUS_RXFULL     0x02
  49#define ULITE_STATUS_TXEMPTY    0x04
  50#define ULITE_STATUS_TXFULL     0x08
  51#define ULITE_STATUS_IE         0x10
  52#define ULITE_STATUS_OVERRUN    0x20
  53#define ULITE_STATUS_FRAME      0x40
  54#define ULITE_STATUS_PARITY     0x80
  55
  56#define ULITE_CONTROL_RST_TX    0x01
  57#define ULITE_CONTROL_RST_RX    0x02
  58#define ULITE_CONTROL_IE        0x10
  59
  60struct uartlite_reg_ops {
  61        u32 (*in)(void __iomem *addr);
  62        void (*out)(u32 val, void __iomem *addr);
  63};
  64
  65static u32 uartlite_inbe32(void __iomem *addr)
  66{
  67        return ioread32be(addr);
  68}
  69
  70static void uartlite_outbe32(u32 val, void __iomem *addr)
  71{
  72        iowrite32be(val, addr);
  73}
  74
  75static struct uartlite_reg_ops uartlite_be = {
  76        .in = uartlite_inbe32,
  77        .out = uartlite_outbe32,
  78};
  79
  80static u32 uartlite_inle32(void __iomem *addr)
  81{
  82        return ioread32(addr);
  83}
  84
  85static void uartlite_outle32(u32 val, void __iomem *addr)
  86{
  87        iowrite32(val, addr);
  88}
  89
  90static struct uartlite_reg_ops uartlite_le = {
  91        .in = uartlite_inle32,
  92        .out = uartlite_outle32,
  93};
  94
  95static inline u32 uart_in32(u32 offset, struct uart_port *port)
  96{
  97        struct uartlite_reg_ops *reg_ops = port->private_data;
  98
  99        return reg_ops->in(port->membase + offset);
 100}
 101
 102static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
 103{
 104        struct uartlite_reg_ops *reg_ops = port->private_data;
 105
 106        reg_ops->out(val, port->membase + offset);
 107}
 108
 109static struct uart_port ulite_ports[ULITE_NR_UARTS];
 110
 111/* ---------------------------------------------------------------------
 112 * Core UART driver operations
 113 */
 114
 115static int ulite_receive(struct uart_port *port, int stat)
 116{
 117        struct tty_port *tport = &port->state->port;
 118        unsigned char ch = 0;
 119        char flag = TTY_NORMAL;
 120
 121        if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
 122                     | ULITE_STATUS_FRAME)) == 0)
 123                return 0;
 124
 125        /* stats */
 126        if (stat & ULITE_STATUS_RXVALID) {
 127                port->icount.rx++;
 128                ch = uart_in32(ULITE_RX, port);
 129
 130                if (stat & ULITE_STATUS_PARITY)
 131                        port->icount.parity++;
 132        }
 133
 134        if (stat & ULITE_STATUS_OVERRUN)
 135                port->icount.overrun++;
 136
 137        if (stat & ULITE_STATUS_FRAME)
 138                port->icount.frame++;
 139
 140
 141        /* drop byte with parity error if IGNPAR specificed */
 142        if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
 143                stat &= ~ULITE_STATUS_RXVALID;
 144
 145        stat &= port->read_status_mask;
 146
 147        if (stat & ULITE_STATUS_PARITY)
 148                flag = TTY_PARITY;
 149
 150
 151        stat &= ~port->ignore_status_mask;
 152
 153        if (stat & ULITE_STATUS_RXVALID)
 154                tty_insert_flip_char(tport, ch, flag);
 155
 156        if (stat & ULITE_STATUS_FRAME)
 157                tty_insert_flip_char(tport, 0, TTY_FRAME);
 158
 159        if (stat & ULITE_STATUS_OVERRUN)
 160                tty_insert_flip_char(tport, 0, TTY_OVERRUN);
 161
 162        return 1;
 163}
 164
 165static int ulite_transmit(struct uart_port *port, int stat)
 166{
 167        struct circ_buf *xmit  = &port->state->xmit;
 168
 169        if (stat & ULITE_STATUS_TXFULL)
 170                return 0;
 171
 172        if (port->x_char) {
 173                uart_out32(port->x_char, ULITE_TX, port);
 174                port->x_char = 0;
 175                port->icount.tx++;
 176                return 1;
 177        }
 178
 179        if (uart_circ_empty(xmit) || uart_tx_stopped(port))
 180                return 0;
 181
 182        uart_out32(xmit->buf[xmit->tail], ULITE_TX, port);
 183        xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
 184        port->icount.tx++;
 185
 186        /* wake up */
 187        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 188                uart_write_wakeup(port);
 189
 190        return 1;
 191}
 192
 193static irqreturn_t ulite_isr(int irq, void *dev_id)
 194{
 195        struct uart_port *port = dev_id;
 196        int busy, n = 0;
 197
 198        do {
 199                int stat = uart_in32(ULITE_STATUS, port);
 200                busy  = ulite_receive(port, stat);
 201                busy |= ulite_transmit(port, stat);
 202                n++;
 203        } while (busy);
 204
 205        /* work done? */
 206        if (n > 1) {
 207                tty_flip_buffer_push(&port->state->port);
 208                return IRQ_HANDLED;
 209        } else {
 210                return IRQ_NONE;
 211        }
 212}
 213
 214static unsigned int ulite_tx_empty(struct uart_port *port)
 215{
 216        unsigned long flags;
 217        unsigned int ret;
 218
 219        spin_lock_irqsave(&port->lock, flags);
 220        ret = uart_in32(ULITE_STATUS, port);
 221        spin_unlock_irqrestore(&port->lock, flags);
 222
 223        return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
 224}
 225
 226static unsigned int ulite_get_mctrl(struct uart_port *port)
 227{
 228        return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 229}
 230
 231static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
 232{
 233        /* N/A */
 234}
 235
 236static void ulite_stop_tx(struct uart_port *port)
 237{
 238        /* N/A */
 239}
 240
 241static void ulite_start_tx(struct uart_port *port)
 242{
 243        ulite_transmit(port, uart_in32(ULITE_STATUS, port));
 244}
 245
 246static void ulite_stop_rx(struct uart_port *port)
 247{
 248        /* don't forward any more data (like !CREAD) */
 249        port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 250                | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 251}
 252
 253static void ulite_enable_ms(struct uart_port *port)
 254{
 255        /* N/A */
 256}
 257
 258static void ulite_break_ctl(struct uart_port *port, int ctl)
 259{
 260        /* N/A */
 261}
 262
 263static int ulite_startup(struct uart_port *port)
 264{
 265        int ret;
 266
 267        ret = request_irq(port->irq, ulite_isr, IRQF_SHARED, "uartlite", port);
 268        if (ret)
 269                return ret;
 270
 271        uart_out32(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
 272                ULITE_CONTROL, port);
 273        uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
 274
 275        return 0;
 276}
 277
 278static void ulite_shutdown(struct uart_port *port)
 279{
 280        uart_out32(0, ULITE_CONTROL, port);
 281        uart_in32(ULITE_CONTROL, port); /* dummy */
 282        free_irq(port->irq, port);
 283}
 284
 285static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
 286                              struct ktermios *old)
 287{
 288        unsigned long flags;
 289        unsigned int baud;
 290
 291        spin_lock_irqsave(&port->lock, flags);
 292
 293        port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
 294                | ULITE_STATUS_TXFULL;
 295
 296        if (termios->c_iflag & INPCK)
 297                port->read_status_mask |=
 298                        ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
 299
 300        port->ignore_status_mask = 0;
 301        if (termios->c_iflag & IGNPAR)
 302                port->ignore_status_mask |= ULITE_STATUS_PARITY
 303                        | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 304
 305        /* ignore all characters if CREAD is not set */
 306        if ((termios->c_cflag & CREAD) == 0)
 307                port->ignore_status_mask |=
 308                        ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 309                        | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 310
 311        /* update timeout */
 312        baud = uart_get_baud_rate(port, termios, old, 0, 460800);
 313        uart_update_timeout(port, termios->c_cflag, baud);
 314
 315        spin_unlock_irqrestore(&port->lock, flags);
 316}
 317
 318static const char *ulite_type(struct uart_port *port)
 319{
 320        return port->type == PORT_UARTLITE ? "uartlite" : NULL;
 321}
 322
 323static void ulite_release_port(struct uart_port *port)
 324{
 325        release_mem_region(port->mapbase, ULITE_REGION);
 326        iounmap(port->membase);
 327        port->membase = NULL;
 328}
 329
 330static int ulite_request_port(struct uart_port *port)
 331{
 332        int ret;
 333
 334        pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
 335                 port, (unsigned long long) port->mapbase);
 336
 337        if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
 338                dev_err(port->dev, "Memory region busy\n");
 339                return -EBUSY;
 340        }
 341
 342        port->membase = ioremap(port->mapbase, ULITE_REGION);
 343        if (!port->membase) {
 344                dev_err(port->dev, "Unable to map registers\n");
 345                release_mem_region(port->mapbase, ULITE_REGION);
 346                return -EBUSY;
 347        }
 348
 349        port->private_data = &uartlite_be;
 350        ret = uart_in32(ULITE_CONTROL, port);
 351        uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
 352        ret = uart_in32(ULITE_STATUS, port);
 353        /* Endianess detection */
 354        if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
 355                port->private_data = &uartlite_le;
 356
 357        return 0;
 358}
 359
 360static void ulite_config_port(struct uart_port *port, int flags)
 361{
 362        if (!ulite_request_port(port))
 363                port->type = PORT_UARTLITE;
 364}
 365
 366static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
 367{
 368        /* we don't want the core code to modify any port params */
 369        return -EINVAL;
 370}
 371
 372#ifdef CONFIG_CONSOLE_POLL
 373static int ulite_get_poll_char(struct uart_port *port)
 374{
 375        if (!(uart_in32(ULITE_STATUS, port) & ULITE_STATUS_RXVALID))
 376                return NO_POLL_CHAR;
 377
 378        return uart_in32(ULITE_RX, port);
 379}
 380
 381static void ulite_put_poll_char(struct uart_port *port, unsigned char ch)
 382{
 383        while (uart_in32(ULITE_STATUS, port) & ULITE_STATUS_TXFULL)
 384                cpu_relax();
 385
 386        /* write char to device */
 387        uart_out32(ch, ULITE_TX, port);
 388}
 389#endif
 390
 391static struct uart_ops ulite_ops = {
 392        .tx_empty       = ulite_tx_empty,
 393        .set_mctrl      = ulite_set_mctrl,
 394        .get_mctrl      = ulite_get_mctrl,
 395        .stop_tx        = ulite_stop_tx,
 396        .start_tx       = ulite_start_tx,
 397        .stop_rx        = ulite_stop_rx,
 398        .enable_ms      = ulite_enable_ms,
 399        .break_ctl      = ulite_break_ctl,
 400        .startup        = ulite_startup,
 401        .shutdown       = ulite_shutdown,
 402        .set_termios    = ulite_set_termios,
 403        .type           = ulite_type,
 404        .release_port   = ulite_release_port,
 405        .request_port   = ulite_request_port,
 406        .config_port    = ulite_config_port,
 407        .verify_port    = ulite_verify_port,
 408#ifdef CONFIG_CONSOLE_POLL
 409        .poll_get_char  = ulite_get_poll_char,
 410        .poll_put_char  = ulite_put_poll_char,
 411#endif
 412};
 413
 414/* ---------------------------------------------------------------------
 415 * Console driver operations
 416 */
 417
 418#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 419static void ulite_console_wait_tx(struct uart_port *port)
 420{
 421        int i;
 422        u8 val;
 423
 424        /* Spin waiting for TX fifo to have space available */
 425        for (i = 0; i < 100000; i++) {
 426                val = uart_in32(ULITE_STATUS, port);
 427                if ((val & ULITE_STATUS_TXFULL) == 0)
 428                        break;
 429                cpu_relax();
 430        }
 431}
 432
 433static void ulite_console_putchar(struct uart_port *port, int ch)
 434{
 435        ulite_console_wait_tx(port);
 436        uart_out32(ch, ULITE_TX, port);
 437}
 438
 439static void ulite_console_write(struct console *co, const char *s,
 440                                unsigned int count)
 441{
 442        struct uart_port *port = &ulite_ports[co->index];
 443        unsigned long flags;
 444        unsigned int ier;
 445        int locked = 1;
 446
 447        if (oops_in_progress) {
 448                locked = spin_trylock_irqsave(&port->lock, flags);
 449        } else
 450                spin_lock_irqsave(&port->lock, flags);
 451
 452        /* save and disable interrupt */
 453        ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;
 454        uart_out32(0, ULITE_CONTROL, port);
 455
 456        uart_console_write(port, s, count, ulite_console_putchar);
 457
 458        ulite_console_wait_tx(port);
 459
 460        /* restore interrupt state */
 461        if (ier)
 462                uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
 463
 464        if (locked)
 465                spin_unlock_irqrestore(&port->lock, flags);
 466}
 467
 468static int ulite_console_setup(struct console *co, char *options)
 469{
 470        struct uart_port *port;
 471        int baud = 9600;
 472        int bits = 8;
 473        int parity = 'n';
 474        int flow = 'n';
 475
 476        if (co->index < 0 || co->index >= ULITE_NR_UARTS)
 477                return -EINVAL;
 478
 479        port = &ulite_ports[co->index];
 480
 481        /* Has the device been initialized yet? */
 482        if (!port->mapbase) {
 483                pr_debug("console on ttyUL%i not present\n", co->index);
 484                return -ENODEV;
 485        }
 486
 487        /* not initialized yet? */
 488        if (!port->membase) {
 489                if (ulite_request_port(port))
 490                        return -ENODEV;
 491        }
 492
 493        if (options)
 494                uart_parse_options(options, &baud, &parity, &bits, &flow);
 495
 496        return uart_set_options(port, co, baud, parity, bits, flow);
 497}
 498
 499static struct uart_driver ulite_uart_driver;
 500
 501static struct console ulite_console = {
 502        .name   = ULITE_NAME,
 503        .write  = ulite_console_write,
 504        .device = uart_console_device,
 505        .setup  = ulite_console_setup,
 506        .flags  = CON_PRINTBUFFER,
 507        .index  = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
 508        .data   = &ulite_uart_driver,
 509};
 510
 511static int __init ulite_console_init(void)
 512{
 513        register_console(&ulite_console);
 514        return 0;
 515}
 516
 517console_initcall(ulite_console_init);
 518
 519#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
 520
 521static struct uart_driver ulite_uart_driver = {
 522        .owner          = THIS_MODULE,
 523        .driver_name    = "uartlite",
 524        .dev_name       = ULITE_NAME,
 525        .major          = ULITE_MAJOR,
 526        .minor          = ULITE_MINOR,
 527        .nr             = ULITE_NR_UARTS,
 528#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 529        .cons           = &ulite_console,
 530#endif
 531};
 532
 533/* ---------------------------------------------------------------------
 534 * Port assignment functions (mapping devices to uart_port structures)
 535 */
 536
 537/** ulite_assign: register a uartlite device with the driver
 538 *
 539 * @dev: pointer to device structure
 540 * @id: requested id number.  Pass -1 for automatic port assignment
 541 * @base: base address of uartlite registers
 542 * @irq: irq number for uartlite
 543 *
 544 * Returns: 0 on success, <0 otherwise
 545 */
 546static int ulite_assign(struct device *dev, int id, u32 base, int irq)
 547{
 548        struct uart_port *port;
 549        int rc;
 550
 551        /* if id = -1; then scan for a free id and use that */
 552        if (id < 0) {
 553                for (id = 0; id < ULITE_NR_UARTS; id++)
 554                        if (ulite_ports[id].mapbase == 0)
 555                                break;
 556        }
 557        if (id < 0 || id >= ULITE_NR_UARTS) {
 558                dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
 559                return -EINVAL;
 560        }
 561
 562        if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
 563                dev_err(dev, "cannot assign to %s%i; it is already in use\n",
 564                        ULITE_NAME, id);
 565                return -EBUSY;
 566        }
 567
 568        port = &ulite_ports[id];
 569
 570        spin_lock_init(&port->lock);
 571        port->fifosize = 16;
 572        port->regshift = 2;
 573        port->iotype = UPIO_MEM;
 574        port->iobase = 1; /* mark port in use */
 575        port->mapbase = base;
 576        port->membase = NULL;
 577        port->ops = &ulite_ops;
 578        port->irq = irq;
 579        port->flags = UPF_BOOT_AUTOCONF;
 580        port->dev = dev;
 581        port->type = PORT_UNKNOWN;
 582        port->line = id;
 583
 584        dev_set_drvdata(dev, port);
 585
 586        /* Register the port */
 587        rc = uart_add_one_port(&ulite_uart_driver, port);
 588        if (rc) {
 589                dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
 590                port->mapbase = 0;
 591                dev_set_drvdata(dev, NULL);
 592                return rc;
 593        }
 594
 595        return 0;
 596}
 597
 598/** ulite_release: register a uartlite device with the driver
 599 *
 600 * @dev: pointer to device structure
 601 */
 602static int ulite_release(struct device *dev)
 603{
 604        struct uart_port *port = dev_get_drvdata(dev);
 605        int rc = 0;
 606
 607        if (port) {
 608                rc = uart_remove_one_port(&ulite_uart_driver, port);
 609                dev_set_drvdata(dev, NULL);
 610                port->mapbase = 0;
 611        }
 612
 613        return rc;
 614}
 615
 616/* ---------------------------------------------------------------------
 617 * Platform bus binding
 618 */
 619
 620#if defined(CONFIG_OF)
 621/* Match table for of_platform binding */
 622static struct of_device_id ulite_of_match[] = {
 623        { .compatible = "xlnx,opb-uartlite-1.00.b", },
 624        { .compatible = "xlnx,xps-uartlite-1.00.a", },
 625        {}
 626};
 627MODULE_DEVICE_TABLE(of, ulite_of_match);
 628#endif /* CONFIG_OF */
 629
 630static int ulite_probe(struct platform_device *pdev)
 631{
 632        struct resource *res, *res2;
 633        int id = pdev->id;
 634#ifdef CONFIG_OF
 635        const __be32 *prop;
 636
 637        prop = of_get_property(pdev->dev.of_node, "port-number", NULL);
 638        if (prop)
 639                id = be32_to_cpup(prop);
 640#endif
 641
 642        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 643        if (!res)
 644                return -ENODEV;
 645
 646        res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 647        if (!res2)
 648                return -ENODEV;
 649
 650        return ulite_assign(&pdev->dev, id, res->start, res2->start);
 651}
 652
 653static int ulite_remove(struct platform_device *pdev)
 654{
 655        return ulite_release(&pdev->dev);
 656}
 657
 658/* work with hotplug and coldplug */
 659MODULE_ALIAS("platform:uartlite");
 660
 661static struct platform_driver ulite_platform_driver = {
 662        .probe = ulite_probe,
 663        .remove = ulite_remove,
 664        .driver = {
 665                .owner = THIS_MODULE,
 666                .name  = "uartlite",
 667                .of_match_table = of_match_ptr(ulite_of_match),
 668        },
 669};
 670
 671/* ---------------------------------------------------------------------
 672 * Module setup/teardown
 673 */
 674
 675static int __init ulite_init(void)
 676{
 677        int ret;
 678
 679        pr_debug("uartlite: calling uart_register_driver()\n");
 680        ret = uart_register_driver(&ulite_uart_driver);
 681        if (ret)
 682                goto err_uart;
 683
 684        pr_debug("uartlite: calling platform_driver_register()\n");
 685        ret = platform_driver_register(&ulite_platform_driver);
 686        if (ret)
 687                goto err_plat;
 688
 689        return 0;
 690
 691err_plat:
 692        uart_unregister_driver(&ulite_uart_driver);
 693err_uart:
 694        pr_err("registering uartlite driver failed: err=%i", ret);
 695        return ret;
 696}
 697
 698static void __exit ulite_exit(void)
 699{
 700        platform_driver_unregister(&ulite_platform_driver);
 701        uart_unregister_driver(&ulite_uart_driver);
 702}
 703
 704module_init(ulite_init);
 705module_exit(ulite_exit);
 706
 707MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
 708MODULE_DESCRIPTION("Xilinx uartlite serial driver");
 709MODULE_LICENSE("GPL");
 710
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