linux/drivers/staging/octeon-usb/octeon-hcd.c
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   1/*
   2 * This file is subject to the terms and conditions of the GNU General Public
   3 * License.  See the file "COPYING" in the main directory of this archive
   4 * for more details.
   5 *
   6 * Copyright (C) 2008 Cavium Networks
   7 *
   8 * Some parts of the code were originally released under BSD license:
   9 *
  10 * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
  11 * reserved.
  12 *
  13 * Redistribution and use in source and binary forms, with or without
  14 * modification, are permitted provided that the following conditions are
  15 * met:
  16 *
  17 *   * Redistributions of source code must retain the above copyright
  18 *     notice, this list of conditions and the following disclaimer.
  19 *
  20 *   * Redistributions in binary form must reproduce the above
  21 *     copyright notice, this list of conditions and the following
  22 *     disclaimer in the documentation and/or other materials provided
  23 *     with the distribution.
  24 *
  25 *   * Neither the name of Cavium Networks nor the names of
  26 *     its contributors may be used to endorse or promote products
  27 *     derived from this software without specific prior written
  28 *     permission.
  29 *
  30 * This Software, including technical data, may be subject to U.S. export
  31 * control laws, including the U.S. Export Administration Act and its associated
  32 * regulations, and may be subject to export or import regulations in other
  33 * countries.
  34 *
  35 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
  36 * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
  37 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
  38 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION
  39 * OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
  40 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
  41 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
  42 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
  43 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
  44 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
  45 */
  46
  47#include <linux/usb.h>
  48#include <linux/slab.h>
  49#include <linux/module.h>
  50#include <linux/usb/hcd.h>
  51#include <linux/prefetch.h>
  52#include <linux/platform_device.h>
  53
  54#include <asm/octeon/octeon.h>
  55
  56#include "octeon-hcd.h"
  57
  58/**
  59 * enum cvmx_usb_speed - the possible USB device speeds
  60 *
  61 * @CVMX_USB_SPEED_HIGH: Device is operation at 480Mbps
  62 * @CVMX_USB_SPEED_FULL: Device is operation at 12Mbps
  63 * @CVMX_USB_SPEED_LOW:  Device is operation at 1.5Mbps
  64 */
  65enum cvmx_usb_speed {
  66        CVMX_USB_SPEED_HIGH = 0,
  67        CVMX_USB_SPEED_FULL = 1,
  68        CVMX_USB_SPEED_LOW = 2,
  69};
  70
  71/**
  72 * enum cvmx_usb_transfer - the possible USB transfer types
  73 *
  74 * @CVMX_USB_TRANSFER_CONTROL:     USB transfer type control for hub and status
  75 *                                 transfers
  76 * @CVMX_USB_TRANSFER_ISOCHRONOUS: USB transfer type isochronous for low
  77 *                                 priority periodic transfers
  78 * @CVMX_USB_TRANSFER_BULK:        USB transfer type bulk for large low priority
  79 *                                 transfers
  80 * @CVMX_USB_TRANSFER_INTERRUPT:   USB transfer type interrupt for high priority
  81 *                                 periodic transfers
  82 */
  83enum cvmx_usb_transfer {
  84        CVMX_USB_TRANSFER_CONTROL = 0,
  85        CVMX_USB_TRANSFER_ISOCHRONOUS = 1,
  86        CVMX_USB_TRANSFER_BULK = 2,
  87        CVMX_USB_TRANSFER_INTERRUPT = 3,
  88};
  89
  90/**
  91 * enum cvmx_usb_direction - the transfer directions
  92 *
  93 * @CVMX_USB_DIRECTION_OUT: Data is transferring from Octeon to the device/host
  94 * @CVMX_USB_DIRECTION_IN:  Data is transferring from the device/host to Octeon
  95 */
  96enum cvmx_usb_direction {
  97        CVMX_USB_DIRECTION_OUT,
  98        CVMX_USB_DIRECTION_IN,
  99};
 100
 101/**
 102 * enum cvmx_usb_status - possible callback function status codes
 103 *
 104 * @CVMX_USB_STATUS_OK:           The transaction / operation finished without
 105 *                                any errors
 106 * @CVMX_USB_STATUS_SHORT:        FIXME: This is currently not implemented
 107 * @CVMX_USB_STATUS_CANCEL:       The transaction was canceled while in flight
 108 *                                by a user call to cvmx_usb_cancel
 109 * @CVMX_USB_STATUS_ERROR:        The transaction aborted with an unexpected
 110 *                                error status
 111 * @CVMX_USB_STATUS_STALL:        The transaction received a USB STALL response
 112 *                                from the device
 113 * @CVMX_USB_STATUS_XACTERR:      The transaction failed with an error from the
 114 *                                device even after a number of retries
 115 * @CVMX_USB_STATUS_DATATGLERR:   The transaction failed with a data toggle
 116 *                                error even after a number of retries
 117 * @CVMX_USB_STATUS_BABBLEERR:    The transaction failed with a babble error
 118 * @CVMX_USB_STATUS_FRAMEERR:     The transaction failed with a frame error
 119 *                                even after a number of retries
 120 */
 121enum cvmx_usb_status {
 122        CVMX_USB_STATUS_OK,
 123        CVMX_USB_STATUS_SHORT,
 124        CVMX_USB_STATUS_CANCEL,
 125        CVMX_USB_STATUS_ERROR,
 126        CVMX_USB_STATUS_STALL,
 127        CVMX_USB_STATUS_XACTERR,
 128        CVMX_USB_STATUS_DATATGLERR,
 129        CVMX_USB_STATUS_BABBLEERR,
 130        CVMX_USB_STATUS_FRAMEERR,
 131};
 132
 133/**
 134 * struct cvmx_usb_port_status - the USB port status information
 135 *
 136 * @port_enabled:       1 = Usb port is enabled, 0 = disabled
 137 * @port_over_current:  1 = Over current detected, 0 = Over current not
 138 *                      detected. Octeon doesn't support over current detection.
 139 * @port_powered:       1 = Port power is being supplied to the device, 0 =
 140 *                      power is off. Octeon doesn't support turning port power
 141 *                      off.
 142 * @port_speed:         Current port speed.
 143 * @connected:          1 = A device is connected to the port, 0 = No device is
 144 *                      connected.
 145 * @connect_change:     1 = Device connected state changed since the last set
 146 *                      status call.
 147 */
 148struct cvmx_usb_port_status {
 149        u32 reserved                    : 25;
 150        u32 port_enabled                : 1;
 151        u32 port_over_current           : 1;
 152        u32 port_powered                : 1;
 153        enum cvmx_usb_speed port_speed  : 2;
 154        u32 connected                   : 1;
 155        u32 connect_change              : 1;
 156};
 157
 158/**
 159 * struct cvmx_usb_iso_packet - descriptor for Isochronous packets
 160 *
 161 * @offset:     This is the offset in bytes into the main buffer where this data
 162 *              is stored.
 163 * @length:     This is the length in bytes of the data.
 164 * @status:     This is the status of this individual packet transfer.
 165 */
 166struct cvmx_usb_iso_packet {
 167        int offset;
 168        int length;
 169        enum cvmx_usb_status status;
 170};
 171
 172/**
 173 * enum cvmx_usb_initialize_flags - flags used by the initialization function
 174 *
 175 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI:    The USB port uses a 12MHz crystal
 176 *                                            as clock source at USB_XO and
 177 *                                            USB_XI.
 178 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND:   The USB port uses 12/24/48MHz 2.5V
 179 *                                            board clock source at USB_XO.
 180 *                                            USB_XI should be tied to GND.
 181 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK: Mask for clock speed field
 182 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ:    Speed of reference clock or
 183 *                                            crystal
 184 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ:    Speed of reference clock
 185 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ:    Speed of reference clock
 186 * @CVMX_USB_INITIALIZE_FLAGS_NO_DMA:         Disable DMA and used polled IO for
 187 *                                            data transfer use for the USB
 188 */
 189enum cvmx_usb_initialize_flags {
 190        CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI           = 1 << 0,
 191        CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND          = 1 << 1,
 192        CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK        = 3 << 3,
 193        CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ           = 1 << 3,
 194        CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ           = 2 << 3,
 195        CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ           = 3 << 3,
 196        /* Bits 3-4 used to encode the clock frequency */
 197        CVMX_USB_INITIALIZE_FLAGS_NO_DMA                = 1 << 5,
 198};
 199
 200/**
 201 * enum cvmx_usb_pipe_flags - internal flags for a pipe.
 202 *
 203 * @CVMX_USB_PIPE_FLAGS_SCHEDULED: Used internally to determine if a pipe is
 204 *                                 actively using hardware.
 205 * @CVMX_USB_PIPE_FLAGS_NEED_PING: Used internally to determine if a high speed
 206 *                                 pipe is in the ping state.
 207 */
 208enum cvmx_usb_pipe_flags {
 209        CVMX_USB_PIPE_FLAGS_SCHEDULED   = 1 << 17,
 210        CVMX_USB_PIPE_FLAGS_NEED_PING   = 1 << 18,
 211};
 212
 213/* Maximum number of times to retry failed transactions */
 214#define MAX_RETRIES             3
 215
 216/* Maximum number of hardware channels supported by the USB block */
 217#define MAX_CHANNELS            8
 218
 219/*
 220 * The low level hardware can transfer a maximum of this number of bytes in each
 221 * transfer. The field is 19 bits wide
 222 */
 223#define MAX_TRANSFER_BYTES      ((1 << 19) - 1)
 224
 225/*
 226 * The low level hardware can transfer a maximum of this number of packets in
 227 * each transfer. The field is 10 bits wide
 228 */
 229#define MAX_TRANSFER_PACKETS    ((1 << 10) - 1)
 230
 231/**
 232 * Logical transactions may take numerous low level
 233 * transactions, especially when splits are concerned. This
 234 * enum represents all of the possible stages a transaction can
 235 * be in. Note that split completes are always even. This is so
 236 * the NAK handler can backup to the previous low level
 237 * transaction with a simple clearing of bit 0.
 238 */
 239enum cvmx_usb_stage {
 240        CVMX_USB_STAGE_NON_CONTROL,
 241        CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE,
 242        CVMX_USB_STAGE_SETUP,
 243        CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE,
 244        CVMX_USB_STAGE_DATA,
 245        CVMX_USB_STAGE_DATA_SPLIT_COMPLETE,
 246        CVMX_USB_STAGE_STATUS,
 247        CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE,
 248};
 249
 250/**
 251 * struct cvmx_usb_transaction - describes each pending USB transaction
 252 *                               regardless of type. These are linked together
 253 *                               to form a list of pending requests for a pipe.
 254 *
 255 * @node:               List node for transactions in the pipe.
 256 * @type:               Type of transaction, duplicated of the pipe.
 257 * @flags:              State flags for this transaction.
 258 * @buffer:             User's physical buffer address to read/write.
 259 * @buffer_length:      Size of the user's buffer in bytes.
 260 * @control_header:     For control transactions, physical address of the 8
 261 *                      byte standard header.
 262 * @iso_start_frame:    For ISO transactions, the starting frame number.
 263 * @iso_number_packets: For ISO transactions, the number of packets in the
 264 *                      request.
 265 * @iso_packets:        For ISO transactions, the sub packets in the request.
 266 * @actual_bytes:       Actual bytes transfer for this transaction.
 267 * @stage:              For control transactions, the current stage.
 268 * @urb:                URB.
 269 */
 270struct cvmx_usb_transaction {
 271        struct list_head node;
 272        enum cvmx_usb_transfer type;
 273        u64 buffer;
 274        int buffer_length;
 275        u64 control_header;
 276        int iso_start_frame;
 277        int iso_number_packets;
 278        struct cvmx_usb_iso_packet *iso_packets;
 279        int xfersize;
 280        int pktcnt;
 281        int retries;
 282        int actual_bytes;
 283        enum cvmx_usb_stage stage;
 284        struct urb *urb;
 285};
 286
 287/**
 288 * struct cvmx_usb_pipe - a pipe represents a virtual connection between Octeon
 289 *                        and some USB device. It contains a list of pending
 290 *                        request to the device.
 291 *
 292 * @node:               List node for pipe list
 293 * @next:               Pipe after this one in the list
 294 * @transactions:       List of pending transactions
 295 * @interval:           For periodic pipes, the interval between packets in
 296 *                      frames
 297 * @next_tx_frame:      The next frame this pipe is allowed to transmit on
 298 * @flags:              State flags for this pipe
 299 * @device_speed:       Speed of device connected to this pipe
 300 * @transfer_type:      Type of transaction supported by this pipe
 301 * @transfer_dir:       IN or OUT. Ignored for Control
 302 * @multi_count:        Max packet in a row for the device
 303 * @max_packet:         The device's maximum packet size in bytes
 304 * @device_addr:        USB device address at other end of pipe
 305 * @endpoint_num:       USB endpoint number at other end of pipe
 306 * @hub_device_addr:    Hub address this device is connected to
 307 * @hub_port:           Hub port this device is connected to
 308 * @pid_toggle:         This toggles between 0/1 on every packet send to track
 309 *                      the data pid needed
 310 * @channel:            Hardware DMA channel for this pipe
 311 * @split_sc_frame:     The low order bits of the frame number the split
 312 *                      complete should be sent on
 313 */
 314struct cvmx_usb_pipe {
 315        struct list_head node;
 316        struct list_head transactions;
 317        u64 interval;
 318        u64 next_tx_frame;
 319        enum cvmx_usb_pipe_flags flags;
 320        enum cvmx_usb_speed device_speed;
 321        enum cvmx_usb_transfer transfer_type;
 322        enum cvmx_usb_direction transfer_dir;
 323        int multi_count;
 324        u16 max_packet;
 325        u8 device_addr;
 326        u8 endpoint_num;
 327        u8 hub_device_addr;
 328        u8 hub_port;
 329        u8 pid_toggle;
 330        u8 channel;
 331        s8 split_sc_frame;
 332};
 333
 334struct cvmx_usb_tx_fifo {
 335        struct {
 336                int channel;
 337                int size;
 338                u64 address;
 339        } entry[MAX_CHANNELS + 1];
 340        int head;
 341        int tail;
 342};
 343
 344/**
 345 * struct octeon_hcd - the state of the USB block
 346 *
 347 * lock:                   Serialization lock.
 348 * init_flags:             Flags passed to initialize.
 349 * index:                  Which USB block this is for.
 350 * idle_hardware_channels: Bit set for every idle hardware channel.
 351 * usbcx_hprt:             Stored port status so we don't need to read a CSR to
 352 *                         determine splits.
 353 * pipe_for_channel:       Map channels to pipes.
 354 * pipe:                   Storage for pipes.
 355 * indent:                 Used by debug output to indent functions.
 356 * port_status:            Last port status used for change notification.
 357 * idle_pipes:             List of open pipes that have no transactions.
 358 * active_pipes:           Active pipes indexed by transfer type.
 359 * frame_number:           Increments every SOF interrupt for time keeping.
 360 * active_split:           Points to the current active split, or NULL.
 361 */
 362struct octeon_hcd {
 363        spinlock_t lock; /* serialization lock */
 364        int init_flags;
 365        int index;
 366        int idle_hardware_channels;
 367        union cvmx_usbcx_hprt usbcx_hprt;
 368        struct cvmx_usb_pipe *pipe_for_channel[MAX_CHANNELS];
 369        int indent;
 370        struct cvmx_usb_port_status port_status;
 371        struct list_head idle_pipes;
 372        struct list_head active_pipes[4];
 373        u64 frame_number;
 374        struct cvmx_usb_transaction *active_split;
 375        struct cvmx_usb_tx_fifo periodic;
 376        struct cvmx_usb_tx_fifo nonperiodic;
 377};
 378
 379/* This macro spins on a register waiting for it to reach a condition. */
 380#define CVMX_WAIT_FOR_FIELD32(address, _union, cond, timeout_usec)          \
 381        ({int result;                                                       \
 382        do {                                                                \
 383                u64 done = cvmx_get_cycle() + (u64)timeout_usec *           \
 384                           octeon_get_clock_rate() / 1000000;               \
 385                union _union c;                                             \
 386                                                                            \
 387                while (1) {                                                 \
 388                        c.u32 = cvmx_usb_read_csr32(usb, address);          \
 389                                                                            \
 390                        if (cond) {                                         \
 391                                result = 0;                                 \
 392                                break;                                      \
 393                        } else if (cvmx_get_cycle() > done) {               \
 394                                result = -1;                                \
 395                                break;                                      \
 396                        } else                                              \
 397                                cvmx_wait(100);                             \
 398                }                                                           \
 399        } while (0);                                                        \
 400        result; })
 401
 402/*
 403 * This macro logically sets a single field in a CSR. It does the sequence
 404 * read, modify, and write
 405 */
 406#define USB_SET_FIELD32(address, _union, field, value)          \
 407        do {                                                    \
 408                union _union c;                                 \
 409                                                                \
 410                c.u32 = cvmx_usb_read_csr32(usb, address);      \
 411                c.s.field = value;                              \
 412                cvmx_usb_write_csr32(usb, address, c.u32);      \
 413        } while (0)
 414
 415/* Returns the IO address to push/pop stuff data from the FIFOs */
 416#define USB_FIFO_ADDRESS(channel, usb_index) \
 417        (CVMX_USBCX_GOTGCTL(usb_index) + ((channel) + 1) * 0x1000)
 418
 419/**
 420 * struct octeon_temp_buffer - a bounce buffer for USB transfers
 421 * @orig_buffer: the original buffer passed by the USB stack
 422 * @data:        the newly allocated temporary buffer (excluding meta-data)
 423 *
 424 * Both the DMA engine and FIFO mode will always transfer full 32-bit words. If
 425 * the buffer is too short, we need to allocate a temporary one, and this struct
 426 * represents it.
 427 */
 428struct octeon_temp_buffer {
 429        void *orig_buffer;
 430        u8 data[0];
 431};
 432
 433static inline struct usb_hcd *octeon_to_hcd(struct octeon_hcd *p)
 434{
 435        return container_of((void *)p, struct usb_hcd, hcd_priv);
 436}
 437
 438/**
 439 * octeon_alloc_temp_buffer - allocate a temporary buffer for USB transfer
 440 *                            (if needed)
 441 * @urb:        URB.
 442 * @mem_flags:  Memory allocation flags.
 443 *
 444 * This function allocates a temporary bounce buffer whenever it's needed
 445 * due to HW limitations.
 446 */
 447static int octeon_alloc_temp_buffer(struct urb *urb, gfp_t mem_flags)
 448{
 449        struct octeon_temp_buffer *temp;
 450
 451        if (urb->num_sgs || urb->sg ||
 452            (urb->transfer_flags & URB_NO_TRANSFER_DMA_MAP) ||
 453            !(urb->transfer_buffer_length % sizeof(u32)))
 454                return 0;
 455
 456        temp = kmalloc(ALIGN(urb->transfer_buffer_length, sizeof(u32)) +
 457                       sizeof(*temp), mem_flags);
 458        if (!temp)
 459                return -ENOMEM;
 460
 461        temp->orig_buffer = urb->transfer_buffer;
 462        if (usb_urb_dir_out(urb))
 463                memcpy(temp->data, urb->transfer_buffer,
 464                       urb->transfer_buffer_length);
 465        urb->transfer_buffer = temp->data;
 466        urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
 467
 468        return 0;
 469}
 470
 471/**
 472 * octeon_free_temp_buffer - free a temporary buffer used by USB transfers.
 473 * @urb: URB.
 474 *
 475 * Frees a buffer allocated by octeon_alloc_temp_buffer().
 476 */
 477static void octeon_free_temp_buffer(struct urb *urb)
 478{
 479        struct octeon_temp_buffer *temp;
 480        size_t length;
 481
 482        if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
 483                return;
 484
 485        temp = container_of(urb->transfer_buffer, struct octeon_temp_buffer,
 486                            data);
 487        if (usb_urb_dir_in(urb)) {
 488                if (usb_pipeisoc(urb->pipe))
 489                        length = urb->transfer_buffer_length;
 490                else
 491                        length = urb->actual_length;
 492
 493                memcpy(temp->orig_buffer, urb->transfer_buffer, length);
 494        }
 495        urb->transfer_buffer = temp->orig_buffer;
 496        urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
 497        kfree(temp);
 498}
 499
 500/**
 501 * octeon_map_urb_for_dma - Octeon-specific map_urb_for_dma().
 502 * @hcd:        USB HCD structure.
 503 * @urb:        URB.
 504 * @mem_flags:  Memory allocation flags.
 505 */
 506static int octeon_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
 507                                  gfp_t mem_flags)
 508{
 509        int ret;
 510
 511        ret = octeon_alloc_temp_buffer(urb, mem_flags);
 512        if (ret)
 513                return ret;
 514
 515        ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
 516        if (ret)
 517                octeon_free_temp_buffer(urb);
 518
 519        return ret;
 520}
 521
 522/**
 523 * octeon_unmap_urb_for_dma - Octeon-specific unmap_urb_for_dma()
 524 * @hcd:        USB HCD structure.
 525 * @urb:        URB.
 526 */
 527static void octeon_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
 528{
 529        usb_hcd_unmap_urb_for_dma(hcd, urb);
 530        octeon_free_temp_buffer(urb);
 531}
 532
 533/**
 534 * Read a USB 32bit CSR. It performs the necessary address swizzle
 535 * for 32bit CSRs and logs the value in a readable format if
 536 * debugging is on.
 537 *
 538 * @usb:     USB block this access is for
 539 * @address: 64bit address to read
 540 *
 541 * Returns: Result of the read
 542 */
 543static inline u32 cvmx_usb_read_csr32(struct octeon_hcd *usb, u64 address)
 544{
 545        u32 result = cvmx_read64_uint32(address ^ 4);
 546        return result;
 547}
 548
 549/**
 550 * Write a USB 32bit CSR. It performs the necessary address
 551 * swizzle for 32bit CSRs and logs the value in a readable format
 552 * if debugging is on.
 553 *
 554 * @usb:     USB block this access is for
 555 * @address: 64bit address to write
 556 * @value:   Value to write
 557 */
 558static inline void cvmx_usb_write_csr32(struct octeon_hcd *usb,
 559                                        u64 address, u32 value)
 560{
 561        cvmx_write64_uint32(address ^ 4, value);
 562        cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
 563}
 564
 565/**
 566 * Return non zero if this pipe connects to a non HIGH speed
 567 * device through a high speed hub.
 568 *
 569 * @usb:    USB block this access is for
 570 * @pipe:   Pipe to check
 571 *
 572 * Returns: Non zero if we need to do split transactions
 573 */
 574static inline int cvmx_usb_pipe_needs_split(struct octeon_hcd *usb,
 575                                            struct cvmx_usb_pipe *pipe)
 576{
 577        return pipe->device_speed != CVMX_USB_SPEED_HIGH &&
 578               usb->usbcx_hprt.s.prtspd == CVMX_USB_SPEED_HIGH;
 579}
 580
 581/**
 582 * Trivial utility function to return the correct PID for a pipe
 583 *
 584 * @pipe:   pipe to check
 585 *
 586 * Returns: PID for pipe
 587 */
 588static inline int cvmx_usb_get_data_pid(struct cvmx_usb_pipe *pipe)
 589{
 590        if (pipe->pid_toggle)
 591                return 2; /* Data1 */
 592        return 0; /* Data0 */
 593}
 594
 595static void cvmx_fifo_setup(struct octeon_hcd *usb)
 596{
 597        union cvmx_usbcx_ghwcfg3 usbcx_ghwcfg3;
 598        union cvmx_usbcx_gnptxfsiz npsiz;
 599        union cvmx_usbcx_hptxfsiz psiz;
 600
 601        usbcx_ghwcfg3.u32 = cvmx_usb_read_csr32(usb,
 602                                                CVMX_USBCX_GHWCFG3(usb->index));
 603
 604        /*
 605         * Program the USBC_GRXFSIZ register to select the size of the receive
 606         * FIFO (25%).
 607         */
 608        USB_SET_FIELD32(CVMX_USBCX_GRXFSIZ(usb->index), cvmx_usbcx_grxfsiz,
 609                        rxfdep, usbcx_ghwcfg3.s.dfifodepth / 4);
 610
 611        /*
 612         * Program the USBC_GNPTXFSIZ register to select the size and the start
 613         * address of the non-periodic transmit FIFO for nonperiodic
 614         * transactions (50%).
 615         */
 616        npsiz.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index));
 617        npsiz.s.nptxfdep = usbcx_ghwcfg3.s.dfifodepth / 2;
 618        npsiz.s.nptxfstaddr = usbcx_ghwcfg3.s.dfifodepth / 4;
 619        cvmx_usb_write_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index), npsiz.u32);
 620
 621        /*
 622         * Program the USBC_HPTXFSIZ register to select the size and start
 623         * address of the periodic transmit FIFO for periodic transactions
 624         * (25%).
 625         */
 626        psiz.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index));
 627        psiz.s.ptxfsize = usbcx_ghwcfg3.s.dfifodepth / 4;
 628        psiz.s.ptxfstaddr = 3 * usbcx_ghwcfg3.s.dfifodepth / 4;
 629        cvmx_usb_write_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index), psiz.u32);
 630
 631        /* Flush all FIFOs */
 632        USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
 633                        cvmx_usbcx_grstctl, txfnum, 0x10);
 634        USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
 635                        cvmx_usbcx_grstctl, txfflsh, 1);
 636        CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
 637                              cvmx_usbcx_grstctl, c.s.txfflsh == 0, 100);
 638        USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
 639                        cvmx_usbcx_grstctl, rxfflsh, 1);
 640        CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
 641                              cvmx_usbcx_grstctl, c.s.rxfflsh == 0, 100);
 642}
 643
 644/**
 645 * Shutdown a USB port after a call to cvmx_usb_initialize().
 646 * The port should be disabled with all pipes closed when this
 647 * function is called.
 648 *
 649 * @usb: USB device state populated by cvmx_usb_initialize().
 650 *
 651 * Returns: 0 or a negative error code.
 652 */
 653static int cvmx_usb_shutdown(struct octeon_hcd *usb)
 654{
 655        union cvmx_usbnx_clk_ctl usbn_clk_ctl;
 656
 657        /* Make sure all pipes are closed */
 658        if (!list_empty(&usb->idle_pipes) ||
 659            !list_empty(&usb->active_pipes[CVMX_USB_TRANSFER_ISOCHRONOUS]) ||
 660            !list_empty(&usb->active_pipes[CVMX_USB_TRANSFER_INTERRUPT]) ||
 661            !list_empty(&usb->active_pipes[CVMX_USB_TRANSFER_CONTROL]) ||
 662            !list_empty(&usb->active_pipes[CVMX_USB_TRANSFER_BULK]))
 663                return -EBUSY;
 664
 665        /* Disable the clocks and put them in power on reset */
 666        usbn_clk_ctl.u64 = cvmx_read64_uint64(CVMX_USBNX_CLK_CTL(usb->index));
 667        usbn_clk_ctl.s.enable = 1;
 668        usbn_clk_ctl.s.por = 1;
 669        usbn_clk_ctl.s.hclk_rst = 1;
 670        usbn_clk_ctl.s.prst = 0;
 671        usbn_clk_ctl.s.hrst = 0;
 672        cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
 673        return 0;
 674}
 675
 676/**
 677 * Initialize a USB port for use. This must be called before any
 678 * other access to the Octeon USB port is made. The port starts
 679 * off in the disabled state.
 680 *
 681 * @dev:         Pointer to struct device for logging purposes.
 682 * @usb:         Pointer to struct octeon_hcd.
 683 *
 684 * Returns: 0 or a negative error code.
 685 */
 686static int cvmx_usb_initialize(struct device *dev,
 687                               struct octeon_hcd *usb)
 688{
 689        int channel;
 690        int divisor;
 691        int retries = 0;
 692        union cvmx_usbcx_hcfg usbcx_hcfg;
 693        union cvmx_usbnx_clk_ctl usbn_clk_ctl;
 694        union cvmx_usbcx_gintsts usbc_gintsts;
 695        union cvmx_usbcx_gahbcfg usbcx_gahbcfg;
 696        union cvmx_usbcx_gintmsk usbcx_gintmsk;
 697        union cvmx_usbcx_gusbcfg usbcx_gusbcfg;
 698        union cvmx_usbnx_usbp_ctl_status usbn_usbp_ctl_status;
 699
 700retry:
 701        /*
 702         * Power On Reset and PHY Initialization
 703         *
 704         * 1. Wait for DCOK to assert (nothing to do)
 705         *
 706         * 2a. Write USBN0/1_CLK_CTL[POR] = 1 and
 707         *     USBN0/1_CLK_CTL[HRST,PRST,HCLK_RST] = 0
 708         */
 709        usbn_clk_ctl.u64 = cvmx_read64_uint64(CVMX_USBNX_CLK_CTL(usb->index));
 710        usbn_clk_ctl.s.por = 1;
 711        usbn_clk_ctl.s.hrst = 0;
 712        usbn_clk_ctl.s.prst = 0;
 713        usbn_clk_ctl.s.hclk_rst = 0;
 714        usbn_clk_ctl.s.enable = 0;
 715        /*
 716         * 2b. Select the USB reference clock/crystal parameters by writing
 717         *     appropriate values to USBN0/1_CLK_CTL[P_C_SEL, P_RTYPE, P_COM_ON]
 718         */
 719        if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND) {
 720                /*
 721                 * The USB port uses 12/24/48MHz 2.5V board clock
 722                 * source at USB_XO. USB_XI should be tied to GND.
 723                 * Most Octeon evaluation boards require this setting
 724                 */
 725                if (OCTEON_IS_MODEL(OCTEON_CN3XXX) ||
 726                    OCTEON_IS_MODEL(OCTEON_CN56XX) ||
 727                    OCTEON_IS_MODEL(OCTEON_CN50XX))
 728                        /* From CN56XX,CN50XX,CN31XX,CN30XX manuals */
 729                        usbn_clk_ctl.s.p_rtype = 2; /* p_rclk=1 & p_xenbn=0 */
 730                else
 731                        /* From CN52XX manual */
 732                        usbn_clk_ctl.s.p_rtype = 1;
 733
 734                switch (usb->init_flags &
 735                        CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK) {
 736                case CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ:
 737                        usbn_clk_ctl.s.p_c_sel = 0;
 738                        break;
 739                case CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ:
 740                        usbn_clk_ctl.s.p_c_sel = 1;
 741                        break;
 742                case CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ:
 743                        usbn_clk_ctl.s.p_c_sel = 2;
 744                        break;
 745                }
 746        } else {
 747                /*
 748                 * The USB port uses a 12MHz crystal as clock source
 749                 * at USB_XO and USB_XI
 750                 */
 751                if (OCTEON_IS_MODEL(OCTEON_CN3XXX))
 752                        /* From CN31XX,CN30XX manual */
 753                        usbn_clk_ctl.s.p_rtype = 3; /* p_rclk=1 & p_xenbn=1 */
 754                else
 755                        /* From CN56XX,CN52XX,CN50XX manuals. */
 756                        usbn_clk_ctl.s.p_rtype = 0;
 757
 758                usbn_clk_ctl.s.p_c_sel = 0;
 759        }
 760        /*
 761         * 2c. Select the HCLK via writing USBN0/1_CLK_CTL[DIVIDE, DIVIDE2] and
 762         *     setting USBN0/1_CLK_CTL[ENABLE] = 1. Divide the core clock down
 763         *     such that USB is as close as possible to 125Mhz
 764         */
 765        divisor = DIV_ROUND_UP(octeon_get_clock_rate(), 125000000);
 766        /* Lower than 4 doesn't seem to work properly */
 767        if (divisor < 4)
 768                divisor = 4;
 769        usbn_clk_ctl.s.divide = divisor;
 770        usbn_clk_ctl.s.divide2 = 0;
 771        cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
 772
 773        /* 2d. Write USBN0/1_CLK_CTL[HCLK_RST] = 1 */
 774        usbn_clk_ctl.s.hclk_rst = 1;
 775        cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
 776        /* 2e.  Wait 64 core-clock cycles for HCLK to stabilize */
 777        cvmx_wait(64);
 778        /*
 779         * 3. Program the power-on reset field in the USBN clock-control
 780         *    register:
 781         *    USBN_CLK_CTL[POR] = 0
 782         */
 783        usbn_clk_ctl.s.por = 0;
 784        cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
 785        /* 4. Wait 1 ms for PHY clock to start */
 786        mdelay(1);
 787        /*
 788         * 5. Program the Reset input from automatic test equipment field in the
 789         *    USBP control and status register:
 790         *    USBN_USBP_CTL_STATUS[ATE_RESET] = 1
 791         */
 792        usbn_usbp_ctl_status.u64 =
 793                cvmx_read64_uint64(CVMX_USBNX_USBP_CTL_STATUS(usb->index));
 794        usbn_usbp_ctl_status.s.ate_reset = 1;
 795        cvmx_write64_uint64(CVMX_USBNX_USBP_CTL_STATUS(usb->index),
 796                            usbn_usbp_ctl_status.u64);
 797        /* 6. Wait 10 cycles */
 798        cvmx_wait(10);
 799        /*
 800         * 7. Clear ATE_RESET field in the USBN clock-control register:
 801         *    USBN_USBP_CTL_STATUS[ATE_RESET] = 0
 802         */
 803        usbn_usbp_ctl_status.s.ate_reset = 0;
 804        cvmx_write64_uint64(CVMX_USBNX_USBP_CTL_STATUS(usb->index),
 805                            usbn_usbp_ctl_status.u64);
 806        /*
 807         * 8. Program the PHY reset field in the USBN clock-control register:
 808         *    USBN_CLK_CTL[PRST] = 1
 809         */
 810        usbn_clk_ctl.s.prst = 1;
 811        cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
 812        /*
 813         * 9. Program the USBP control and status register to select host or
 814         *    device mode. USBN_USBP_CTL_STATUS[HST_MODE] = 0 for host, = 1 for
 815         *    device
 816         */
 817        usbn_usbp_ctl_status.s.hst_mode = 0;
 818        cvmx_write64_uint64(CVMX_USBNX_USBP_CTL_STATUS(usb->index),
 819                            usbn_usbp_ctl_status.u64);
 820        /* 10. Wait 1 us */
 821        udelay(1);
 822        /*
 823         * 11. Program the hreset_n field in the USBN clock-control register:
 824         *     USBN_CLK_CTL[HRST] = 1
 825         */
 826        usbn_clk_ctl.s.hrst = 1;
 827        cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
 828        /* 12. Proceed to USB core initialization */
 829        usbn_clk_ctl.s.enable = 1;
 830        cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
 831        udelay(1);
 832
 833        /*
 834         * USB Core Initialization
 835         *
 836         * 1. Read USBC_GHWCFG1, USBC_GHWCFG2, USBC_GHWCFG3, USBC_GHWCFG4 to
 837         *    determine USB core configuration parameters.
 838         *
 839         *    Nothing needed
 840         *
 841         * 2. Program the following fields in the global AHB configuration
 842         *    register (USBC_GAHBCFG)
 843         *    DMA mode, USBC_GAHBCFG[DMAEn]: 1 = DMA mode, 0 = slave mode
 844         *    Burst length, USBC_GAHBCFG[HBSTLEN] = 0
 845         *    Nonperiodic TxFIFO empty level (slave mode only),
 846         *    USBC_GAHBCFG[NPTXFEMPLVL]
 847         *    Periodic TxFIFO empty level (slave mode only),
 848         *    USBC_GAHBCFG[PTXFEMPLVL]
 849         *    Global interrupt mask, USBC_GAHBCFG[GLBLINTRMSK] = 1
 850         */
 851        usbcx_gahbcfg.u32 = 0;
 852        usbcx_gahbcfg.s.dmaen = !(usb->init_flags &
 853                                  CVMX_USB_INITIALIZE_FLAGS_NO_DMA);
 854        usbcx_gahbcfg.s.hbstlen = 0;
 855        usbcx_gahbcfg.s.nptxfemplvl = 1;
 856        usbcx_gahbcfg.s.ptxfemplvl = 1;
 857        usbcx_gahbcfg.s.glblintrmsk = 1;
 858        cvmx_usb_write_csr32(usb, CVMX_USBCX_GAHBCFG(usb->index),
 859                             usbcx_gahbcfg.u32);
 860
 861        /*
 862         * 3. Program the following fields in USBC_GUSBCFG register.
 863         *    HS/FS timeout calibration, USBC_GUSBCFG[TOUTCAL] = 0
 864         *    ULPI DDR select, USBC_GUSBCFG[DDRSEL] = 0
 865         *    USB turnaround time, USBC_GUSBCFG[USBTRDTIM] = 0x5
 866         *    PHY low-power clock select, USBC_GUSBCFG[PHYLPWRCLKSEL] = 0
 867         */
 868        usbcx_gusbcfg.u32 = cvmx_usb_read_csr32(usb,
 869                                                CVMX_USBCX_GUSBCFG(usb->index));
 870        usbcx_gusbcfg.s.toutcal = 0;
 871        usbcx_gusbcfg.s.ddrsel = 0;
 872        usbcx_gusbcfg.s.usbtrdtim = 0x5;
 873        usbcx_gusbcfg.s.phylpwrclksel = 0;
 874        cvmx_usb_write_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index),
 875                             usbcx_gusbcfg.u32);
 876
 877        /*
 878         * 4. The software must unmask the following bits in the USBC_GINTMSK
 879         *    register.
 880         *    OTG interrupt mask, USBC_GINTMSK[OTGINTMSK] = 1
 881         *    Mode mismatch interrupt mask, USBC_GINTMSK[MODEMISMSK] = 1
 882         */
 883        usbcx_gintmsk.u32 = cvmx_usb_read_csr32(usb,
 884                                                CVMX_USBCX_GINTMSK(usb->index));
 885        usbcx_gintmsk.s.otgintmsk = 1;
 886        usbcx_gintmsk.s.modemismsk = 1;
 887        usbcx_gintmsk.s.hchintmsk = 1;
 888        usbcx_gintmsk.s.sofmsk = 0;
 889        /* We need RX FIFO interrupts if we don't have DMA */
 890        if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
 891                usbcx_gintmsk.s.rxflvlmsk = 1;
 892        cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTMSK(usb->index),
 893                             usbcx_gintmsk.u32);
 894
 895        /*
 896         * Disable all channel interrupts. We'll enable them per channel later.
 897         */
 898        for (channel = 0; channel < 8; channel++)
 899                cvmx_usb_write_csr32(usb,
 900                                     CVMX_USBCX_HCINTMSKX(channel, usb->index),
 901                                     0);
 902
 903        /*
 904         * Host Port Initialization
 905         *
 906         * 1. Program the host-port interrupt-mask field to unmask,
 907         *    USBC_GINTMSK[PRTINT] = 1
 908         */
 909        USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
 910                        cvmx_usbcx_gintmsk, prtintmsk, 1);
 911        USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
 912                        cvmx_usbcx_gintmsk, disconnintmsk, 1);
 913
 914        /*
 915         * 2. Program the USBC_HCFG register to select full-speed host
 916         *    or high-speed host.
 917         */
 918        usbcx_hcfg.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_HCFG(usb->index));
 919        usbcx_hcfg.s.fslssupp = 0;
 920        usbcx_hcfg.s.fslspclksel = 0;
 921        cvmx_usb_write_csr32(usb, CVMX_USBCX_HCFG(usb->index), usbcx_hcfg.u32);
 922
 923        cvmx_fifo_setup(usb);
 924
 925        /*
 926         * If the controller is getting port events right after the reset, it
 927         * means the initialization failed. Try resetting the controller again
 928         * in such case. This is seen to happen after cold boot on DSR-1000N.
 929         */
 930        usbc_gintsts.u32 = cvmx_usb_read_csr32(usb,
 931                                               CVMX_USBCX_GINTSTS(usb->index));
 932        cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTSTS(usb->index),
 933                             usbc_gintsts.u32);
 934        dev_dbg(dev, "gintsts after reset: 0x%x\n", (int)usbc_gintsts.u32);
 935        if (!usbc_gintsts.s.disconnint && !usbc_gintsts.s.prtint)
 936                return 0;
 937        if (retries++ >= 5)
 938                return -EAGAIN;
 939        dev_info(dev, "controller reset failed (gintsts=0x%x) - retrying\n",
 940                 (int)usbc_gintsts.u32);
 941        msleep(50);
 942        cvmx_usb_shutdown(usb);
 943        msleep(50);
 944        goto retry;
 945}
 946
 947/**
 948 * Reset a USB port. After this call succeeds, the USB port is
 949 * online and servicing requests.
 950 *
 951 * @usb: USB device state populated by cvmx_usb_initialize().
 952 */
 953static void cvmx_usb_reset_port(struct octeon_hcd *usb)
 954{
 955        usb->usbcx_hprt.u32 = cvmx_usb_read_csr32(usb,
 956                                                  CVMX_USBCX_HPRT(usb->index));
 957
 958        /* Program the port reset bit to start the reset process */
 959        USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), cvmx_usbcx_hprt,
 960                        prtrst, 1);
 961
 962        /*
 963         * Wait at least 50ms (high speed), or 10ms (full speed) for the reset
 964         * process to complete.
 965         */
 966        mdelay(50);
 967
 968        /* Program the port reset bit to 0, USBC_HPRT[PRTRST] = 0 */
 969        USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), cvmx_usbcx_hprt,
 970                        prtrst, 0);
 971
 972        /*
 973         * Read the port speed field to get the enumerated speed,
 974         * USBC_HPRT[PRTSPD].
 975         */
 976        usb->usbcx_hprt.u32 = cvmx_usb_read_csr32(usb,
 977                                                  CVMX_USBCX_HPRT(usb->index));
 978}
 979
 980/**
 981 * Disable a USB port. After this call the USB port will not
 982 * generate data transfers and will not generate events.
 983 * Transactions in process will fail and call their
 984 * associated callbacks.
 985 *
 986 * @usb: USB device state populated by cvmx_usb_initialize().
 987 *
 988 * Returns: 0 or a negative error code.
 989 */
 990static int cvmx_usb_disable(struct octeon_hcd *usb)
 991{
 992        /* Disable the port */
 993        USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), cvmx_usbcx_hprt,
 994                        prtena, 1);
 995        return 0;
 996}
 997
 998/**
 999 * Get the current state of the USB port. Use this call to
1000 * determine if the usb port has anything connected, is enabled,
1001 * or has some sort of error condition. The return value of this
1002 * call has "changed" bits to signal of the value of some fields
1003 * have changed between calls.
1004 *
1005 * @usb: USB device state populated by cvmx_usb_initialize().
1006 *
1007 * Returns: Port status information
1008 */
1009static struct cvmx_usb_port_status cvmx_usb_get_status(struct octeon_hcd *usb)
1010{
1011        union cvmx_usbcx_hprt usbc_hprt;
1012        struct cvmx_usb_port_status result;
1013
1014        memset(&result, 0, sizeof(result));
1015
1016        usbc_hprt.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
1017        result.port_enabled = usbc_hprt.s.prtena;
1018        result.port_over_current = usbc_hprt.s.prtovrcurract;
1019        result.port_powered = usbc_hprt.s.prtpwr;
1020        result.port_speed = usbc_hprt.s.prtspd;
1021        result.connected = usbc_hprt.s.prtconnsts;
1022        result.connect_change =
1023                result.connected != usb->port_status.connected;
1024
1025        return result;
1026}
1027
1028/**
1029 * Open a virtual pipe between the host and a USB device. A pipe
1030 * must be opened before data can be transferred between a device
1031 * and Octeon.
1032 *
1033 * @usb:             USB device state populated by cvmx_usb_initialize().
1034 * @device_addr:
1035 *                   USB device address to open the pipe to
1036 *                   (0-127).
1037 * @endpoint_num:
1038 *                   USB endpoint number to open the pipe to
1039 *                   (0-15).
1040 * @device_speed:
1041 *                   The speed of the device the pipe is going
1042 *                   to. This must match the device's speed,
1043 *                   which may be different than the port speed.
1044 * @max_packet:      The maximum packet length the device can
1045 *                   transmit/receive (low speed=0-8, full
1046 *                   speed=0-1023, high speed=0-1024). This value
1047 *                   comes from the standard endpoint descriptor
1048 *                   field wMaxPacketSize bits <10:0>.
1049 * @transfer_type:
1050 *                   The type of transfer this pipe is for.
1051 * @transfer_dir:
1052 *                   The direction the pipe is in. This is not
1053 *                   used for control pipes.
1054 * @interval:        For ISOCHRONOUS and INTERRUPT transfers,
1055 *                   this is how often the transfer is scheduled
1056 *                   for. All other transfers should specify
1057 *                   zero. The units are in frames (8000/sec at
1058 *                   high speed, 1000/sec for full speed).
1059 * @multi_count:
1060 *                   For high speed devices, this is the maximum
1061 *                   allowed number of packet per microframe.
1062 *                   Specify zero for non high speed devices. This
1063 *                   value comes from the standard endpoint descriptor
1064 *                   field wMaxPacketSize bits <12:11>.
1065 * @hub_device_addr:
1066 *                   Hub device address this device is connected
1067 *                   to. Devices connected directly to Octeon
1068 *                   use zero. This is only used when the device
1069 *                   is full/low speed behind a high speed hub.
1070 *                   The address will be of the high speed hub,
1071 *                   not and full speed hubs after it.
1072 * @hub_port:        Which port on the hub the device is
1073 *                   connected. Use zero for devices connected
1074 *                   directly to Octeon. Like hub_device_addr,
1075 *                   this is only used for full/low speed
1076 *                   devices behind a high speed hub.
1077 *
1078 * Returns: A non-NULL value is a pipe. NULL means an error.
1079 */
1080static struct cvmx_usb_pipe *cvmx_usb_open_pipe(struct octeon_hcd *usb,
1081                                                int device_addr,
1082                                                int endpoint_num,
1083                                                enum cvmx_usb_speed
1084                                                        device_speed,
1085                                                int max_packet,
1086                                                enum cvmx_usb_transfer
1087                                                        transfer_type,
1088                                                enum cvmx_usb_direction
1089                                                        transfer_dir,
1090                                                int interval, int multi_count,
1091                                                int hub_device_addr,
1092                                                int hub_port)
1093{
1094        struct cvmx_usb_pipe *pipe;
1095
1096        pipe = kzalloc(sizeof(*pipe), GFP_ATOMIC);
1097        if (!pipe)
1098                return NULL;
1099        if ((device_speed == CVMX_USB_SPEED_HIGH) &&
1100            (transfer_dir == CVMX_USB_DIRECTION_OUT) &&
1101            (transfer_type == CVMX_USB_TRANSFER_BULK))
1102                pipe->flags |= CVMX_USB_PIPE_FLAGS_NEED_PING;
1103        pipe->device_addr = device_addr;
1104        pipe->endpoint_num = endpoint_num;
1105        pipe->device_speed = device_speed;
1106        pipe->max_packet = max_packet;
1107        pipe->transfer_type = transfer_type;
1108        pipe->transfer_dir = transfer_dir;
1109        INIT_LIST_HEAD(&pipe->transactions);
1110
1111        /*
1112         * All pipes use interval to rate limit NAK processing. Force an
1113         * interval if one wasn't supplied
1114         */
1115        if (!interval)
1116                interval = 1;
1117        if (cvmx_usb_pipe_needs_split(usb, pipe)) {
1118                pipe->interval = interval * 8;
1119                /* Force start splits to be schedule on uFrame 0 */
1120                pipe->next_tx_frame = ((usb->frame_number + 7) & ~7) +
1121                                        pipe->interval;
1122        } else {
1123                pipe->interval = interval;
1124                pipe->next_tx_frame = usb->frame_number + pipe->interval;
1125        }
1126        pipe->multi_count = multi_count;
1127        pipe->hub_device_addr = hub_device_addr;
1128        pipe->hub_port = hub_port;
1129        pipe->pid_toggle = 0;
1130        pipe->split_sc_frame = -1;
1131        list_add_tail(&pipe->node, &usb->idle_pipes);
1132
1133        /*
1134         * We don't need to tell the hardware about this pipe yet since
1135         * it doesn't have any submitted requests
1136         */
1137
1138        return pipe;
1139}
1140
1141/**
1142 * Poll the RX FIFOs and remove data as needed. This function is only used
1143 * in non DMA mode. It is very important that this function be called quickly
1144 * enough to prevent FIFO overflow.
1145 *
1146 * @usb:        USB device state populated by cvmx_usb_initialize().
1147 */
1148static void cvmx_usb_poll_rx_fifo(struct octeon_hcd *usb)
1149{
1150        union cvmx_usbcx_grxstsph rx_status;
1151        int channel;
1152        int bytes;
1153        u64 address;
1154        u32 *ptr;
1155
1156        rx_status.u32 = cvmx_usb_read_csr32(usb,
1157                                            CVMX_USBCX_GRXSTSPH(usb->index));
1158        /* Only read data if IN data is there */
1159        if (rx_status.s.pktsts != 2)
1160                return;
1161        /* Check if no data is available */
1162        if (!rx_status.s.bcnt)
1163                return;
1164
1165        channel = rx_status.s.chnum;
1166        bytes = rx_status.s.bcnt;
1167        if (!bytes)
1168                return;
1169
1170        /* Get where the DMA engine would have written this data */
1171        address = cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index) +
1172                                     channel * 8);
1173
1174        ptr = cvmx_phys_to_ptr(address);
1175        cvmx_write64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel * 8,
1176                            address + bytes);
1177
1178        /* Loop writing the FIFO data for this packet into memory */
1179        while (bytes > 0) {
1180                *ptr++ = cvmx_usb_read_csr32(usb,
1181                                        USB_FIFO_ADDRESS(channel, usb->index));
1182                bytes -= 4;
1183        }
1184        CVMX_SYNCW;
1185}
1186
1187/**
1188 * Fill the TX hardware fifo with data out of the software
1189 * fifos
1190 *
1191 * @usb:            USB device state populated by cvmx_usb_initialize().
1192 * @fifo:           Software fifo to use
1193 * @available:      Amount of space in the hardware fifo
1194 *
1195 * Returns: Non zero if the hardware fifo was too small and needs
1196 *          to be serviced again.
1197 */
1198static int cvmx_usb_fill_tx_hw(struct octeon_hcd *usb,
1199                               struct cvmx_usb_tx_fifo *fifo, int available)
1200{
1201        /*
1202         * We're done either when there isn't anymore space or the software FIFO
1203         * is empty
1204         */
1205        while (available && (fifo->head != fifo->tail)) {
1206                int i = fifo->tail;
1207                const u32 *ptr = cvmx_phys_to_ptr(fifo->entry[i].address);
1208                u64 csr_address = USB_FIFO_ADDRESS(fifo->entry[i].channel,
1209                                                   usb->index) ^ 4;
1210                int words = available;
1211
1212                /* Limit the amount of data to what the SW fifo has */
1213                if (fifo->entry[i].size <= available) {
1214                        words = fifo->entry[i].size;
1215                        fifo->tail++;
1216                        if (fifo->tail > MAX_CHANNELS)
1217                                fifo->tail = 0;
1218                }
1219
1220                /* Update the next locations and counts */
1221                available -= words;
1222                fifo->entry[i].address += words * 4;
1223                fifo->entry[i].size -= words;
1224
1225                /*
1226                 * Write the HW fifo data. The read every three writes is due
1227                 * to an errata on CN3XXX chips
1228                 */
1229                while (words > 3) {
1230                        cvmx_write64_uint32(csr_address, *ptr++);
1231                        cvmx_write64_uint32(csr_address, *ptr++);
1232                        cvmx_write64_uint32(csr_address, *ptr++);
1233                        cvmx_read64_uint64(
1234                                        CVMX_USBNX_DMA0_INB_CHN0(usb->index));
1235                        words -= 3;
1236                }
1237                cvmx_write64_uint32(csr_address, *ptr++);
1238                if (--words) {
1239                        cvmx_write64_uint32(csr_address, *ptr++);
1240                        if (--words)
1241                                cvmx_write64_uint32(csr_address, *ptr++);
1242                }
1243                cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
1244        }
1245        return fifo->head != fifo->tail;
1246}
1247
1248/**
1249 * Check the hardware FIFOs and fill them as needed
1250 *
1251 * @usb:        USB device state populated by cvmx_usb_initialize().
1252 */
1253static void cvmx_usb_poll_tx_fifo(struct octeon_hcd *usb)
1254{
1255        if (usb->periodic.head != usb->periodic.tail) {
1256                union cvmx_usbcx_hptxsts tx_status;
1257
1258                tx_status.u32 = cvmx_usb_read_csr32(usb,
1259                                        CVMX_USBCX_HPTXSTS(usb->index));
1260                if (cvmx_usb_fill_tx_hw(usb, &usb->periodic,
1261                                        tx_status.s.ptxfspcavail))
1262                        USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
1263                                        cvmx_usbcx_gintmsk, ptxfempmsk, 1);
1264                else
1265                        USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
1266                                        cvmx_usbcx_gintmsk, ptxfempmsk, 0);
1267        }
1268
1269        if (usb->nonperiodic.head != usb->nonperiodic.tail) {
1270                union cvmx_usbcx_gnptxsts tx_status;
1271
1272                tx_status.u32 = cvmx_usb_read_csr32(usb,
1273                                        CVMX_USBCX_GNPTXSTS(usb->index));
1274                if (cvmx_usb_fill_tx_hw(usb, &usb->nonperiodic,
1275                                        tx_status.s.nptxfspcavail))
1276                        USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
1277                                        cvmx_usbcx_gintmsk, nptxfempmsk, 1);
1278                else
1279                        USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
1280                                        cvmx_usbcx_gintmsk, nptxfempmsk, 0);
1281        }
1282}
1283
1284/**
1285 * Fill the TX FIFO with an outgoing packet
1286 *
1287 * @usb:          USB device state populated by cvmx_usb_initialize().
1288 * @channel:      Channel number to get packet from
1289 */
1290static void cvmx_usb_fill_tx_fifo(struct octeon_hcd *usb, int channel)
1291{
1292        union cvmx_usbcx_hccharx hcchar;
1293        union cvmx_usbcx_hcspltx usbc_hcsplt;
1294        union cvmx_usbcx_hctsizx usbc_hctsiz;
1295        struct cvmx_usb_tx_fifo *fifo;
1296
1297        /* We only need to fill data on outbound channels */
1298        hcchar.u32 = cvmx_usb_read_csr32(usb,
1299                        CVMX_USBCX_HCCHARX(channel, usb->index));
1300        if (hcchar.s.epdir != CVMX_USB_DIRECTION_OUT)
1301                return;
1302
1303        /* OUT Splits only have data on the start and not the complete */
1304        usbc_hcsplt.u32 = cvmx_usb_read_csr32(usb,
1305                                CVMX_USBCX_HCSPLTX(channel, usb->index));
1306        if (usbc_hcsplt.s.spltena && usbc_hcsplt.s.compsplt)
1307                return;
1308
1309        /*
1310         * Find out how many bytes we need to fill and convert it into 32bit
1311         * words.
1312         */
1313        usbc_hctsiz.u32 = cvmx_usb_read_csr32(usb,
1314                                CVMX_USBCX_HCTSIZX(channel, usb->index));
1315        if (!usbc_hctsiz.s.xfersize)
1316                return;
1317
1318        if ((hcchar.s.eptype == CVMX_USB_TRANSFER_INTERRUPT) ||
1319            (hcchar.s.eptype == CVMX_USB_TRANSFER_ISOCHRONOUS))
1320                fifo = &usb->periodic;
1321        else
1322                fifo = &usb->nonperiodic;
1323
1324        fifo->entry[fifo->head].channel = channel;
1325        fifo->entry[fifo->head].address =
1326                cvmx_read64_uint64(CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) +
1327                                   channel * 8);
1328        fifo->entry[fifo->head].size = (usbc_hctsiz.s.xfersize + 3) >> 2;
1329        fifo->head++;
1330        if (fifo->head > MAX_CHANNELS)
1331                fifo->head = 0;
1332
1333        cvmx_usb_poll_tx_fifo(usb);
1334}
1335
1336/**
1337 * Perform channel specific setup for Control transactions. All
1338 * the generic stuff will already have been done in cvmx_usb_start_channel().
1339 *
1340 * @usb:          USB device state populated by cvmx_usb_initialize().
1341 * @channel:      Channel to setup
1342 * @pipe:         Pipe for control transaction
1343 */
1344static void cvmx_usb_start_channel_control(struct octeon_hcd *usb,
1345                                           int channel,
1346                                           struct cvmx_usb_pipe *pipe)
1347{
1348        struct usb_hcd *hcd = octeon_to_hcd(usb);
1349        struct device *dev = hcd->self.controller;
1350        struct cvmx_usb_transaction *transaction =
1351                list_first_entry(&pipe->transactions, typeof(*transaction),
1352                                 node);
1353        struct usb_ctrlrequest *header =
1354                cvmx_phys_to_ptr(transaction->control_header);
1355        int bytes_to_transfer = transaction->buffer_length -
1356                transaction->actual_bytes;
1357        int packets_to_transfer;
1358        union cvmx_usbcx_hctsizx usbc_hctsiz;
1359
1360        usbc_hctsiz.u32 = cvmx_usb_read_csr32(usb,
1361                                CVMX_USBCX_HCTSIZX(channel, usb->index));
1362
1363        switch (transaction->stage) {
1364        case CVMX_USB_STAGE_NON_CONTROL:
1365        case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE:
1366                dev_err(dev, "%s: ERROR - Non control stage\n", __func__);
1367                break;
1368        case CVMX_USB_STAGE_SETUP:
1369                usbc_hctsiz.s.pid = 3; /* Setup */
1370                bytes_to_transfer = sizeof(*header);
1371                /* All Control operations start with a setup going OUT */
1372                USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1373                                cvmx_usbcx_hccharx, epdir,
1374                                CVMX_USB_DIRECTION_OUT);
1375                /*
1376                 * Setup send the control header instead of the buffer data. The
1377                 * buffer data will be used in the next stage
1378                 */
1379                cvmx_write64_uint64(CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) +
1380                                        channel * 8,
1381                                    transaction->control_header);
1382                break;
1383        case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE:
1384                usbc_hctsiz.s.pid = 3; /* Setup */
1385                bytes_to_transfer = 0;
1386                /* All Control operations start with a setup going OUT */
1387                USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1388                                cvmx_usbcx_hccharx, epdir,
1389                                CVMX_USB_DIRECTION_OUT);
1390
1391                USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index),
1392                                cvmx_usbcx_hcspltx, compsplt, 1);
1393                break;
1394        case CVMX_USB_STAGE_DATA:
1395                usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);
1396                if (cvmx_usb_pipe_needs_split(usb, pipe)) {
1397                        if (header->bRequestType & USB_DIR_IN)
1398                                bytes_to_transfer = 0;
1399                        else if (bytes_to_transfer > pipe->max_packet)
1400                                bytes_to_transfer = pipe->max_packet;
1401                }
1402                USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1403                                cvmx_usbcx_hccharx, epdir,
1404                                ((header->bRequestType & USB_DIR_IN) ?
1405                                        CVMX_USB_DIRECTION_IN :
1406                                        CVMX_USB_DIRECTION_OUT));
1407                break;
1408        case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE:
1409                usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);
1410                if (!(header->bRequestType & USB_DIR_IN))
1411                        bytes_to_transfer = 0;
1412                USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1413                                cvmx_usbcx_hccharx, epdir,
1414                                ((header->bRequestType & USB_DIR_IN) ?
1415                                        CVMX_USB_DIRECTION_IN :
1416                                        CVMX_USB_DIRECTION_OUT));
1417                USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index),
1418                                cvmx_usbcx_hcspltx, compsplt, 1);
1419                break;
1420        case CVMX_USB_STAGE_STATUS:
1421                usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);
1422                bytes_to_transfer = 0;
1423                USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1424                                cvmx_usbcx_hccharx, epdir,
1425                                ((header->bRequestType & USB_DIR_IN) ?
1426                                        CVMX_USB_DIRECTION_OUT :
1427                                        CVMX_USB_DIRECTION_IN));
1428                break;
1429        case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE:
1430                usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);
1431                bytes_to_transfer = 0;
1432                USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1433                                cvmx_usbcx_hccharx, epdir,
1434                                ((header->bRequestType & USB_DIR_IN) ?
1435                                        CVMX_USB_DIRECTION_OUT :
1436                                        CVMX_USB_DIRECTION_IN));
1437                USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index),
1438                                cvmx_usbcx_hcspltx, compsplt, 1);
1439                break;
1440        }
1441
1442        /*
1443         * Make sure the transfer never exceeds the byte limit of the hardware.
1444         * Further bytes will be sent as continued transactions
1445         */
1446        if (bytes_to_transfer > MAX_TRANSFER_BYTES) {
1447                /* Round MAX_TRANSFER_BYTES to a multiple of out packet size */
1448                bytes_to_transfer = MAX_TRANSFER_BYTES / pipe->max_packet;
1449                bytes_to_transfer *= pipe->max_packet;
1450        }
1451
1452        /*
1453         * Calculate the number of packets to transfer. If the length is zero
1454         * we still need to transfer one packet
1455         */
1456        packets_to_transfer = DIV_ROUND_UP(bytes_to_transfer,
1457                                           pipe->max_packet);
1458        if (packets_to_transfer == 0) {
1459                packets_to_transfer = 1;
1460        } else if ((packets_to_transfer > 1) &&
1461                        (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)) {
1462                /*
1463                 * Limit to one packet when not using DMA. Channels must be
1464                 * restarted between every packet for IN transactions, so there
1465                 * is no reason to do multiple packets in a row
1466                 */
1467                packets_to_transfer = 1;
1468                bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1469        } else if (packets_to_transfer > MAX_TRANSFER_PACKETS) {
1470                /*
1471                 * Limit the number of packet and data transferred to what the
1472                 * hardware can handle
1473                 */
1474                packets_to_transfer = MAX_TRANSFER_PACKETS;
1475                bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1476        }
1477
1478        usbc_hctsiz.s.xfersize = bytes_to_transfer;
1479        usbc_hctsiz.s.pktcnt = packets_to_transfer;
1480
1481        cvmx_usb_write_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index),
1482                             usbc_hctsiz.u32);
1483}
1484
1485/**
1486 * Start a channel to perform the pipe's head transaction
1487 *
1488 * @usb:          USB device state populated by cvmx_usb_initialize().
1489 * @channel:      Channel to setup
1490 * @pipe:         Pipe to start
1491 */
1492static void cvmx_usb_start_channel(struct octeon_hcd *usb, int channel,
1493                                   struct cvmx_usb_pipe *pipe)
1494{
1495        struct cvmx_usb_transaction *transaction =
1496                list_first_entry(&pipe->transactions, typeof(*transaction),
1497                                 node);
1498
1499        /* Make sure all writes to the DMA region get flushed */
1500        CVMX_SYNCW;
1501
1502        /* Attach the channel to the pipe */
1503        usb->pipe_for_channel[channel] = pipe;
1504        pipe->channel = channel;
1505        pipe->flags |= CVMX_USB_PIPE_FLAGS_SCHEDULED;
1506
1507        /* Mark this channel as in use */
1508        usb->idle_hardware_channels &= ~(1 << channel);
1509
1510        /* Enable the channel interrupt bits */
1511        {
1512                union cvmx_usbcx_hcintx usbc_hcint;
1513                union cvmx_usbcx_hcintmskx usbc_hcintmsk;
1514                union cvmx_usbcx_haintmsk usbc_haintmsk;
1515
1516                /* Clear all channel status bits */
1517                usbc_hcint.u32 = cvmx_usb_read_csr32(usb,
1518                                        CVMX_USBCX_HCINTX(channel, usb->index));
1519
1520                cvmx_usb_write_csr32(usb,
1521                                     CVMX_USBCX_HCINTX(channel, usb->index),
1522                                     usbc_hcint.u32);
1523
1524                usbc_hcintmsk.u32 = 0;
1525                usbc_hcintmsk.s.chhltdmsk = 1;
1526                if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
1527                        /*
1528                         * Channels need these extra interrupts when we aren't
1529                         * in DMA mode.
1530                         */
1531                        usbc_hcintmsk.s.datatglerrmsk = 1;
1532                        usbc_hcintmsk.s.frmovrunmsk = 1;
1533                        usbc_hcintmsk.s.bblerrmsk = 1;
1534                        usbc_hcintmsk.s.xacterrmsk = 1;
1535                        if (cvmx_usb_pipe_needs_split(usb, pipe)) {
1536                                /*
1537                                 * Splits don't generate xfercompl, so we need
1538                                 * ACK and NYET.
1539                                 */
1540                                usbc_hcintmsk.s.nyetmsk = 1;
1541                                usbc_hcintmsk.s.ackmsk = 1;
1542                        }
1543                        usbc_hcintmsk.s.nakmsk = 1;
1544                        usbc_hcintmsk.s.stallmsk = 1;
1545                        usbc_hcintmsk.s.xfercomplmsk = 1;
1546                }
1547                cvmx_usb_write_csr32(usb,
1548                                     CVMX_USBCX_HCINTMSKX(channel, usb->index),
1549                                     usbc_hcintmsk.u32);
1550
1551                /* Enable the channel interrupt to propagate */
1552                usbc_haintmsk.u32 = cvmx_usb_read_csr32(usb,
1553                                        CVMX_USBCX_HAINTMSK(usb->index));
1554                usbc_haintmsk.s.haintmsk |= 1 << channel;
1555                cvmx_usb_write_csr32(usb, CVMX_USBCX_HAINTMSK(usb->index),
1556                                     usbc_haintmsk.u32);
1557        }
1558
1559        /* Setup the location the DMA engine uses. */
1560        {
1561                u64 reg;
1562                u64 dma_address = transaction->buffer +
1563                                  transaction->actual_bytes;
1564
1565                if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
1566                        dma_address = transaction->buffer +
1567                                        transaction->iso_packets[0].offset +
1568                                        transaction->actual_bytes;
1569
1570                if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT)
1571                        reg = CVMX_USBNX_DMA0_OUTB_CHN0(usb->index);
1572                else
1573                        reg = CVMX_USBNX_DMA0_INB_CHN0(usb->index);
1574                cvmx_write64_uint64(reg + channel * 8, dma_address);
1575        }
1576
1577        /* Setup both the size of the transfer and the SPLIT characteristics */
1578        {
1579                union cvmx_usbcx_hcspltx usbc_hcsplt = {.u32 = 0};
1580                union cvmx_usbcx_hctsizx usbc_hctsiz = {.u32 = 0};
1581                int packets_to_transfer;
1582                int bytes_to_transfer = transaction->buffer_length -
1583                        transaction->actual_bytes;
1584
1585                /*
1586                 * ISOCHRONOUS transactions store each individual transfer size
1587                 * in the packet structure, not the global buffer_length
1588                 */
1589                if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
1590                        bytes_to_transfer =
1591                                transaction->iso_packets[0].length -
1592                                transaction->actual_bytes;
1593
1594                /*
1595                 * We need to do split transactions when we are talking to non
1596                 * high speed devices that are behind a high speed hub
1597                 */
1598                if (cvmx_usb_pipe_needs_split(usb, pipe)) {
1599                        /*
1600                         * On the start split phase (stage is even) record the
1601                         * frame number we will need to send the split complete.
1602                         * We only store the lower two bits since the time ahead
1603                         * can only be two frames
1604                         */
1605                        if ((transaction->stage & 1) == 0) {
1606                                if (transaction->type == CVMX_USB_TRANSFER_BULK)
1607                                        pipe->split_sc_frame =
1608                                                (usb->frame_number + 1) & 0x7f;
1609                                else
1610                                        pipe->split_sc_frame =
1611                                                (usb->frame_number + 2) & 0x7f;
1612                        } else {
1613                                pipe->split_sc_frame = -1;
1614                        }
1615
1616                        usbc_hcsplt.s.spltena = 1;
1617                        usbc_hcsplt.s.hubaddr = pipe->hub_device_addr;
1618                        usbc_hcsplt.s.prtaddr = pipe->hub_port;
1619                        usbc_hcsplt.s.compsplt = (transaction->stage ==
1620                                CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE);
1621
1622                        /*
1623                         * SPLIT transactions can only ever transmit one data
1624                         * packet so limit the transfer size to the max packet
1625                         * size
1626                         */
1627                        if (bytes_to_transfer > pipe->max_packet)
1628                                bytes_to_transfer = pipe->max_packet;
1629
1630                        /*
1631                         * ISOCHRONOUS OUT splits are unique in that they limit
1632                         * data transfers to 188 byte chunks representing the
1633                         * begin/middle/end of the data or all
1634                         */
1635                        if (!usbc_hcsplt.s.compsplt &&
1636                            (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) &&
1637                            (pipe->transfer_type ==
1638                             CVMX_USB_TRANSFER_ISOCHRONOUS)) {
1639                                /*
1640                                 * Clear the split complete frame number as
1641                                 * there isn't going to be a split complete
1642                                 */
1643                                pipe->split_sc_frame = -1;
1644                                /*
1645                                 * See if we've started this transfer and sent
1646                                 * data
1647                                 */
1648                                if (transaction->actual_bytes == 0) {
1649                                        /*
1650                                         * Nothing sent yet, this is either a
1651                                         * begin or the entire payload
1652                                         */
1653                                        if (bytes_to_transfer <= 188)
1654                                                /* Entire payload in one go */
1655                                                usbc_hcsplt.s.xactpos = 3;
1656                                        else
1657                                                /* First part of payload */
1658                                                usbc_hcsplt.s.xactpos = 2;
1659                                } else {
1660                                        /*
1661                                         * Continuing the previous data, we must
1662                                         * either be in the middle or at the end
1663                                         */
1664                                        if (bytes_to_transfer <= 188)
1665                                                /* End of payload */
1666                                                usbc_hcsplt.s.xactpos = 1;
1667                                        else
1668                                                /* Middle of payload */
1669                                                usbc_hcsplt.s.xactpos = 0;
1670                                }
1671                                /*
1672                                 * Again, the transfer size is limited to 188
1673                                 * bytes
1674                                 */
1675                                if (bytes_to_transfer > 188)
1676                                        bytes_to_transfer = 188;
1677                        }
1678                }
1679
1680                /*
1681                 * Make sure the transfer never exceeds the byte limit of the
1682                 * hardware. Further bytes will be sent as continued
1683                 * transactions
1684                 */
1685                if (bytes_to_transfer > MAX_TRANSFER_BYTES) {
1686                        /*
1687                         * Round MAX_TRANSFER_BYTES to a multiple of out packet
1688                         * size
1689                         */
1690                        bytes_to_transfer = MAX_TRANSFER_BYTES /
1691                                pipe->max_packet;
1692                        bytes_to_transfer *= pipe->max_packet;
1693                }
1694
1695                /*
1696                 * Calculate the number of packets to transfer. If the length is
1697                 * zero we still need to transfer one packet
1698                 */
1699                packets_to_transfer =
1700                        DIV_ROUND_UP(bytes_to_transfer, pipe->max_packet);
1701                if (packets_to_transfer == 0) {
1702                        packets_to_transfer = 1;
1703                } else if ((packets_to_transfer > 1) &&
1704                           (usb->init_flags &
1705                            CVMX_USB_INITIALIZE_FLAGS_NO_DMA)) {
1706                        /*
1707                         * Limit to one packet when not using DMA. Channels must
1708                         * be restarted between every packet for IN
1709                         * transactions, so there is no reason to do multiple
1710                         * packets in a row
1711                         */
1712                        packets_to_transfer = 1;
1713                        bytes_to_transfer = packets_to_transfer *
1714                                pipe->max_packet;
1715                } else if (packets_to_transfer > MAX_TRANSFER_PACKETS) {
1716                        /*
1717                         * Limit the number of packet and data transferred to
1718                         * what the hardware can handle
1719                         */
1720                        packets_to_transfer = MAX_TRANSFER_PACKETS;
1721                        bytes_to_transfer = packets_to_transfer *
1722                                pipe->max_packet;
1723                }
1724
1725                usbc_hctsiz.s.xfersize = bytes_to_transfer;
1726                usbc_hctsiz.s.pktcnt = packets_to_transfer;
1727
1728                /* Update the DATA0/DATA1 toggle */
1729                usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);
1730                /*
1731                 * High speed pipes may need a hardware ping before they start
1732                 */
1733                if (pipe->flags & CVMX_USB_PIPE_FLAGS_NEED_PING)
1734                        usbc_hctsiz.s.dopng = 1;
1735
1736                cvmx_usb_write_csr32(usb,
1737                                     CVMX_USBCX_HCSPLTX(channel, usb->index),
1738                                     usbc_hcsplt.u32);
1739                cvmx_usb_write_csr32(usb,
1740                                     CVMX_USBCX_HCTSIZX(channel, usb->index),
1741                                     usbc_hctsiz.u32);
1742        }
1743
1744        /* Setup the Host Channel Characteristics Register */
1745        {
1746                union cvmx_usbcx_hccharx usbc_hcchar = {.u32 = 0};
1747
1748                /*
1749                 * Set the startframe odd/even properly. This is only used for
1750                 * periodic
1751                 */
1752                usbc_hcchar.s.oddfrm = usb->frame_number & 1;
1753
1754                /*
1755                 * Set the number of back to back packets allowed by this
1756                 * endpoint. Split transactions interpret "ec" as the number of
1757                 * immediate retries of failure. These retries happen too
1758                 * quickly, so we disable these entirely for splits
1759                 */
1760                if (cvmx_usb_pipe_needs_split(usb, pipe))
1761                        usbc_hcchar.s.ec = 1;
1762                else if (pipe->multi_count < 1)
1763                        usbc_hcchar.s.ec = 1;
1764                else if (pipe->multi_count > 3)
1765                        usbc_hcchar.s.ec = 3;
1766                else
1767                        usbc_hcchar.s.ec = pipe->multi_count;
1768
1769                /* Set the rest of the endpoint specific settings */
1770                usbc_hcchar.s.devaddr = pipe->device_addr;
1771                usbc_hcchar.s.eptype = transaction->type;
1772                usbc_hcchar.s.lspddev =
1773                        (pipe->device_speed == CVMX_USB_SPEED_LOW);
1774                usbc_hcchar.s.epdir = pipe->transfer_dir;
1775                usbc_hcchar.s.epnum = pipe->endpoint_num;
1776                usbc_hcchar.s.mps = pipe->max_packet;
1777                cvmx_usb_write_csr32(usb,
1778                                     CVMX_USBCX_HCCHARX(channel, usb->index),
1779                                     usbc_hcchar.u32);
1780        }
1781
1782        /* Do transaction type specific fixups as needed */
1783        switch (transaction->type) {
1784        case CVMX_USB_TRANSFER_CONTROL:
1785                cvmx_usb_start_channel_control(usb, channel, pipe);
1786                break;
1787        case CVMX_USB_TRANSFER_BULK:
1788        case CVMX_USB_TRANSFER_INTERRUPT:
1789                break;
1790        case CVMX_USB_TRANSFER_ISOCHRONOUS:
1791                if (!cvmx_usb_pipe_needs_split(usb, pipe)) {
1792                        /*
1793                         * ISO transactions require different PIDs depending on
1794                         * direction and how many packets are needed
1795                         */
1796                        if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) {
1797                                if (pipe->multi_count < 2) /* Need DATA0 */
1798                                        USB_SET_FIELD32(
1799                                                CVMX_USBCX_HCTSIZX(channel,
1800                                                                   usb->index),
1801                                                cvmx_usbcx_hctsizx, pid, 0);
1802                                else /* Need MDATA */
1803                                        USB_SET_FIELD32(
1804                                                CVMX_USBCX_HCTSIZX(channel,
1805                                                                   usb->index),
1806                                                cvmx_usbcx_hctsizx, pid, 3);
1807                        }
1808                }
1809                break;
1810        }
1811        {
1812                union cvmx_usbcx_hctsizx usbc_hctsiz = { .u32 =
1813                        cvmx_usb_read_csr32(usb,
1814                                            CVMX_USBCX_HCTSIZX(channel,
1815                                                               usb->index))
1816                };
1817                transaction->xfersize = usbc_hctsiz.s.xfersize;
1818                transaction->pktcnt = usbc_hctsiz.s.pktcnt;
1819        }
1820        /* Remember when we start a split transaction */
1821        if (cvmx_usb_pipe_needs_split(usb, pipe))
1822                usb->active_split = transaction;
1823        USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1824                        cvmx_usbcx_hccharx, chena, 1);
1825        if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
1826                cvmx_usb_fill_tx_fifo(usb, channel);
1827}
1828
1829/**
1830 * Find a pipe that is ready to be scheduled to hardware.
1831 * @usb:         USB device state populated by cvmx_usb_initialize().
1832 * @xfer_type:   Transfer type
1833 *
1834 * Returns: Pipe or NULL if none are ready
1835 */
1836static struct cvmx_usb_pipe *cvmx_usb_find_ready_pipe(
1837                struct octeon_hcd *usb,
1838                enum cvmx_usb_transfer xfer_type)
1839{
1840        struct list_head *list = usb->active_pipes + xfer_type;
1841        u64 current_frame = usb->frame_number;
1842        struct cvmx_usb_pipe *pipe;
1843
1844        list_for_each_entry(pipe, list, node) {
1845                struct cvmx_usb_transaction *t =
1846                        list_first_entry(&pipe->transactions, typeof(*t),
1847                                         node);
1848                if (!(pipe->flags & CVMX_USB_PIPE_FLAGS_SCHEDULED) && t &&
1849                    (pipe->next_tx_frame <= current_frame) &&
1850                    ((pipe->split_sc_frame == -1) ||
1851                     ((((int)current_frame - pipe->split_sc_frame) & 0x7f) <
1852                      0x40)) &&
1853                    (!usb->active_split || (usb->active_split == t))) {
1854                        prefetch(t);
1855                        return pipe;
1856                }
1857        }
1858        return NULL;
1859}
1860
1861static struct cvmx_usb_pipe *cvmx_usb_next_pipe(struct octeon_hcd *usb,
1862                                                int is_sof)
1863{
1864        struct cvmx_usb_pipe *pipe;
1865
1866        /* Find a pipe needing service. */
1867        if (is_sof) {
1868                /*
1869                 * Only process periodic pipes on SOF interrupts. This way we
1870                 * are sure that the periodic data is sent in the beginning of
1871                 * the frame.
1872                 */
1873                pipe = cvmx_usb_find_ready_pipe(usb,
1874                                                CVMX_USB_TRANSFER_ISOCHRONOUS);
1875                if (pipe)
1876                        return pipe;
1877                pipe = cvmx_usb_find_ready_pipe(usb,
1878                                                CVMX_USB_TRANSFER_INTERRUPT);
1879                if (pipe)
1880                        return pipe;
1881        }
1882        pipe = cvmx_usb_find_ready_pipe(usb, CVMX_USB_TRANSFER_CONTROL);
1883        if (pipe)
1884                return pipe;
1885        return cvmx_usb_find_ready_pipe(usb, CVMX_USB_TRANSFER_BULK);
1886}
1887
1888/**
1889 * Called whenever a pipe might need to be scheduled to the
1890 * hardware.
1891 *
1892 * @usb:         USB device state populated by cvmx_usb_initialize().
1893 * @is_sof:      True if this schedule was called on a SOF interrupt.
1894 */
1895static void cvmx_usb_schedule(struct octeon_hcd *usb, int is_sof)
1896{
1897        int channel;
1898        struct cvmx_usb_pipe *pipe;
1899        int need_sof;
1900        enum cvmx_usb_transfer ttype;
1901
1902        if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
1903                /*
1904                 * Without DMA we need to be careful to not schedule something
1905                 * at the end of a frame and cause an overrun.
1906                 */
1907                union cvmx_usbcx_hfnum hfnum = {
1908                        .u32 = cvmx_usb_read_csr32(usb,
1909                                                CVMX_USBCX_HFNUM(usb->index))
1910                };
1911
1912                union cvmx_usbcx_hfir hfir = {
1913                        .u32 = cvmx_usb_read_csr32(usb,
1914                                                CVMX_USBCX_HFIR(usb->index))
1915                };
1916
1917                if (hfnum.s.frrem < hfir.s.frint / 4)
1918                        goto done;
1919        }
1920
1921        while (usb->idle_hardware_channels) {
1922                /* Find an idle channel */
1923                channel = __fls(usb->idle_hardware_channels);
1924                if (unlikely(channel > 7))
1925                        break;
1926
1927                pipe = cvmx_usb_next_pipe(usb, is_sof);
1928                if (!pipe)
1929                        break;
1930
1931                cvmx_usb_start_channel(usb, channel, pipe);
1932        }
1933
1934done:
1935        /*
1936         * Only enable SOF interrupts when we have transactions pending in the
1937         * future that might need to be scheduled
1938         */
1939        need_sof = 0;
1940        for (ttype = CVMX_USB_TRANSFER_CONTROL;
1941             ttype <= CVMX_USB_TRANSFER_INTERRUPT; ttype++) {
1942                list_for_each_entry(pipe, &usb->active_pipes[ttype], node) {
1943                        if (pipe->next_tx_frame > usb->frame_number) {
1944                                need_sof = 1;
1945                                break;
1946                        }
1947                }
1948        }
1949        USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
1950                        cvmx_usbcx_gintmsk, sofmsk, need_sof);
1951}
1952
1953static void octeon_usb_urb_complete_callback(struct octeon_hcd *usb,
1954                                             enum cvmx_usb_status status,
1955                                             struct cvmx_usb_pipe *pipe,
1956                                             struct cvmx_usb_transaction
1957                                                *transaction,
1958                                             int bytes_transferred,
1959                                             struct urb *urb)
1960{
1961        struct usb_hcd *hcd = octeon_to_hcd(usb);
1962        struct device *dev = hcd->self.controller;
1963
1964        if (likely(status == CVMX_USB_STATUS_OK))
1965                urb->actual_length = bytes_transferred;
1966        else
1967                urb->actual_length = 0;
1968
1969        urb->hcpriv = NULL;
1970
1971        /* For Isochronous transactions we need to update the URB packet status
1972         * list from data in our private copy
1973         */
1974        if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
1975                int i;
1976                /*
1977                 * The pointer to the private list is stored in the setup_packet
1978                 * field.
1979                 */
1980                struct cvmx_usb_iso_packet *iso_packet =
1981                        (struct cvmx_usb_iso_packet *)urb->setup_packet;
1982                /* Recalculate the transfer size by adding up each packet */
1983                urb->actual_length = 0;
1984                for (i = 0; i < urb->number_of_packets; i++) {
1985                        if (iso_packet[i].status == CVMX_USB_STATUS_OK) {
1986                                urb->iso_frame_desc[i].status = 0;
1987                                urb->iso_frame_desc[i].actual_length =
1988                                        iso_packet[i].length;
1989                                urb->actual_length +=
1990                                        urb->iso_frame_desc[i].actual_length;
1991                        } else {
1992                                dev_dbg(dev, "ISOCHRONOUS packet=%d of %d status=%d pipe=%p transaction=%p size=%d\n",
1993                                        i, urb->number_of_packets,
1994                                        iso_packet[i].status, pipe,
1995                                        transaction, iso_packet[i].length);
1996                                urb->iso_frame_desc[i].status = -EREMOTEIO;
1997                        }
1998                }
1999                /* Free the private list now that we don't need it anymore */
2000                kfree(iso_packet);
2001                urb->setup_packet = NULL;
2002        }
2003
2004        switch (status) {
2005        case CVMX_USB_STATUS_OK:
2006                urb->status = 0;
2007                break;
2008        case CVMX_USB_STATUS_CANCEL:
2009                if (urb->status == 0)
2010                        urb->status = -ENOENT;
2011                break;
2012        case CVMX_USB_STATUS_STALL:
2013                dev_dbg(dev, "status=stall pipe=%p transaction=%p size=%d\n",
2014                        pipe, transaction, bytes_transferred);
2015                urb->status = -EPIPE;
2016                break;
2017        case CVMX_USB_STATUS_BABBLEERR:
2018                dev_dbg(dev, "status=babble pipe=%p transaction=%p size=%d\n",
2019                        pipe, transaction, bytes_transferred);
2020                urb->status = -EPIPE;
2021                break;
2022        case CVMX_USB_STATUS_SHORT:
2023                dev_dbg(dev, "status=short pipe=%p transaction=%p size=%d\n",
2024                        pipe, transaction, bytes_transferred);
2025                urb->status = -EREMOTEIO;
2026                break;
2027        case CVMX_USB_STATUS_ERROR:
2028        case CVMX_USB_STATUS_XACTERR:
2029        case CVMX_USB_STATUS_DATATGLERR:
2030        case CVMX_USB_STATUS_FRAMEERR:
2031                dev_dbg(dev, "status=%d pipe=%p transaction=%p size=%d\n",
2032                        status, pipe, transaction, bytes_transferred);
2033                urb->status = -EPROTO;
2034                break;
2035        }
2036        usb_hcd_unlink_urb_from_ep(octeon_to_hcd(usb), urb);
2037        spin_unlock(&usb->lock);
2038        usb_hcd_giveback_urb(octeon_to_hcd(usb), urb, urb->status);
2039        spin_lock(&usb->lock);
2040}
2041
2042/**
2043 * Signal the completion of a transaction and free it. The
2044 * transaction will be removed from the pipe transaction list.
2045 *
2046 * @usb:         USB device state populated by cvmx_usb_initialize().
2047 * @pipe:        Pipe the transaction is on
2048 * @transaction:
2049 *               Transaction that completed
2050 * @complete_code:
2051 *               Completion code
2052 */
2053static void cvmx_usb_complete(struct octeon_hcd *usb,
2054                              struct cvmx_usb_pipe *pipe,
2055                              struct cvmx_usb_transaction *transaction,
2056                              enum cvmx_usb_status complete_code)
2057{
2058        /* If this was a split then clear our split in progress marker */
2059        if (usb->active_split == transaction)
2060                usb->active_split = NULL;
2061
2062        /*
2063         * Isochronous transactions need extra processing as they might not be
2064         * done after a single data transfer
2065         */
2066        if (unlikely(transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)) {
2067                /* Update the number of bytes transferred in this ISO packet */
2068                transaction->iso_packets[0].length = transaction->actual_bytes;
2069                transaction->iso_packets[0].status = complete_code;
2070
2071                /*
2072                 * If there are more ISOs pending and we succeeded, schedule the
2073                 * next one
2074                 */
2075                if ((transaction->iso_number_packets > 1) &&
2076                    (complete_code == CVMX_USB_STATUS_OK)) {
2077                        /* No bytes transferred for this packet as of yet */
2078                        transaction->actual_bytes = 0;
2079                        /* One less ISO waiting to transfer */
2080                        transaction->iso_number_packets--;
2081                        /* Increment to the next location in our packet array */
2082                        transaction->iso_packets++;
2083                        transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
2084                        return;
2085                }
2086        }
2087
2088        /* Remove the transaction from the pipe list */
2089        list_del(&transaction->node);
2090        if (list_empty(&pipe->transactions))
2091                list_move_tail(&pipe->node, &usb->idle_pipes);
2092        octeon_usb_urb_complete_callback(usb, complete_code, pipe,
2093                                         transaction,
2094                                         transaction->actual_bytes,
2095                                         transaction->urb);
2096        kfree(transaction);
2097}
2098
2099/**
2100 * Submit a usb transaction to a pipe. Called for all types
2101 * of transactions.
2102 *
2103 * @usb:
2104 * @pipe:           Which pipe to submit to.
2105 * @type:           Transaction type
2106 * @buffer:         User buffer for the transaction
2107 * @buffer_length:
2108 *                  User buffer's length in bytes
2109 * @control_header:
2110 *                  For control transactions, the 8 byte standard header
2111 * @iso_start_frame:
2112 *                  For ISO transactions, the start frame
2113 * @iso_number_packets:
2114 *                  For ISO, the number of packet in the transaction.
2115 * @iso_packets:
2116 *                  A description of each ISO packet
2117 * @urb:            URB for the callback
2118 *
2119 * Returns: Transaction or NULL on failure.
2120 */
2121static struct cvmx_usb_transaction *cvmx_usb_submit_transaction(
2122                                struct octeon_hcd *usb,
2123                                struct cvmx_usb_pipe *pipe,
2124                                enum cvmx_usb_transfer type,
2125                                u64 buffer,
2126                                int buffer_length,
2127                                u64 control_header,
2128                                int iso_start_frame,
2129                                int iso_number_packets,
2130                                struct cvmx_usb_iso_packet *iso_packets,
2131                                struct urb *urb)
2132{
2133        struct cvmx_usb_transaction *transaction;
2134
2135        if (unlikely(pipe->transfer_type != type))
2136                return NULL;
2137
2138        transaction = kzalloc(sizeof(*transaction), GFP_ATOMIC);
2139        if (unlikely(!transaction))
2140                return NULL;
2141
2142        transaction->type = type;
2143        transaction->buffer = buffer;
2144        transaction->buffer_length = buffer_length;
2145        transaction->control_header = control_header;
2146        /* FIXME: This is not used, implement it. */
2147        transaction->iso_start_frame = iso_start_frame;
2148        transaction->iso_number_packets = iso_number_packets;
2149        transaction->iso_packets = iso_packets;
2150        transaction->urb = urb;
2151        if (transaction->type == CVMX_USB_TRANSFER_CONTROL)
2152                transaction->stage = CVMX_USB_STAGE_SETUP;
2153        else
2154                transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
2155
2156        if (!list_empty(&pipe->transactions)) {
2157                list_add_tail(&transaction->node, &pipe->transactions);
2158        } else {
2159                list_add_tail(&transaction->node, &pipe->transactions);
2160                list_move_tail(&pipe->node,
2161                               &usb->active_pipes[pipe->transfer_type]);
2162
2163                /*
2164                 * We may need to schedule the pipe if this was the head of the
2165                 * pipe.
2166                 */
2167                cvmx_usb_schedule(usb, 0);
2168        }
2169
2170        return transaction;
2171}
2172
2173/**
2174 * Call to submit a USB Bulk transfer to a pipe.
2175 *
2176 * @usb:            USB device state populated by cvmx_usb_initialize().
2177 * @pipe:           Handle to the pipe for the transfer.
2178 * @urb:            URB.
2179 *
2180 * Returns: A submitted transaction or NULL on failure.
2181 */
2182static struct cvmx_usb_transaction *cvmx_usb_submit_bulk(
2183                                                struct octeon_hcd *usb,
2184                                                struct cvmx_usb_pipe *pipe,
2185                                                struct urb *urb)
2186{
2187        return cvmx_usb_submit_transaction(usb, pipe, CVMX_USB_TRANSFER_BULK,
2188                                           urb->transfer_dma,
2189                                           urb->transfer_buffer_length,
2190                                           0, /* control_header */
2191                                           0, /* iso_start_frame */
2192                                           0, /* iso_number_packets */
2193                                           NULL, /* iso_packets */
2194                                           urb);
2195}
2196
2197/**
2198 * Call to submit a USB Interrupt transfer to a pipe.
2199 *
2200 * @usb:            USB device state populated by cvmx_usb_initialize().
2201 * @pipe:           Handle to the pipe for the transfer.
2202 * @urb:            URB returned when the callback is called.
2203 *
2204 * Returns: A submitted transaction or NULL on failure.
2205 */
2206static struct cvmx_usb_transaction *cvmx_usb_submit_interrupt(
2207                                                struct octeon_hcd *usb,
2208                                                struct cvmx_usb_pipe *pipe,
2209                                                struct urb *urb)
2210{
2211        return cvmx_usb_submit_transaction(usb, pipe,
2212                                           CVMX_USB_TRANSFER_INTERRUPT,
2213                                           urb->transfer_dma,
2214                                           urb->transfer_buffer_length,
2215                                           0, /* control_header */
2216                                           0, /* iso_start_frame */
2217                                           0, /* iso_number_packets */
2218                                           NULL, /* iso_packets */
2219                                           urb);
2220}
2221
2222/**
2223 * Call to submit a USB Control transfer to a pipe.
2224 *
2225 * @usb:            USB device state populated by cvmx_usb_initialize().
2226 * @pipe:           Handle to the pipe for the transfer.
2227 * @urb:            URB.
2228 *
2229 * Returns: A submitted transaction or NULL on failure.
2230 */
2231static struct cvmx_usb_transaction *cvmx_usb_submit_control(
2232                                                struct octeon_hcd *usb,
2233                                                struct cvmx_usb_pipe *pipe,
2234                                                struct urb *urb)
2235{
2236        int buffer_length = urb->transfer_buffer_length;
2237        u64 control_header = urb->setup_dma;
2238        struct usb_ctrlrequest *header = cvmx_phys_to_ptr(control_header);
2239
2240        if ((header->bRequestType & USB_DIR_IN) == 0)
2241                buffer_length = le16_to_cpu(header->wLength);
2242
2243        return cvmx_usb_submit_transaction(usb, pipe,
2244                                           CVMX_USB_TRANSFER_CONTROL,
2245                                           urb->transfer_dma, buffer_length,
2246                                           control_header,
2247                                           0, /* iso_start_frame */
2248                                           0, /* iso_number_packets */
2249                                           NULL, /* iso_packets */
2250                                           urb);
2251}
2252
2253/**
2254 * Call to submit a USB Isochronous transfer to a pipe.
2255 *
2256 * @usb:            USB device state populated by cvmx_usb_initialize().
2257 * @pipe:           Handle to the pipe for the transfer.
2258 * @urb:            URB returned when the callback is called.
2259 *
2260 * Returns: A submitted transaction or NULL on failure.
2261 */
2262static struct cvmx_usb_transaction *cvmx_usb_submit_isochronous(
2263                                                struct octeon_hcd *usb,
2264                                                struct cvmx_usb_pipe *pipe,
2265                                                struct urb *urb)
2266{
2267        struct cvmx_usb_iso_packet *packets;
2268
2269        packets = (struct cvmx_usb_iso_packet *)urb->setup_packet;
2270        return cvmx_usb_submit_transaction(usb, pipe,
2271                                           CVMX_USB_TRANSFER_ISOCHRONOUS,
2272                                           urb->transfer_dma,
2273                                           urb->transfer_buffer_length,
2274                                           0, /* control_header */
2275                                           urb->start_frame,
2276                                           urb->number_of_packets,
2277                                           packets, urb);
2278}
2279
2280/**
2281 * Cancel one outstanding request in a pipe. Canceling a request
2282 * can fail if the transaction has already completed before cancel
2283 * is called. Even after a successful cancel call, it may take
2284 * a frame or two for the cvmx_usb_poll() function to call the
2285 * associated callback.
2286 *
2287 * @usb:         USB device state populated by cvmx_usb_initialize().
2288 * @pipe:        Pipe to cancel requests in.
2289 * @transaction: Transaction to cancel, returned by the submit function.
2290 *
2291 * Returns: 0 or a negative error code.
2292 */
2293static int cvmx_usb_cancel(struct octeon_hcd *usb,
2294                           struct cvmx_usb_pipe *pipe,
2295                           struct cvmx_usb_transaction *transaction)
2296{
2297        /*
2298         * If the transaction is the HEAD of the queue and scheduled. We need to
2299         * treat it special
2300         */
2301        if (list_first_entry(&pipe->transactions, typeof(*transaction), node) ==
2302            transaction && (pipe->flags & CVMX_USB_PIPE_FLAGS_SCHEDULED)) {
2303                union cvmx_usbcx_hccharx usbc_hcchar;
2304
2305                usb->pipe_for_channel[pipe->channel] = NULL;
2306                pipe->flags &= ~CVMX_USB_PIPE_FLAGS_SCHEDULED;
2307
2308                CVMX_SYNCW;
2309
2310                usbc_hcchar.u32 = cvmx_usb_read_csr32(usb,
2311                                CVMX_USBCX_HCCHARX(pipe->channel, usb->index));
2312                /*
2313                 * If the channel isn't enabled then the transaction already
2314                 * completed.
2315                 */
2316                if (usbc_hcchar.s.chena) {
2317                        usbc_hcchar.s.chdis = 1;
2318                        cvmx_usb_write_csr32(usb,
2319                                             CVMX_USBCX_HCCHARX(pipe->channel,
2320                                                                usb->index),
2321                                             usbc_hcchar.u32);
2322                }
2323        }
2324        cvmx_usb_complete(usb, pipe, transaction, CVMX_USB_STATUS_CANCEL);
2325        return 0;
2326}
2327
2328/**
2329 * Cancel all outstanding requests in a pipe. Logically all this
2330 * does is call cvmx_usb_cancel() in a loop.
2331 *
2332 * @usb:         USB device state populated by cvmx_usb_initialize().
2333 * @pipe:        Pipe to cancel requests in.
2334 *
2335 * Returns: 0 or a negative error code.
2336 */
2337static int cvmx_usb_cancel_all(struct octeon_hcd *usb,
2338                               struct cvmx_usb_pipe *pipe)
2339{
2340        struct cvmx_usb_transaction *transaction, *next;
2341
2342        /* Simply loop through and attempt to cancel each transaction */
2343        list_for_each_entry_safe(transaction, next, &pipe->transactions, node) {
2344                int result = cvmx_usb_cancel(usb, pipe, transaction);
2345
2346                if (unlikely(result != 0))
2347                        return result;
2348        }
2349        return 0;
2350}
2351
2352/**
2353 * Close a pipe created with cvmx_usb_open_pipe().
2354 *
2355 * @usb:         USB device state populated by cvmx_usb_initialize().
2356 * @pipe:        Pipe to close.
2357 *
2358 * Returns: 0 or a negative error code. EBUSY is returned if the pipe has
2359 *          outstanding transfers.
2360 */
2361static int cvmx_usb_close_pipe(struct octeon_hcd *usb,
2362                               struct cvmx_usb_pipe *pipe)
2363{
2364        /* Fail if the pipe has pending transactions */
2365        if (!list_empty(&pipe->transactions))
2366                return -EBUSY;
2367
2368        list_del(&pipe->node);
2369        kfree(pipe);
2370
2371        return 0;
2372}
2373
2374/**
2375 * Get the current USB protocol level frame number. The frame
2376 * number is always in the range of 0-0x7ff.
2377 *
2378 * @usb: USB device state populated by cvmx_usb_initialize().
2379 *
2380 * Returns: USB frame number
2381 */
2382static int cvmx_usb_get_frame_number(struct octeon_hcd *usb)
2383{
2384        int frame_number;
2385        union cvmx_usbcx_hfnum usbc_hfnum;
2386
2387        usbc_hfnum.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index));
2388        frame_number = usbc_hfnum.s.frnum;
2389
2390        return frame_number;
2391}
2392
2393static void cvmx_usb_transfer_control(struct octeon_hcd *usb,
2394                                      struct cvmx_usb_pipe *pipe,
2395                                      struct cvmx_usb_transaction *transaction,
2396                                      union cvmx_usbcx_hccharx usbc_hcchar,
2397                                      int buffer_space_left,
2398                                      int bytes_in_last_packet)
2399{
2400        switch (transaction->stage) {
2401        case CVMX_USB_STAGE_NON_CONTROL:
2402        case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE:
2403                /* This should be impossible */
2404                cvmx_usb_complete(usb, pipe, transaction,
2405                                  CVMX_USB_STATUS_ERROR);
2406                break;
2407        case CVMX_USB_STAGE_SETUP:
2408                pipe->pid_toggle = 1;
2409                if (cvmx_usb_pipe_needs_split(usb, pipe)) {
2410                        transaction->stage =
2411                                CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE;
2412                } else {
2413                        struct usb_ctrlrequest *header =
2414                                cvmx_phys_to_ptr(transaction->control_header);
2415                        if (header->wLength)
2416                                transaction->stage = CVMX_USB_STAGE_DATA;
2417                        else
2418                                transaction->stage = CVMX_USB_STAGE_STATUS;
2419                }
2420                break;
2421        case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE:
2422                {
2423                        struct usb_ctrlrequest *header =
2424                                cvmx_phys_to_ptr(transaction->control_header);
2425                        if (header->wLength)
2426                                transaction->stage = CVMX_USB_STAGE_DATA;
2427                        else
2428                                transaction->stage = CVMX_USB_STAGE_STATUS;
2429                }
2430                break;
2431        case CVMX_USB_STAGE_DATA:
2432                if (cvmx_usb_pipe_needs_split(usb, pipe)) {
2433                        transaction->stage = CVMX_USB_STAGE_DATA_SPLIT_COMPLETE;
2434                        /*
2435                         * For setup OUT data that are splits,
2436                         * the hardware doesn't appear to count
2437                         * transferred data. Here we manually
2438                         * update the data transferred
2439                         */
2440                        if (!usbc_hcchar.s.epdir) {
2441                                if (buffer_space_left < pipe->max_packet)
2442                                        transaction->actual_bytes +=
2443                                                buffer_space_left;
2444                                else
2445                                        transaction->actual_bytes +=
2446                                                pipe->max_packet;
2447                        }
2448                } else if ((buffer_space_left == 0) ||
2449                           (bytes_in_last_packet < pipe->max_packet)) {
2450                        pipe->pid_toggle = 1;
2451                        transaction->stage = CVMX_USB_STAGE_STATUS;
2452                }
2453                break;
2454        case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE:
2455                if ((buffer_space_left == 0) ||
2456                    (bytes_in_last_packet < pipe->max_packet)) {
2457                        pipe->pid_toggle = 1;
2458                        transaction->stage = CVMX_USB_STAGE_STATUS;
2459                } else {
2460                        transaction->stage = CVMX_USB_STAGE_DATA;
2461                }
2462                break;
2463        case CVMX_USB_STAGE_STATUS:
2464                if (cvmx_usb_pipe_needs_split(usb, pipe))
2465                        transaction->stage =
2466                                CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE;
2467                else
2468                        cvmx_usb_complete(usb, pipe, transaction,
2469                                          CVMX_USB_STATUS_OK);
2470                break;
2471        case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE:
2472                cvmx_usb_complete(usb, pipe, transaction, CVMX_USB_STATUS_OK);
2473                break;
2474        }
2475}
2476
2477static void cvmx_usb_transfer_bulk(struct octeon_hcd *usb,
2478                                   struct cvmx_usb_pipe *pipe,
2479                                   struct cvmx_usb_transaction *transaction,
2480                                   union cvmx_usbcx_hcintx usbc_hcint,
2481                                   int buffer_space_left,
2482                                   int bytes_in_last_packet)
2483{
2484        /*
2485         * The only time a bulk transfer isn't complete when it finishes with
2486         * an ACK is during a split transaction. For splits we need to continue
2487         * the transfer if more data is needed.
2488         */
2489        if (cvmx_usb_pipe_needs_split(usb, pipe)) {
2490                if (transaction->stage == CVMX_USB_STAGE_NON_CONTROL)
2491                        transaction->stage =
2492                                CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE;
2493                else if (buffer_space_left &&
2494                         (bytes_in_last_packet == pipe->max_packet))
2495                        transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
2496                else
2497                        cvmx_usb_complete(usb, pipe, transaction,
2498                                          CVMX_USB_STATUS_OK);
2499        } else {
2500                if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) &&
2501                    (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) &&
2502                    (usbc_hcint.s.nak))
2503                        pipe->flags |= CVMX_USB_PIPE_FLAGS_NEED_PING;
2504                if (!buffer_space_left ||
2505                    (bytes_in_last_packet < pipe->max_packet))
2506                        cvmx_usb_complete(usb, pipe, transaction,
2507                                          CVMX_USB_STATUS_OK);
2508        }
2509}
2510
2511static void cvmx_usb_transfer_intr(struct octeon_hcd *usb,
2512                                   struct cvmx_usb_pipe *pipe,
2513                                   struct cvmx_usb_transaction *transaction,
2514                                   int buffer_space_left,
2515                                   int bytes_in_last_packet)
2516{
2517        if (cvmx_usb_pipe_needs_split(usb, pipe)) {
2518                if (transaction->stage == CVMX_USB_STAGE_NON_CONTROL) {
2519                        transaction->stage =
2520                                CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE;
2521                } else if (buffer_space_left &&
2522                           (bytes_in_last_packet == pipe->max_packet)) {
2523                        transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
2524                } else {
2525                        pipe->next_tx_frame += pipe->interval;
2526                        cvmx_usb_complete(usb, pipe, transaction,
2527                                          CVMX_USB_STATUS_OK);
2528                }
2529        } else if (!buffer_space_left ||
2530                   (bytes_in_last_packet < pipe->max_packet)) {
2531                pipe->next_tx_frame += pipe->interval;
2532                cvmx_usb_complete(usb, pipe, transaction, CVMX_USB_STATUS_OK);
2533        }
2534}
2535
2536static void cvmx_usb_transfer_isoc(struct octeon_hcd *usb,
2537                                   struct cvmx_usb_pipe *pipe,
2538                                   struct cvmx_usb_transaction *transaction,
2539                                   int buffer_space_left,
2540                                   int bytes_in_last_packet,
2541                                   int bytes_this_transfer)
2542{
2543        if (cvmx_usb_pipe_needs_split(usb, pipe)) {
2544                /*
2545                 * ISOCHRONOUS OUT splits don't require a complete split stage.
2546                 * Instead they use a sequence of begin OUT splits to transfer
2547                 * the data 188 bytes at a time. Once the transfer is complete,
2548                 * the pipe sleeps until the next schedule interval.
2549                 */
2550                if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) {
2551                        /*
2552                         * If no space left or this wasn't a max size packet
2553                         * then this transfer is complete. Otherwise start it
2554                         * again to send the next 188 bytes
2555                         */
2556                        if (!buffer_space_left || (bytes_this_transfer < 188)) {
2557                                pipe->next_tx_frame += pipe->interval;
2558                                cvmx_usb_complete(usb, pipe, transaction,
2559                                                  CVMX_USB_STATUS_OK);
2560                        }
2561                        return;
2562                }
2563                if (transaction->stage ==
2564                    CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE) {
2565                        /*
2566                         * We are in the incoming data phase. Keep getting data
2567                         * until we run out of space or get a small packet
2568                         */
2569                        if ((buffer_space_left == 0) ||
2570                            (bytes_in_last_packet < pipe->max_packet)) {
2571                                pipe->next_tx_frame += pipe->interval;
2572                                cvmx_usb_complete(usb, pipe, transaction,
2573                                                  CVMX_USB_STATUS_OK);
2574                        }
2575                } else {
2576                        transaction->stage =
2577                                CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE;
2578                }
2579        } else {
2580                pipe->next_tx_frame += pipe->interval;
2581                cvmx_usb_complete(usb, pipe, transaction, CVMX_USB_STATUS_OK);
2582        }
2583}
2584
2585/**
2586 * Poll a channel for status
2587 *
2588 * @usb:     USB device
2589 * @channel: Channel to poll
2590 *
2591 * Returns: Zero on success
2592 */
2593static int cvmx_usb_poll_channel(struct octeon_hcd *usb, int channel)
2594{
2595        struct usb_hcd *hcd = octeon_to_hcd(usb);
2596        struct device *dev = hcd->self.controller;
2597        union cvmx_usbcx_hcintx usbc_hcint;
2598        union cvmx_usbcx_hctsizx usbc_hctsiz;
2599        union cvmx_usbcx_hccharx usbc_hcchar;
2600        struct cvmx_usb_pipe *pipe;
2601        struct cvmx_usb_transaction *transaction;
2602        int bytes_this_transfer;
2603        int bytes_in_last_packet;
2604        int packets_processed;
2605        int buffer_space_left;
2606
2607        /* Read the interrupt status bits for the channel */
2608        usbc_hcint.u32 = cvmx_usb_read_csr32(usb,
2609                                CVMX_USBCX_HCINTX(channel, usb->index));
2610
2611        if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
2612                usbc_hcchar.u32 = cvmx_usb_read_csr32(usb,
2613                                CVMX_USBCX_HCCHARX(channel, usb->index));
2614
2615                if (usbc_hcchar.s.chena && usbc_hcchar.s.chdis) {
2616                        /*
2617                         * There seems to be a bug in CN31XX which can cause
2618                         * interrupt IN transfers to get stuck until we do a
2619                         * write of HCCHARX without changing things
2620                         */
2621                        cvmx_usb_write_csr32(usb,
2622                                             CVMX_USBCX_HCCHARX(channel,
2623                                                                usb->index),
2624                                             usbc_hcchar.u32);
2625                        return 0;
2626                }
2627
2628                /*
2629                 * In non DMA mode the channels don't halt themselves. We need
2630                 * to manually disable channels that are left running
2631                 */
2632                if (!usbc_hcint.s.chhltd) {
2633                        if (usbc_hcchar.s.chena) {
2634                                union cvmx_usbcx_hcintmskx hcintmsk;
2635                                /* Disable all interrupts except CHHLTD */
2636                                hcintmsk.u32 = 0;
2637                                hcintmsk.s.chhltdmsk = 1;
2638                                cvmx_usb_write_csr32(usb,
2639                                                     CVMX_USBCX_HCINTMSKX(channel, usb->index),
2640                                                     hcintmsk.u32);
2641                                usbc_hcchar.s.chdis = 1;
2642                                cvmx_usb_write_csr32(usb,
2643                                                     CVMX_USBCX_HCCHARX(channel, usb->index),
2644                                                     usbc_hcchar.u32);
2645                                return 0;
2646                        } else if (usbc_hcint.s.xfercompl) {
2647                                /*
2648                                 * Successful IN/OUT with transfer complete.
2649                                 * Channel halt isn't needed.
2650                                 */
2651                        } else {
2652                                dev_err(dev, "USB%d: Channel %d interrupt without halt\n",
2653                                        usb->index, channel);
2654                                return 0;
2655                        }
2656                }
2657        } else {
2658                /*
2659                 * There is are no interrupts that we need to process when the
2660                 * channel is still running
2661                 */
2662                if (!usbc_hcint.s.chhltd)
2663                        return 0;
2664        }
2665
2666        /* Disable the channel interrupts now that it is done */
2667        cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), 0);
2668        usb->idle_hardware_channels |= (1 << channel);
2669
2670        /* Make sure this channel is tied to a valid pipe */
2671        pipe = usb->pipe_for_channel[channel];
2672        prefetch(pipe);
2673        if (!pipe)
2674                return 0;
2675        transaction = list_first_entry(&pipe->transactions,
2676                                       typeof(*transaction),
2677                                       node);
2678        prefetch(transaction);
2679
2680        /*
2681         * Disconnect this pipe from the HW channel. Later the schedule
2682         * function will figure out which pipe needs to go
2683         */
2684        usb->pipe_for_channel[channel] = NULL;
2685        pipe->flags &= ~CVMX_USB_PIPE_FLAGS_SCHEDULED;
2686
2687        /*
2688         * Read the channel config info so we can figure out how much data
2689         * transferred
2690         */
2691        usbc_hcchar.u32 = cvmx_usb_read_csr32(usb,
2692                        CVMX_USBCX_HCCHARX(channel, usb->index));
2693        usbc_hctsiz.u32 = cvmx_usb_read_csr32(usb,
2694                        CVMX_USBCX_HCTSIZX(channel, usb->index));
2695
2696        /*
2697         * Calculating the number of bytes successfully transferred is dependent
2698         * on the transfer direction
2699         */
2700        packets_processed = transaction->pktcnt - usbc_hctsiz.s.pktcnt;
2701        if (usbc_hcchar.s.epdir) {
2702                /*
2703                 * IN transactions are easy. For every byte received the
2704                 * hardware decrements xfersize. All we need to do is subtract
2705                 * the current value of xfersize from its starting value and we
2706                 * know how many bytes were written to the buffer
2707                 */
2708                bytes_this_transfer = transaction->xfersize -
2709                        usbc_hctsiz.s.xfersize;
2710        } else {
2711                /*
2712                 * OUT transaction don't decrement xfersize. Instead pktcnt is
2713                 * decremented on every successful packet send. The hardware
2714                 * does this when it receives an ACK, or NYET. If it doesn't
2715                 * receive one of these responses pktcnt doesn't change
2716                 */
2717                bytes_this_transfer = packets_processed * usbc_hcchar.s.mps;
2718                /*
2719                 * The last packet may not be a full transfer if we didn't have
2720                 * enough data
2721                 */
2722                if (bytes_this_transfer > transaction->xfersize)
2723                        bytes_this_transfer = transaction->xfersize;
2724        }
2725        /* Figure out how many bytes were in the last packet of the transfer */
2726        if (packets_processed)
2727                bytes_in_last_packet = bytes_this_transfer -
2728                        (packets_processed - 1) * usbc_hcchar.s.mps;
2729        else
2730                bytes_in_last_packet = bytes_this_transfer;
2731
2732        /*
2733         * As a special case, setup transactions output the setup header, not
2734         * the user's data. For this reason we don't count setup data as bytes
2735         * transferred
2736         */
2737        if ((transaction->stage == CVMX_USB_STAGE_SETUP) ||
2738            (transaction->stage == CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE))
2739                bytes_this_transfer = 0;
2740
2741        /*
2742         * Add the bytes transferred to the running total. It is important that
2743         * bytes_this_transfer doesn't count any data that needs to be
2744         * retransmitted
2745         */
2746        transaction->actual_bytes += bytes_this_transfer;
2747        if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
2748                buffer_space_left = transaction->iso_packets[0].length -
2749                        transaction->actual_bytes;
2750        else
2751                buffer_space_left = transaction->buffer_length -
2752                        transaction->actual_bytes;
2753
2754        /*
2755         * We need to remember the PID toggle state for the next transaction.
2756         * The hardware already updated it for the next transaction
2757         */
2758        pipe->pid_toggle = !(usbc_hctsiz.s.pid == 0);
2759
2760        /*
2761         * For high speed bulk out, assume the next transaction will need to do
2762         * a ping before proceeding. If this isn't true the ACK processing below
2763         * will clear this flag
2764         */
2765        if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) &&
2766            (pipe->transfer_type == CVMX_USB_TRANSFER_BULK) &&
2767            (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT))
2768                pipe->flags |= CVMX_USB_PIPE_FLAGS_NEED_PING;
2769
2770        if (unlikely(WARN_ON_ONCE(bytes_this_transfer < 0))) {
2771                /*
2772                 * In some rare cases the DMA engine seems to get stuck and
2773                 * keeps substracting same byte count over and over again. In
2774                 * such case we just need to fail every transaction.
2775                 */
2776                cvmx_usb_complete(usb, pipe, transaction,
2777                                  CVMX_USB_STATUS_ERROR);
2778                return 0;
2779        }
2780
2781        if (usbc_hcint.s.stall) {
2782                /*
2783                 * STALL as a response means this transaction cannot be
2784                 * completed because the device can't process transactions. Tell
2785                 * the user. Any data that was transferred will be counted on
2786                 * the actual bytes transferred
2787                 */
2788                pipe->pid_toggle = 0;
2789                cvmx_usb_complete(usb, pipe, transaction,
2790                                  CVMX_USB_STATUS_STALL);
2791        } else if (usbc_hcint.s.xacterr) {
2792                /*
2793                 * XactErr as a response means the device signaled
2794                 * something wrong with the transfer. For example, PID
2795                 * toggle errors cause these.
2796                 */
2797                cvmx_usb_complete(usb, pipe, transaction,
2798                                  CVMX_USB_STATUS_XACTERR);
2799        } else if (usbc_hcint.s.bblerr) {
2800                /* Babble Error (BblErr) */
2801                cvmx_usb_complete(usb, pipe, transaction,
2802                                  CVMX_USB_STATUS_BABBLEERR);
2803        } else if (usbc_hcint.s.datatglerr) {
2804                /* Data toggle error */
2805                cvmx_usb_complete(usb, pipe, transaction,
2806                                  CVMX_USB_STATUS_DATATGLERR);
2807        } else if (usbc_hcint.s.nyet) {
2808                /*
2809                 * NYET as a response is only allowed in three cases: as a
2810                 * response to a ping, as a response to a split transaction, and
2811                 * as a response to a bulk out. The ping case is handled by
2812                 * hardware, so we only have splits and bulk out
2813                 */
2814                if (!cvmx_usb_pipe_needs_split(usb, pipe)) {
2815                        transaction->retries = 0;
2816                        /*
2817                         * If there is more data to go then we need to try
2818                         * again. Otherwise this transaction is complete
2819                         */
2820                        if ((buffer_space_left == 0) ||
2821                            (bytes_in_last_packet < pipe->max_packet))
2822                                cvmx_usb_complete(usb, pipe,
2823                                                  transaction,
2824                                                  CVMX_USB_STATUS_OK);
2825                } else {
2826                        /*
2827                         * Split transactions retry the split complete 4 times
2828                         * then rewind to the start split and do the entire
2829                         * transactions again
2830                         */
2831                        transaction->retries++;
2832                        if ((transaction->retries & 0x3) == 0) {
2833                                /*
2834                                 * Rewind to the beginning of the transaction by
2835                                 * anding off the split complete bit
2836                                 */
2837                                transaction->stage &= ~1;
2838                                pipe->split_sc_frame = -1;
2839                        }
2840                }
2841        } else if (usbc_hcint.s.ack) {
2842                transaction->retries = 0;
2843                /*
2844                 * The ACK bit can only be checked after the other error bits.
2845                 * This is because a multi packet transfer may succeed in a
2846                 * number of packets and then get a different response on the
2847                 * last packet. In this case both ACK and the last response bit
2848                 * will be set. If none of the other response bits is set, then
2849                 * the last packet must have been an ACK
2850                 *
2851                 * Since we got an ACK, we know we don't need to do a ping on
2852                 * this pipe
2853                 */
2854                pipe->flags &= ~CVMX_USB_PIPE_FLAGS_NEED_PING;
2855
2856                switch (transaction->type) {
2857                case CVMX_USB_TRANSFER_CONTROL:
2858                        cvmx_usb_transfer_control(usb, pipe, transaction,
2859                                                  usbc_hcchar,
2860                                                  buffer_space_left,
2861                                                  bytes_in_last_packet);
2862                        break;
2863                case CVMX_USB_TRANSFER_BULK:
2864                        cvmx_usb_transfer_bulk(usb, pipe, transaction,
2865                                               usbc_hcint, buffer_space_left,
2866                                               bytes_in_last_packet);
2867                        break;
2868                case CVMX_USB_TRANSFER_INTERRUPT:
2869                        cvmx_usb_transfer_intr(usb, pipe, transaction,
2870                                               buffer_space_left,
2871                                               bytes_in_last_packet);
2872                        break;
2873                case CVMX_USB_TRANSFER_ISOCHRONOUS:
2874                        cvmx_usb_transfer_isoc(usb, pipe, transaction,
2875                                               buffer_space_left,
2876                                               bytes_in_last_packet,
2877                                               bytes_this_transfer);
2878                        break;
2879                }
2880        } else if (usbc_hcint.s.nak) {
2881                /*
2882                 * If this was a split then clear our split in progress marker.
2883                 */
2884                if (usb->active_split == transaction)
2885                        usb->active_split = NULL;
2886                /*
2887                 * NAK as a response means the device couldn't accept the
2888                 * transaction, but it should be retried in the future. Rewind
2889                 * to the beginning of the transaction by anding off the split
2890                 * complete bit. Retry in the next interval
2891                 */
2892                transaction->retries = 0;
2893                transaction->stage &= ~1;
2894                pipe->next_tx_frame += pipe->interval;
2895                if (pipe->next_tx_frame < usb->frame_number)
2896                        pipe->next_tx_frame = usb->frame_number +
2897                                pipe->interval -
2898                                (usb->frame_number - pipe->next_tx_frame) %
2899                                pipe->interval;
2900        } else {
2901                struct cvmx_usb_port_status port;
2902
2903                port = cvmx_usb_get_status(usb);
2904                if (port.port_enabled) {
2905                        /* We'll retry the exact same transaction again */
2906                        transaction->retries++;
2907                } else {
2908                        /*
2909                         * We get channel halted interrupts with no result bits
2910                         * sets when the cable is unplugged
2911                         */
2912                        cvmx_usb_complete(usb, pipe, transaction,
2913                                          CVMX_USB_STATUS_ERROR);
2914                }
2915        }
2916        return 0;
2917}
2918
2919static void octeon_usb_port_callback(struct octeon_hcd *usb)
2920{
2921        spin_unlock(&usb->lock);
2922        usb_hcd_poll_rh_status(octeon_to_hcd(usb));
2923        spin_lock(&usb->lock);
2924}
2925
2926/**
2927 * Poll the USB block for status and call all needed callback
2928 * handlers. This function is meant to be called in the interrupt
2929 * handler for the USB controller. It can also be called
2930 * periodically in a loop for non-interrupt based operation.
2931 *
2932 * @usb: USB device state populated by cvmx_usb_initialize().
2933 *
2934 * Returns: 0 or a negative error code.
2935 */
2936static int cvmx_usb_poll(struct octeon_hcd *usb)
2937{
2938        union cvmx_usbcx_hfnum usbc_hfnum;
2939        union cvmx_usbcx_gintsts usbc_gintsts;
2940
2941        prefetch_range(usb, sizeof(*usb));
2942
2943        /* Update the frame counter */
2944        usbc_hfnum.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index));
2945        if ((usb->frame_number & 0x3fff) > usbc_hfnum.s.frnum)
2946                usb->frame_number += 0x4000;
2947        usb->frame_number &= ~0x3fffull;
2948        usb->frame_number |= usbc_hfnum.s.frnum;
2949
2950        /* Read the pending interrupts */
2951        usbc_gintsts.u32 = cvmx_usb_read_csr32(usb,
2952                                               CVMX_USBCX_GINTSTS(usb->index));
2953
2954        /* Clear the interrupts now that we know about them */
2955        cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTSTS(usb->index),
2956                             usbc_gintsts.u32);
2957
2958        if (usbc_gintsts.s.rxflvl) {
2959                /*
2960                 * RxFIFO Non-Empty (RxFLvl)
2961                 * Indicates that there is at least one packet pending to be
2962                 * read from the RxFIFO.
2963                 *
2964                 * In DMA mode this is handled by hardware
2965                 */
2966                if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
2967                        cvmx_usb_poll_rx_fifo(usb);
2968        }
2969        if (usbc_gintsts.s.ptxfemp || usbc_gintsts.s.nptxfemp) {
2970                /* Fill the Tx FIFOs when not in DMA mode */
2971                if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
2972                        cvmx_usb_poll_tx_fifo(usb);
2973        }
2974        if (usbc_gintsts.s.disconnint || usbc_gintsts.s.prtint) {
2975                union cvmx_usbcx_hprt usbc_hprt;
2976                /*
2977                 * Disconnect Detected Interrupt (DisconnInt)
2978                 * Asserted when a device disconnect is detected.
2979                 *
2980                 * Host Port Interrupt (PrtInt)
2981                 * The core sets this bit to indicate a change in port status of
2982                 * one of the O2P USB core ports in Host mode. The application
2983                 * must read the Host Port Control and Status (HPRT) register to
2984                 * determine the exact event that caused this interrupt. The
2985                 * application must clear the appropriate status bit in the Host
2986                 * Port Control and Status register to clear this bit.
2987                 *
2988                 * Call the user's port callback
2989                 */
2990                octeon_usb_port_callback(usb);
2991                /* Clear the port change bits */
2992                usbc_hprt.u32 =
2993                        cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
2994                usbc_hprt.s.prtena = 0;
2995                cvmx_usb_write_csr32(usb, CVMX_USBCX_HPRT(usb->index),
2996                                     usbc_hprt.u32);
2997        }
2998        if (usbc_gintsts.s.hchint) {
2999                /*
3000                 * Host Channels Interrupt (HChInt)
3001                 * The core sets this bit to indicate that an interrupt is
3002                 * pending on one of the channels of the core (in Host mode).
3003                 * The application must read the Host All Channels Interrupt
3004                 * (HAINT) register to determine the exact number of the channel
3005                 * on which the interrupt occurred, and then read the
3006                 * corresponding Host Channel-n Interrupt (HCINTn) register to
3007                 * determine the exact cause of the interrupt. The application
3008                 * must clear the appropriate status bit in the HCINTn register
3009                 * to clear this bit.
3010                 */
3011                union cvmx_usbcx_haint usbc_haint;
3012
3013                usbc_haint.u32 = cvmx_usb_read_csr32(usb,
3014                                        CVMX_USBCX_HAINT(usb->index));
3015                while (usbc_haint.u32) {
3016                        int channel;
3017
3018                        channel = __fls(usbc_haint.u32);
3019                        cvmx_usb_poll_channel(usb, channel);
3020                        usbc_haint.u32 ^= 1 << channel;
3021                }
3022        }
3023
3024        cvmx_usb_schedule(usb, usbc_gintsts.s.sof);
3025
3026        return 0;
3027}
3028
3029/* convert between an HCD pointer and the corresponding struct octeon_hcd */
3030static inline struct octeon_hcd *hcd_to_octeon(struct usb_hcd *hcd)
3031{
3032        return (struct octeon_hcd *)(hcd->hcd_priv);
3033}
3034
3035static irqreturn_t octeon_usb_irq(struct usb_hcd *hcd)
3036{
3037        struct octeon_hcd *usb = hcd_to_octeon(hcd);
3038        unsigned long flags;
3039
3040        spin_lock_irqsave(&usb->lock, flags);
3041        cvmx_usb_poll(usb);
3042        spin_unlock_irqrestore(&usb->lock, flags);
3043        return IRQ_HANDLED;
3044}
3045
3046static int octeon_usb_start(struct usb_hcd *hcd)
3047{
3048        hcd->state = HC_STATE_RUNNING;
3049        return 0;
3050}
3051
3052static void octeon_usb_stop(struct usb_hcd *hcd)
3053{
3054        hcd->state = HC_STATE_HALT;
3055}
3056
3057static int octeon_usb_get_frame_number(struct usb_hcd *hcd)
3058{
3059        struct octeon_hcd *usb = hcd_to_octeon(hcd);
3060
3061        return cvmx_usb_get_frame_number(usb);
3062}
3063
3064static int octeon_usb_urb_enqueue(struct usb_hcd *hcd,
3065                                  struct urb *urb,
3066                                  gfp_t mem_flags)
3067{
3068        struct octeon_hcd *usb = hcd_to_octeon(hcd);
3069        struct device *dev = hcd->self.controller;
3070        struct cvmx_usb_transaction *transaction = NULL;
3071        struct cvmx_usb_pipe *pipe;
3072        unsigned long flags;
3073        struct cvmx_usb_iso_packet *iso_packet;
3074        struct usb_host_endpoint *ep = urb->ep;
3075        int rc;
3076
3077        urb->status = 0;
3078        spin_lock_irqsave(&usb->lock, flags);
3079
3080        rc = usb_hcd_link_urb_to_ep(hcd, urb);
3081        if (rc) {
3082                spin_unlock_irqrestore(&usb->lock, flags);
3083                return rc;
3084        }
3085
3086        if (!ep->hcpriv) {
3087                enum cvmx_usb_transfer transfer_type;
3088                enum cvmx_usb_speed speed;
3089                int split_device = 0;
3090                int split_port = 0;
3091
3092                switch (usb_pipetype(urb->pipe)) {
3093                case PIPE_ISOCHRONOUS:
3094                        transfer_type = CVMX_USB_TRANSFER_ISOCHRONOUS;
3095                        break;
3096                case PIPE_INTERRUPT:
3097                        transfer_type = CVMX_USB_TRANSFER_INTERRUPT;
3098                        break;
3099                case PIPE_CONTROL:
3100                        transfer_type = CVMX_USB_TRANSFER_CONTROL;
3101                        break;
3102                default:
3103                        transfer_type = CVMX_USB_TRANSFER_BULK;
3104                        break;
3105                }
3106                switch (urb->dev->speed) {
3107                case USB_SPEED_LOW:
3108                        speed = CVMX_USB_SPEED_LOW;
3109                        break;
3110                case USB_SPEED_FULL:
3111                        speed = CVMX_USB_SPEED_FULL;
3112                        break;
3113                default:
3114                        speed = CVMX_USB_SPEED_HIGH;
3115                        break;
3116                }
3117                /*
3118                 * For slow devices on high speed ports we need to find the hub
3119                 * that does the speed translation so we know where to send the
3120                 * split transactions.
3121                 */
3122                if (speed != CVMX_USB_SPEED_HIGH) {
3123                        /*
3124                         * Start at this device and work our way up the usb
3125                         * tree.
3126                         */
3127                        struct usb_device *dev = urb->dev;
3128
3129                        while (dev->parent) {
3130                                /*
3131                                 * If our parent is high speed then he'll
3132                                 * receive the splits.
3133                                 */
3134                                if (dev->parent->speed == USB_SPEED_HIGH) {
3135                                        split_device = dev->parent->devnum;
3136                                        split_port = dev->portnum;
3137                                        break;
3138                                }
3139                                /*
3140                                 * Move up the tree one level. If we make it all
3141                                 * the way up the tree, then the port must not
3142                                 * be in high speed mode and we don't need a
3143                                 * split.
3144                                 */
3145                                dev = dev->parent;
3146                        }
3147                }
3148                pipe = cvmx_usb_open_pipe(usb, usb_pipedevice(urb->pipe),
3149                                          usb_pipeendpoint(urb->pipe), speed,
3150                                          le16_to_cpu(ep->desc.wMaxPacketSize)
3151                                          & 0x7ff,
3152                                          transfer_type,
3153                                          usb_pipein(urb->pipe) ?
3154                                                CVMX_USB_DIRECTION_IN :
3155                                                CVMX_USB_DIRECTION_OUT,
3156                                          urb->interval,
3157                                          (le16_to_cpu(ep->desc.wMaxPacketSize)
3158                                           >> 11) & 0x3,
3159                                          split_device, split_port);
3160                if (!pipe) {
3161                        usb_hcd_unlink_urb_from_ep(hcd, urb);
3162                        spin_unlock_irqrestore(&usb->lock, flags);
3163                        dev_dbg(dev, "Failed to create pipe\n");
3164                        return -ENOMEM;
3165                }
3166                ep->hcpriv = pipe;
3167        } else {
3168                pipe = ep->hcpriv;
3169        }
3170
3171        switch (usb_pipetype(urb->pipe)) {
3172        case PIPE_ISOCHRONOUS:
3173                dev_dbg(dev, "Submit isochronous to %d.%d\n",
3174                        usb_pipedevice(urb->pipe),
3175                        usb_pipeendpoint(urb->pipe));
3176                /*
3177                 * Allocate a structure to use for our private list of
3178                 * isochronous packets.
3179                 */
3180                iso_packet = kmalloc_array(urb->number_of_packets,
3181                                           sizeof(struct cvmx_usb_iso_packet),
3182                                           GFP_ATOMIC);
3183                if (iso_packet) {
3184                        int i;
3185                        /* Fill the list with the data from the URB */
3186                        for (i = 0; i < urb->number_of_packets; i++) {
3187                                iso_packet[i].offset =
3188                                        urb->iso_frame_desc[i].offset;
3189                                iso_packet[i].length =
3190                                        urb->iso_frame_desc[i].length;
3191                                iso_packet[i].status = CVMX_USB_STATUS_ERROR;
3192                        }
3193                        /*
3194                         * Store a pointer to the list in the URB setup_packet
3195                         * field. We know this currently isn't being used and
3196                         * this saves us a bunch of logic.
3197                         */
3198                        urb->setup_packet = (char *)iso_packet;
3199                        transaction = cvmx_usb_submit_isochronous(usb,
3200                                                                  pipe, urb);
3201                        /*
3202                         * If submit failed we need to free our private packet
3203                         * list.
3204                         */
3205                        if (!transaction) {
3206                                urb->setup_packet = NULL;
3207                                kfree(iso_packet);
3208                        }
3209                }
3210                break;
3211        case PIPE_INTERRUPT:
3212                dev_dbg(dev, "Submit interrupt to %d.%d\n",
3213                        usb_pipedevice(urb->pipe),
3214                        usb_pipeendpoint(urb->pipe));
3215                transaction = cvmx_usb_submit_interrupt(usb, pipe, urb);
3216                break;
3217        case PIPE_CONTROL:
3218                dev_dbg(dev, "Submit control to %d.%d\n",
3219                        usb_pipedevice(urb->pipe),
3220                        usb_pipeendpoint(urb->pipe));
3221                transaction = cvmx_usb_submit_control(usb, pipe, urb);
3222                break;
3223        case PIPE_BULK:
3224                dev_dbg(dev, "Submit bulk to %d.%d\n",
3225                        usb_pipedevice(urb->pipe),
3226                        usb_pipeendpoint(urb->pipe));
3227                transaction = cvmx_usb_submit_bulk(usb, pipe, urb);
3228                break;
3229        }
3230        if (!transaction) {
3231                usb_hcd_unlink_urb_from_ep(hcd, urb);
3232                spin_unlock_irqrestore(&usb->lock, flags);
3233                dev_dbg(dev, "Failed to submit\n");
3234                return -ENOMEM;
3235        }
3236        urb->hcpriv = transaction;
3237        spin_unlock_irqrestore(&usb->lock, flags);
3238        return 0;
3239}
3240
3241static int octeon_usb_urb_dequeue(struct usb_hcd *hcd,
3242                                  struct urb *urb,
3243                                  int status)
3244{
3245        struct octeon_hcd *usb = hcd_to_octeon(hcd);
3246        unsigned long flags;
3247        int rc;
3248
3249        if (!urb->dev)
3250                return -EINVAL;
3251
3252        spin_lock_irqsave(&usb->lock, flags);
3253
3254        rc = usb_hcd_check_unlink_urb(hcd, urb, status);
3255        if (rc)
3256                goto out;
3257
3258        urb->status = status;
3259        cvmx_usb_cancel(usb, urb->ep->hcpriv, urb->hcpriv);
3260
3261out:
3262        spin_unlock_irqrestore(&usb->lock, flags);
3263
3264        return rc;
3265}
3266
3267static void octeon_usb_endpoint_disable(struct usb_hcd *hcd,
3268                                        struct usb_host_endpoint *ep)
3269{
3270        struct device *dev = hcd->self.controller;
3271
3272        if (ep->hcpriv) {
3273                struct octeon_hcd *usb = hcd_to_octeon(hcd);
3274                struct cvmx_usb_pipe *pipe = ep->hcpriv;
3275                unsigned long flags;
3276
3277                spin_lock_irqsave(&usb->lock, flags);
3278                cvmx_usb_cancel_all(usb, pipe);
3279                if (cvmx_usb_close_pipe(usb, pipe))
3280                        dev_dbg(dev, "Closing pipe %p failed\n", pipe);
3281                spin_unlock_irqrestore(&usb->lock, flags);
3282                ep->hcpriv = NULL;
3283        }
3284}
3285
3286static int octeon_usb_hub_status_data(struct usb_hcd *hcd, char *buf)
3287{
3288        struct octeon_hcd *usb = hcd_to_octeon(hcd);
3289        struct cvmx_usb_port_status port_status;
3290        unsigned long flags;
3291
3292        spin_lock_irqsave(&usb->lock, flags);
3293        port_status = cvmx_usb_get_status(usb);
3294        spin_unlock_irqrestore(&usb->lock, flags);
3295        buf[0] = 0;
3296        buf[0] = port_status.connect_change << 1;
3297
3298        return buf[0] != 0;
3299}
3300
3301static int octeon_usb_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
3302                                  u16 wIndex, char *buf, u16 wLength)
3303{
3304        struct octeon_hcd *usb = hcd_to_octeon(hcd);
3305        struct device *dev = hcd->self.controller;
3306        struct cvmx_usb_port_status usb_port_status;
3307        int port_status;
3308        struct usb_hub_descriptor *desc;
3309        unsigned long flags;
3310
3311        switch (typeReq) {
3312        case ClearHubFeature:
3313                dev_dbg(dev, "ClearHubFeature\n");
3314                switch (wValue) {
3315                case C_HUB_LOCAL_POWER:
3316                case C_HUB_OVER_CURRENT:
3317                        /* Nothing required here */
3318                        break;
3319                default:
3320                        return -EINVAL;
3321                }
3322                break;
3323        case ClearPortFeature:
3324                dev_dbg(dev, "ClearPortFeature\n");
3325                if (wIndex != 1) {
3326                        dev_dbg(dev, " INVALID\n");
3327                        return -EINVAL;
3328                }
3329
3330                switch (wValue) {
3331                case USB_PORT_FEAT_ENABLE:
3332                        dev_dbg(dev, " ENABLE\n");
3333                        spin_lock_irqsave(&usb->lock, flags);
3334                        cvmx_usb_disable(usb);
3335                        spin_unlock_irqrestore(&usb->lock, flags);
3336                        break;
3337                case USB_PORT_FEAT_SUSPEND:
3338                        dev_dbg(dev, " SUSPEND\n");
3339                        /* Not supported on Octeon */
3340                        break;
3341                case USB_PORT_FEAT_POWER:
3342                        dev_dbg(dev, " POWER\n");
3343                        /* Not supported on Octeon */
3344                        break;
3345                case USB_PORT_FEAT_INDICATOR:
3346                        dev_dbg(dev, " INDICATOR\n");
3347                        /* Port inidicator not supported */
3348                        break;
3349                case USB_PORT_FEAT_C_CONNECTION:
3350                        dev_dbg(dev, " C_CONNECTION\n");
3351                        /* Clears drivers internal connect status change flag */
3352                        spin_lock_irqsave(&usb->lock, flags);
3353                        usb->port_status = cvmx_usb_get_status(usb);
3354                        spin_unlock_irqrestore(&usb->lock, flags);
3355                        break;
3356                case USB_PORT_FEAT_C_RESET:
3357                        dev_dbg(dev, " C_RESET\n");
3358                        /*
3359                         * Clears the driver's internal Port Reset Change flag.
3360                         */
3361                        spin_lock_irqsave(&usb->lock, flags);
3362                        usb->port_status = cvmx_usb_get_status(usb);
3363                        spin_unlock_irqrestore(&usb->lock, flags);
3364                        break;
3365                case USB_PORT_FEAT_C_ENABLE:
3366                        dev_dbg(dev, " C_ENABLE\n");
3367                        /*
3368                         * Clears the driver's internal Port Enable/Disable
3369                         * Change flag.
3370                         */
3371                        spin_lock_irqsave(&usb->lock, flags);
3372                        usb->port_status = cvmx_usb_get_status(usb);
3373                        spin_unlock_irqrestore(&usb->lock, flags);
3374                        break;
3375                case USB_PORT_FEAT_C_SUSPEND:
3376                        dev_dbg(dev, " C_SUSPEND\n");
3377                        /*
3378                         * Clears the driver's internal Port Suspend Change
3379                         * flag, which is set when resume signaling on the host
3380                         * port is complete.
3381                         */
3382                        break;
3383                case USB_PORT_FEAT_C_OVER_CURRENT:
3384                        dev_dbg(dev, " C_OVER_CURRENT\n");
3385                        /* Clears the driver's overcurrent Change flag */
3386                        spin_lock_irqsave(&usb->lock, flags);
3387                        usb->port_status = cvmx_usb_get_status(usb);
3388                        spin_unlock_irqrestore(&usb->lock, flags);
3389                        break;
3390                default:
3391                        dev_dbg(dev, " UNKNOWN\n");
3392                        return -EINVAL;
3393                }
3394                break;
3395        case GetHubDescriptor:
3396                dev_dbg(dev, "GetHubDescriptor\n");
3397                desc = (struct usb_hub_descriptor *)buf;
3398                desc->bDescLength = 9;
3399                desc->bDescriptorType = 0x29;
3400                desc->bNbrPorts = 1;
3401                desc->wHubCharacteristics = cpu_to_le16(0x08);
3402                desc->bPwrOn2PwrGood = 1;
3403                desc->bHubContrCurrent = 0;
3404                desc->u.hs.DeviceRemovable[0] = 0;
3405                desc->u.hs.DeviceRemovable[1] = 0xff;
3406                break;
3407        case GetHubStatus:
3408                dev_dbg(dev, "GetHubStatus\n");
3409                *(__le32 *)buf = 0;
3410                break;
3411        case GetPortStatus:
3412                dev_dbg(dev, "GetPortStatus\n");
3413                if (wIndex != 1) {
3414                        dev_dbg(dev, " INVALID\n");
3415                        return -EINVAL;
3416                }
3417
3418                spin_lock_irqsave(&usb->lock, flags);
3419                usb_port_status = cvmx_usb_get_status(usb);
3420                spin_unlock_irqrestore(&usb->lock, flags);
3421                port_status = 0;
3422
3423                if (usb_port_status.connect_change) {
3424                        port_status |= (1 << USB_PORT_FEAT_C_CONNECTION);
3425                        dev_dbg(dev, " C_CONNECTION\n");
3426                }
3427
3428                if (usb_port_status.port_enabled) {
3429                        port_status |= (1 << USB_PORT_FEAT_C_ENABLE);
3430                        dev_dbg(dev, " C_ENABLE\n");
3431                }
3432
3433                if (usb_port_status.connected) {
3434                        port_status |= (1 << USB_PORT_FEAT_CONNECTION);
3435                        dev_dbg(dev, " CONNECTION\n");
3436                }
3437
3438                if (usb_port_status.port_enabled) {
3439                        port_status |= (1 << USB_PORT_FEAT_ENABLE);
3440                        dev_dbg(dev, " ENABLE\n");
3441                }
3442
3443                if (usb_port_status.port_over_current) {
3444                        port_status |= (1 << USB_PORT_FEAT_OVER_CURRENT);
3445                        dev_dbg(dev, " OVER_CURRENT\n");
3446                }
3447
3448                if (usb_port_status.port_powered) {
3449                        port_status |= (1 << USB_PORT_FEAT_POWER);
3450                        dev_dbg(dev, " POWER\n");
3451                }
3452
3453                if (usb_port_status.port_speed == CVMX_USB_SPEED_HIGH) {
3454                        port_status |= USB_PORT_STAT_HIGH_SPEED;
3455                        dev_dbg(dev, " HIGHSPEED\n");
3456                } else if (usb_port_status.port_speed == CVMX_USB_SPEED_LOW) {
3457                        port_status |= (1 << USB_PORT_FEAT_LOWSPEED);
3458                        dev_dbg(dev, " LOWSPEED\n");
3459                }
3460
3461                *((__le32 *)buf) = cpu_to_le32(port_status);
3462                break;
3463        case SetHubFeature:
3464                dev_dbg(dev, "SetHubFeature\n");
3465                /* No HUB features supported */
3466                break;
3467        case SetPortFeature:
3468                dev_dbg(dev, "SetPortFeature\n");
3469                if (wIndex != 1) {
3470                        dev_dbg(dev, " INVALID\n");
3471                        return -EINVAL;
3472                }
3473
3474                switch (wValue) {
3475                case USB_PORT_FEAT_SUSPEND:
3476                        dev_dbg(dev, " SUSPEND\n");
3477                        return -EINVAL;
3478                case USB_PORT_FEAT_POWER:
3479                        dev_dbg(dev, " POWER\n");
3480                        /*
3481                         * Program the port power bit to drive VBUS on the USB.
3482                         */
3483                        spin_lock_irqsave(&usb->lock, flags);
3484                        USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index),
3485                                        cvmx_usbcx_hprt, prtpwr, 1);
3486                        spin_unlock_irqrestore(&usb->lock, flags);
3487                        return 0;
3488                case USB_PORT_FEAT_RESET:
3489                        dev_dbg(dev, " RESET\n");
3490                        spin_lock_irqsave(&usb->lock, flags);
3491                        cvmx_usb_reset_port(usb);
3492                        spin_unlock_irqrestore(&usb->lock, flags);
3493                        return 0;
3494                case USB_PORT_FEAT_INDICATOR:
3495                        dev_dbg(dev, " INDICATOR\n");
3496                        /* Not supported */
3497                        break;
3498                default:
3499                        dev_dbg(dev, " UNKNOWN\n");
3500                        return -EINVAL;
3501                }
3502                break;
3503        default:
3504                dev_dbg(dev, "Unknown root hub request\n");
3505                return -EINVAL;
3506        }
3507        return 0;
3508}
3509
3510static const struct hc_driver octeon_hc_driver = {
3511        .description            = "Octeon USB",
3512        .product_desc           = "Octeon Host Controller",
3513        .hcd_priv_size          = sizeof(struct octeon_hcd),
3514        .irq                    = octeon_usb_irq,
3515        .flags                  = HCD_MEMORY | HCD_USB2,
3516        .start                  = octeon_usb_start,
3517        .stop                   = octeon_usb_stop,
3518        .urb_enqueue            = octeon_usb_urb_enqueue,
3519        .urb_dequeue            = octeon_usb_urb_dequeue,
3520        .endpoint_disable       = octeon_usb_endpoint_disable,
3521        .get_frame_number       = octeon_usb_get_frame_number,
3522        .hub_status_data        = octeon_usb_hub_status_data,
3523        .hub_control            = octeon_usb_hub_control,
3524        .map_urb_for_dma        = octeon_map_urb_for_dma,
3525        .unmap_urb_for_dma      = octeon_unmap_urb_for_dma,
3526};
3527
3528static int octeon_usb_probe(struct platform_device *pdev)
3529{
3530        int status;
3531        int initialize_flags;
3532        int usb_num;
3533        struct resource *res_mem;
3534        struct device_node *usbn_node;
3535        int irq = platform_get_irq(pdev, 0);
3536        struct device *dev = &pdev->dev;
3537        struct octeon_hcd *usb;
3538        struct usb_hcd *hcd;
3539        u32 clock_rate = 48000000;
3540        bool is_crystal_clock = false;
3541        const char *clock_type;
3542        int i;
3543
3544        if (!dev->of_node) {
3545                dev_err(dev, "Error: empty of_node\n");
3546                return -ENXIO;
3547        }
3548        usbn_node = dev->of_node->parent;
3549
3550        i = of_property_read_u32(usbn_node,
3551                                 "clock-frequency", &clock_rate);
3552        if (i)
3553                i = of_property_read_u32(usbn_node,
3554                                         "refclk-frequency", &clock_rate);
3555        if (i) {
3556                dev_err(dev, "No USBN \"clock-frequency\"\n");
3557                return -ENXIO;
3558        }
3559        switch (clock_rate) {
3560        case 12000000:
3561                initialize_flags = CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ;
3562                break;
3563        case 24000000:
3564                initialize_flags = CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ;
3565                break;
3566        case 48000000:
3567                initialize_flags = CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ;
3568                break;
3569        default:
3570                dev_err(dev, "Illegal USBN \"clock-frequency\" %u\n",
3571                        clock_rate);
3572                return -ENXIO;
3573        }
3574
3575        i = of_property_read_string(usbn_node,
3576                                    "cavium,refclk-type", &clock_type);
3577        if (i)
3578                i = of_property_read_string(usbn_node,
3579                                            "refclk-type", &clock_type);
3580
3581        if (!i && strcmp("crystal", clock_type) == 0)
3582                is_crystal_clock = true;
3583
3584        if (is_crystal_clock)
3585                initialize_flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI;
3586        else
3587                initialize_flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND;
3588
3589        res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3590        if (!res_mem) {
3591                dev_err(dev, "found no memory resource\n");
3592                return -ENXIO;
3593        }
3594        usb_num = (res_mem->start >> 44) & 1;
3595
3596        if (irq < 0) {
3597                /* Defective device tree, but we know how to fix it. */
3598                irq_hw_number_t hwirq = usb_num ? (1 << 6) + 17 : 56;
3599
3600                irq = irq_create_mapping(NULL, hwirq);
3601        }
3602
3603        /*
3604         * Set the DMA mask to 64bits so we get buffers already translated for
3605         * DMA.
3606         */
3607        dev->coherent_dma_mask = ~0;
3608        dev->dma_mask = &dev->coherent_dma_mask;
3609
3610        /*
3611         * Only cn52XX and cn56XX have DWC_OTG USB hardware and the
3612         * IOB priority registers.  Under heavy network load USB
3613         * hardware can be starved by the IOB causing a crash.  Give
3614         * it a priority boost if it has been waiting more than 400
3615         * cycles to avoid this situation.
3616         *
3617         * Testing indicates that a cnt_val of 8192 is not sufficient,
3618         * but no failures are seen with 4096.  We choose a value of
3619         * 400 to give a safety factor of 10.
3620         */
3621        if (OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN56XX)) {
3622                union cvmx_iob_n2c_l2c_pri_cnt pri_cnt;
3623
3624                pri_cnt.u64 = 0;
3625                pri_cnt.s.cnt_enb = 1;
3626                pri_cnt.s.cnt_val = 400;
3627                cvmx_write_csr(CVMX_IOB_N2C_L2C_PRI_CNT, pri_cnt.u64);
3628        }
3629
3630        hcd = usb_create_hcd(&octeon_hc_driver, dev, dev_name(dev));
3631        if (!hcd) {
3632                dev_dbg(dev, "Failed to allocate memory for HCD\n");
3633                return -1;
3634        }
3635        hcd->uses_new_polling = 1;
3636        usb = (struct octeon_hcd *)hcd->hcd_priv;
3637
3638        spin_lock_init(&usb->lock);
3639
3640        usb->init_flags = initialize_flags;
3641
3642        /* Initialize the USB state structure */
3643        usb->index = usb_num;
3644        INIT_LIST_HEAD(&usb->idle_pipes);
3645        for (i = 0; i < ARRAY_SIZE(usb->active_pipes); i++)
3646                INIT_LIST_HEAD(&usb->active_pipes[i]);
3647
3648        /* Due to an errata, CN31XX doesn't support DMA */
3649        if (OCTEON_IS_MODEL(OCTEON_CN31XX)) {
3650                usb->init_flags |= CVMX_USB_INITIALIZE_FLAGS_NO_DMA;
3651                /* Only use one channel with non DMA */
3652                usb->idle_hardware_channels = 0x1;
3653        } else if (OCTEON_IS_MODEL(OCTEON_CN5XXX)) {
3654                /* CN5XXX have an errata with channel 3 */
3655                usb->idle_hardware_channels = 0xf7;
3656        } else {
3657                usb->idle_hardware_channels = 0xff;
3658        }
3659
3660        status = cvmx_usb_initialize(dev, usb);
3661        if (status) {
3662                dev_dbg(dev, "USB initialization failed with %d\n", status);
3663                kfree(hcd);
3664                return -1;
3665        }
3666
3667        status = usb_add_hcd(hcd, irq, 0);
3668        if (status) {
3669                dev_dbg(dev, "USB add HCD failed with %d\n", status);
3670                kfree(hcd);
3671                return -1;
3672        }
3673        device_wakeup_enable(hcd->self.controller);
3674
3675        dev_info(dev, "Registered HCD for port %d on irq %d\n", usb_num, irq);
3676
3677        return 0;
3678}
3679
3680static int octeon_usb_remove(struct platform_device *pdev)
3681{
3682        int status;
3683        struct device *dev = &pdev->dev;
3684        struct usb_hcd *hcd = dev_get_drvdata(dev);
3685        struct octeon_hcd *usb = hcd_to_octeon(hcd);
3686        unsigned long flags;
3687
3688        usb_remove_hcd(hcd);
3689        spin_lock_irqsave(&usb->lock, flags);
3690        status = cvmx_usb_shutdown(usb);
3691        spin_unlock_irqrestore(&usb->lock, flags);
3692        if (status)
3693                dev_dbg(dev, "USB shutdown failed with %d\n", status);
3694
3695        kfree(hcd);
3696
3697        return 0;
3698}
3699
3700static const struct of_device_id octeon_usb_match[] = {
3701        {
3702                .compatible = "cavium,octeon-5750-usbc",
3703        },
3704        {},
3705};
3706MODULE_DEVICE_TABLE(of, octeon_usb_match);
3707
3708static struct platform_driver octeon_usb_driver = {
3709        .driver = {
3710                .name           = "octeon-hcd",
3711                .of_match_table = octeon_usb_match,
3712        },
3713        .probe      = octeon_usb_probe,
3714        .remove     = octeon_usb_remove,
3715};
3716
3717static int __init octeon_usb_driver_init(void)
3718{
3719        if (usb_disabled())
3720                return 0;
3721
3722        return platform_driver_register(&octeon_usb_driver);
3723}
3724module_init(octeon_usb_driver_init);
3725
3726static void __exit octeon_usb_driver_exit(void)
3727{
3728        if (usb_disabled())
3729                return;
3730
3731        platform_driver_unregister(&octeon_usb_driver);
3732}
3733module_exit(octeon_usb_driver_exit);
3734
3735MODULE_LICENSE("GPL");
3736MODULE_AUTHOR("Cavium, Inc. <support@cavium.com>");
3737MODULE_DESCRIPTION("Cavium Inc. OCTEON USB Host driver.");
3738
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