linux/drivers/staging/emxx_udc/emxx_udc.c
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   1/*
   2 *  drivers/usb/gadget/emxx_udc.c
   3 *     EMXX FCD (Function Controller Driver) for USB.
   4 *
   5 *  Copyright (C) 2010 Renesas Electronics Corporation
   6 *
   7 *  This program is free software; you can redistribute it and/or modify
   8 *  it under the terms of the GNU General Public License version 2
   9 *  as published by the Free Software Foundation.
  10 *
  11 *  This program is distributed in the hope that it will be useful,
  12 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14 *  GNU General Public License for more details.
  15 *
  16 *  You should have received a copy of the GNU General Public License
  17 *  along with this program; if not, write to the Free Software Foundation,
  18 *  Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA.
  19 */
  20
  21#include <linux/kernel.h>
  22#include <linux/module.h>
  23#include <linux/platform_device.h>
  24#include <linux/delay.h>
  25#include <linux/ioport.h>
  26#include <linux/slab.h>
  27#include <linux/errno.h>
  28#include <linux/init.h>
  29#include <linux/list.h>
  30#include <linux/interrupt.h>
  31#include <linux/proc_fs.h>
  32#include <linux/clk.h>
  33#include <linux/ctype.h>
  34#include <linux/string.h>
  35#include <linux/dma-mapping.h>
  36#include <linux/workqueue.h>
  37#include <linux/device.h>
  38
  39#include <linux/usb/ch9.h>
  40#include <linux/usb/gadget.h>
  41
  42#include <linux/irq.h>
  43#include <linux/gpio.h>
  44
  45#include "emxx_udc.h"
  46
  47#define DRIVER_DESC     "EMXX UDC driver"
  48#define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  49
  50static const char       driver_name[] = "emxx_udc";
  51static const char       driver_desc[] = DRIVER_DESC;
  52
  53/*===========================================================================*/
  54/* Prototype */
  55static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *, struct nbu2ss_ep *);
  56static void _nbu2ss_ep0_enable(struct nbu2ss_udc *);
  57/*static void _nbu2ss_ep0_disable(struct nbu2ss_udc *);*/
  58static void _nbu2ss_ep_done(struct nbu2ss_ep *, struct nbu2ss_req *, int);
  59static void _nbu2ss_set_test_mode(struct nbu2ss_udc *, u32 mode);
  60static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs);
  61
  62static int _nbu2ss_pullup(struct nbu2ss_udc *, int);
  63static void _nbu2ss_fifo_flush(struct nbu2ss_udc *, struct nbu2ss_ep *);
  64
  65/*===========================================================================*/
  66/* Macro */
  67#define _nbu2ss_zero_len_pkt(udc, epnum)        \
  68        _nbu2ss_ep_in_end(udc, epnum, 0, 0)
  69
  70
  71/*===========================================================================*/
  72/* Global */
  73struct nbu2ss_udc udc_controller;
  74
  75
  76/*-------------------------------------------------------------------------*/
  77/* Read */
  78static inline u32 _nbu2ss_readl(void *address)
  79{
  80        return __raw_readl(address);
  81}
  82
  83/*-------------------------------------------------------------------------*/
  84/* Write */
  85static inline void _nbu2ss_writel(void *address, u32 udata)
  86{
  87        __raw_writel(udata, address);
  88}
  89
  90/*-------------------------------------------------------------------------*/
  91/* Set Bit */
  92static inline void _nbu2ss_bitset(void *address, u32 udata)
  93{
  94        u32     reg_dt = __raw_readl(address) | (udata);
  95
  96        __raw_writel(reg_dt, address);
  97}
  98
  99/*-------------------------------------------------------------------------*/
 100/* Clear Bit */
 101static inline void _nbu2ss_bitclr(void *address, u32 udata)
 102{
 103        u32     reg_dt = __raw_readl(address) & ~(udata);
 104
 105        __raw_writel(reg_dt, address);
 106}
 107
 108#ifdef UDC_DEBUG_DUMP
 109/*-------------------------------------------------------------------------*/
 110static void _nbu2ss_dump_register(struct nbu2ss_udc *udc)
 111{
 112        int             i;
 113        u32 reg_data;
 114
 115        pr_info("=== %s()\n", __func__);
 116
 117        if (udc == NULL) {
 118                ERR("%s udc == NULL\n", __func__);
 119                return;
 120        }
 121
 122        spin_unlock(&udc->lock);
 123
 124        dev_dbg(&udc->dev, "\n-USB REG-\n");
 125        for (i = 0x0 ; i < USB_BASE_SIZE ; i += 16) {
 126                reg_data =   _nbu2ss_readl(
 127                        (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i));
 128                dev_dbg(&udc->dev, "USB%04x =%08x", i, (int)reg_data);
 129
 130                reg_data =  _nbu2ss_readl(
 131                        (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 4));
 132                dev_dbg(&udc->dev, " %08x", (int)reg_data);
 133
 134                reg_data =  _nbu2ss_readl(
 135                        (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 8));
 136                dev_dbg(&udc->dev, " %08x", (int)reg_data);
 137
 138                reg_data =  _nbu2ss_readl(
 139                        (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 12));
 140                dev_dbg(&udc->dev, " %08x\n", (int)reg_data);
 141
 142        }
 143
 144        spin_lock(&udc->lock);
 145}
 146#endif /* UDC_DEBUG_DUMP */
 147
 148/*-------------------------------------------------------------------------*/
 149/* Endpoint 0 Callback (Complete) */
 150static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req)
 151{
 152        u8              recipient;
 153        u16             selector;
 154        u32             test_mode;
 155        struct usb_ctrlrequest  *p_ctrl;
 156        struct nbu2ss_udc *udc;
 157
 158        if ((_ep == NULL) || (_req == NULL))
 159                return;
 160
 161        udc = (struct nbu2ss_udc *)_req->context;
 162        p_ctrl = &udc->ctrl;
 163        if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
 164
 165                if (p_ctrl->bRequest == USB_REQ_SET_FEATURE) {
 166                        /*-------------------------------------------------*/
 167                        /* SET_FEATURE */
 168                        recipient = (u8)(p_ctrl->bRequestType & USB_RECIP_MASK);
 169                        selector  = p_ctrl->wValue;
 170                        if ((recipient == USB_RECIP_DEVICE) &&
 171                                (selector == USB_DEVICE_TEST_MODE)) {
 172                                test_mode = (u32)(p_ctrl->wIndex >> 8);
 173                                _nbu2ss_set_test_mode(udc, test_mode);
 174                        }
 175                }
 176        }
 177}
 178
 179/*-------------------------------------------------------------------------*/
 180/* Initialization usb_request */
 181static void _nbu2ss_create_ep0_packet(
 182        struct nbu2ss_udc *udc,
 183        void *p_buf,
 184        unsigned length
 185)
 186{
 187        udc->ep0_req.req.buf            = p_buf;
 188        udc->ep0_req.req.length         = length;
 189        udc->ep0_req.req.dma            = 0;
 190        udc->ep0_req.req.zero           = TRUE;
 191        udc->ep0_req.req.complete       = _nbu2ss_ep0_complete;
 192        udc->ep0_req.req.status         = -EINPROGRESS;
 193        udc->ep0_req.req.context        = udc;
 194        udc->ep0_req.req.actual         = 0;
 195}
 196
 197/*-------------------------------------------------------------------------*/
 198/* Acquisition of the first address of RAM(FIFO) */
 199static u32 _nbu2ss_get_begin_ram_address(struct nbu2ss_udc *udc)
 200{
 201        u32             num, buf_type;
 202        u32             data, last_ram_adr, use_ram_size;
 203
 204        PT_EP_REGS      p_ep_regs;
 205
 206        last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
 207        use_ram_size = 0;
 208
 209        for (num = 0; num < NUM_ENDPOINTS - 1; num++) {
 210                p_ep_regs = &udc->p_regs->EP_REGS[num];
 211                data = _nbu2ss_readl(&p_ep_regs->EP_PCKT_ADRS);
 212                buf_type = _nbu2ss_readl(&p_ep_regs->EP_CONTROL) & EPn_BUF_TYPE;
 213                if (buf_type == 0) {
 214                        /* Single Buffer */
 215                        use_ram_size += (data & EPn_MPKT) / sizeof(u32);
 216                } else {
 217                        /* Double Buffer */
 218                        use_ram_size += ((data & EPn_MPKT) / sizeof(u32)) * 2;
 219                }
 220
 221                if ((data >> 16) > last_ram_adr)
 222                        last_ram_adr = data>>16;
 223        }
 224
 225        return last_ram_adr + use_ram_size;
 226}
 227
 228/*-------------------------------------------------------------------------*/
 229/* Construction of Endpoint */
 230static int _nbu2ss_ep_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 231{
 232        u32             num;
 233        u32             data;
 234        u32             begin_adrs;
 235
 236        if (ep->epnum == 0)
 237                return  -EINVAL;
 238
 239        num = ep->epnum - 1;
 240
 241        /*-------------------------------------------------------------*/
 242        /* RAM Transfer Address */
 243        begin_adrs = _nbu2ss_get_begin_ram_address(udc);
 244        data = (begin_adrs << 16) | ep->ep.maxpacket;
 245        _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);
 246
 247        /*-------------------------------------------------------------*/
 248        /* Interrupt Enable */
 249        data = 1 << (ep->epnum + 8);
 250        _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data);
 251
 252        /*-------------------------------------------------------------*/
 253        /* Endpoint Type(Mode) */
 254        /*   Bulk, Interrupt, ISO */
 255        switch (ep->ep_type) {
 256        case USB_ENDPOINT_XFER_BULK:
 257                data = EPn_BULK;
 258                break;
 259
 260        case USB_ENDPOINT_XFER_INT:
 261                data = EPn_BUF_SINGLE | EPn_INTERRUPT;
 262                break;
 263
 264        case USB_ENDPOINT_XFER_ISOC:
 265                data = EPn_ISO;
 266                break;
 267
 268        default:
 269                data = 0;
 270                break;
 271        }
 272
 273        _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 274        _nbu2ss_endpoint_toggle_reset(udc, (ep->epnum|ep->direct));
 275
 276        if (ep->direct == USB_DIR_OUT) {
 277                /*---------------------------------------------------------*/
 278                /* OUT */
 279                data = EPn_EN | EPn_BCLR | EPn_DIR0;
 280                _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 281
 282                data = (EPn_ONAK | EPn_OSTL_EN | EPn_OSTL);
 283                _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 284
 285                data = (EPn_OUT_EN | EPn_OUT_END_EN);
 286                _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 287        } else {
 288                /*---------------------------------------------------------*/
 289                /* IN */
 290                data = (EPn_EN | EPn_BCLR | EPn_AUTO);
 291                _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 292
 293                data = (EPn_ISTL);
 294                _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 295
 296                data = (EPn_IN_EN | EPn_IN_END_EN);
 297                _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 298        }
 299
 300        return 0;
 301}
 302
 303/*-------------------------------------------------------------------------*/
 304/* Release of Endpoint */
 305static int _nbu2ss_epn_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 306{
 307        u32             num;
 308        u32             data;
 309
 310        if ((ep->epnum == 0) || (udc->vbus_active == 0))
 311                return  -EINVAL;
 312
 313        num = ep->epnum - 1;
 314
 315        /*-------------------------------------------------------------*/
 316        /* RAM Transfer Address */
 317        _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);
 318
 319        /*-------------------------------------------------------------*/
 320        /* Interrupt Disable */
 321        data = 1 << (ep->epnum + 8);
 322        _nbu2ss_bitclr(&udc->p_regs->USB_INT_ENA, data);
 323
 324        if (ep->direct == USB_DIR_OUT) {
 325                /*---------------------------------------------------------*/
 326                /* OUT */
 327                data = EPn_ONAK | EPn_BCLR;
 328                _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 329
 330                data = EPn_EN | EPn_DIR0;
 331                _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 332
 333                data = EPn_OUT_EN | EPn_OUT_END_EN;
 334                _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 335        } else {
 336                /*---------------------------------------------------------*/
 337                /* IN */
 338                data = EPn_BCLR;
 339                _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 340
 341                data = EPn_EN | EPn_AUTO;
 342                _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 343
 344                data = EPn_IN_EN | EPn_IN_END_EN;
 345                _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 346        }
 347
 348        return 0;
 349}
 350
 351/*-------------------------------------------------------------------------*/
 352/* DMA setting (without Endpoint 0) */
 353static void _nbu2ss_ep_dma_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 354{
 355        u32             num;
 356        u32             data;
 357
 358        data = _nbu2ss_readl(&udc->p_regs->USBSSCONF);
 359        if (((ep->epnum == 0) || (data & (1 << ep->epnum)) == 0))
 360                return;         /* Not Support DMA */
 361
 362        num = ep->epnum - 1;
 363
 364        if (ep->direct == USB_DIR_OUT) {
 365                /*---------------------------------------------------------*/
 366                /* OUT */
 367                data = ep->ep.maxpacket;
 368                _nbu2ss_writel(&udc->p_regs->EP_DCR[num].EP_DCR2, data);
 369
 370                /*---------------------------------------------------------*/
 371                /* Transfer Direct */
 372                data = DCR1_EPn_DIR0;
 373                _nbu2ss_bitset(&udc->p_regs->EP_DCR[num].EP_DCR1, data);
 374
 375                /*---------------------------------------------------------*/
 376                /* DMA Mode etc. */
 377                data = EPn_STOP_MODE | EPn_STOP_SET  | EPn_DMAMODE0;
 378                _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
 379        } else {
 380                /*---------------------------------------------------------*/
 381                /* IN */
 382                _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 383
 384                /*---------------------------------------------------------*/
 385                /* DMA Mode etc. */
 386                data = EPn_BURST_SET | EPn_DMAMODE0;
 387                _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
 388        }
 389}
 390
 391/*-------------------------------------------------------------------------*/
 392/* DMA setting release */
 393static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 394{
 395        u32             num;
 396        u32             data;
 397        PT_FC_REGS      preg = udc->p_regs;
 398
 399        if (udc->vbus_active == 0)
 400                return;         /* VBUS OFF */
 401
 402        data = _nbu2ss_readl(&preg->USBSSCONF);
 403        if ((ep->epnum == 0) || ((data & (1 << ep->epnum)) == 0))
 404                return;         /* Not Support DMA */
 405
 406        num = ep->epnum - 1;
 407
 408        _nbu2ss_ep_dma_abort(udc, ep);
 409
 410        if (ep->direct == USB_DIR_OUT) {
 411                /*---------------------------------------------------------*/
 412                /* OUT */
 413                _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, 0);
 414                _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_DIR0);
 415                _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
 416        } else {
 417                /*---------------------------------------------------------*/
 418                /* IN */
 419                _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 420                _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
 421        }
 422}
 423
 424/*-------------------------------------------------------------------------*/
 425/* Abort DMA */
 426static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 427{
 428        PT_FC_REGS      preg = udc->p_regs;
 429
 430        _nbu2ss_bitclr(&preg->EP_DCR[ep->epnum-1].EP_DCR1, DCR1_EPn_REQEN);
 431        mdelay(DMA_DISABLE_TIME);       /* DCR1_EPn_REQEN Clear */
 432        _nbu2ss_bitclr(&preg->EP_REGS[ep->epnum-1].EP_DMA_CTRL, EPn_DMA_EN);
 433}
 434
 435/*-------------------------------------------------------------------------*/
 436/* Start IN Transfer */
 437static void _nbu2ss_ep_in_end(
 438        struct nbu2ss_udc *udc,
 439        u32 epnum,
 440        u32 data32,
 441        u32 length
 442)
 443{
 444        u32             data;
 445        u32             num;
 446        PT_FC_REGS      preg = udc->p_regs;
 447
 448        if (length >= sizeof(u32))
 449                return;
 450
 451        if (epnum == 0) {
 452                _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_AUTO);
 453
 454                /* Writing of 1-4 bytes */
 455                if (length)
 456                        _nbu2ss_writel(&preg->EP0_WRITE, data32);
 457
 458                data = ((length << 5) & EP0_DW) | EP0_DEND;
 459                _nbu2ss_writel(&preg->EP0_CONTROL, data);
 460
 461                _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_AUTO);
 462        } else {
 463                num = epnum - 1;
 464
 465                _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 466
 467                /* Writing of 1-4 bytes */
 468                if (length)
 469                        _nbu2ss_writel(&preg->EP_REGS[num].EP_WRITE, data32);
 470
 471                data = (((((u32)length) << 5) & EPn_DW) | EPn_DEND);
 472                _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
 473
 474                _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 475        }
 476}
 477
 478#ifdef USE_DMA
 479/*-------------------------------------------------------------------------*/
 480static void _nbu2ss_dma_map_single(
 481        struct nbu2ss_udc *udc,
 482        struct nbu2ss_ep *ep,
 483        struct nbu2ss_req *req,
 484        u8              direct
 485)
 486{
 487        if (req->req.dma == DMA_ADDR_INVALID) {
 488                if (req->unaligned)
 489                        req->req.dma = ep->phys_buf;
 490                else {
 491                        req->req.dma = dma_map_single(
 492                                udc->gadget.dev.parent,
 493                                req->req.buf,
 494                                req->req.length,
 495                                (direct == USB_DIR_IN)
 496                                ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 497                }
 498                req->mapped = 1;
 499        } else {
 500                if (!req->unaligned)
 501                        dma_sync_single_for_device(
 502                                udc->gadget.dev.parent,
 503                                req->req.dma,
 504                                req->req.length,
 505                                (direct == USB_DIR_IN)
 506                                ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 507
 508                req->mapped = 0;
 509        }
 510}
 511
 512/*-------------------------------------------------------------------------*/
 513static void _nbu2ss_dma_unmap_single(
 514        struct nbu2ss_udc *udc,
 515        struct nbu2ss_ep *ep,
 516        struct nbu2ss_req *req,
 517        u8              direct
 518)
 519{
 520        u8              data[4];
 521        u8              *p;
 522        u32             count = 0;
 523
 524        if (direct == USB_DIR_OUT) {
 525                count = req->req.actual % 4;
 526                if (count) {
 527                        p = req->req.buf;
 528                        p += (req->req.actual - count);
 529                        memcpy(data, p, count);
 530                }
 531        }
 532
 533        if (req->mapped) {
 534                if (req->unaligned) {
 535                        if (direct == USB_DIR_OUT)
 536                                memcpy(req->req.buf, ep->virt_buf,
 537                                        req->req.actual & 0xfffffffc);
 538                } else
 539                        dma_unmap_single(udc->gadget.dev.parent,
 540                                req->req.dma, req->req.length,
 541                                (direct == USB_DIR_IN)
 542                                ? DMA_TO_DEVICE
 543                                : DMA_FROM_DEVICE);
 544                req->req.dma = DMA_ADDR_INVALID;
 545                req->mapped = 0;
 546        } else {
 547                if (!req->unaligned)
 548                        dma_sync_single_for_cpu(udc->gadget.dev.parent,
 549                                req->req.dma, req->req.length,
 550                                (direct == USB_DIR_IN)
 551                                ? DMA_TO_DEVICE
 552                                : DMA_FROM_DEVICE);
 553        }
 554
 555        if (count) {
 556                p = req->req.buf;
 557                p += (req->req.actual - count);
 558                memcpy(p, data, count);
 559        }
 560}
 561#endif
 562
 563/*-------------------------------------------------------------------------*/
 564/* Endpoint 0 OUT Transfer (PIO) */
 565static int EP0_out_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
 566{
 567        u32             i;
 568        int             nret   = 0;
 569        u32             iWordLength = 0;
 570        USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
 571
 572        /*------------------------------------------------------------*/
 573        /* Read Length */
 574        iWordLength = length / sizeof(u32);
 575
 576        /*------------------------------------------------------------*/
 577        /* PIO Read */
 578        if (iWordLength) {
 579                for (i = 0; i < iWordLength; i++) {
 580                        pBuf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
 581                        pBuf32++;
 582                }
 583                nret = iWordLength * sizeof(u32);
 584        }
 585
 586        return nret;
 587}
 588
 589/*-------------------------------------------------------------------------*/
 590/* Endpoint 0 OUT Transfer (PIO, OverBytes) */
 591static int EP0_out_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
 592{
 593        u32             i;
 594        u32             iReadSize = 0;
 595        USB_REG_ACCESS  Temp32;
 596        USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
 597
 598        if ((0 < length) && (length < sizeof(u32))) {
 599                Temp32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
 600                for (i = 0 ; i < length ; i++)
 601                        pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
 602                iReadSize += length;
 603        }
 604
 605        return iReadSize;
 606}
 607
 608/*-------------------------------------------------------------------------*/
 609/* Endpoint 0 IN Transfer (PIO) */
 610static int EP0_in_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
 611{
 612        u32             i;
 613        u32             iMaxLength   = EP0_PACKETSIZE;
 614        u32             iWordLength  = 0;
 615        u32             iWriteLength = 0;
 616        USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
 617
 618        /*------------------------------------------------------------*/
 619        /* Transfer Length */
 620        if (iMaxLength < length)
 621                iWordLength = iMaxLength / sizeof(u32);
 622        else
 623                iWordLength = length / sizeof(u32);
 624
 625        /*------------------------------------------------------------*/
 626        /* PIO */
 627        for (i = 0; i < iWordLength; i++) {
 628                _nbu2ss_writel(&udc->p_regs->EP0_WRITE, pBuf32->dw);
 629                pBuf32++;
 630                iWriteLength += sizeof(u32);
 631        }
 632
 633        return iWriteLength;
 634}
 635
 636/*-------------------------------------------------------------------------*/
 637/* Endpoint 0 IN Transfer (PIO, OverBytes) */
 638static int EP0_in_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 iRemainSize)
 639{
 640        u32             i;
 641        USB_REG_ACCESS Temp32;
 642        USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
 643
 644        if ((0 < iRemainSize) && (iRemainSize < sizeof(u32))) {
 645                for (i = 0 ; i < iRemainSize ; i++)
 646                        Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
 647                _nbu2ss_ep_in_end(udc, 0, Temp32.dw, iRemainSize);
 648
 649                return iRemainSize;
 650        }
 651
 652        return 0;
 653}
 654
 655/*-------------------------------------------------------------------------*/
 656/* Transfer NULL Packet (Epndoint 0) */
 657static int EP0_send_NULL(struct nbu2ss_udc *udc, bool pid_flag)
 658{
 659        u32             data;
 660
 661        data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 662        data &= ~(u32)EP0_INAK;
 663
 664        if (pid_flag)
 665                data |= (EP0_INAK_EN | EP0_PIDCLR | EP0_DEND);
 666        else
 667                data |= (EP0_INAK_EN | EP0_DEND);
 668
 669        _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 670
 671        return 0;
 672}
 673
 674/*-------------------------------------------------------------------------*/
 675/* Receive NULL Packet (Endpoint 0) */
 676static int EP0_receive_NULL(struct nbu2ss_udc *udc, bool pid_flag)
 677{
 678        u32             data;
 679
 680        data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 681        data &= ~(u32)EP0_ONAK;
 682
 683        if (pid_flag)
 684                data |= EP0_PIDCLR;
 685
 686        _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 687
 688        return 0;
 689}
 690
 691/*-------------------------------------------------------------------------*/
 692static int _nbu2ss_ep0_in_transfer(
 693        struct nbu2ss_udc *udc,
 694        struct nbu2ss_ep *ep,
 695        struct nbu2ss_req *req
 696)
 697{
 698        u8              *pBuffer;                       /* IN Data Buffer */
 699        u32             data;
 700        u32             iRemainSize = 0;
 701        int             result = 0;
 702
 703        /*-------------------------------------------------------------*/
 704        /* End confirmation */
 705        if (req->req.actual == req->req.length) {
 706                if ((req->req.actual % EP0_PACKETSIZE) == 0) {
 707                        if (req->zero) {
 708                                req->zero = false;
 709                                EP0_send_NULL(udc, FALSE);
 710                                return 1;
 711                        }
 712                }
 713
 714                return 0;               /* Transfer End */
 715        }
 716
 717        /*-------------------------------------------------------------*/
 718        /* NAK release */
 719        data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 720        data |= EP0_INAK_EN;
 721        data &= ~(u32)EP0_INAK;
 722        _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 723
 724        iRemainSize = req->req.length - req->req.actual;
 725        pBuffer = (u8 *)req->req.buf;
 726        pBuffer += req->req.actual;
 727
 728        /*-------------------------------------------------------------*/
 729        /* Data transfer */
 730        result = EP0_in_PIO(udc, pBuffer, iRemainSize);
 731
 732        req->div_len = result;
 733        iRemainSize -= result;
 734
 735        if (iRemainSize == 0) {
 736                EP0_send_NULL(udc, FALSE);
 737                return result;
 738        }
 739
 740        if ((iRemainSize < sizeof(u32)) && (result != EP0_PACKETSIZE)) {
 741                pBuffer += result;
 742                result += EP0_in_OverBytes(udc, pBuffer, iRemainSize);
 743                req->div_len = result;
 744        }
 745
 746        return result;
 747}
 748
 749/*-------------------------------------------------------------------------*/
 750static int _nbu2ss_ep0_out_transfer(
 751        struct nbu2ss_udc *udc,
 752        struct nbu2ss_ep *ep,
 753        struct nbu2ss_req *req
 754)
 755{
 756        u8              *pBuffer;
 757        u32             iRemainSize;
 758        u32             iRecvLength;
 759        int             result = 0;
 760        int             fRcvZero;
 761
 762        /*-------------------------------------------------------------*/
 763        /* Receive data confirmation */
 764        iRecvLength = _nbu2ss_readl(&udc->p_regs->EP0_LENGTH) & EP0_LDATA;
 765        if (iRecvLength != 0) {
 766
 767                fRcvZero = 0;
 768
 769                iRemainSize = req->req.length - req->req.actual;
 770                pBuffer = (u8 *)req->req.buf;
 771                pBuffer += req->req.actual;
 772
 773                result = EP0_out_PIO(udc, pBuffer
 774                                        , min(iRemainSize, iRecvLength));
 775                if (result < 0)
 776                        return result;
 777
 778                req->req.actual += result;
 779                iRecvLength -= result;
 780
 781                if ((0 < iRecvLength) && (iRecvLength < sizeof(u32))) {
 782                        pBuffer += result;
 783                        iRemainSize -= result;
 784
 785                        result = EP0_out_OverBytes(udc, pBuffer
 786                                        , min(iRemainSize, iRecvLength));
 787                        req->req.actual += result;
 788                }
 789        } else {
 790                fRcvZero = 1;
 791        }
 792
 793        /*-------------------------------------------------------------*/
 794        /* End confirmation */
 795        if (req->req.actual == req->req.length) {
 796                if ((req->req.actual % EP0_PACKETSIZE) == 0) {
 797                        if (req->zero) {
 798                                req->zero = false;
 799                                EP0_receive_NULL(udc, FALSE);
 800                                return 1;
 801                        }
 802                }
 803
 804                return 0;               /* Transfer End */
 805        }
 806
 807        if ((req->req.actual % EP0_PACKETSIZE) != 0)
 808                return 0;               /* Short Packet Transfer End */
 809
 810        if (req->req.actual > req->req.length) {
 811                ERR(" *** Overrun Error\n");
 812                return -EOVERFLOW;
 813        }
 814
 815        if (fRcvZero != 0) {
 816                iRemainSize = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 817                if (iRemainSize & EP0_ONAK) {
 818                        /*---------------------------------------------------*/
 819                        /* NACK release */
 820                        _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_ONAK);
 821                }
 822                result = 1;
 823        }
 824
 825        return result;
 826}
 827
 828/*-------------------------------------------------------------------------*/
 829static int _nbu2ss_out_dma(
 830        struct nbu2ss_udc *udc,
 831        struct nbu2ss_req *req,
 832        u32             num,
 833        u32             length
 834)
 835{
 836        u8              *pBuffer;
 837        u32             mpkt;
 838        u32             lmpkt;
 839        u32             dmacnt;
 840        u32             burst = 1;
 841        u32             data;
 842        int             result = -EINVAL;
 843        PT_FC_REGS      preg = udc->p_regs;
 844
 845        if (req->dma_flag)
 846                return 1;               /* DMA is forwarded */
 847
 848        req->dma_flag = TRUE;
 849        pBuffer = (u8 *)req->req.dma;
 850        pBuffer += req->req.actual;
 851
 852        /* DMA Address */
 853        _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
 854
 855        /* Number of transfer packets */
 856        mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
 857        dmacnt = (length / mpkt);
 858        lmpkt = (length % mpkt) & ~(u32)0x03;
 859
 860        if (DMA_MAX_COUNT < dmacnt) {
 861                dmacnt = DMA_MAX_COUNT;
 862                lmpkt = 0;
 863        } else if (0 != lmpkt) {
 864                if (0 == dmacnt)
 865                        burst = 0;      /* Burst OFF */
 866                dmacnt++;
 867        }
 868
 869        data = mpkt | (lmpkt << 16);
 870        _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
 871
 872        data = ((dmacnt & 0xff) << 16) | DCR1_EPn_DIR0 | DCR1_EPn_REQEN;
 873        _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
 874
 875        if (0 == burst) {
 876                _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, 0);
 877                _nbu2ss_bitclr(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
 878        } else {
 879                _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT
 880                                , (dmacnt << 16));
 881                _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
 882        }
 883        _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
 884
 885        result = length & ~(u32)0x03;
 886        req->div_len = result;
 887
 888        return result;
 889}
 890
 891/*-------------------------------------------------------------------------*/
 892static int _nbu2ss_epn_out_pio(
 893        struct nbu2ss_udc *udc,
 894        struct nbu2ss_ep *ep,
 895        struct nbu2ss_req *req,
 896        u32             length
 897)
 898{
 899        u8              *pBuffer;
 900        u32             i;
 901        u32             data;
 902        u32             iWordLength;
 903        USB_REG_ACCESS  Temp32;
 904        USB_REG_ACCESS  *pBuf32;
 905        int             result = 0;
 906        PT_FC_REGS      preg = udc->p_regs;
 907
 908        if (req->dma_flag)
 909                return 1;               /* DMA is forwarded */
 910
 911        if (length == 0)
 912                return 0;
 913
 914        pBuffer = (u8 *)req->req.buf;
 915        pBuf32 = (USB_REG_ACCESS *)(pBuffer + req->req.actual);
 916
 917        iWordLength = length / sizeof(u32);
 918        if (iWordLength > 0) {
 919                /*---------------------------------------------------------*/
 920                /* Copy of every four bytes */
 921                for (i = 0; i < iWordLength; i++) {
 922                        pBuf32->dw =
 923                        _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_READ);
 924                        pBuf32++;
 925                }
 926                result = iWordLength * sizeof(u32);
 927        }
 928
 929        data = length - result;
 930        if (data > 0) {
 931                /*---------------------------------------------------------*/
 932                /* Copy of fraction byte */
 933                Temp32.dw = _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_READ);
 934                for (i = 0 ; i < data ; i++)
 935                        pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
 936                result += data;
 937        }
 938
 939        req->req.actual += result;
 940
 941        if ((req->req.actual == req->req.length)
 942                        || ((req->req.actual % ep->ep.maxpacket) != 0)) {
 943
 944                result = 0;
 945        }
 946
 947        return result;
 948}
 949
 950/*-------------------------------------------------------------------------*/
 951static int _nbu2ss_epn_out_data(
 952        struct nbu2ss_udc *udc,
 953        struct nbu2ss_ep *ep,
 954        struct nbu2ss_req *req,
 955        u32             data_size
 956)
 957{
 958        u32             num;
 959        u32             iBufSize;
 960        int             nret = 1;
 961
 962        if (ep->epnum == 0)
 963                return -EINVAL;
 964
 965        num = ep->epnum - 1;
 966
 967        iBufSize = min((req->req.length - req->req.actual), data_size);
 968
 969        if ((ep->ep_type != USB_ENDPOINT_XFER_INT)
 970                && (req->req.dma != 0)
 971                && (iBufSize  >= sizeof(u32))) {
 972                nret = _nbu2ss_out_dma(udc, req, num, iBufSize);
 973        } else {
 974                iBufSize = min_t(u32, iBufSize, ep->ep.maxpacket);
 975                nret = _nbu2ss_epn_out_pio(udc, ep, req, iBufSize);
 976        }
 977
 978        return nret;
 979}
 980
 981/*-------------------------------------------------------------------------*/
 982static int _nbu2ss_epn_out_transfer(
 983        struct nbu2ss_udc *udc,
 984        struct nbu2ss_ep *ep,
 985        struct nbu2ss_req *req
 986)
 987{
 988        u32             num;
 989        u32             iRecvLength;
 990        int             result = 1;
 991        PT_FC_REGS      preg = udc->p_regs;
 992
 993        if (ep->epnum == 0)
 994                return -EINVAL;
 995
 996        num = ep->epnum - 1;
 997
 998        /*-------------------------------------------------------------*/
 999        /* Receive Length */
1000        iRecvLength
1001                = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT) & EPn_LDATA;
1002
1003        if (iRecvLength != 0) {
1004                result = _nbu2ss_epn_out_data(udc, ep, req, iRecvLength);
1005                if (iRecvLength < ep->ep.maxpacket) {
1006                        if (iRecvLength == result) {
1007                                req->req.actual += result;
1008                                result = 0;
1009                        }
1010                }
1011        } else {
1012                if ((req->req.actual == req->req.length)
1013                        || ((req->req.actual % ep->ep.maxpacket) != 0)) {
1014
1015                        result = 0;
1016                }
1017        }
1018
1019        if (result == 0) {
1020                if ((req->req.actual % ep->ep.maxpacket) == 0) {
1021                        if (req->zero) {
1022                                req->zero = false;
1023                                return 1;
1024                        }
1025                }
1026        }
1027
1028        if (req->req.actual > req->req.length) {
1029                ERR(" *** Overrun Error\n");
1030                ERR(" *** actual = %d, length = %d\n",
1031                        req->req.actual, req->req.length);
1032                result = -EOVERFLOW;
1033        }
1034
1035        return result;
1036}
1037
1038/*-------------------------------------------------------------------------*/
1039static int _nbu2ss_in_dma(
1040        struct nbu2ss_udc *udc,
1041        struct nbu2ss_ep *ep,
1042        struct nbu2ss_req *req,
1043        u32             num,
1044        u32             length
1045)
1046{
1047        u8              *pBuffer;
1048        u32             mpkt;           /* MaxPacketSize */
1049        u32             lmpkt;          /* Last Packet Data Size */
1050        u32             dmacnt;         /* IN Data Size */
1051        u32             iWriteLength;
1052        u32             data;
1053        int             result = -EINVAL;
1054        PT_FC_REGS      preg = udc->p_regs;
1055
1056        if (req->dma_flag)
1057                return 1;               /* DMA is forwarded */
1058
1059#ifdef USE_DMA
1060        if (req->req.actual == 0)
1061                _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_IN);
1062#endif
1063        req->dma_flag = TRUE;
1064
1065        /* MAX Packet Size */
1066        mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
1067
1068        if ((DMA_MAX_COUNT * mpkt) < length)
1069                iWriteLength = DMA_MAX_COUNT * mpkt;
1070        else
1071                iWriteLength = length;
1072
1073        /*------------------------------------------------------------*/
1074        /* Number of transmission packets */
1075        if (mpkt < iWriteLength) {
1076                dmacnt = iWriteLength / mpkt;
1077                lmpkt  = (iWriteLength % mpkt) & ~(u32)0x3;
1078                if (lmpkt != 0)
1079                        dmacnt++;
1080                else
1081                        lmpkt = mpkt & ~(u32)0x3;
1082
1083        } else {
1084                dmacnt = 1;
1085                lmpkt  = iWriteLength & ~(u32)0x3;
1086        }
1087
1088        /* Packet setting */
1089        data = mpkt | (lmpkt << 16);
1090        _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
1091
1092        /* Address setting */
1093        pBuffer = (u8 *)req->req.dma;
1094        pBuffer += req->req.actual;
1095        _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
1096
1097        /* Packet and DMA setting */
1098        data = ((dmacnt & 0xff) << 16) | DCR1_EPn_REQEN;
1099        _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
1100
1101        /* Packet setting of EPC */
1102        data = dmacnt << 16;
1103        _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, data);
1104
1105        /*DMA setting of EPC */
1106        _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
1107
1108        result = iWriteLength & ~(u32)0x3;
1109        req->div_len = result;
1110
1111        return result;
1112}
1113
1114/*-------------------------------------------------------------------------*/
1115static int _nbu2ss_epn_in_pio(
1116        struct nbu2ss_udc *udc,
1117        struct nbu2ss_ep *ep,
1118        struct nbu2ss_req *req,
1119        u32             length
1120)
1121{
1122        u8              *pBuffer;
1123        u32             i;
1124        u32             data;
1125        u32             iWordLength;
1126        USB_REG_ACCESS  Temp32;
1127        USB_REG_ACCESS  *pBuf32 = NULL;
1128        int             result = 0;
1129        PT_FC_REGS      preg = udc->p_regs;
1130
1131        if (req->dma_flag)
1132                return 1;               /* DMA is forwarded */
1133
1134        if (length > 0) {
1135                pBuffer = (u8 *)req->req.buf;
1136                pBuf32 = (USB_REG_ACCESS *)(pBuffer + req->req.actual);
1137
1138                iWordLength = length / sizeof(u32);
1139                if (iWordLength > 0) {
1140                        for (i = 0; i < iWordLength; i++) {
1141                                _nbu2ss_writel(
1142                                        &preg->EP_REGS[ep->epnum-1].EP_WRITE
1143                                        , pBuf32->dw
1144                                );
1145
1146                                pBuf32++;
1147                        }
1148                        result = iWordLength * sizeof(u32);
1149                }
1150        }
1151
1152        if (result != ep->ep.maxpacket) {
1153                data = length - result;
1154                Temp32.dw = 0;
1155                for (i = 0 ; i < data ; i++)
1156                        Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
1157
1158                _nbu2ss_ep_in_end(udc, ep->epnum, Temp32.dw, data);
1159                result += data;
1160        }
1161
1162        req->div_len = result;
1163
1164        return result;
1165}
1166
1167/*-------------------------------------------------------------------------*/
1168static int _nbu2ss_epn_in_data(
1169        struct nbu2ss_udc *udc,
1170        struct nbu2ss_ep *ep,
1171        struct nbu2ss_req *req,
1172        u32             data_size
1173)
1174{
1175        u32             num;
1176        int             nret = 1;
1177
1178        if (ep->epnum == 0)
1179                return -EINVAL;
1180
1181        num = ep->epnum - 1;
1182
1183        if ((ep->ep_type != USB_ENDPOINT_XFER_INT)
1184                && (req->req.dma != 0)
1185                && (data_size >= sizeof(u32))) {
1186                nret = _nbu2ss_in_dma(udc, ep, req, num, data_size);
1187        } else {
1188                data_size = min_t(u32, data_size, ep->ep.maxpacket);
1189                nret = _nbu2ss_epn_in_pio(udc, ep, req, data_size);
1190        }
1191
1192        return nret;
1193}
1194
1195/*-------------------------------------------------------------------------*/
1196static int _nbu2ss_epn_in_transfer(
1197        struct nbu2ss_udc *udc,
1198        struct nbu2ss_ep *ep,
1199        struct nbu2ss_req *req
1200)
1201{
1202        u32             num;
1203        u32             iBufSize;
1204        int             result = 0;
1205        u32             status;
1206
1207        if (ep->epnum == 0)
1208                return -EINVAL;
1209
1210        num = ep->epnum - 1;
1211
1212        status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
1213
1214        /*-------------------------------------------------------------*/
1215        /* State confirmation of FIFO */
1216        if (req->req.actual == 0) {
1217                if ((status & EPn_IN_EMPTY) == 0)
1218                        return 1;       /* Not Empty */
1219
1220        } else {
1221                if ((status & EPn_IN_FULL) != 0)
1222                        return 1;       /* Not Empty */
1223        }
1224
1225        /*-------------------------------------------------------------*/
1226        /* Start tranfer */
1227        iBufSize = req->req.length - req->req.actual;
1228        if (iBufSize > 0)
1229                result = _nbu2ss_epn_in_data(udc, ep, req, iBufSize);
1230        else if (req->req.length == 0)
1231                _nbu2ss_zero_len_pkt(udc, ep->epnum);
1232
1233        return result;
1234}
1235
1236/*-------------------------------------------------------------------------*/
1237static int _nbu2ss_start_transfer(
1238        struct nbu2ss_udc *udc,
1239        struct nbu2ss_ep *ep,
1240        struct nbu2ss_req *req,
1241        bool    bflag)
1242{
1243        int             nret = -EINVAL;
1244
1245        req->dma_flag = FALSE;
1246        req->div_len = 0;
1247
1248        if (req->req.length == 0)
1249                req->zero = false;
1250        else {
1251                if ((req->req.length % ep->ep.maxpacket) == 0)
1252                        req->zero = req->req.zero;
1253                else
1254                        req->zero = false;
1255        }
1256
1257        if (ep->epnum == 0) {
1258                /* EP0 */
1259                switch (udc->ep0state) {
1260                case EP0_IN_DATA_PHASE:
1261                        nret = _nbu2ss_ep0_in_transfer(udc, ep, req);
1262                        break;
1263
1264                case EP0_OUT_DATA_PHASE:
1265                        nret = _nbu2ss_ep0_out_transfer(udc, ep, req);
1266                        break;
1267
1268                case EP0_IN_STATUS_PHASE:
1269                        nret = EP0_send_NULL(udc, TRUE);
1270                        break;
1271
1272                default:
1273                        break;
1274                }
1275
1276        } else {
1277                /* EPn */
1278                if (ep->direct == USB_DIR_OUT) {
1279                        /* OUT */
1280                        if (bflag == FALSE)
1281                                nret = _nbu2ss_epn_out_transfer(udc, ep, req);
1282                } else {
1283                        /* IN */
1284                        nret = _nbu2ss_epn_in_transfer(udc, ep, req);
1285                }
1286        }
1287
1288        return nret;
1289}
1290
1291/*-------------------------------------------------------------------------*/
1292static void _nbu2ss_restert_transfer(struct nbu2ss_ep *ep)
1293{
1294        u32             length;
1295        bool    bflag = FALSE;
1296        struct nbu2ss_req *req;
1297
1298        if (list_empty(&ep->queue))
1299                req = NULL;
1300        else
1301                req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
1302
1303        if (req == NULL)
1304                return;
1305
1306        if (ep->epnum > 0) {
1307                length = _nbu2ss_readl(
1308                        &ep->udc->p_regs->EP_REGS[ep->epnum-1].EP_LEN_DCNT);
1309
1310                length &= EPn_LDATA;
1311                if (length < ep->ep.maxpacket)
1312                        bflag = TRUE;
1313        }
1314
1315        _nbu2ss_start_transfer(ep->udc, ep, req, bflag);
1316}
1317
1318/*-------------------------------------------------------------------------*/
1319/*      Endpoint Toggle Reset */
1320static void _nbu2ss_endpoint_toggle_reset(
1321        struct nbu2ss_udc *udc,
1322        u8 ep_adrs)
1323{
1324        u8              num;
1325        u32             data;
1326
1327        if ((ep_adrs == 0) || (ep_adrs == 0x80))
1328                return;
1329
1330        num = (ep_adrs & 0x7F) - 1;
1331
1332        if (ep_adrs & USB_DIR_IN)
1333                data = EPn_IPIDCLR;
1334        else
1335                data = EPn_BCLR | EPn_OPIDCLR;
1336
1337        _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
1338}
1339
1340/*-------------------------------------------------------------------------*/
1341/*      Endpoint STALL set */
1342static void _nbu2ss_set_endpoint_stall(
1343        struct nbu2ss_udc *udc,
1344        u8 ep_adrs,
1345        bool bstall)
1346{
1347        u8              num, epnum;
1348        u32             data;
1349        struct nbu2ss_ep *ep;
1350        PT_FC_REGS      preg = udc->p_regs;
1351
1352        if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
1353                if (bstall) {
1354                        /* Set STALL */
1355                        _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_STL);
1356                } else {
1357                        /* Clear STALL */
1358                        _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_STL);
1359                }
1360        } else {
1361                epnum = ep_adrs & USB_ENDPOINT_NUMBER_MASK;
1362                num = epnum - 1;
1363                ep = &udc->ep[epnum];
1364
1365                if (bstall) {
1366                        /* Set STALL */
1367                        ep->halted = TRUE;
1368
1369                        if (ep_adrs & USB_DIR_IN)
1370                                data = EPn_BCLR | EPn_ISTL;
1371                        else
1372                                data = EPn_OSTL_EN | EPn_OSTL;
1373
1374                        _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
1375                } else {
1376                        /* Clear STALL */
1377                        ep->stalled = FALSE;
1378                        if (ep_adrs & USB_DIR_IN) {
1379                                _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
1380                                                , EPn_ISTL);
1381                        } else {
1382                                data =
1383                                _nbu2ss_readl(&preg->EP_REGS[num].EP_CONTROL);
1384
1385                                data &= ~EPn_OSTL;
1386                                data |= EPn_OSTL_EN;
1387
1388                                _nbu2ss_writel(&preg->EP_REGS[num].EP_CONTROL
1389                                                , data);
1390                        }
1391
1392                        ep->stalled = FALSE;
1393                        if (ep->halted) {
1394                                ep->halted = FALSE;
1395                                _nbu2ss_restert_transfer(ep);
1396                        }
1397                }
1398        }
1399}
1400
1401
1402/*-------------------------------------------------------------------------*/
1403/* Device Descriptor */
1404static struct usb_device_descriptor device_desc = {
1405        .bLength              = sizeof(device_desc),
1406        .bDescriptorType      = USB_DT_DEVICE,
1407        .bcdUSB               = cpu_to_le16(0x0200),
1408        .bDeviceClass         = USB_CLASS_VENDOR_SPEC,
1409        .bDeviceSubClass      = 0x00,
1410        .bDeviceProtocol      = 0x00,
1411        .bMaxPacketSize0      = 64,
1412        .idVendor             = cpu_to_le16(0x0409),
1413        .idProduct            = cpu_to_le16(0xfff0),
1414        .bcdDevice            = 0xffff,
1415        .iManufacturer        = 0x00,
1416        .iProduct             = 0x00,
1417        .iSerialNumber        = 0x00,
1418        .bNumConfigurations   = 0x01,
1419};
1420
1421/*-------------------------------------------------------------------------*/
1422static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode)
1423{
1424        u32             data;
1425
1426        if (mode > MAX_TEST_MODE_NUM)
1427                return;
1428
1429        pr_info("SET FEATURE : test mode = %d\n", mode);
1430
1431        data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
1432        data &= ~TEST_FORCE_ENABLE;
1433        data |= mode << TEST_MODE_SHIFT;
1434
1435        _nbu2ss_writel(&udc->p_regs->USB_CONTROL, data);
1436        _nbu2ss_bitset(&udc->p_regs->TEST_CONTROL, CS_TESTMODEEN);
1437}
1438
1439/*-------------------------------------------------------------------------*/
1440static int _nbu2ss_set_feature_device(
1441        struct nbu2ss_udc *udc,
1442        u16 selector,
1443        u16 wIndex
1444)
1445{
1446        int     result = -EOPNOTSUPP;
1447
1448        switch (selector) {
1449        case USB_DEVICE_REMOTE_WAKEUP:
1450                if (0x0000 == wIndex) {
1451                        udc->remote_wakeup = U2F_ENABLE;
1452                        result = 0;
1453                }
1454                break;
1455
1456        case USB_DEVICE_TEST_MODE:
1457                wIndex = wIndex >> 8;
1458                if (wIndex <= MAX_TEST_MODE_NUM)
1459                        result = 0;
1460                break;
1461
1462        default:
1463                break;
1464        }
1465
1466        return result;
1467}
1468
1469/*-------------------------------------------------------------------------*/
1470static int _nbu2ss_get_ep_stall(struct nbu2ss_udc *udc, u8 ep_adrs)
1471{
1472        u8              epnum;
1473        u32             data = 0, bit_data;
1474        PT_FC_REGS      preg = udc->p_regs;
1475
1476        epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
1477        if (epnum == 0) {
1478                data = _nbu2ss_readl(&preg->EP0_CONTROL);
1479                bit_data = EP0_STL;
1480
1481        } else {
1482                data = _nbu2ss_readl(&preg->EP_REGS[epnum-1].EP_CONTROL);
1483                if ((data & EPn_EN) == 0)
1484                        return -1;
1485
1486                if (ep_adrs & USB_ENDPOINT_DIR_MASK)
1487                        bit_data = EPn_ISTL;
1488                else
1489                        bit_data = EPn_OSTL;
1490        }
1491
1492        if ((data & bit_data) == 0)
1493                return 0;
1494        return 1;
1495}
1496
1497/*-------------------------------------------------------------------------*/
1498static inline int _nbu2ss_req_feature(struct nbu2ss_udc *udc, bool bset)
1499{
1500        u8      recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1501        u8      direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1502        u16     selector  = udc->ctrl.wValue;
1503        u16     wIndex    = udc->ctrl.wIndex;
1504        u8      ep_adrs;
1505        int     result = -EOPNOTSUPP;
1506
1507        if ((0x0000 != udc->ctrl.wLength) ||
1508                        (USB_DIR_OUT != direction)) {
1509                return -EINVAL;
1510        }
1511
1512        switch (recipient) {
1513        case USB_RECIP_DEVICE:
1514                if (bset)
1515                        result =
1516                        _nbu2ss_set_feature_device(udc, selector, wIndex);
1517                break;
1518
1519        case USB_RECIP_ENDPOINT:
1520                if (0x0000 == (wIndex & 0xFF70)) {
1521                        if (USB_ENDPOINT_HALT == selector) {
1522                                ep_adrs = wIndex & 0xFF;
1523                                if (bset == FALSE) {
1524                                        _nbu2ss_endpoint_toggle_reset(
1525                                                udc, ep_adrs);
1526                                }
1527
1528                                _nbu2ss_set_endpoint_stall(
1529                                        udc, ep_adrs, bset);
1530
1531                                result = 0;
1532                        }
1533                }
1534                break;
1535
1536        default:
1537                break;
1538        }
1539
1540        if (result >= 0)
1541                _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1542
1543        return result;
1544}
1545
1546/*-------------------------------------------------------------------------*/
1547static inline enum usb_device_speed _nbu2ss_get_speed(struct nbu2ss_udc *udc)
1548{
1549        u32             data;
1550        enum usb_device_speed speed = USB_SPEED_FULL;
1551
1552        data = _nbu2ss_readl(&udc->p_regs->USB_STATUS);
1553        if (data & HIGH_SPEED)
1554                speed = USB_SPEED_HIGH;
1555
1556        return speed;
1557}
1558
1559/*-------------------------------------------------------------------------*/
1560static void _nbu2ss_epn_set_stall(
1561        struct nbu2ss_udc *udc,
1562        struct nbu2ss_ep *ep
1563)
1564{
1565        u8      ep_adrs;
1566        u32     regdata;
1567        int     limit_cnt = 0;
1568
1569        PT_FC_REGS      preg = udc->p_regs;
1570
1571        if (ep->direct == USB_DIR_IN) {
1572                for (limit_cnt = 0
1573                        ; limit_cnt < IN_DATA_EMPTY_COUNT
1574                        ; limit_cnt++) {
1575
1576                        regdata = _nbu2ss_readl(
1577                                &preg->EP_REGS[ep->epnum-1].EP_STATUS);
1578
1579                        if ((regdata & EPn_IN_DATA) == 0)
1580                                break;
1581
1582                        mdelay(1);
1583                }
1584        }
1585
1586        ep_adrs = ep->epnum | ep->direct;
1587        _nbu2ss_set_endpoint_stall(udc, ep_adrs, 1);
1588}
1589
1590/*-------------------------------------------------------------------------*/
1591static int std_req_get_status(struct nbu2ss_udc *udc)
1592{
1593        u32     length;
1594        u16     status_data = 0;
1595        u8      recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1596        u8      direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1597        u8      ep_adrs;
1598        int     result = -EINVAL;
1599
1600        if ((0x0000 != udc->ctrl.wValue)
1601                || (USB_DIR_IN != direction)) {
1602
1603                return result;
1604        }
1605
1606        length = min_t(u16, udc->ctrl.wLength, sizeof(status_data));
1607
1608        switch (recipient) {
1609        case USB_RECIP_DEVICE:
1610                if (udc->ctrl.wIndex == 0x0000) {
1611                        if (udc->self_powered)
1612                                status_data |= (1 << USB_DEVICE_SELF_POWERED);
1613
1614                        if (udc->remote_wakeup)
1615                                status_data |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1616
1617                        result = 0;
1618                }
1619                break;
1620
1621        case USB_RECIP_ENDPOINT:
1622                if (0x0000 == (udc->ctrl.wIndex & 0xFF70)) {
1623                        ep_adrs = (u8)(udc->ctrl.wIndex & 0xFF);
1624                        result = _nbu2ss_get_ep_stall(udc, ep_adrs);
1625
1626                        if (result > 0)
1627                                status_data |= (1 << USB_ENDPOINT_HALT);
1628                }
1629                break;
1630
1631        default:
1632                break;
1633        }
1634
1635        if (result >= 0) {
1636                memcpy(udc->ep0_buf, &status_data, length);
1637                _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, length);
1638                _nbu2ss_ep0_in_transfer(udc, &udc->ep[0], &udc->ep0_req);
1639
1640        } else {
1641                ERR("*** Error GET_STATUS\n");
1642        }
1643
1644        return result;
1645}
1646
1647/*-------------------------------------------------------------------------*/
1648static int std_req_clear_feature(struct nbu2ss_udc *udc)
1649{
1650        return _nbu2ss_req_feature(udc, FALSE);
1651}
1652
1653/*-------------------------------------------------------------------------*/
1654static int std_req_set_feature(struct nbu2ss_udc *udc)
1655{
1656        return _nbu2ss_req_feature(udc, TRUE);
1657}
1658
1659/*-------------------------------------------------------------------------*/
1660static int std_req_set_address(struct nbu2ss_udc *udc)
1661{
1662        int             result = 0;
1663        u32             wValue = udc->ctrl.wValue;
1664
1665        if ((0x00 != udc->ctrl.bRequestType)    ||
1666                (0x0000 != udc->ctrl.wIndex)    ||
1667                (0x0000 != udc->ctrl.wLength)) {
1668                return -EINVAL;
1669        }
1670
1671        if (wValue != (wValue & 0x007F))
1672                return -EINVAL;
1673
1674        wValue = wValue << USB_ADRS_SHIFT;
1675
1676        _nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
1677        _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1678
1679        return result;
1680}
1681
1682/*-------------------------------------------------------------------------*/
1683static int std_req_set_configuration(struct nbu2ss_udc *udc)
1684{
1685        u32 ConfigValue = (u32)(udc->ctrl.wValue & 0x00ff);
1686
1687        if ((0x0000 != udc->ctrl.wIndex)        ||
1688                (0x0000 != udc->ctrl.wLength)   ||
1689                (0x00 != udc->ctrl.bRequestType)) {
1690                return -EINVAL;
1691        }
1692
1693        udc->curr_config = ConfigValue;
1694
1695        if (ConfigValue > 0) {
1696                _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, CONF);
1697                udc->devstate = USB_STATE_CONFIGURED;
1698
1699        } else {
1700                _nbu2ss_bitclr(&udc->p_regs->USB_CONTROL, CONF);
1701                udc->devstate = USB_STATE_ADDRESS;
1702        }
1703
1704        return 0;
1705}
1706
1707/*-------------------------------------------------------------------------*/
1708static inline void _nbu2ss_read_request_data(struct nbu2ss_udc *udc, u32 *pdata)
1709{
1710        if ((udc == NULL) && (pdata == NULL))
1711                return;
1712
1713        *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA0);
1714        pdata++;
1715        *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA1);
1716}
1717
1718/*-------------------------------------------------------------------------*/
1719static inline int _nbu2ss_decode_request(struct nbu2ss_udc *udc)
1720{
1721        bool                    bcall_back = TRUE;
1722        int                     nret = -EINVAL;
1723        struct usb_ctrlrequest  *p_ctrl;
1724
1725        p_ctrl = &udc->ctrl;
1726        _nbu2ss_read_request_data(udc, (u32 *)p_ctrl);
1727
1728        /* ep0 state control */
1729        if (p_ctrl->wLength == 0) {
1730                udc->ep0state = EP0_IN_STATUS_PHASE;
1731
1732        } else {
1733                if (p_ctrl->bRequestType & USB_DIR_IN)
1734                        udc->ep0state = EP0_IN_DATA_PHASE;
1735                else
1736                        udc->ep0state = EP0_OUT_DATA_PHASE;
1737        }
1738
1739        if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1740                switch (p_ctrl->bRequest) {
1741                case USB_REQ_GET_STATUS:
1742                        nret = std_req_get_status(udc);
1743                        bcall_back = FALSE;
1744                        break;
1745
1746                case USB_REQ_CLEAR_FEATURE:
1747                        nret = std_req_clear_feature(udc);
1748                        bcall_back = FALSE;
1749                        break;
1750
1751                case USB_REQ_SET_FEATURE:
1752                        nret = std_req_set_feature(udc);
1753                        bcall_back = FALSE;
1754                        break;
1755
1756                case USB_REQ_SET_ADDRESS:
1757                        nret = std_req_set_address(udc);
1758                        bcall_back = FALSE;
1759                        break;
1760
1761                case USB_REQ_SET_CONFIGURATION:
1762                        nret = std_req_set_configuration(udc);
1763                        break;
1764
1765                default:
1766                        break;
1767                }
1768        }
1769
1770        if (bcall_back == FALSE) {
1771                if (udc->ep0state == EP0_IN_STATUS_PHASE) {
1772                        if (nret >= 0) {
1773                                /*--------------------------------------*/
1774                                /* Status Stage */
1775                                nret = EP0_send_NULL(udc, TRUE);
1776                        }
1777                }
1778
1779        } else {
1780                spin_unlock(&udc->lock);
1781                nret = udc->driver->setup(&udc->gadget, &udc->ctrl);
1782                spin_lock(&udc->lock);
1783        }
1784
1785        if (nret < 0)
1786                udc->ep0state = EP0_IDLE;
1787
1788        return nret;
1789}
1790
1791/*-------------------------------------------------------------------------*/
1792static inline int _nbu2ss_ep0_in_data_stage(struct nbu2ss_udc *udc)
1793{
1794        int                     nret;
1795        struct nbu2ss_req       *req;
1796        struct nbu2ss_ep        *ep = &udc->ep[0];
1797
1798        if (list_empty(&ep->queue))
1799                req = NULL;
1800        else
1801                req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
1802
1803        if (req == NULL)
1804                req = &udc->ep0_req;
1805
1806        req->req.actual += req->div_len;
1807        req->div_len = 0;
1808
1809        nret = _nbu2ss_ep0_in_transfer(udc, ep, req);
1810        if (nret == 0) {
1811                udc->ep0state = EP0_OUT_STATUS_PAHSE;
1812                EP0_receive_NULL(udc, TRUE);
1813        }
1814
1815        return 0;
1816}
1817
1818/*-------------------------------------------------------------------------*/
1819static inline int _nbu2ss_ep0_out_data_stage(struct nbu2ss_udc *udc)
1820{
1821        int                     nret;
1822        struct nbu2ss_req       *req;
1823        struct nbu2ss_ep        *ep = &udc->ep[0];
1824
1825        if (list_empty(&ep->queue))
1826                req = NULL;
1827        else
1828                req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
1829
1830        if (req == NULL)
1831                req = &udc->ep0_req;
1832
1833        nret = _nbu2ss_ep0_out_transfer(udc, ep, req);
1834        if (nret == 0) {
1835                udc->ep0state = EP0_IN_STATUS_PHASE;
1836                EP0_send_NULL(udc, TRUE);
1837
1838        } else if (nret < 0) {
1839                _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, EP0_BCLR);
1840                req->req.status = nret;
1841        }
1842
1843        return 0;
1844}
1845
1846/*-------------------------------------------------------------------------*/
1847static inline int _nbu2ss_ep0_status_stage(struct nbu2ss_udc *udc)
1848{
1849        struct nbu2ss_req       *req;
1850        struct nbu2ss_ep        *ep = &udc->ep[0];
1851
1852        if (list_empty(&ep->queue))
1853                req = NULL;
1854        else
1855                req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
1856
1857        if (req == NULL) {
1858                req = &udc->ep0_req;
1859                if (req->req.complete)
1860                        req->req.complete(&ep->ep, &req->req);
1861
1862        } else {
1863                if (req->req.complete)
1864                        _nbu2ss_ep_done(ep, req, 0);
1865        }
1866
1867        udc->ep0state = EP0_IDLE;
1868
1869        return 0;
1870}
1871
1872/*-------------------------------------------------------------------------*/
1873static inline void _nbu2ss_ep0_int(struct nbu2ss_udc *udc)
1874{
1875        int             i;
1876        u32             status;
1877        u32             intr;
1878        int             nret = -1;
1879
1880        status = _nbu2ss_readl(&udc->p_regs->EP0_STATUS);
1881        intr = status & EP0_STATUS_RW_BIT;
1882        _nbu2ss_writel(&udc->p_regs->EP0_STATUS, ~(u32)intr);
1883
1884        status &= (SETUP_INT | EP0_IN_INT | EP0_OUT_INT
1885                        | STG_END_INT | EP0_OUT_NULL_INT);
1886
1887        if (status == 0) {
1888                pr_info("--- %s Not Decode Interrupt\n", __func__);
1889                pr_info("--- EP0_STATUS = 0x%08x\n", intr);
1890                return;
1891        }
1892
1893        if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1894                udc->gadget.speed = _nbu2ss_get_speed(udc);
1895
1896        for (i = 0; i < EP0_END_XFER; i++) {
1897                switch (udc->ep0state) {
1898                case EP0_IDLE:
1899                        if (status & SETUP_INT) {
1900                                status = 0;
1901                                nret = _nbu2ss_decode_request(udc);
1902                        }
1903                        break;
1904
1905                case EP0_IN_DATA_PHASE:
1906                        if (status & EP0_IN_INT) {
1907                                status &= ~EP0_IN_INT;
1908                                nret = _nbu2ss_ep0_in_data_stage(udc);
1909                        }
1910                        break;
1911
1912                case EP0_OUT_DATA_PHASE:
1913                        if (status & EP0_OUT_INT) {
1914                                status &= ~EP0_OUT_INT;
1915                                nret = _nbu2ss_ep0_out_data_stage(udc);
1916                        }
1917                        break;
1918
1919                case EP0_IN_STATUS_PHASE:
1920                        if ((status & STG_END_INT) || (status & SETUP_INT)) {
1921                                status &= ~(STG_END_INT | EP0_IN_INT);
1922                                nret = _nbu2ss_ep0_status_stage(udc);
1923                        }
1924                        break;
1925
1926                case EP0_OUT_STATUS_PAHSE:
1927                        if ((status & STG_END_INT)
1928                        || (status & SETUP_INT)
1929                        || (status & EP0_OUT_NULL_INT)) {
1930                                status &= ~(STG_END_INT
1931                                                | EP0_OUT_INT
1932                                                | EP0_OUT_NULL_INT);
1933
1934                                nret = _nbu2ss_ep0_status_stage(udc);
1935                        }
1936
1937                        break;
1938
1939                default:
1940                        status = 0;
1941                        break;
1942                }
1943
1944                if (status == 0)
1945                        break;
1946        }
1947
1948        if (nret < 0) {
1949                /* Send Stall */
1950                _nbu2ss_set_endpoint_stall(udc, 0, TRUE);
1951        }
1952}
1953
1954/*-------------------------------------------------------------------------*/
1955static void _nbu2ss_ep_done(
1956        struct nbu2ss_ep *ep,
1957        struct nbu2ss_req *req,
1958        int status)
1959{
1960        struct nbu2ss_udc *udc = ep->udc;
1961
1962        list_del_init(&req->queue);
1963
1964        if (status == -ECONNRESET)
1965                _nbu2ss_fifo_flush(udc, ep);
1966
1967        if (likely(req->req.status == -EINPROGRESS))
1968                req->req.status = status;
1969
1970        if (ep->stalled)
1971                _nbu2ss_epn_set_stall(udc, ep);
1972        else {
1973                if (!list_empty(&ep->queue))
1974                        _nbu2ss_restert_transfer(ep);
1975        }
1976
1977#ifdef USE_DMA
1978        if ((ep->direct == USB_DIR_OUT) && (ep->epnum > 0) &&
1979                        (req->req.dma != 0))
1980                _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_OUT);
1981#endif
1982
1983        spin_unlock(&udc->lock);
1984        req->req.complete(&ep->ep, &req->req);
1985        spin_lock(&udc->lock);
1986}
1987
1988/*-------------------------------------------------------------------------*/
1989static inline void _nbu2ss_epn_in_int(
1990        struct nbu2ss_udc *udc,
1991        struct nbu2ss_ep *ep,
1992        struct nbu2ss_req *req)
1993{
1994        int     result = 0;
1995        u32     status;
1996
1997        PT_FC_REGS      preg = udc->p_regs;
1998
1999        if (req->dma_flag)
2000                return;         /* DMA is forwarded */
2001
2002        req->req.actual += req->div_len;
2003        req->div_len = 0;
2004
2005        if (req->req.actual != req->req.length) {
2006                /*---------------------------------------------------------*/
2007                /* remainder of data */
2008                result = _nbu2ss_epn_in_transfer(udc, ep, req);
2009
2010        } else {
2011                if (req->zero && ((req->req.actual % ep->ep.maxpacket) == 0)) {
2012
2013                        status =
2014                        _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_STATUS);
2015
2016                        if ((status & EPn_IN_FULL) == 0) {
2017                                /*-----------------------------------------*/
2018                                /* 0 Length Packet */
2019                                req->zero = false;
2020                                _nbu2ss_zero_len_pkt(udc, ep->epnum);
2021                        }
2022                        return;
2023                }
2024        }
2025
2026        if (result <= 0) {
2027                /*---------------------------------------------------------*/
2028                /* Complete */
2029                _nbu2ss_ep_done(ep, req, result);
2030        }
2031}
2032
2033/*-------------------------------------------------------------------------*/
2034static inline void _nbu2ss_epn_out_int(
2035        struct nbu2ss_udc *udc,
2036        struct nbu2ss_ep *ep,
2037        struct nbu2ss_req *req)
2038{
2039        int     result;
2040
2041        result = _nbu2ss_epn_out_transfer(udc, ep, req);
2042        if (result <= 0)
2043                _nbu2ss_ep_done(ep, req, result);
2044}
2045
2046/*-------------------------------------------------------------------------*/
2047static inline void _nbu2ss_epn_in_dma_int(
2048        struct nbu2ss_udc *udc,
2049        struct nbu2ss_ep *ep,
2050        struct nbu2ss_req *req)
2051{
2052        u32             mpkt;
2053        u32             size;
2054        struct usb_request *preq;
2055
2056        preq = &req->req;
2057
2058        if (req->dma_flag == FALSE)
2059                return;
2060
2061        preq->actual += req->div_len;
2062        req->div_len = 0;
2063        req->dma_flag = FALSE;
2064
2065#ifdef USE_DMA
2066        _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_IN);
2067#endif
2068
2069        if (preq->actual != preq->length) {
2070                _nbu2ss_epn_in_transfer(udc, ep, req);
2071        } else {
2072                mpkt = ep->ep.maxpacket;
2073                size = preq->actual % mpkt;
2074                if (size > 0) {
2075                        if (((preq->actual & 0x03) == 0) && (size < mpkt))
2076                                _nbu2ss_ep_in_end(udc, ep->epnum, 0, 0);
2077                } else {
2078                        _nbu2ss_epn_in_int(udc, ep, req);
2079                }
2080        }
2081}
2082
2083/*-------------------------------------------------------------------------*/
2084static inline void _nbu2ss_epn_out_dma_int(
2085        struct nbu2ss_udc *udc,
2086        struct nbu2ss_ep *ep,
2087        struct nbu2ss_req *req)
2088{
2089        int             i;
2090        u32             num;
2091        u32             dmacnt, ep_dmacnt;
2092        u32             mpkt;
2093        PT_FC_REGS      preg = udc->p_regs;
2094
2095        num = ep->epnum - 1;
2096
2097        if (req->req.actual == req->req.length) {
2098                if ((req->req.length % ep->ep.maxpacket) && !req->zero) {
2099                        req->div_len = 0;
2100                        req->dma_flag = FALSE;
2101                        _nbu2ss_ep_done(ep, req, 0);
2102                        return;
2103                }
2104        }
2105
2106        ep_dmacnt = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT)
2107                 & EPn_DMACNT;
2108        ep_dmacnt >>= 16;
2109
2110        for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2111                dmacnt = _nbu2ss_readl(&preg->EP_DCR[num].EP_DCR1)
2112                         & DCR1_EPn_DMACNT;
2113                dmacnt >>= 16;
2114                if (ep_dmacnt == dmacnt)
2115                        break;
2116        }
2117
2118        _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_REQEN);
2119
2120        if (dmacnt != 0) {
2121                mpkt = ep->ep.maxpacket;
2122                if ((req->div_len % mpkt) == 0)
2123                        req->div_len -= mpkt * dmacnt;
2124        }
2125
2126        if ((req->req.actual % ep->ep.maxpacket) > 0) {
2127                if (req->req.actual == req->div_len) {
2128                        req->div_len = 0;
2129                        req->dma_flag = FALSE;
2130                        _nbu2ss_ep_done(ep, req, 0);
2131                        return;
2132                }
2133        }
2134
2135        req->req.actual += req->div_len;
2136        req->div_len = 0;
2137        req->dma_flag = FALSE;
2138
2139        _nbu2ss_epn_out_int(udc, ep, req);
2140}
2141
2142/*-------------------------------------------------------------------------*/
2143static inline void _nbu2ss_epn_int(struct nbu2ss_udc *udc, u32 epnum)
2144{
2145        u32     num;
2146        u32     status;
2147
2148        struct nbu2ss_req       *req;
2149        struct nbu2ss_ep        *ep = &udc->ep[epnum];
2150
2151        num = epnum - 1;
2152
2153        /* Interrupt Status */
2154        status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
2155
2156        /* Interrupt Clear */
2157        _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~(u32)status);
2158
2159        if (list_empty(&ep->queue))
2160                req = NULL;
2161        else
2162                req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
2163
2164        if (req == NULL) {
2165                /* pr_warn("=== %s(%d) req == NULL\n", __func__, epnum); */
2166                return;
2167        }
2168
2169        if (status & EPn_OUT_END_INT) {
2170                status &= ~EPn_OUT_INT;
2171                _nbu2ss_epn_out_dma_int(udc, ep, req);
2172        }
2173
2174        if (status & EPn_OUT_INT)
2175                _nbu2ss_epn_out_int(udc, ep, req);
2176
2177        if (status & EPn_IN_END_INT) {
2178                status &= ~EPn_IN_INT;
2179                _nbu2ss_epn_in_dma_int(udc, ep, req);
2180        }
2181
2182        if (status & EPn_IN_INT)
2183                _nbu2ss_epn_in_int(udc, ep, req);
2184}
2185
2186/*-------------------------------------------------------------------------*/
2187static inline void _nbu2ss_ep_int(struct nbu2ss_udc *udc, u32 epnum)
2188{
2189        if (epnum == 0)
2190                _nbu2ss_ep0_int(udc);
2191        else
2192                _nbu2ss_epn_int(udc, epnum);
2193}
2194
2195/*-------------------------------------------------------------------------*/
2196static void _nbu2ss_ep0_enable(struct nbu2ss_udc *udc)
2197{
2198        _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, (EP0_AUTO | EP0_BCLR));
2199        _nbu2ss_writel(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
2200}
2201
2202#if 0
2203/*-------------------------------------------------------------------------*/
2204static void _nbu2ss_ep0_disable(struct nbu2ss_udc *udc)
2205{
2206        _nbu2ss_bitclr(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
2207
2208        _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL
2209                        , (EP0_BCLR | EP0_INAK | EP0_ONAK | EP0_BCLR));
2210
2211        _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_AUTO);
2212}
2213#endif
2214
2215/*-------------------------------------------------------------------------*/
2216static int _nbu2ss_nuke(struct nbu2ss_udc *udc,
2217                        struct nbu2ss_ep *ep,
2218                        int status)
2219{
2220        struct nbu2ss_req *req;
2221
2222        /* Endpoint Disable */
2223        _nbu2ss_epn_exit(udc, ep);
2224
2225        /* DMA Disable */
2226        _nbu2ss_ep_dma_exit(udc, ep);
2227
2228        if (list_empty(&ep->queue))
2229                return 0;
2230
2231        /* called with irqs blocked */
2232        while (!list_empty(&ep->queue)) {
2233                req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
2234                _nbu2ss_ep_done(ep, req, status);
2235        }
2236
2237        return 0;
2238}
2239
2240/*-------------------------------------------------------------------------*/
2241static void _nbu2ss_quiesce(struct nbu2ss_udc *udc)
2242{
2243        struct nbu2ss_ep        *ep;
2244
2245        udc->gadget.speed = USB_SPEED_UNKNOWN;
2246
2247        _nbu2ss_nuke(udc, &udc->ep[0], -ESHUTDOWN);
2248
2249        /* Endpoint n */
2250        list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2251                _nbu2ss_nuke(udc, ep, -ESHUTDOWN);
2252        }
2253}
2254
2255/*-------------------------------------------------------------------------*/
2256static int _nbu2ss_pullup(struct nbu2ss_udc *udc, int is_on)
2257{
2258        u32     reg_dt;
2259
2260        if (!udc) {
2261                ERR("%s, bad param\n", __func__);
2262                return -EINVAL;
2263        }
2264
2265        if (udc->vbus_active == 0)
2266                return -ESHUTDOWN;
2267
2268        if (is_on) {
2269                /* D+ Pullup */
2270/*              INFO(" --- D+ Pullup\n"); */
2271
2272                if (udc->driver) {
2273                        reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL)
2274                                | PUE2) & ~(u32)CONNECTB;
2275
2276                        _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2277                }
2278
2279        } else {
2280                /* D+ Pulldown */
2281/*              INFO(" --- D+ Pulldown\n"); */
2282
2283                reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL) | CONNECTB)
2284                        & ~(u32)PUE2;
2285
2286                _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2287                udc->gadget.speed = USB_SPEED_UNKNOWN;
2288        }
2289
2290        return 0;
2291}
2292
2293/*-------------------------------------------------------------------------*/
2294static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
2295{
2296        PT_FC_REGS      p = udc->p_regs;
2297
2298        if (udc->vbus_active == 0)
2299                return;
2300
2301        if (ep->epnum == 0) {
2302                /* EP0 */
2303                _nbu2ss_bitset(&p->EP0_CONTROL, EP0_BCLR);
2304
2305        } else {
2306                /* EPn */
2307                _nbu2ss_ep_dma_abort(udc, ep);
2308                _nbu2ss_bitset(&p->EP_REGS[ep->epnum - 1].EP_CONTROL, EPn_BCLR);
2309        }
2310}
2311
2312/*-------------------------------------------------------------------------*/
2313static int _nbu2ss_enable_controller(struct nbu2ss_udc *udc)
2314{
2315        int     waitcnt = 0;
2316
2317        if (udc->udc_enabled)
2318                return 0;
2319
2320#if 0
2321        emxx_open_clockgate(EMXX_CLK_USB1);
2322        /* emxx_clkctrl_off(EMXX_CLKCTRL_USB1); */
2323        /* emxx_clkctrl_on(EMXX_CLKCTRL_USB1); */
2324        emxx_unreset_device(EMXX_RST_USB1);
2325#endif
2326        /*
2327                Reset
2328        */
2329        _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2330        udelay(EPC_RST_DISABLE_TIME);   /* 1us wait */
2331
2332        _nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD);
2333        mdelay(EPC_DIRPD_DISABLE_TIME); /* 1ms wait */
2334
2335        _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2336
2337        _nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);
2338
2339#if 0
2340        /* DMA Mode Setting */
2341        if ((system_rev & EMXX_REV_MASK) == EMXX_REV_ES1) {
2342                _nbu2ss_bitset(&udc->p_regs->AHBMCTR, BURST_TYPE);
2343                _nbu2ss_bitclr(&udc->p_regs->AHBMCTR, HTRANS_MODE);
2344        } else
2345#endif
2346                _nbu2ss_writel(&udc->p_regs->AHBMCTR,
2347                        HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
2348
2349        while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {
2350                waitcnt++;
2351                udelay(1);      /* 1us wait */
2352                if (waitcnt == EPC_PLL_LOCK_COUNT) {
2353                        ERR("*** Reset Cancel failed\n");
2354                        return -EINVAL;
2355                }
2356        };
2357
2358#if 0
2359        if ((system_rev & EMXX_REV_MASK) < EMXX_REV_ES3)
2360#endif
2361                _nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
2362
2363        _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));
2364
2365        /* EP0 */
2366        _nbu2ss_ep0_enable(udc);
2367
2368        /* USB Interrupt Enable */
2369        _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, USB_INT_EN_BIT);
2370
2371        udc->udc_enabled = TRUE;
2372
2373        return 0;
2374}
2375
2376
2377/*-------------------------------------------------------------------------*/
2378static void _nbu2ss_reset_controller(struct nbu2ss_udc *udc)
2379{
2380        _nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST);
2381        _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2382}
2383
2384/*-------------------------------------------------------------------------*/
2385static void _nbu2ss_disable_controller(struct nbu2ss_udc *udc)
2386{
2387        if (udc->udc_enabled) {
2388                udc->udc_enabled = FALSE;
2389                _nbu2ss_reset_controller(udc);
2390                _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2391        }
2392#if 0
2393        emxx_reset_device(EMXX_RST_USB1);
2394        /* emxx_clkctrl_on(EMXX_CLKCTRL_USB1); */
2395        emxx_close_clockgate(EMXX_CLK_USB1);
2396#endif
2397}
2398
2399/*-------------------------------------------------------------------------*/
2400static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc)
2401{
2402        int     nret;
2403        u32     reg_dt;
2404
2405        /* chattering */
2406        mdelay(VBUS_CHATTERING_MDELAY);         /* wait (ms) */
2407
2408        /* VBUS ON Check*/
2409        reg_dt = gpio_get_value(VBUS_VALUE);
2410        if (reg_dt == 0) {
2411
2412                udc->linux_suspended = 0;
2413
2414                _nbu2ss_reset_controller(udc);
2415                pr_info(" ----- VBUS OFF\n");
2416
2417                if (udc->vbus_active == 1) {
2418                        /* VBUS OFF */
2419                        udc->vbus_active = 0;
2420                        if (udc->usb_suspended) {
2421                                udc->usb_suspended = 0;
2422                                /* _nbu2ss_reset_controller(udc); */
2423                        }
2424                        udc->devstate = USB_STATE_NOTATTACHED;
2425
2426                        _nbu2ss_quiesce(udc);
2427                        if (udc->driver) {
2428                                spin_unlock(&udc->lock);
2429                                udc->driver->disconnect(&udc->gadget);
2430                                spin_lock(&udc->lock);
2431                        }
2432
2433                        _nbu2ss_disable_controller(udc);
2434                }
2435        } else {
2436                mdelay(5);              /* wait (5ms) */
2437                reg_dt = gpio_get_value(VBUS_VALUE);
2438                if (reg_dt == 0)
2439                        return;
2440
2441                pr_info(" ----- VBUS ON\n");
2442
2443                if (udc->linux_suspended)
2444                        return;
2445
2446                if (udc->vbus_active == 0) {
2447                        /* VBUS ON */
2448                        udc->vbus_active = 1;
2449                        udc->devstate = USB_STATE_POWERED;
2450
2451                        nret = _nbu2ss_enable_controller(udc);
2452                        if (nret < 0) {
2453                                _nbu2ss_disable_controller(udc);
2454                                udc->vbus_active = 0;
2455                                return;
2456                        }
2457
2458                        _nbu2ss_pullup(udc, 1);
2459
2460#ifdef UDC_DEBUG_DUMP
2461                        _nbu2ss_dump_register(udc);
2462#endif /* UDC_DEBUG_DUMP */
2463
2464                } else {
2465                        if (udc->devstate == USB_STATE_POWERED)
2466                                _nbu2ss_pullup(udc, 1);
2467                }
2468        }
2469}
2470
2471/*-------------------------------------------------------------------------*/
2472static inline void _nbu2ss_int_bus_reset(struct nbu2ss_udc *udc)
2473{
2474        udc->devstate           = USB_STATE_DEFAULT;
2475        udc->remote_wakeup      = 0;
2476
2477        _nbu2ss_quiesce(udc);
2478
2479        udc->ep0state = EP0_IDLE;
2480}
2481
2482/*-------------------------------------------------------------------------*/
2483static inline void _nbu2ss_int_usb_resume(struct nbu2ss_udc *udc)
2484{
2485        if (udc->usb_suspended == 1) {
2486                udc->usb_suspended = 0;
2487                if (udc->driver && udc->driver->resume) {
2488                        spin_unlock(&udc->lock);
2489                        udc->driver->resume(&udc->gadget);
2490                        spin_lock(&udc->lock);
2491                }
2492        }
2493}
2494
2495/*-------------------------------------------------------------------------*/
2496static inline void _nbu2ss_int_usb_suspend(struct nbu2ss_udc *udc)
2497{
2498        u32     reg_dt;
2499
2500        if (udc->usb_suspended == 0) {
2501                reg_dt = gpio_get_value(VBUS_VALUE);
2502
2503                if (reg_dt == 0)
2504                        return;
2505
2506                udc->usb_suspended = 1;
2507                if (udc->driver && udc->driver->suspend) {
2508                        spin_unlock(&udc->lock);
2509                        udc->driver->suspend(&udc->gadget);
2510                        spin_lock(&udc->lock);
2511                }
2512
2513                _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, SUSPEND);
2514        }
2515}
2516
2517/*-------------------------------------------------------------------------*/
2518/* VBUS (GPIO153) Interrupt */
2519static irqreturn_t _nbu2ss_vbus_irq(int irq, void *_udc)
2520{
2521        struct nbu2ss_udc       *udc = (struct nbu2ss_udc *)_udc;
2522
2523        spin_lock(&udc->lock);
2524        _nbu2ss_check_vbus(udc);
2525        spin_unlock(&udc->lock);
2526
2527        return IRQ_HANDLED;
2528}
2529
2530/*-------------------------------------------------------------------------*/
2531/* Interrupt (udc) */
2532static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc)
2533{
2534        u8      suspend_flag = 0;
2535        u32     status;
2536        u32     epnum, int_bit;
2537
2538        struct nbu2ss_udc       *udc = (struct nbu2ss_udc *)_udc;
2539        PT_FC_REGS              preg = udc->p_regs;
2540
2541        if (gpio_get_value(VBUS_VALUE) == 0) {
2542                _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2543                _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2544                return IRQ_HANDLED;
2545        }
2546
2547        spin_lock(&udc->lock);
2548
2549        for (;;) {
2550                if (gpio_get_value(VBUS_VALUE) == 0) {
2551                        _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2552                        _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2553                        status = 0;
2554                } else
2555                        status = _nbu2ss_readl(&preg->USB_INT_STA);
2556
2557                if (status == 0)
2558                        break;
2559
2560                _nbu2ss_writel(&preg->USB_INT_STA, ~(status & USB_INT_STA_RW));
2561
2562                if (status & USB_RST_INT) {
2563                        /* USB Reset */
2564                        _nbu2ss_int_bus_reset(udc);
2565                }
2566
2567                if (status & RSUM_INT) {
2568                        /* Resume */
2569                        _nbu2ss_int_usb_resume(udc);
2570                }
2571
2572                if (status & SPND_INT) {
2573                        /* Suspend */
2574                        suspend_flag = 1;
2575                }
2576
2577                if (status & EPn_INT) {
2578                        /* EP INT */
2579                        int_bit = status >> 8;
2580
2581                        for (epnum = 0; epnum < NUM_ENDPOINTS; epnum++) {
2582
2583                                if (0x01 & int_bit)
2584                                        _nbu2ss_ep_int(udc, epnum);
2585
2586                                int_bit >>= 1;
2587
2588                                if (int_bit == 0)
2589                                        break;
2590                        }
2591                }
2592        }
2593
2594        if (suspend_flag)
2595                _nbu2ss_int_usb_suspend(udc);
2596
2597        spin_unlock(&udc->lock);
2598
2599        return IRQ_HANDLED;
2600}
2601
2602/*-------------------------------------------------------------------------*/
2603/* usb_ep_ops */
2604static int nbu2ss_ep_enable(
2605        struct usb_ep *_ep,
2606        const struct usb_endpoint_descriptor *desc)
2607{
2608        u8              ep_type;
2609        unsigned long   flags;
2610
2611        struct nbu2ss_ep        *ep;
2612        struct nbu2ss_udc       *udc;
2613
2614        if ((_ep == NULL) || (desc == NULL)) {
2615                ERR(" *** %s, bad param\n", __func__);
2616                return -EINVAL;
2617        }
2618
2619        ep = container_of(_ep, struct nbu2ss_ep, ep);
2620        if ((ep == NULL) || (ep->udc == NULL)) {
2621                ERR(" *** %s, ep == NULL !!\n", __func__);
2622                return -EINVAL;
2623        }
2624
2625        ep_type = usb_endpoint_type(desc);
2626        if ((ep_type == USB_ENDPOINT_XFER_CONTROL)
2627                || (ep_type == USB_ENDPOINT_XFER_ISOC)) {
2628
2629                ERR(" *** %s, bat bmAttributes\n", __func__);
2630                return -EINVAL;
2631        }
2632
2633        udc = ep->udc;
2634        if (udc->vbus_active == 0)
2635                return -ESHUTDOWN;
2636
2637        if ((udc->driver == NULL)
2638                || (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
2639
2640                ERR(" *** %s, udc !!\n", __func__);
2641                return -ESHUTDOWN;
2642        }
2643
2644        spin_lock_irqsave(&udc->lock, flags);
2645
2646        ep->desc = desc;
2647        ep->epnum = usb_endpoint_num(desc);
2648        ep->direct = desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
2649        ep->ep_type = ep_type;
2650        ep->wedged = 0;
2651        ep->halted = FALSE;
2652        ep->stalled = FALSE;
2653
2654        ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
2655
2656        /* DMA setting */
2657        _nbu2ss_ep_dma_init(udc, ep);
2658
2659        /* Endpoint setting */
2660        _nbu2ss_ep_init(udc, ep);
2661
2662        spin_unlock_irqrestore(&udc->lock, flags);
2663
2664        return 0;
2665}
2666
2667/*-------------------------------------------------------------------------*/
2668static int nbu2ss_ep_disable(struct usb_ep *_ep)
2669{
2670        struct nbu2ss_ep        *ep;
2671        struct nbu2ss_udc       *udc;
2672        unsigned long           flags;
2673
2674        if (_ep == NULL) {
2675                ERR(" *** %s, bad param\n", __func__);
2676                return -EINVAL;
2677        }
2678
2679        ep = container_of(_ep, struct nbu2ss_ep, ep);
2680        if ((ep == NULL) || (ep->udc == NULL)) {
2681                ERR(" *** %s, ep == NULL !!\n", __func__);
2682                return -EINVAL;
2683        }
2684
2685        udc = ep->udc;
2686        if (udc->vbus_active == 0)
2687                return -ESHUTDOWN;
2688
2689        spin_lock_irqsave(&udc->lock, flags);
2690        _nbu2ss_nuke(udc, ep, -EINPROGRESS);            /* dequeue request */
2691        spin_unlock_irqrestore(&udc->lock, flags);
2692
2693        return 0;
2694}
2695
2696/*-------------------------------------------------------------------------*/
2697static struct usb_request *nbu2ss_ep_alloc_request(
2698        struct usb_ep *ep,
2699        gfp_t gfp_flags)
2700{
2701        struct nbu2ss_req *req;
2702
2703        req = kzalloc(sizeof(*req), gfp_flags);
2704        if (!req)
2705                return 0;
2706
2707#ifdef USE_DMA
2708        req->req.dma = DMA_ADDR_INVALID;
2709#endif
2710        INIT_LIST_HEAD(&req->queue);
2711
2712        return &req->req;
2713}
2714
2715/*-------------------------------------------------------------------------*/
2716static void nbu2ss_ep_free_request(
2717        struct usb_ep *_ep,
2718        struct usb_request *_req)
2719{
2720        struct nbu2ss_req *req;
2721
2722        if (_req != NULL) {
2723                req = container_of(_req, struct nbu2ss_req, req);
2724
2725                kfree(req);
2726        }
2727}
2728
2729/*-------------------------------------------------------------------------*/
2730static int nbu2ss_ep_queue(
2731        struct usb_ep *_ep,
2732        struct usb_request *_req,
2733        gfp_t gfp_flags)
2734{
2735        struct nbu2ss_req       *req;
2736        struct nbu2ss_ep        *ep;
2737        struct nbu2ss_udc       *udc;
2738        unsigned long           flags;
2739        bool                    bflag;
2740        int                     result = -EINVAL;
2741
2742        /* catch various bogus parameters */
2743        if ((_ep == NULL) || (_req == NULL)) {
2744                if (_ep == NULL)
2745                        ERR("*** %s --- _ep == NULL\n", __func__);
2746
2747                if (_req == NULL)
2748                        ERR("*** %s --- _req == NULL\n", __func__);
2749
2750                return -EINVAL;
2751        }
2752
2753        req = container_of(_req, struct nbu2ss_req, req);
2754        if (unlikely
2755            (!_req->complete || !_req->buf
2756             || !list_empty(&req->queue))) {
2757
2758                if (!_req->complete)
2759                        ERR("*** %s --- !_req->complete\n", __func__);
2760
2761                if (!_req->buf)
2762                        ERR("*** %s --- !_req->buf\n", __func__);
2763
2764                if (!list_empty(&req->queue))
2765                        ERR("*** %s --- !list_empty(&req->queue)\n", __func__);
2766
2767                return -EINVAL;
2768        }
2769
2770        ep = container_of(_ep, struct nbu2ss_ep, ep);
2771        udc = ep->udc;
2772
2773/*      INFO("=== %s(ep%d), zero=%d\n", __func__, ep->epnum, _req->zero); */
2774
2775        if (udc->vbus_active == 0) {
2776                pr_info("Can't ep_queue (VBUS OFF)\n");
2777                return -ESHUTDOWN;
2778        }
2779
2780        if (unlikely(!udc->driver)) {
2781                ERR("%s, bogus device state %p\n", __func__, udc->driver);
2782                return -ESHUTDOWN;
2783        }
2784
2785        spin_lock_irqsave(&udc->lock, flags);
2786
2787#ifdef USE_DMA
2788        if ((u32)req->req.buf & 0x3)
2789                req->unaligned = TRUE;
2790        else
2791                req->unaligned = FALSE;
2792
2793        if (req->unaligned) {
2794                if (ep->virt_buf == NULL)
2795                        ep->virt_buf = (u8 *)dma_alloc_coherent(
2796                                NULL, PAGE_SIZE,
2797                                &ep->phys_buf, GFP_KERNEL | GFP_DMA);
2798                if (ep->epnum > 0)  {
2799                        if (ep->direct == USB_DIR_IN)
2800                                memcpy(ep->virt_buf, req->req.buf,
2801                                        req->req.length);
2802                }
2803        }
2804
2805        if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT) &&
2806                        (req->req.dma != 0))
2807                _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_OUT);
2808#endif
2809
2810        _req->status = -EINPROGRESS;
2811        _req->actual = 0;
2812
2813        bflag = list_empty(&ep->queue);
2814        list_add_tail(&req->queue, &ep->queue);
2815
2816        if ((bflag != FALSE) && (ep->stalled == FALSE)) {
2817
2818                result = _nbu2ss_start_transfer(udc, ep, req, FALSE);
2819                if (result < 0) {
2820                        ERR(" *** %s, result = %d\n", __func__, result);
2821                        list_del(&req->queue);
2822                } else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
2823#ifdef USE_DMA
2824                        if (req->req.length < 4 &&
2825                                req->req.length == req->req.actual)
2826#else
2827                        if (req->req.length == req->req.actual)
2828#endif
2829                                _nbu2ss_ep_done(ep, req, result);
2830                }
2831        }
2832
2833        spin_unlock_irqrestore(&udc->lock, flags);
2834
2835        return 0;
2836}
2837
2838/*-------------------------------------------------------------------------*/
2839static int nbu2ss_ep_dequeue(
2840        struct usb_ep *_ep,
2841        struct usb_request *_req)
2842{
2843        struct nbu2ss_req       *req;
2844        struct nbu2ss_ep        *ep;
2845        struct nbu2ss_udc       *udc;
2846        unsigned long flags;
2847
2848        /*INFO("=== %s()\n", __func__);*/
2849
2850        /* catch various bogus parameters */
2851        if ((_ep == NULL) || (_req == NULL)) {
2852                /* ERR("%s, bad param(1)\n", __func__); */
2853                return -EINVAL;
2854        }
2855
2856        ep = container_of(_ep, struct nbu2ss_ep, ep);
2857        if (!ep) {
2858                ERR("%s, ep == NULL !!\n", __func__);
2859                return -EINVAL;
2860        }
2861
2862        udc = ep->udc;
2863        if (udc == NULL)
2864                return -EINVAL;
2865
2866        spin_lock_irqsave(&udc->lock, flags);
2867
2868        /* make sure it's actually queued on this endpoint */
2869        list_for_each_entry(req, &ep->queue, queue) {
2870                if (&req->req == _req)
2871                        break;
2872        }
2873        if (&req->req != _req) {
2874                spin_unlock_irqrestore(&udc->lock, flags);
2875                pr_debug("%s no queue(EINVAL)\n", __func__);
2876                return -EINVAL;
2877        }
2878
2879        _nbu2ss_ep_done(ep, req, -ECONNRESET);
2880
2881        spin_unlock_irqrestore(&udc->lock, flags);
2882
2883        return 0;
2884}
2885
2886/*-------------------------------------------------------------------------*/
2887static int nbu2ss_ep_set_halt(struct usb_ep *_ep, int value)
2888{
2889        u8              ep_adrs;
2890        unsigned long   flags;
2891
2892        struct nbu2ss_ep        *ep;
2893        struct nbu2ss_udc       *udc;
2894
2895/*      INFO("=== %s()\n", __func__); */
2896
2897        if (!_ep) {
2898                ERR("%s, bad param\n", __func__);
2899                return -EINVAL;
2900        }
2901
2902        ep = container_of(_ep, struct nbu2ss_ep, ep);
2903        if (!ep) {
2904                ERR("%s, bad ep\n", __func__);
2905                return -EINVAL;
2906        }
2907
2908        udc = ep->udc;
2909        if (!udc) {
2910                ERR(" *** %s, bad udc\n", __func__);
2911                return -EINVAL;
2912        }
2913
2914        spin_lock_irqsave(&udc->lock, flags);
2915
2916        ep_adrs = ep->epnum | ep->direct;
2917        if (value == 0) {
2918                _nbu2ss_set_endpoint_stall(udc, ep_adrs, value);
2919                ep->stalled = FALSE;
2920        } else {
2921                if (list_empty(&ep->queue))
2922                        _nbu2ss_epn_set_stall(udc, ep);
2923                else
2924                        ep->stalled = TRUE;
2925        }
2926
2927        if (value == 0)
2928                ep->wedged = 0;
2929
2930        spin_unlock_irqrestore(&udc->lock, flags);
2931
2932        return 0;
2933}
2934
2935static int nbu2ss_ep_set_wedge(struct usb_ep *_ep)
2936{
2937        return nbu2ss_ep_set_halt(_ep, 1);
2938}
2939
2940/*-------------------------------------------------------------------------*/
2941static int nbu2ss_ep_fifo_status(struct usb_ep *_ep)
2942{
2943        u32             data;
2944        struct nbu2ss_ep        *ep;
2945        struct nbu2ss_udc       *udc;
2946        unsigned long           flags;
2947        PT_FC_REGS              preg;
2948
2949/*      INFO("=== %s()\n", __func__); */
2950
2951        if (!_ep) {
2952                ERR("%s, bad param\n", __func__);
2953                return -EINVAL;
2954        }
2955
2956        ep = container_of(_ep, struct nbu2ss_ep, ep);
2957        if (!ep) {
2958                ERR("%s, bad ep\n", __func__);
2959                return -EINVAL;
2960        }
2961
2962        udc = ep->udc;
2963        if (!udc) {
2964                ERR("%s, bad udc\n", __func__);
2965                return -EINVAL;
2966        }
2967
2968        preg = udc->p_regs;
2969
2970        data = gpio_get_value(VBUS_VALUE);
2971        if (data == 0)
2972                return -EINVAL;
2973
2974        spin_lock_irqsave(&udc->lock, flags);
2975
2976        if (ep->epnum == 0) {
2977                data = _nbu2ss_readl(&preg->EP0_LENGTH) & EP0_LDATA;
2978
2979        } else {
2980                data = _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_LEN_DCNT)
2981                        & EPn_LDATA;
2982        }
2983
2984        spin_unlock_irqrestore(&udc->lock, flags);
2985
2986        return 0;
2987}
2988
2989/*-------------------------------------------------------------------------*/
2990static void  nbu2ss_ep_fifo_flush(struct usb_ep *_ep)
2991{
2992        u32                     data;
2993        struct nbu2ss_ep        *ep;
2994        struct nbu2ss_udc       *udc;
2995        unsigned long           flags;
2996
2997/*      INFO("=== %s()\n", __func__); */
2998
2999        if (!_ep) {
3000                ERR("%s, bad param\n", __func__);
3001                return;
3002        }
3003
3004        ep = container_of(_ep, struct nbu2ss_ep, ep);
3005        if (!_ep) {
3006                ERR("%s, bad ep\n", __func__);
3007                return;
3008        }
3009
3010        udc = ep->udc;
3011        if (!udc) {
3012                ERR("%s, bad udc\n", __func__);
3013                return;
3014        }
3015
3016        data = gpio_get_value(VBUS_VALUE);
3017        if (data == 0)
3018                return;
3019
3020        spin_lock_irqsave(&udc->lock, flags);
3021        _nbu2ss_fifo_flush(udc, ep);
3022        spin_unlock_irqrestore(&udc->lock, flags);
3023}
3024
3025/*-------------------------------------------------------------------------*/
3026static struct usb_ep_ops nbu2ss_ep_ops = {
3027        .enable         = nbu2ss_ep_enable,
3028        .disable        = nbu2ss_ep_disable,
3029
3030        .alloc_request  = nbu2ss_ep_alloc_request,
3031        .free_request   = nbu2ss_ep_free_request,
3032
3033        .queue          = nbu2ss_ep_queue,
3034        .dequeue        = nbu2ss_ep_dequeue,
3035
3036        .set_halt       = nbu2ss_ep_set_halt,
3037        .set_wedge      = nbu2ss_ep_set_wedge,
3038
3039        .fifo_status    = nbu2ss_ep_fifo_status,
3040        .fifo_flush     = nbu2ss_ep_fifo_flush,
3041};
3042
3043
3044/*-------------------------------------------------------------------------*/
3045/* usb_gadget_ops */
3046
3047/*-------------------------------------------------------------------------*/
3048static int nbu2ss_gad_get_frame(struct usb_gadget *pgadget)
3049{
3050        u32                     data;
3051        struct nbu2ss_udc       *udc;
3052
3053/*      INFO("=== %s()\n", __func__); */
3054
3055        if (pgadget == NULL) {
3056                ERR("%s, bad param\n", __func__);
3057                return -EINVAL;
3058        }
3059
3060        udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3061        if (udc == NULL) {
3062                ERR("%s, udc == NULL\n", __func__);
3063                return -EINVAL;
3064        }
3065
3066        data = gpio_get_value(VBUS_VALUE);
3067        if (data == 0)
3068                return -EINVAL;
3069
3070        data = _nbu2ss_readl(&udc->p_regs->USB_ADDRESS) & FRAME;
3071
3072        return data;
3073}
3074
3075/*-------------------------------------------------------------------------*/
3076static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget)
3077{
3078        int     i;
3079        u32     data;
3080
3081        struct nbu2ss_udc       *udc;
3082
3083/*      INFO("=== %s()\n", __func__); */
3084
3085        if (pgadget == NULL) {
3086                ERR("%s, bad param\n", __func__);
3087                return -EINVAL;
3088        }
3089
3090        udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3091        if (udc == NULL) {
3092                ERR("%s, udc == NULL\n", __func__);
3093                return -EINVAL;
3094        }
3095
3096        data = gpio_get_value(VBUS_VALUE);
3097        if (data == 0) {
3098                pr_warn("VBUS LEVEL = %d\n", data);
3099                return -EINVAL;
3100        }
3101
3102        _nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME);
3103
3104        for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
3105                data = _nbu2ss_readl(&udc->p_regs->EPCTR);
3106
3107                if (data & PLL_LOCK)
3108                        break;
3109        }
3110
3111        _nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME);
3112
3113        return 0;
3114}
3115
3116/*-------------------------------------------------------------------------*/
3117static int nbu2ss_gad_set_selfpowered(struct usb_gadget *pgadget,
3118                                        int is_selfpowered)
3119{
3120        struct nbu2ss_udc       *udc;
3121        unsigned long           flags;
3122
3123/*      INFO("=== %s()\n", __func__); */
3124
3125        if (pgadget == NULL) {
3126                ERR("%s, bad param\n", __func__);
3127                return -EINVAL;
3128        }
3129
3130        udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3131
3132        spin_lock_irqsave(&udc->lock, flags);
3133        udc->self_powered = (is_selfpowered != 0);
3134        spin_unlock_irqrestore(&udc->lock, flags);
3135
3136        return 0;
3137}
3138
3139/*-------------------------------------------------------------------------*/
3140static int nbu2ss_gad_vbus_session(struct usb_gadget *pgadget, int is_active)
3141{
3142/*      INFO("=== %s()\n", __func__); */
3143        return 0;
3144}
3145
3146/*-------------------------------------------------------------------------*/
3147static int nbu2ss_gad_vbus_draw(struct usb_gadget *pgadget, unsigned mA)
3148{
3149        struct nbu2ss_udc       *udc;
3150        unsigned long           flags;
3151
3152/*      INFO("=== %s()\n", __func__); */
3153
3154        if (pgadget == NULL) {
3155                ERR("%s, bad param\n", __func__);
3156                return -EINVAL;
3157        }
3158
3159        udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3160
3161        spin_lock_irqsave(&udc->lock, flags);
3162        udc->mA = mA;
3163        spin_unlock_irqrestore(&udc->lock, flags);
3164
3165        return 0;
3166}
3167
3168/*-------------------------------------------------------------------------*/
3169static int nbu2ss_gad_pullup(struct usb_gadget *pgadget, int is_on)
3170{
3171        struct nbu2ss_udc       *udc;
3172        unsigned long           flags;
3173
3174/*      INFO("=== %s()\n", __func__); */
3175
3176        if (pgadget == NULL) {
3177                ERR("%s, bad param\n", __func__);
3178                return -EINVAL;
3179        }
3180
3181        udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3182
3183        if (udc->driver == NULL) {
3184                pr_warn("%s, Not Regist Driver\n", __func__);
3185                return -EINVAL;
3186        }
3187
3188        if (udc->vbus_active == 0)
3189                return -ESHUTDOWN;
3190
3191        spin_lock_irqsave(&udc->lock, flags);
3192        _nbu2ss_pullup(udc, is_on);
3193        spin_unlock_irqrestore(&udc->lock, flags);
3194
3195        return 0;
3196}
3197
3198/*-------------------------------------------------------------------------*/
3199static int nbu2ss_gad_ioctl(
3200        struct usb_gadget *pgadget,
3201        unsigned code,
3202        unsigned long param)
3203{
3204/*      INFO("=== %s()\n", __func__); */
3205        return 0;
3206}
3207
3208
3209static const struct usb_gadget_ops nbu2ss_gadget_ops = {
3210        .get_frame              = nbu2ss_gad_get_frame,
3211        .wakeup                 = nbu2ss_gad_wakeup,
3212        .set_selfpowered        = nbu2ss_gad_set_selfpowered,
3213        .vbus_session           = nbu2ss_gad_vbus_session,
3214        .vbus_draw              = nbu2ss_gad_vbus_draw,
3215        .pullup                 = nbu2ss_gad_pullup,
3216        .ioctl                  = nbu2ss_gad_ioctl,
3217};
3218
3219static const char g_ep0_name[] = "ep0";
3220static const char g_ep1_name[] = "ep1-bulk";
3221static const char g_ep2_name[] = "ep2-bulk";
3222static const char g_ep3_name[] = "ep3in-int";
3223static const char g_ep4_name[] = "ep4-iso";
3224static const char g_ep5_name[] = "ep5-iso";
3225static const char g_ep6_name[] = "ep6-bulk";
3226static const char g_ep7_name[] = "ep7-bulk";
3227static const char g_ep8_name[] = "ep8in-int";
3228static const char g_ep9_name[] = "ep9-iso";
3229static const char g_epa_name[] = "epa-iso";
3230static const char g_epb_name[] = "epb-bulk";
3231static const char g_epc_name[] = "epc-nulk";
3232static const char g_epd_name[] = "epdin-int";
3233
3234static const char *gp_ep_name[NUM_ENDPOINTS] = {
3235        g_ep0_name,
3236        g_ep1_name,
3237        g_ep2_name,
3238        g_ep3_name,
3239        g_ep4_name,
3240        g_ep5_name,
3241        g_ep6_name,
3242        g_ep7_name,
3243        g_ep8_name,
3244        g_ep9_name,
3245        g_epa_name,
3246        g_epb_name,
3247        g_epc_name,
3248        g_epd_name,
3249};
3250
3251/*-------------------------------------------------------------------------*/
3252static void __init nbu2ss_drv_set_ep_info(
3253        struct nbu2ss_udc       *udc,
3254        struct nbu2ss_ep        *ep,
3255        const char *name)
3256{
3257        ep->udc = udc;
3258        ep->desc = NULL;
3259
3260        ep->ep.driver_data = NULL;
3261        ep->ep.name = name;
3262        ep->ep.ops = &nbu2ss_ep_ops;
3263
3264        if (isdigit(name[2])) {
3265
3266                long    num;
3267                int     res;
3268                char    tempbuf[2];
3269
3270                tempbuf[0] = name[2];
3271                tempbuf[1] = '\0';
3272                res = kstrtol(tempbuf, 16, &num);
3273
3274                if (num == 0)
3275                        ep->ep.maxpacket = EP0_PACKETSIZE;
3276                else
3277                        ep->ep.maxpacket = EP_PACKETSIZE;
3278
3279        } else {
3280                ep->ep.maxpacket = EP_PACKETSIZE;
3281        }
3282
3283        list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
3284        INIT_LIST_HEAD(&ep->queue);
3285}
3286
3287/*-------------------------------------------------------------------------*/
3288static void __init nbu2ss_drv_ep_init(struct nbu2ss_udc *udc)
3289{
3290        int     i;
3291
3292        INIT_LIST_HEAD(&udc->gadget.ep_list);
3293        udc->gadget.ep0 = &udc->ep[0].ep;
3294
3295
3296        for (i = 0; i < NUM_ENDPOINTS; i++)
3297                nbu2ss_drv_set_ep_info(udc, &udc->ep[i], gp_ep_name[i]);
3298
3299        list_del_init(&udc->ep[0].ep.ep_list);
3300}
3301
3302/*-------------------------------------------------------------------------*/
3303/* platform_driver */
3304static int __init nbu2ss_drv_contest_init(
3305        struct platform_device *pdev,
3306        struct nbu2ss_udc *udc)
3307{
3308        spin_lock_init(&udc->lock);
3309        udc->dev = &pdev->dev;
3310
3311        udc->self_powered = 1;
3312        udc->devstate = USB_STATE_NOTATTACHED;
3313        udc->pdev = pdev;
3314        udc->mA = 0;
3315
3316        udc->pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
3317
3318        /* init Endpoint */
3319        nbu2ss_drv_ep_init(udc);
3320
3321        /* init Gadget */
3322        udc->gadget.ops = &nbu2ss_gadget_ops;
3323        udc->gadget.ep0 = &udc->ep[0].ep;
3324        udc->gadget.speed = USB_SPEED_UNKNOWN;
3325        udc->gadget.name = driver_name;
3326        /* udc->gadget.is_dualspeed = 1; */
3327
3328        device_initialize(&udc->gadget.dev);
3329
3330        dev_set_name(&udc->gadget.dev, "gadget");
3331        udc->gadget.dev.parent = &pdev->dev;
3332        udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
3333
3334        return 0;
3335}
3336
3337/*
3338 *      probe - binds to the platform device
3339 */
3340static int nbu2ss_drv_probe(struct platform_device *pdev)
3341{
3342        int     status = -ENODEV;
3343        struct nbu2ss_udc       *udc;
3344        struct resource *r;
3345        int irq;
3346        void __iomem *mmio_base;
3347
3348        udc = &udc_controller;
3349        memset(udc, 0, sizeof(struct nbu2ss_udc));
3350
3351        platform_set_drvdata(pdev, udc);
3352
3353        /* require I/O memory and IRQ to be provided as resources */
3354        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3355        mmio_base = devm_ioremap_resource(&pdev->dev, r);
3356        if (IS_ERR(mmio_base))
3357                return PTR_ERR(mmio_base);
3358
3359        irq = platform_get_irq(pdev, 0);
3360        if (irq < 0) {
3361                dev_err(&pdev->dev, "failed to get IRQ\n");
3362                return irq;
3363        }
3364        status = devm_request_irq(&pdev->dev, irq, _nbu2ss_udc_irq,
3365                                  0, driver_name, udc);
3366
3367        /* IO Memory */
3368        udc->p_regs = (PT_FC_REGS)mmio_base;
3369
3370        /* USB Function Controller Interrupt */
3371        if (status != 0) {
3372                ERR("request_irq(USB_UDC_IRQ_1) failed\n");
3373                goto cleanup1;
3374        }
3375
3376        /* Driver Initialization */
3377        status = nbu2ss_drv_contest_init(pdev, udc);
3378        if (status < 0) {
3379                /* Error */
3380                goto cleanup1;
3381        }
3382
3383        /* VBUS Interrupt */
3384        irq_set_irq_type(INT_VBUS, IRQ_TYPE_EDGE_BOTH);
3385        status = request_irq(INT_VBUS,
3386                                _nbu2ss_vbus_irq,
3387                                IRQF_SHARED,
3388                                driver_name,
3389                                udc);
3390
3391        if (status != 0) {
3392                ERR("request_irq(INT_VBUS) failed\n");
3393                goto cleanup1;
3394        }
3395
3396        return status;
3397
3398cleanup1:
3399        return status;
3400}
3401
3402/*-------------------------------------------------------------------------*/
3403static void nbu2ss_drv_shutdown(struct platform_device *pdev)
3404{
3405        struct nbu2ss_udc       *udc;
3406
3407        udc = platform_get_drvdata(pdev);
3408        if (udc == NULL)
3409                return;
3410
3411        _nbu2ss_disable_controller(udc);
3412}
3413
3414/*-------------------------------------------------------------------------*/
3415static int __exit nbu2ss_drv_remove(struct platform_device *pdev)
3416{
3417        struct nbu2ss_udc       *udc;
3418        struct nbu2ss_ep        *ep;
3419        int     i;
3420
3421        udc = &udc_controller;
3422
3423        for (i = 0; i < NUM_ENDPOINTS; i++) {
3424                ep = &udc->ep[i];
3425                if (ep->virt_buf)
3426                        dma_free_coherent(NULL, PAGE_SIZE,
3427                                (void *)ep->virt_buf, ep->phys_buf);
3428        }
3429
3430        /* Interrupt Handler - Release */
3431        free_irq(INT_VBUS, udc);
3432
3433        return 0;
3434}
3435
3436/*-------------------------------------------------------------------------*/
3437static int nbu2ss_drv_suspend(struct platform_device *pdev, pm_message_t state)
3438{
3439        struct nbu2ss_udc       *udc;
3440
3441        udc = platform_get_drvdata(pdev);
3442        if (udc == NULL)
3443                return 0;
3444
3445        if (udc->vbus_active) {
3446                udc->vbus_active = 0;
3447                udc->devstate = USB_STATE_NOTATTACHED;
3448                udc->linux_suspended = 1;
3449
3450                if (udc->usb_suspended) {
3451                        udc->usb_suspended = 0;
3452                        _nbu2ss_reset_controller(udc);
3453                }
3454
3455                _nbu2ss_quiesce(udc);
3456        }
3457        _nbu2ss_disable_controller(udc);
3458
3459        return 0;
3460}
3461
3462/*-------------------------------------------------------------------------*/
3463static int nbu2ss_drv_resume(struct platform_device *pdev)
3464{
3465        u32     data;
3466        struct nbu2ss_udc       *udc;
3467
3468        udc = platform_get_drvdata(pdev);
3469        if (udc == NULL)
3470                return 0;
3471
3472        data = gpio_get_value(VBUS_VALUE);
3473        if (data) {
3474                udc->vbus_active = 1;
3475                udc->devstate = USB_STATE_POWERED;
3476                _nbu2ss_enable_controller(udc);
3477                _nbu2ss_pullup(udc, 1);
3478        }
3479
3480        udc->linux_suspended = 0;
3481
3482        return 0;
3483}
3484
3485
3486static struct platform_driver udc_driver = {
3487        .probe          = nbu2ss_drv_probe,
3488        .shutdown       = nbu2ss_drv_shutdown,
3489        .remove         = __exit_p(nbu2ss_drv_remove),
3490        .suspend        = nbu2ss_drv_suspend,
3491        .resume         = nbu2ss_drv_resume,
3492        .driver         = {
3493                .name   = driver_name,
3494        },
3495};
3496
3497module_platform_driver(udc_driver);
3498
3499MODULE_DESCRIPTION(DRIVER_DESC);
3500MODULE_AUTHOR("Renesas Electronics Corporation");
3501MODULE_LICENSE("GPL");
3502
3503
3504
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