linux/drivers/staging/comedi/drivers/ni_6527.c
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   1/*
   2 * ni_6527.c
   3 * Comedi driver for National Instruments PCI-6527
   4 *
   5 * COMEDI - Linux Control and Measurement Device Interface
   6 * Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License as published by
  10 * the Free Software Foundation; either version 2 of the License, or
  11 * (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 */
  18
  19/*
  20 * Driver: ni_6527
  21 * Description: National Instruments 6527
  22 * Devices: (National Instruments) PCI-6527 [pci-6527]
  23 *          (National Instruments) PXI-6527 [pxi-6527]
  24 * Author: David A. Schleef <ds@schleef.org>
  25 * Updated: Sat, 25 Jan 2003 13:24:40 -0800
  26 * Status: works
  27 *
  28 * Configuration Options: not applicable, uses PCI auto config
  29 */
  30
  31#include <linux/module.h>
  32#include <linux/pci.h>
  33#include <linux/interrupt.h>
  34
  35#include "../comedidev.h"
  36
  37#include "comedi_fc.h"
  38
  39/*
  40 * PCI BAR1 - Register memory map
  41 *
  42 * Manuals (available from ftp://ftp.natinst.com/support/manuals)
  43 *      370106b.pdf     6527 Register Level Programmer Manual
  44 */
  45#define NI6527_DI_REG(x)                (0x00 + (x))
  46#define NI6527_DO_REG(x)                (0x03 + (x))
  47#define NI6527_ID_REG                   0x06
  48#define NI6527_CLR_REG                  0x07
  49#define NI6527_CLR_EDGE                 (1 << 3)
  50#define NI6527_CLR_OVERFLOW             (1 << 2)
  51#define NI6527_CLR_FILT                 (1 << 1)
  52#define NI6527_CLR_INTERVAL             (1 << 0)
  53#define NI6527_CLR_IRQS                 (NI6527_CLR_EDGE | NI6527_CLR_OVERFLOW)
  54#define NI6527_CLR_RESET_FILT           (NI6527_CLR_FILT | NI6527_CLR_INTERVAL)
  55#define NI6527_FILT_INTERVAL_REG(x)     (0x08 + (x))
  56#define NI6527_FILT_ENA_REG(x)          (0x0c + (x))
  57#define NI6527_STATUS_REG               0x14
  58#define NI6527_STATUS_IRQ               (1 << 2)
  59#define NI6527_STATUS_OVERFLOW          (1 << 1)
  60#define NI6527_STATUS_EDGE              (1 << 0)
  61#define NI6527_CTRL_REG                 0x15
  62#define NI6527_CTRL_FALLING             (1 << 4)
  63#define NI6527_CTRL_RISING              (1 << 3)
  64#define NI6527_CTRL_IRQ                 (1 << 2)
  65#define NI6527_CTRL_OVERFLOW            (1 << 1)
  66#define NI6527_CTRL_EDGE                (1 << 0)
  67#define NI6527_CTRL_DISABLE_IRQS        0
  68#define NI6527_CTRL_ENABLE_IRQS         (NI6527_CTRL_FALLING | \
  69                                         NI6527_CTRL_RISING | \
  70                                         NI6527_CTRL_IRQ | NI6527_CTRL_EDGE)
  71#define NI6527_RISING_EDGE_REG(x)       (0x18 + (x))
  72#define NI6527_FALLING_EDGE_REG(x)      (0x20 + (x))
  73
  74enum ni6527_boardid {
  75        BOARD_PCI6527,
  76        BOARD_PXI6527,
  77};
  78
  79struct ni6527_board {
  80        const char *name;
  81};
  82
  83static const struct ni6527_board ni6527_boards[] = {
  84        [BOARD_PCI6527] = {
  85                .name           = "pci-6527",
  86        },
  87        [BOARD_PXI6527] = {
  88                .name           = "pxi-6527",
  89        },
  90};
  91
  92struct ni6527_private {
  93        unsigned int filter_interval;
  94        unsigned int filter_enable;
  95};
  96
  97static void ni6527_set_filter_interval(struct comedi_device *dev,
  98                                       unsigned int val)
  99{
 100        struct ni6527_private *devpriv = dev->private;
 101
 102        if (val != devpriv->filter_interval) {
 103                writeb(val & 0xff, dev->mmio + NI6527_FILT_INTERVAL_REG(0));
 104                writeb((val >> 8) & 0xff,
 105                       dev->mmio + NI6527_FILT_INTERVAL_REG(1));
 106                writeb((val >> 16) & 0x0f,
 107                       dev->mmio + NI6527_FILT_INTERVAL_REG(2));
 108
 109                writeb(NI6527_CLR_INTERVAL, dev->mmio + NI6527_CLR_REG);
 110
 111                devpriv->filter_interval = val;
 112        }
 113}
 114
 115static void ni6527_set_filter_enable(struct comedi_device *dev,
 116                                     unsigned int val)
 117{
 118        writeb(val & 0xff, dev->mmio + NI6527_FILT_ENA_REG(0));
 119        writeb((val >> 8) & 0xff, dev->mmio + NI6527_FILT_ENA_REG(1));
 120        writeb((val >> 16) & 0xff, dev->mmio + NI6527_FILT_ENA_REG(2));
 121}
 122
 123static int ni6527_di_insn_config(struct comedi_device *dev,
 124                                 struct comedi_subdevice *s,
 125                                 struct comedi_insn *insn,
 126                                 unsigned int *data)
 127{
 128        struct ni6527_private *devpriv = dev->private;
 129        unsigned int chan = CR_CHAN(insn->chanspec);
 130        unsigned int interval;
 131
 132        switch (data[0]) {
 133        case INSN_CONFIG_FILTER:
 134                /*
 135                 * The deglitch filter interval is specified in nanoseconds.
 136                 * The hardware supports intervals in 200ns increments. Round
 137                 * the user values up and return the actual interval.
 138                 */
 139                interval = (data[1] + 100) / 200;
 140                data[1] = interval * 200;
 141
 142                if (interval) {
 143                        ni6527_set_filter_interval(dev, interval);
 144                        devpriv->filter_enable |= 1 << chan;
 145                } else {
 146                        devpriv->filter_enable &= ~(1 << chan);
 147                }
 148                ni6527_set_filter_enable(dev, devpriv->filter_enable);
 149                break;
 150        default:
 151                return -EINVAL;
 152        }
 153
 154        return insn->n;
 155}
 156
 157static int ni6527_di_insn_bits(struct comedi_device *dev,
 158                               struct comedi_subdevice *s,
 159                               struct comedi_insn *insn,
 160                               unsigned int *data)
 161{
 162        unsigned int val;
 163
 164        val = readb(dev->mmio + NI6527_DI_REG(0));
 165        val |= (readb(dev->mmio + NI6527_DI_REG(1)) << 8);
 166        val |= (readb(dev->mmio + NI6527_DI_REG(2)) << 16);
 167
 168        data[1] = val;
 169
 170        return insn->n;
 171}
 172
 173static int ni6527_do_insn_bits(struct comedi_device *dev,
 174                               struct comedi_subdevice *s,
 175                               struct comedi_insn *insn,
 176                               unsigned int *data)
 177{
 178        unsigned int mask;
 179
 180        mask = comedi_dio_update_state(s, data);
 181        if (mask) {
 182                /* Outputs are inverted */
 183                unsigned int val = s->state ^ 0xffffff;
 184
 185                if (mask & 0x0000ff)
 186                        writeb(val & 0xff, dev->mmio + NI6527_DO_REG(0));
 187                if (mask & 0x00ff00)
 188                        writeb((val >> 8) & 0xff,
 189                               dev->mmio + NI6527_DO_REG(1));
 190                if (mask & 0xff0000)
 191                        writeb((val >> 16) & 0xff,
 192                               dev->mmio + NI6527_DO_REG(2));
 193        }
 194
 195        data[1] = s->state;
 196
 197        return insn->n;
 198}
 199
 200static irqreturn_t ni6527_interrupt(int irq, void *d)
 201{
 202        struct comedi_device *dev = d;
 203        struct comedi_subdevice *s = dev->read_subdev;
 204        unsigned int status;
 205
 206        status = readb(dev->mmio + NI6527_STATUS_REG);
 207        if (!(status & NI6527_STATUS_IRQ))
 208                return IRQ_NONE;
 209
 210        if (status & NI6527_STATUS_EDGE) {
 211                comedi_buf_write_samples(s, &s->state, 1);
 212                comedi_handle_events(dev, s);
 213        }
 214
 215        writeb(NI6527_CLR_IRQS, dev->mmio + NI6527_CLR_REG);
 216
 217        return IRQ_HANDLED;
 218}
 219
 220static int ni6527_intr_cmdtest(struct comedi_device *dev,
 221                               struct comedi_subdevice *s,
 222                               struct comedi_cmd *cmd)
 223{
 224        int err = 0;
 225
 226        /* Step 1 : check if triggers are trivially valid */
 227
 228        err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
 229        err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_OTHER);
 230        err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
 231        err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
 232        err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
 233
 234        if (err)
 235                return 1;
 236
 237        /* Step 2a : make sure trigger sources are unique */
 238        /* Step 2b : and mutually compatible */
 239
 240        /* Step 3: check if arguments are trivially valid */
 241
 242        err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
 243        err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
 244        err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
 245        err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
 246        err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
 247
 248        if (err)
 249                return 3;
 250
 251        /* Step 4: fix up any arguments */
 252
 253        /* Step 5: check channel list if it exists */
 254
 255        return 0;
 256}
 257
 258static int ni6527_intr_cmd(struct comedi_device *dev,
 259                           struct comedi_subdevice *s)
 260{
 261        writeb(NI6527_CLR_IRQS, dev->mmio + NI6527_CLR_REG);
 262        writeb(NI6527_CTRL_ENABLE_IRQS, dev->mmio + NI6527_CTRL_REG);
 263
 264        return 0;
 265}
 266
 267static int ni6527_intr_cancel(struct comedi_device *dev,
 268                              struct comedi_subdevice *s)
 269{
 270        writeb(NI6527_CTRL_DISABLE_IRQS, dev->mmio + NI6527_CTRL_REG);
 271
 272        return 0;
 273}
 274
 275static int ni6527_intr_insn_bits(struct comedi_device *dev,
 276                                 struct comedi_subdevice *s,
 277                                 struct comedi_insn *insn, unsigned int *data)
 278{
 279        data[1] = 0;
 280        return insn->n;
 281}
 282
 283static void ni6527_set_edge_detection(struct comedi_device *dev,
 284                                      unsigned int mask,
 285                                      unsigned int rising,
 286                                      unsigned int falling)
 287{
 288        unsigned int i;
 289
 290        rising &= mask;
 291        falling &= mask;
 292        for (i = 0; i < 2; i++) {
 293                if (mask & 0xff) {
 294                        if (~mask & 0xff) {
 295                                /* preserve rising-edge detection channels */
 296                                rising |= readb(dev->mmio +
 297                                                NI6527_RISING_EDGE_REG(i)) &
 298                                          (~mask & 0xff);
 299                                /* preserve falling-edge detection channels */
 300                                falling |= readb(dev->mmio +
 301                                                 NI6527_FALLING_EDGE_REG(i)) &
 302                                           (~mask & 0xff);
 303                        }
 304                        /* update rising-edge detection channels */
 305                        writeb(rising & 0xff,
 306                               dev->mmio + NI6527_RISING_EDGE_REG(i));
 307                        /* update falling-edge detection channels */
 308                        writeb(falling & 0xff,
 309                               dev->mmio + NI6527_FALLING_EDGE_REG(i));
 310                }
 311                rising >>= 8;
 312                falling >>= 8;
 313                mask >>= 8;
 314        }
 315}
 316
 317static int ni6527_intr_insn_config(struct comedi_device *dev,
 318                                   struct comedi_subdevice *s,
 319                                   struct comedi_insn *insn,
 320                                   unsigned int *data)
 321{
 322        unsigned int mask = 0xffffffff;
 323        unsigned int rising, falling, shift;
 324
 325        switch (data[0]) {
 326        case INSN_CONFIG_CHANGE_NOTIFY:
 327                /* check_insn_config_length() does not check this instruction */
 328                if (insn->n != 3)
 329                        return -EINVAL;
 330                rising = data[1];
 331                falling = data[2];
 332                ni6527_set_edge_detection(dev, mask, rising, falling);
 333                break;
 334        case INSN_CONFIG_DIGITAL_TRIG:
 335                /* check trigger number */
 336                if (data[1] != 0)
 337                        return -EINVAL;
 338                /* check digital trigger operation */
 339                switch (data[2]) {
 340                case COMEDI_DIGITAL_TRIG_DISABLE:
 341                        rising = 0;
 342                        falling = 0;
 343                        break;
 344                case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
 345                        /* check shift amount */
 346                        shift = data[3];
 347                        if (shift >= s->n_chan) {
 348                                mask = 0;
 349                                rising = 0;
 350                                falling = 0;
 351                        } else {
 352                                mask <<= shift;
 353                                rising = data[4] << shift;
 354                                falling = data[5] << shift;
 355                        }
 356                        break;
 357                default:
 358                        return -EINVAL;
 359                }
 360                ni6527_set_edge_detection(dev, mask, rising, falling);
 361                break;
 362        default:
 363                return -EINVAL;
 364        }
 365
 366        return insn->n;
 367}
 368
 369static void ni6527_reset(struct comedi_device *dev)
 370{
 371        /* disable deglitch filters on all channels */
 372        ni6527_set_filter_enable(dev, 0);
 373
 374        /* disable edge detection */
 375        ni6527_set_edge_detection(dev, 0xffffffff, 0, 0);
 376
 377        writeb(NI6527_CLR_IRQS | NI6527_CLR_RESET_FILT,
 378               dev->mmio + NI6527_CLR_REG);
 379        writeb(NI6527_CTRL_DISABLE_IRQS, dev->mmio + NI6527_CTRL_REG);
 380}
 381
 382static int ni6527_auto_attach(struct comedi_device *dev,
 383                              unsigned long context)
 384{
 385        struct pci_dev *pcidev = comedi_to_pci_dev(dev);
 386        const struct ni6527_board *board = NULL;
 387        struct ni6527_private *devpriv;
 388        struct comedi_subdevice *s;
 389        int ret;
 390
 391        if (context < ARRAY_SIZE(ni6527_boards))
 392                board = &ni6527_boards[context];
 393        if (!board)
 394                return -ENODEV;
 395        dev->board_ptr = board;
 396        dev->board_name = board->name;
 397
 398        devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
 399        if (!devpriv)
 400                return -ENOMEM;
 401
 402        ret = comedi_pci_enable(dev);
 403        if (ret)
 404                return ret;
 405
 406        dev->mmio = pci_ioremap_bar(pcidev, 1);
 407        if (!dev->mmio)
 408                return -ENOMEM;
 409
 410        /* make sure this is actually a 6527 device */
 411        if (readb(dev->mmio + NI6527_ID_REG) != 0x27)
 412                return -ENODEV;
 413
 414        ni6527_reset(dev);
 415
 416        ret = request_irq(pcidev->irq, ni6527_interrupt, IRQF_SHARED,
 417                          dev->board_name, dev);
 418        if (ret == 0)
 419                dev->irq = pcidev->irq;
 420
 421        ret = comedi_alloc_subdevices(dev, 3);
 422        if (ret)
 423                return ret;
 424
 425        /* Digital Input subdevice */
 426        s = &dev->subdevices[0];
 427        s->type         = COMEDI_SUBD_DI;
 428        s->subdev_flags = SDF_READABLE;
 429        s->n_chan       = 24;
 430        s->maxdata      = 1;
 431        s->range_table  = &range_digital;
 432        s->insn_config  = ni6527_di_insn_config;
 433        s->insn_bits    = ni6527_di_insn_bits;
 434
 435        /* Digital Output subdevice */
 436        s = &dev->subdevices[1];
 437        s->type         = COMEDI_SUBD_DO;
 438        s->subdev_flags = SDF_WRITABLE;
 439        s->n_chan       = 24;
 440        s->maxdata      = 1;
 441        s->range_table  = &range_digital;
 442        s->insn_bits    = ni6527_do_insn_bits;
 443
 444        /* Edge detection interrupt subdevice */
 445        s = &dev->subdevices[2];
 446        if (dev->irq) {
 447                dev->read_subdev = s;
 448                s->type         = COMEDI_SUBD_DI;
 449                s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
 450                s->n_chan       = 1;
 451                s->maxdata      = 1;
 452                s->range_table  = &range_digital;
 453                s->insn_config  = ni6527_intr_insn_config;
 454                s->insn_bits    = ni6527_intr_insn_bits;
 455                s->len_chanlist = 1;
 456                s->do_cmdtest   = ni6527_intr_cmdtest;
 457                s->do_cmd       = ni6527_intr_cmd;
 458                s->cancel       = ni6527_intr_cancel;
 459        } else {
 460                s->type = COMEDI_SUBD_UNUSED;
 461        }
 462
 463        return 0;
 464}
 465
 466static void ni6527_detach(struct comedi_device *dev)
 467{
 468        if (dev->mmio)
 469                ni6527_reset(dev);
 470        comedi_pci_detach(dev);
 471}
 472
 473static struct comedi_driver ni6527_driver = {
 474        .driver_name    = "ni_6527",
 475        .module         = THIS_MODULE,
 476        .auto_attach    = ni6527_auto_attach,
 477        .detach         = ni6527_detach,
 478};
 479
 480static int ni6527_pci_probe(struct pci_dev *dev,
 481                            const struct pci_device_id *id)
 482{
 483        return comedi_pci_auto_config(dev, &ni6527_driver, id->driver_data);
 484}
 485
 486static const struct pci_device_id ni6527_pci_table[] = {
 487        { PCI_VDEVICE(NI, 0x2b10), BOARD_PXI6527 },
 488        { PCI_VDEVICE(NI, 0x2b20), BOARD_PCI6527 },
 489        { 0 }
 490};
 491MODULE_DEVICE_TABLE(pci, ni6527_pci_table);
 492
 493static struct pci_driver ni6527_pci_driver = {
 494        .name           = "ni_6527",
 495        .id_table       = ni6527_pci_table,
 496        .probe          = ni6527_pci_probe,
 497        .remove         = comedi_pci_auto_unconfig,
 498};
 499module_comedi_pci_driver(ni6527_driver, ni6527_pci_driver);
 500
 501MODULE_AUTHOR("Comedi http://www.comedi.org");
 502MODULE_DESCRIPTION("Comedi driver for National Instruments PCI-6527");
 503MODULE_LICENSE("GPL");
 504
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