linux/drivers/reset/reset-socfpga.c
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   1/*
   2 * Copyright 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
   3 *
   4 * based on
   5 * Allwinner SoCs Reset Controller driver
   6 *
   7 * Copyright 2013 Maxime Ripard
   8 *
   9 * Maxime Ripard <maxime.ripard@free-electrons.com>
  10 *
  11 * This program is free software; you can redistribute it and/or modify
  12 * it under the terms of the GNU General Public License as published by
  13 * the Free Software Foundation; either version 2 of the License, or
  14 * (at your option) any later version.
  15 */
  16
  17#include <linux/err.h>
  18#include <linux/io.h>
  19#include <linux/module.h>
  20#include <linux/of.h>
  21#include <linux/platform_device.h>
  22#include <linux/reset-controller.h>
  23#include <linux/spinlock.h>
  24#include <linux/types.h>
  25
  26#define NR_BANKS                4
  27#define OFFSET_MODRST           0x10
  28
  29struct socfpga_reset_data {
  30        spinlock_t                      lock;
  31        void __iomem                    *membase;
  32        struct reset_controller_dev     rcdev;
  33};
  34
  35static int socfpga_reset_assert(struct reset_controller_dev *rcdev,
  36                                unsigned long id)
  37{
  38        struct socfpga_reset_data *data = container_of(rcdev,
  39                                                     struct socfpga_reset_data,
  40                                                     rcdev);
  41        int bank = id / BITS_PER_LONG;
  42        int offset = id % BITS_PER_LONG;
  43        unsigned long flags;
  44        u32 reg;
  45
  46        spin_lock_irqsave(&data->lock, flags);
  47
  48        reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS));
  49        writel(reg | BIT(offset), data->membase + OFFSET_MODRST +
  50                                 (bank * NR_BANKS));
  51        spin_unlock_irqrestore(&data->lock, flags);
  52
  53        return 0;
  54}
  55
  56static int socfpga_reset_deassert(struct reset_controller_dev *rcdev,
  57                                  unsigned long id)
  58{
  59        struct socfpga_reset_data *data = container_of(rcdev,
  60                                                     struct socfpga_reset_data,
  61                                                     rcdev);
  62
  63        int bank = id / BITS_PER_LONG;
  64        int offset = id % BITS_PER_LONG;
  65        unsigned long flags;
  66        u32 reg;
  67
  68        spin_lock_irqsave(&data->lock, flags);
  69
  70        reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS));
  71        writel(reg & ~BIT(offset), data->membase + OFFSET_MODRST +
  72                                  (bank * NR_BANKS));
  73
  74        spin_unlock_irqrestore(&data->lock, flags);
  75
  76        return 0;
  77}
  78
  79static int socfpga_reset_status(struct reset_controller_dev *rcdev,
  80                                unsigned long id)
  81{
  82        struct socfpga_reset_data *data = container_of(rcdev,
  83                                                struct socfpga_reset_data, rcdev);
  84        int bank = id / BITS_PER_LONG;
  85        int offset = id % BITS_PER_LONG;
  86        u32 reg;
  87
  88        reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS));
  89
  90        return !(reg & BIT(offset));
  91}
  92
  93static struct reset_control_ops socfpga_reset_ops = {
  94        .assert         = socfpga_reset_assert,
  95        .deassert       = socfpga_reset_deassert,
  96        .status         = socfpga_reset_status,
  97};
  98
  99static int socfpga_reset_probe(struct platform_device *pdev)
 100{
 101        struct socfpga_reset_data *data;
 102        struct resource *res;
 103
 104        /*
 105         * The binding was mainlined without the required property.
 106         * Do not continue, when we encounter an old DT.
 107         */
 108        if (!of_find_property(pdev->dev.of_node, "#reset-cells", NULL)) {
 109                dev_err(&pdev->dev, "%s missing #reset-cells property\n",
 110                        pdev->dev.of_node->full_name);
 111                return -EINVAL;
 112        }
 113
 114        data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
 115        if (!data)
 116                return -ENOMEM;
 117
 118        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 119        data->membase = devm_ioremap_resource(&pdev->dev, res);
 120        if (IS_ERR(data->membase))
 121                return PTR_ERR(data->membase);
 122
 123        spin_lock_init(&data->lock);
 124
 125        data->rcdev.owner = THIS_MODULE;
 126        data->rcdev.nr_resets = NR_BANKS * BITS_PER_LONG;
 127        data->rcdev.ops = &socfpga_reset_ops;
 128        data->rcdev.of_node = pdev->dev.of_node;
 129        reset_controller_register(&data->rcdev);
 130
 131        return 0;
 132}
 133
 134static int socfpga_reset_remove(struct platform_device *pdev)
 135{
 136        struct socfpga_reset_data *data = platform_get_drvdata(pdev);
 137
 138        reset_controller_unregister(&data->rcdev);
 139
 140        return 0;
 141}
 142
 143static const struct of_device_id socfpga_reset_dt_ids[] = {
 144        { .compatible = "altr,rst-mgr", },
 145        { /* sentinel */ },
 146};
 147
 148static struct platform_driver socfpga_reset_driver = {
 149        .probe  = socfpga_reset_probe,
 150        .remove = socfpga_reset_remove,
 151        .driver = {
 152                .name           = "socfpga-reset",
 153                .of_match_table = socfpga_reset_dt_ids,
 154        },
 155};
 156module_platform_driver(socfpga_reset_driver);
 157
 158MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de");
 159MODULE_DESCRIPTION("Socfpga Reset Controller Driver");
 160MODULE_LICENSE("GPL");
 161
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