linux/drivers/pinctrl/nomadik/pinctrl-abx500.c
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   1/*
   2 * Copyright (C) ST-Ericsson SA 2013
   3 *
   4 * Author: Patrice Chotard <patrice.chotard@st.com>
   5 * License terms: GNU General Public License (GPL) version 2
   6 *
   7 * Driver allows to use AxB5xx unused pins to be used as GPIO
   8 *
   9 * This program is free software; you can redistribute it and/or modify
  10 * it under the terms of the GNU General Public License version 2 as
  11 * published by the Free Software Foundation.
  12 */
  13#include <linux/kernel.h>
  14#include <linux/types.h>
  15#include <linux/slab.h>
  16#include <linux/init.h>
  17#include <linux/err.h>
  18#include <linux/of.h>
  19#include <linux/of_device.h>
  20#include <linux/platform_device.h>
  21#include <linux/gpio.h>
  22#include <linux/irq.h>
  23#include <linux/irqdomain.h>
  24#include <linux/interrupt.h>
  25#include <linux/bitops.h>
  26#include <linux/mfd/abx500.h>
  27#include <linux/mfd/abx500/ab8500.h>
  28#include <linux/pinctrl/pinctrl.h>
  29#include <linux/pinctrl/consumer.h>
  30#include <linux/pinctrl/pinmux.h>
  31#include <linux/pinctrl/pinconf.h>
  32#include <linux/pinctrl/pinconf-generic.h>
  33#include <linux/pinctrl/machine.h>
  34
  35#include "pinctrl-abx500.h"
  36#include "../core.h"
  37#include "../pinconf.h"
  38#include "../pinctrl-utils.h"
  39
  40/*
  41 * The AB9540 and AB8540 GPIO support are extended versions
  42 * of the AB8500 GPIO support.
  43 * The AB9540 supports an additional (7th) register so that
  44 * more GPIO may be configured and used.
  45 * The AB8540 supports 4 new gpios (GPIOx_VBAT) that have
  46 * internal pull-up and pull-down capabilities.
  47 */
  48
  49/*
  50 * GPIO registers offset
  51 * Bank: 0x10
  52 */
  53#define AB8500_GPIO_SEL1_REG    0x00
  54#define AB8500_GPIO_SEL2_REG    0x01
  55#define AB8500_GPIO_SEL3_REG    0x02
  56#define AB8500_GPIO_SEL4_REG    0x03
  57#define AB8500_GPIO_SEL5_REG    0x04
  58#define AB8500_GPIO_SEL6_REG    0x05
  59#define AB9540_GPIO_SEL7_REG    0x06
  60
  61#define AB8500_GPIO_DIR1_REG    0x10
  62#define AB8500_GPIO_DIR2_REG    0x11
  63#define AB8500_GPIO_DIR3_REG    0x12
  64#define AB8500_GPIO_DIR4_REG    0x13
  65#define AB8500_GPIO_DIR5_REG    0x14
  66#define AB8500_GPIO_DIR6_REG    0x15
  67#define AB9540_GPIO_DIR7_REG    0x16
  68
  69#define AB8500_GPIO_OUT1_REG    0x20
  70#define AB8500_GPIO_OUT2_REG    0x21
  71#define AB8500_GPIO_OUT3_REG    0x22
  72#define AB8500_GPIO_OUT4_REG    0x23
  73#define AB8500_GPIO_OUT5_REG    0x24
  74#define AB8500_GPIO_OUT6_REG    0x25
  75#define AB9540_GPIO_OUT7_REG    0x26
  76
  77#define AB8500_GPIO_PUD1_REG    0x30
  78#define AB8500_GPIO_PUD2_REG    0x31
  79#define AB8500_GPIO_PUD3_REG    0x32
  80#define AB8500_GPIO_PUD4_REG    0x33
  81#define AB8500_GPIO_PUD5_REG    0x34
  82#define AB8500_GPIO_PUD6_REG    0x35
  83#define AB9540_GPIO_PUD7_REG    0x36
  84
  85#define AB8500_GPIO_IN1_REG     0x40
  86#define AB8500_GPIO_IN2_REG     0x41
  87#define AB8500_GPIO_IN3_REG     0x42
  88#define AB8500_GPIO_IN4_REG     0x43
  89#define AB8500_GPIO_IN5_REG     0x44
  90#define AB8500_GPIO_IN6_REG     0x45
  91#define AB9540_GPIO_IN7_REG     0x46
  92#define AB8540_GPIO_VINSEL_REG  0x47
  93#define AB8540_GPIO_PULL_UPDOWN_REG     0x48
  94#define AB8500_GPIO_ALTFUN_REG  0x50
  95#define AB8540_GPIO_PULL_UPDOWN_MASK    0x03
  96#define AB8540_GPIO_VINSEL_MASK 0x03
  97#define AB8540_GPIOX_VBAT_START 51
  98#define AB8540_GPIOX_VBAT_END   54
  99
 100#define ABX500_GPIO_INPUT       0
 101#define ABX500_GPIO_OUTPUT      1
 102
 103struct abx500_pinctrl {
 104        struct device *dev;
 105        struct pinctrl_dev *pctldev;
 106        struct abx500_pinctrl_soc_data *soc;
 107        struct gpio_chip chip;
 108        struct ab8500 *parent;
 109        struct abx500_gpio_irq_cluster *irq_cluster;
 110        int irq_cluster_size;
 111};
 112
 113static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
 114                               unsigned offset, bool *bit)
 115{
 116        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 117        u8 pos = offset % 8;
 118        u8 val;
 119        int ret;
 120
 121        reg += offset / 8;
 122        ret = abx500_get_register_interruptible(pct->dev,
 123                                                AB8500_MISC, reg, &val);
 124
 125        *bit = !!(val & BIT(pos));
 126
 127        if (ret < 0)
 128                dev_err(pct->dev,
 129                        "%s read reg =%x, offset=%x failed (%d)\n",
 130                        __func__, reg, offset, ret);
 131
 132        return ret;
 133}
 134
 135static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
 136                                unsigned offset, int val)
 137{
 138        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 139        u8 pos = offset % 8;
 140        int ret;
 141
 142        reg += offset / 8;
 143        ret = abx500_mask_and_set_register_interruptible(pct->dev,
 144                                AB8500_MISC, reg, BIT(pos), val << pos);
 145        if (ret < 0)
 146                dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
 147                                __func__, reg, offset, ret);
 148
 149        return ret;
 150}
 151
 152/**
 153 * abx500_gpio_get() - Get the particular GPIO value
 154 * @chip:       Gpio device
 155 * @offset:     GPIO number to read
 156 */
 157static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
 158{
 159        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 160        bool bit;
 161        bool is_out;
 162        u8 gpio_offset = offset - 1;
 163        int ret;
 164
 165        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
 166                        gpio_offset, &is_out);
 167        if (ret < 0)
 168                goto out;
 169
 170        if (is_out)
 171                ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
 172                                gpio_offset, &bit);
 173        else
 174                ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
 175                                gpio_offset, &bit);
 176out:
 177        if (ret < 0) {
 178                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 179                return ret;
 180        }
 181
 182        return bit;
 183}
 184
 185static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
 186{
 187        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 188        int ret;
 189
 190        ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
 191        if (ret < 0)
 192                dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
 193}
 194
 195#ifdef CONFIG_DEBUG_FS
 196static int abx500_get_pull_updown(struct abx500_pinctrl *pct, int offset,
 197                                  enum abx500_gpio_pull_updown *pull_updown)
 198{
 199        u8 pos;
 200        u8 val;
 201        int ret;
 202        struct pullud *pullud;
 203
 204        if (!pct->soc->pullud) {
 205                dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
 206                                __func__);
 207                ret = -EPERM;
 208                goto out;
 209        }
 210
 211        pullud = pct->soc->pullud;
 212
 213        if ((offset < pullud->first_pin)
 214                || (offset > pullud->last_pin)) {
 215                ret = -EINVAL;
 216                goto out;
 217        }
 218
 219        ret = abx500_get_register_interruptible(pct->dev,
 220                        AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG, &val);
 221
 222        pos = (offset - pullud->first_pin) << 1;
 223        *pull_updown = (val >> pos) & AB8540_GPIO_PULL_UPDOWN_MASK;
 224
 225out:
 226        if (ret < 0)
 227                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 228
 229        return ret;
 230}
 231#endif
 232
 233static int abx500_set_pull_updown(struct abx500_pinctrl *pct,
 234                                  int offset, enum abx500_gpio_pull_updown val)
 235{
 236        u8 pos;
 237        int ret;
 238        struct pullud *pullud;
 239
 240        if (!pct->soc->pullud) {
 241                dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
 242                                __func__);
 243                ret = -EPERM;
 244                goto out;
 245        }
 246
 247        pullud = pct->soc->pullud;
 248
 249        if ((offset < pullud->first_pin)
 250                || (offset > pullud->last_pin)) {
 251                ret = -EINVAL;
 252                goto out;
 253        }
 254        pos = (offset - pullud->first_pin) << 1;
 255
 256        ret = abx500_mask_and_set_register_interruptible(pct->dev,
 257                        AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG,
 258                        AB8540_GPIO_PULL_UPDOWN_MASK << pos, val << pos);
 259
 260out:
 261        if (ret < 0)
 262                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 263
 264        return ret;
 265}
 266
 267static bool abx500_pullud_supported(struct gpio_chip *chip, unsigned gpio)
 268{
 269        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 270        struct pullud *pullud = pct->soc->pullud;
 271
 272        return (pullud &&
 273                gpio >= pullud->first_pin &&
 274                gpio <= pullud->last_pin);
 275}
 276
 277static int abx500_gpio_direction_output(struct gpio_chip *chip,
 278                                        unsigned offset,
 279                                        int val)
 280{
 281        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 282        unsigned gpio;
 283        int ret;
 284
 285        /* set direction as output */
 286        ret = abx500_gpio_set_bits(chip,
 287                                AB8500_GPIO_DIR1_REG,
 288                                offset,
 289                                ABX500_GPIO_OUTPUT);
 290        if (ret < 0)
 291                goto out;
 292
 293        /* disable pull down */
 294        ret = abx500_gpio_set_bits(chip,
 295                                AB8500_GPIO_PUD1_REG,
 296                                offset,
 297                                ABX500_GPIO_PULL_NONE);
 298        if (ret < 0)
 299                goto out;
 300
 301        /* if supported, disable both pull down and pull up */
 302        gpio = offset + 1;
 303        if (abx500_pullud_supported(chip, gpio)) {
 304                ret = abx500_set_pull_updown(pct,
 305                                gpio,
 306                                ABX500_GPIO_PULL_NONE);
 307        }
 308out:
 309        if (ret < 0) {
 310                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 311                return ret;
 312        }
 313
 314        /* set the output as 1 or 0 */
 315        return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
 316}
 317
 318static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 319{
 320        /* set the register as input */
 321        return abx500_gpio_set_bits(chip,
 322                                AB8500_GPIO_DIR1_REG,
 323                                offset,
 324                                ABX500_GPIO_INPUT);
 325}
 326
 327static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
 328{
 329        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 330        /* The AB8500 GPIO numbers are off by one */
 331        int gpio = offset + 1;
 332        int hwirq;
 333        int i;
 334
 335        for (i = 0; i < pct->irq_cluster_size; i++) {
 336                struct abx500_gpio_irq_cluster *cluster =
 337                        &pct->irq_cluster[i];
 338
 339                if (gpio >= cluster->start && gpio <= cluster->end) {
 340                        /*
 341                         * The ABx500 GPIO's associated IRQs are clustered together
 342                         * throughout the interrupt numbers at irregular intervals.
 343                         * To solve this quandry, we have placed the read-in values
 344                         * into the cluster information table.
 345                         */
 346                        hwirq = gpio - cluster->start + cluster->to_irq;
 347                        return irq_create_mapping(pct->parent->domain, hwirq);
 348                }
 349        }
 350
 351        return -EINVAL;
 352}
 353
 354static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
 355                           unsigned gpio, int alt_setting)
 356{
 357        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 358        struct alternate_functions af = pct->soc->alternate_functions[gpio];
 359        int ret;
 360        int val;
 361        unsigned offset;
 362
 363        const char *modes[] = {
 364                [ABX500_DEFAULT]        = "default",
 365                [ABX500_ALT_A]          = "altA",
 366                [ABX500_ALT_B]          = "altB",
 367                [ABX500_ALT_C]          = "altC",
 368        };
 369
 370        /* sanity check */
 371        if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
 372            ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
 373            ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
 374                dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
 375                                modes[alt_setting]);
 376                return -EINVAL;
 377        }
 378
 379        /* on ABx5xx, there is no GPIO0, so adjust the offset */
 380        offset = gpio - 1;
 381
 382        switch (alt_setting) {
 383        case ABX500_DEFAULT:
 384                /*
 385                 * for ABx5xx family, default mode is always selected by
 386                 * writing 0 to GPIOSELx register, except for pins which
 387                 * support at least ALT_B mode, default mode is selected
 388                 * by writing 1 to GPIOSELx register
 389                 */
 390                val = 0;
 391                if (af.alt_bit1 != UNUSED)
 392                        val++;
 393
 394                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 395                                           offset, val);
 396                break;
 397
 398        case ABX500_ALT_A:
 399                /*
 400                 * for ABx5xx family, alt_a mode is always selected by
 401                 * writing 1 to GPIOSELx register, except for pins which
 402                 * support at least ALT_B mode, alt_a mode is selected
 403                 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
 404                 * register
 405                 */
 406                if (af.alt_bit1 != UNUSED) {
 407                        ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 408                                        offset, 0);
 409                        if (ret < 0)
 410                                goto out;
 411
 412                        ret = abx500_gpio_set_bits(chip,
 413                                        AB8500_GPIO_ALTFUN_REG,
 414                                        af.alt_bit1,
 415                                        !!(af.alta_val & BIT(0)));
 416                        if (ret < 0)
 417                                goto out;
 418
 419                        if (af.alt_bit2 != UNUSED)
 420                                ret = abx500_gpio_set_bits(chip,
 421                                        AB8500_GPIO_ALTFUN_REG,
 422                                        af.alt_bit2,
 423                                        !!(af.alta_val & BIT(1)));
 424                } else
 425                        ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 426                                        offset, 1);
 427                break;
 428
 429        case ABX500_ALT_B:
 430                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 431                                offset, 0);
 432                if (ret < 0)
 433                        goto out;
 434
 435                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 436                                af.alt_bit1, !!(af.altb_val & BIT(0)));
 437                if (ret < 0)
 438                        goto out;
 439
 440                if (af.alt_bit2 != UNUSED)
 441                        ret = abx500_gpio_set_bits(chip,
 442                                        AB8500_GPIO_ALTFUN_REG,
 443                                        af.alt_bit2,
 444                                        !!(af.altb_val & BIT(1)));
 445                break;
 446
 447        case ABX500_ALT_C:
 448                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 449                                offset, 0);
 450                if (ret < 0)
 451                        goto out;
 452
 453                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 454                                af.alt_bit2, !!(af.altc_val & BIT(0)));
 455                if (ret < 0)
 456                        goto out;
 457
 458                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 459                                af.alt_bit2, !!(af.altc_val & BIT(1)));
 460                break;
 461
 462        default:
 463                dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting);
 464
 465                return -EINVAL;
 466        }
 467out:
 468        if (ret < 0)
 469                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 470
 471        return ret;
 472}
 473
 474#ifdef CONFIG_DEBUG_FS
 475static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
 476                          unsigned gpio)
 477{
 478        u8 mode;
 479        bool bit_mode;
 480        bool alt_bit1;
 481        bool alt_bit2;
 482        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 483        struct alternate_functions af = pct->soc->alternate_functions[gpio];
 484        /* on ABx5xx, there is no GPIO0, so adjust the offset */
 485        unsigned offset = gpio - 1;
 486        int ret;
 487
 488        /*
 489         * if gpiosel_bit is set to unused,
 490         * it means no GPIO or special case
 491         */
 492        if (af.gpiosel_bit == UNUSED)
 493                return ABX500_DEFAULT;
 494
 495        /* read GpioSelx register */
 496        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
 497                        af.gpiosel_bit, &bit_mode);
 498        if (ret < 0)
 499                goto out;
 500
 501        mode = bit_mode;
 502
 503        /* sanity check */
 504        if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
 505            (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
 506                dev_err(pct->dev,
 507                        "alt_bitX value not in correct range (-1 to 7)\n");
 508                return -EINVAL;
 509        }
 510
 511        /* if alt_bit2 is used, alt_bit1 must be used too */
 512        if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
 513                dev_err(pct->dev,
 514                        "if alt_bit2 is used, alt_bit1 can't be unused\n");
 515                return -EINVAL;
 516        }
 517
 518        /* check if pin use AlternateFunction register */
 519        if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
 520                return mode;
 521        /*
 522         * if pin GPIOSEL bit is set and pin supports alternate function,
 523         * it means DEFAULT mode
 524         */
 525        if (mode)
 526                return ABX500_DEFAULT;
 527
 528        /*
 529         * pin use the AlternatFunction register
 530         * read alt_bit1 value
 531         */
 532        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
 533                            af.alt_bit1, &alt_bit1);
 534        if (ret < 0)
 535                goto out;
 536
 537        if (af.alt_bit2 != UNUSED) {
 538                /* read alt_bit2 value */
 539                ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
 540                                af.alt_bit2,
 541                                &alt_bit2);
 542                if (ret < 0)
 543                        goto out;
 544        } else
 545                alt_bit2 = 0;
 546
 547        mode = (alt_bit2 << 1) + alt_bit1;
 548        if (mode == af.alta_val)
 549                return ABX500_ALT_A;
 550        else if (mode == af.altb_val)
 551                return ABX500_ALT_B;
 552        else
 553                return ABX500_ALT_C;
 554
 555out:
 556        dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 557        return ret;
 558}
 559
 560#include <linux/seq_file.h>
 561
 562static void abx500_gpio_dbg_show_one(struct seq_file *s,
 563                                     struct pinctrl_dev *pctldev,
 564                                     struct gpio_chip *chip,
 565                                     unsigned offset, unsigned gpio)
 566{
 567        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 568        const char *label = gpiochip_is_requested(chip, offset - 1);
 569        u8 gpio_offset = offset - 1;
 570        int mode = -1;
 571        bool is_out;
 572        bool pd;
 573        enum abx500_gpio_pull_updown pud = 0;
 574        int ret;
 575
 576        const char *modes[] = {
 577                [ABX500_DEFAULT]        = "default",
 578                [ABX500_ALT_A]          = "altA",
 579                [ABX500_ALT_B]          = "altB",
 580                [ABX500_ALT_C]          = "altC",
 581        };
 582
 583        const char *pull_up_down[] = {
 584                [ABX500_GPIO_PULL_DOWN]         = "pull down",
 585                [ABX500_GPIO_PULL_NONE]         = "pull none",
 586                [ABX500_GPIO_PULL_NONE + 1]     = "pull none",
 587                [ABX500_GPIO_PULL_UP]           = "pull up",
 588        };
 589
 590        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
 591                        gpio_offset, &is_out);
 592        if (ret < 0)
 593                goto out;
 594
 595        seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
 596                   gpio, label ?: "(none)",
 597                   is_out ? "out" : "in ");
 598
 599        if (!is_out) {
 600                if (abx500_pullud_supported(chip, offset)) {
 601                        ret = abx500_get_pull_updown(pct, offset, &pud);
 602                        if (ret < 0)
 603                                goto out;
 604
 605                        seq_printf(s, " %-9s", pull_up_down[pud]);
 606                } else {
 607                        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
 608                                        gpio_offset, &pd);
 609                        if (ret < 0)
 610                                goto out;
 611
 612                        seq_printf(s, " %-9s", pull_up_down[pd]);
 613                }
 614        } else
 615                seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
 616
 617        mode = abx500_get_mode(pctldev, chip, offset);
 618
 619        seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
 620
 621out:
 622        if (ret < 0)
 623                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 624}
 625
 626static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 627{
 628        unsigned i;
 629        unsigned gpio = chip->base;
 630        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 631        struct pinctrl_dev *pctldev = pct->pctldev;
 632
 633        for (i = 0; i < chip->ngpio; i++, gpio++) {
 634                /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
 635                abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
 636                seq_printf(s, "\n");
 637        }
 638}
 639
 640#else
 641static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
 642                                            struct pinctrl_dev *pctldev,
 643                                            struct gpio_chip *chip,
 644                                            unsigned offset, unsigned gpio)
 645{
 646}
 647#define abx500_gpio_dbg_show    NULL
 648#endif
 649
 650static struct gpio_chip abx500gpio_chip = {
 651        .label                  = "abx500-gpio",
 652        .owner                  = THIS_MODULE,
 653        .request                = gpiochip_generic_request,
 654        .free                   = gpiochip_generic_free,
 655        .direction_input        = abx500_gpio_direction_input,
 656        .get                    = abx500_gpio_get,
 657        .direction_output       = abx500_gpio_direction_output,
 658        .set                    = abx500_gpio_set,
 659        .to_irq                 = abx500_gpio_to_irq,
 660        .dbg_show               = abx500_gpio_dbg_show,
 661};
 662
 663static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
 664{
 665        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 666
 667        return pct->soc->nfunctions;
 668}
 669
 670static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
 671                                         unsigned function)
 672{
 673        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 674
 675        return pct->soc->functions[function].name;
 676}
 677
 678static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
 679                                      unsigned function,
 680                                      const char * const **groups,
 681                                      unsigned * const num_groups)
 682{
 683        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 684
 685        *groups = pct->soc->functions[function].groups;
 686        *num_groups = pct->soc->functions[function].ngroups;
 687
 688        return 0;
 689}
 690
 691static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
 692                          unsigned group)
 693{
 694        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 695        struct gpio_chip *chip = &pct->chip;
 696        const struct abx500_pingroup *g;
 697        int i;
 698        int ret = 0;
 699
 700        g = &pct->soc->groups[group];
 701        if (g->altsetting < 0)
 702                return -EINVAL;
 703
 704        dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
 705
 706        for (i = 0; i < g->npins; i++) {
 707                dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
 708                        g->pins[i], g->altsetting);
 709
 710                ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
 711        }
 712
 713        if (ret < 0)
 714                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 715
 716        return ret;
 717}
 718
 719static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
 720                               struct pinctrl_gpio_range *range,
 721                               unsigned offset)
 722{
 723        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 724        const struct abx500_pinrange *p;
 725        int ret;
 726        int i;
 727
 728        /*
 729         * Different ranges have different ways to enable GPIO function on a
 730         * pin, so refer back to our local range type, where we handily define
 731         * what altfunc enables GPIO for a certain pin.
 732         */
 733        for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
 734                p = &pct->soc->gpio_ranges[i];
 735                if ((offset >= p->offset) &&
 736                    (offset < (p->offset + p->npins)))
 737                  break;
 738        }
 739
 740        if (i == pct->soc->gpio_num_ranges) {
 741                dev_err(pct->dev, "%s failed to locate range\n", __func__);
 742                return -ENODEV;
 743        }
 744
 745        dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
 746                p->altfunc, offset);
 747
 748        ret = abx500_set_mode(pct->pctldev, &pct->chip,
 749                              offset, p->altfunc);
 750        if (ret < 0)
 751                dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
 752
 753        return ret;
 754}
 755
 756static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
 757                                     struct pinctrl_gpio_range *range,
 758                                     unsigned offset)
 759{
 760}
 761
 762static const struct pinmux_ops abx500_pinmux_ops = {
 763        .get_functions_count = abx500_pmx_get_funcs_cnt,
 764        .get_function_name = abx500_pmx_get_func_name,
 765        .get_function_groups = abx500_pmx_get_func_groups,
 766        .set_mux = abx500_pmx_set,
 767        .gpio_request_enable = abx500_gpio_request_enable,
 768        .gpio_disable_free = abx500_gpio_disable_free,
 769};
 770
 771static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
 772{
 773        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 774
 775        return pct->soc->ngroups;
 776}
 777
 778static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
 779                                         unsigned selector)
 780{
 781        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 782
 783        return pct->soc->groups[selector].name;
 784}
 785
 786static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
 787                                 unsigned selector,
 788                                 const unsigned **pins,
 789                                 unsigned *num_pins)
 790{
 791        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 792
 793        *pins = pct->soc->groups[selector].pins;
 794        *num_pins = pct->soc->groups[selector].npins;
 795
 796        return 0;
 797}
 798
 799static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
 800                                struct seq_file *s, unsigned offset)
 801{
 802        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 803        struct gpio_chip *chip = &pct->chip;
 804
 805        abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
 806                                 chip->base + offset - 1);
 807}
 808
 809static int abx500_dt_add_map_mux(struct pinctrl_map **map,
 810                unsigned *reserved_maps,
 811                unsigned *num_maps, const char *group,
 812                const char *function)
 813{
 814        if (*num_maps == *reserved_maps)
 815                return -ENOSPC;
 816
 817        (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
 818        (*map)[*num_maps].data.mux.group = group;
 819        (*map)[*num_maps].data.mux.function = function;
 820        (*num_maps)++;
 821
 822        return 0;
 823}
 824
 825static int abx500_dt_add_map_configs(struct pinctrl_map **map,
 826                unsigned *reserved_maps,
 827                unsigned *num_maps, const char *group,
 828                unsigned long *configs, unsigned num_configs)
 829{
 830        unsigned long *dup_configs;
 831
 832        if (*num_maps == *reserved_maps)
 833                return -ENOSPC;
 834
 835        dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
 836                              GFP_KERNEL);
 837        if (!dup_configs)
 838                return -ENOMEM;
 839
 840        (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
 841
 842        (*map)[*num_maps].data.configs.group_or_pin = group;
 843        (*map)[*num_maps].data.configs.configs = dup_configs;
 844        (*map)[*num_maps].data.configs.num_configs = num_configs;
 845        (*num_maps)++;
 846
 847        return 0;
 848}
 849
 850static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
 851                                        const char *pin_name)
 852{
 853        int i, pin_number;
 854        struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
 855
 856        if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
 857                for (i = 0; i < npct->soc->npins; i++)
 858                        if (npct->soc->pins[i].number == pin_number)
 859                                return npct->soc->pins[i].name;
 860        return NULL;
 861}
 862
 863static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 864                struct device_node *np,
 865                struct pinctrl_map **map,
 866                unsigned *reserved_maps,
 867                unsigned *num_maps)
 868{
 869        int ret;
 870        const char *function = NULL;
 871        unsigned long *configs;
 872        unsigned int nconfigs = 0;
 873        struct property *prop;
 874
 875        ret = of_property_read_string(np, "function", &function);
 876        if (ret >= 0) {
 877                const char *group;
 878
 879                ret = of_property_count_strings(np, "groups");
 880                if (ret < 0)
 881                        goto exit;
 882
 883                ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
 884                                                num_maps, ret);
 885                if (ret < 0)
 886                        goto exit;
 887
 888                of_property_for_each_string(np, "groups", prop, group) {
 889                        ret = abx500_dt_add_map_mux(map, reserved_maps,
 890                                        num_maps, group, function);
 891                        if (ret < 0)
 892                                goto exit;
 893                }
 894        }
 895
 896        ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs);
 897        if (nconfigs) {
 898                const char *gpio_name;
 899                const char *pin;
 900
 901                ret = of_property_count_strings(np, "pins");
 902                if (ret < 0)
 903                        goto exit;
 904
 905                ret = pinctrl_utils_reserve_map(pctldev, map,
 906                                                reserved_maps,
 907                                                num_maps, ret);
 908                if (ret < 0)
 909                        goto exit;
 910
 911                of_property_for_each_string(np, "pins", prop, pin) {
 912                        gpio_name = abx500_find_pin_name(pctldev, pin);
 913
 914                        ret = abx500_dt_add_map_configs(map, reserved_maps,
 915                                        num_maps, gpio_name, configs, 1);
 916                        if (ret < 0)
 917                                goto exit;
 918                }
 919        }
 920
 921exit:
 922        return ret;
 923}
 924
 925static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
 926                                 struct device_node *np_config,
 927                                 struct pinctrl_map **map, unsigned *num_maps)
 928{
 929        unsigned reserved_maps;
 930        struct device_node *np;
 931        int ret;
 932
 933        reserved_maps = 0;
 934        *map = NULL;
 935        *num_maps = 0;
 936
 937        for_each_child_of_node(np_config, np) {
 938                ret = abx500_dt_subnode_to_map(pctldev, np, map,
 939                                &reserved_maps, num_maps);
 940                if (ret < 0) {
 941                        pinctrl_utils_free_map(pctldev, *map, *num_maps);
 942                        return ret;
 943                }
 944        }
 945
 946        return 0;
 947}
 948
 949static const struct pinctrl_ops abx500_pinctrl_ops = {
 950        .get_groups_count = abx500_get_groups_cnt,
 951        .get_group_name = abx500_get_group_name,
 952        .get_group_pins = abx500_get_group_pins,
 953        .pin_dbg_show = abx500_pin_dbg_show,
 954        .dt_node_to_map = abx500_dt_node_to_map,
 955        .dt_free_map = pinctrl_utils_free_map,
 956};
 957
 958static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
 959                          unsigned pin,
 960                          unsigned long *config)
 961{
 962        return -ENOSYS;
 963}
 964
 965static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
 966                          unsigned pin,
 967                          unsigned long *configs,
 968                          unsigned num_configs)
 969{
 970        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 971        struct gpio_chip *chip = &pct->chip;
 972        unsigned offset;
 973        int ret = -EINVAL;
 974        int i;
 975        enum pin_config_param param;
 976        enum pin_config_param argument;
 977
 978        for (i = 0; i < num_configs; i++) {
 979                param = pinconf_to_config_param(configs[i]);
 980                argument = pinconf_to_config_argument(configs[i]);
 981
 982                dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n",
 983                        pin, configs[i],
 984                        (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
 985                        (param == PIN_CONFIG_OUTPUT) ?
 986                        (argument ? "high" : "low") :
 987                        (argument ? "pull up" : "pull down"));
 988
 989                /* on ABx500, there is no GPIO0, so adjust the offset */
 990                offset = pin - 1;
 991
 992                switch (param) {
 993                case PIN_CONFIG_BIAS_DISABLE:
 994                        ret = abx500_gpio_direction_input(chip, offset);
 995                        if (ret < 0)
 996                                goto out;
 997                        /*
 998                         * Some chips only support pull down, while some
 999                         * actually support both pull up and pull down. Such
1000                         * chips have a "pullud" range specified for the pins
1001                         * that support both features. If the pin is not
1002                         * within that range, we fall back to the old bit set
1003                         * that only support pull down.
1004                         */
1005                        if (abx500_pullud_supported(chip, pin))
1006                                ret = abx500_set_pull_updown(pct,
1007                                        pin,
1008                                        ABX500_GPIO_PULL_NONE);
1009                        else
1010                                /* Chip only supports pull down */
1011                                ret = abx500_gpio_set_bits(chip,
1012                                        AB8500_GPIO_PUD1_REG, offset,
1013                                        ABX500_GPIO_PULL_NONE);
1014                        break;
1015
1016                case PIN_CONFIG_BIAS_PULL_DOWN:
1017                        ret = abx500_gpio_direction_input(chip, offset);
1018                        if (ret < 0)
1019                                goto out;
1020                        /*
1021                         * if argument = 1 set the pull down
1022                         * else clear the pull down
1023                         * Some chips only support pull down, while some
1024                         * actually support both pull up and pull down. Such
1025                         * chips have a "pullud" range specified for the pins
1026                         * that support both features. If the pin is not
1027                         * within that range, we fall back to the old bit set
1028                         * that only support pull down.
1029                         */
1030                        if (abx500_pullud_supported(chip, pin))
1031                                ret = abx500_set_pull_updown(pct,
1032                                        pin,
1033                                        argument ? ABX500_GPIO_PULL_DOWN :
1034                                        ABX500_GPIO_PULL_NONE);
1035                        else
1036                                /* Chip only supports pull down */
1037                                ret = abx500_gpio_set_bits(chip,
1038                                AB8500_GPIO_PUD1_REG,
1039                                        offset,
1040                                        argument ? ABX500_GPIO_PULL_DOWN :
1041                                        ABX500_GPIO_PULL_NONE);
1042                        break;
1043
1044                case PIN_CONFIG_BIAS_PULL_UP:
1045                        ret = abx500_gpio_direction_input(chip, offset);
1046                        if (ret < 0)
1047                                goto out;
1048                        /*
1049                         * if argument = 1 set the pull up
1050                         * else clear the pull up
1051                         */
1052                        ret = abx500_gpio_direction_input(chip, offset);
1053                        /*
1054                         * Some chips only support pull down, while some
1055                         * actually support both pull up and pull down. Such
1056                         * chips have a "pullud" range specified for the pins
1057                         * that support both features. If the pin is not
1058                         * within that range, do nothing
1059                         */
1060                        if (abx500_pullud_supported(chip, pin))
1061                                ret = abx500_set_pull_updown(pct,
1062                                        pin,
1063                                        argument ? ABX500_GPIO_PULL_UP :
1064                                        ABX500_GPIO_PULL_NONE);
1065                        break;
1066
1067                case PIN_CONFIG_OUTPUT:
1068                        ret = abx500_gpio_direction_output(chip, offset,
1069                                argument);
1070                        break;
1071
1072                default:
1073                        dev_err(chip->parent,
1074                                "illegal configuration requested\n");
1075                }
1076        } /* for each config */
1077out:
1078        if (ret < 0)
1079                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
1080
1081        return ret;
1082}
1083
1084static const struct pinconf_ops abx500_pinconf_ops = {
1085        .pin_config_get = abx500_pin_config_get,
1086        .pin_config_set = abx500_pin_config_set,
1087        .is_generic = true,
1088};
1089
1090static struct pinctrl_desc abx500_pinctrl_desc = {
1091        .name = "pinctrl-abx500",
1092        .pctlops = &abx500_pinctrl_ops,
1093        .pmxops = &abx500_pinmux_ops,
1094        .confops = &abx500_pinconf_ops,
1095        .owner = THIS_MODULE,
1096};
1097
1098static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
1099{
1100        unsigned int lowest = 0;
1101        unsigned int highest = 0;
1102        unsigned int npins = 0;
1103        int i;
1104
1105        /*
1106         * Compute number of GPIOs from the last SoC gpio range descriptors
1107         * These ranges may include "holes" but the GPIO number space shall
1108         * still be homogeneous, so we need to detect and account for any
1109         * such holes so that these are included in the number of GPIO pins.
1110         */
1111        for (i = 0; i < soc->gpio_num_ranges; i++) {
1112                unsigned gstart;
1113                unsigned gend;
1114                const struct abx500_pinrange *p;
1115
1116                p = &soc->gpio_ranges[i];
1117                gstart = p->offset;
1118                gend = p->offset + p->npins - 1;
1119
1120                if (i == 0) {
1121                        /* First iteration, set start values */
1122                        lowest = gstart;
1123                        highest = gend;
1124                } else {
1125                        if (gstart < lowest)
1126                                lowest = gstart;
1127                        if (gend > highest)
1128                                highest = gend;
1129                }
1130        }
1131        /* this gives the absolute number of pins */
1132        npins = highest - lowest + 1;
1133        return npins;
1134}
1135
1136static const struct of_device_id abx500_gpio_match[] = {
1137        { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
1138        { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
1139        { .compatible = "stericsson,ab8540-gpio", .data = (void *)PINCTRL_AB8540, },
1140        { .compatible = "stericsson,ab9540-gpio", .data = (void *)PINCTRL_AB9540, },
1141        { }
1142};
1143
1144static int abx500_gpio_probe(struct platform_device *pdev)
1145{
1146        struct device_node *np = pdev->dev.of_node;
1147        const struct of_device_id *match;
1148        struct abx500_pinctrl *pct;
1149        unsigned int id = -1;
1150        int ret;
1151        int i;
1152
1153        if (!np) {
1154                dev_err(&pdev->dev, "gpio dt node missing\n");
1155                return -ENODEV;
1156        }
1157
1158        pct = devm_kzalloc(&pdev->dev, sizeof(struct abx500_pinctrl),
1159                                   GFP_KERNEL);
1160        if (pct == NULL) {
1161                dev_err(&pdev->dev,
1162                        "failed to allocate memory for pct\n");
1163                return -ENOMEM;
1164        }
1165
1166        pct->dev = &pdev->dev;
1167        pct->parent = dev_get_drvdata(pdev->dev.parent);
1168        pct->chip = abx500gpio_chip;
1169        pct->chip.parent = &pdev->dev;
1170        pct->chip.base = -1; /* Dynamic allocation */
1171
1172        match = of_match_device(abx500_gpio_match, &pdev->dev);
1173        if (!match) {
1174                dev_err(&pdev->dev, "gpio dt not matching\n");
1175                return -ENODEV;
1176        }
1177        id = (unsigned long)match->data;
1178
1179        /* Poke in other ASIC variants here */
1180        switch (id) {
1181        case PINCTRL_AB8500:
1182                abx500_pinctrl_ab8500_init(&pct->soc);
1183                break;
1184        case PINCTRL_AB8540:
1185                abx500_pinctrl_ab8540_init(&pct->soc);
1186                break;
1187        case PINCTRL_AB9540:
1188                abx500_pinctrl_ab9540_init(&pct->soc);
1189                break;
1190        case PINCTRL_AB8505:
1191                abx500_pinctrl_ab8505_init(&pct->soc);
1192                break;
1193        default:
1194                dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1195                return -EINVAL;
1196        }
1197
1198        if (!pct->soc) {
1199                dev_err(&pdev->dev, "Invalid SOC data\n");
1200                return -EINVAL;
1201        }
1202
1203        pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
1204        pct->irq_cluster = pct->soc->gpio_irq_cluster;
1205        pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1206
1207        ret = gpiochip_add_data(&pct->chip, pct);
1208        if (ret) {
1209                dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1210                return ret;
1211        }
1212        dev_info(&pdev->dev, "added gpiochip\n");
1213
1214        abx500_pinctrl_desc.pins = pct->soc->pins;
1215        abx500_pinctrl_desc.npins = pct->soc->npins;
1216        pct->pctldev = devm_pinctrl_register(&pdev->dev, &abx500_pinctrl_desc,
1217                                             pct);
1218        if (IS_ERR(pct->pctldev)) {
1219                dev_err(&pdev->dev,
1220                        "could not register abx500 pinctrl driver\n");
1221                ret = PTR_ERR(pct->pctldev);
1222                goto out_rem_chip;
1223        }
1224        dev_info(&pdev->dev, "registered pin controller\n");
1225
1226        /* We will handle a range of GPIO pins */
1227        for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1228                const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1229
1230                ret = gpiochip_add_pin_range(&pct->chip,
1231                                        dev_name(&pdev->dev),
1232                                        p->offset - 1, p->offset, p->npins);
1233                if (ret < 0)
1234                        goto out_rem_chip;
1235        }
1236
1237        platform_set_drvdata(pdev, pct);
1238        dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1239
1240        return 0;
1241
1242out_rem_chip:
1243        gpiochip_remove(&pct->chip);
1244        return ret;
1245}
1246
1247/**
1248 * abx500_gpio_remove() - remove Ab8500-gpio driver
1249 * @pdev:       Platform device registered
1250 */
1251static int abx500_gpio_remove(struct platform_device *pdev)
1252{
1253        struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1254
1255        gpiochip_remove(&pct->chip);
1256        return 0;
1257}
1258
1259static struct platform_driver abx500_gpio_driver = {
1260        .driver = {
1261                .name = "abx500-gpio",
1262                .of_match_table = abx500_gpio_match,
1263        },
1264        .probe = abx500_gpio_probe,
1265        .remove = abx500_gpio_remove,
1266};
1267
1268static int __init abx500_gpio_init(void)
1269{
1270        return platform_driver_register(&abx500_gpio_driver);
1271}
1272core_initcall(abx500_gpio_init);
1273
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