linux/drivers/pinctrl/nomadik/pinctrl-abx500.c
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   1/*
   2 * Copyright (C) ST-Ericsson SA 2013
   3 *
   4 * Author: Patrice Chotard <patrice.chotard@st.com>
   5 * License terms: GNU General Public License (GPL) version 2
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License version 2 as
   9 * published by the Free Software Foundation.
  10 */
  11#include <linux/kernel.h>
  12#include <linux/types.h>
  13#include <linux/slab.h>
  14#include <linux/init.h>
  15#include <linux/module.h>
  16#include <linux/err.h>
  17#include <linux/of.h>
  18#include <linux/of_device.h>
  19#include <linux/platform_device.h>
  20#include <linux/gpio.h>
  21#include <linux/irq.h>
  22#include <linux/irqdomain.h>
  23#include <linux/interrupt.h>
  24#include <linux/bitops.h>
  25#include <linux/mfd/abx500.h>
  26#include <linux/mfd/abx500/ab8500.h>
  27#include <linux/pinctrl/pinctrl.h>
  28#include <linux/pinctrl/consumer.h>
  29#include <linux/pinctrl/pinmux.h>
  30#include <linux/pinctrl/pinconf.h>
  31#include <linux/pinctrl/pinconf-generic.h>
  32#include <linux/pinctrl/machine.h>
  33
  34#include "pinctrl-abx500.h"
  35#include "../core.h"
  36#include "../pinconf.h"
  37#include "../pinctrl-utils.h"
  38
  39/*
  40 * The AB9540 and AB8540 GPIO support are extended versions
  41 * of the AB8500 GPIO support.
  42 * The AB9540 supports an additional (7th) register so that
  43 * more GPIO may be configured and used.
  44 * The AB8540 supports 4 new gpios (GPIOx_VBAT) that have
  45 * internal pull-up and pull-down capabilities.
  46 */
  47
  48/*
  49 * GPIO registers offset
  50 * Bank: 0x10
  51 */
  52#define AB8500_GPIO_SEL1_REG    0x00
  53#define AB8500_GPIO_SEL2_REG    0x01
  54#define AB8500_GPIO_SEL3_REG    0x02
  55#define AB8500_GPIO_SEL4_REG    0x03
  56#define AB8500_GPIO_SEL5_REG    0x04
  57#define AB8500_GPIO_SEL6_REG    0x05
  58#define AB9540_GPIO_SEL7_REG    0x06
  59
  60#define AB8500_GPIO_DIR1_REG    0x10
  61#define AB8500_GPIO_DIR2_REG    0x11
  62#define AB8500_GPIO_DIR3_REG    0x12
  63#define AB8500_GPIO_DIR4_REG    0x13
  64#define AB8500_GPIO_DIR5_REG    0x14
  65#define AB8500_GPIO_DIR6_REG    0x15
  66#define AB9540_GPIO_DIR7_REG    0x16
  67
  68#define AB8500_GPIO_OUT1_REG    0x20
  69#define AB8500_GPIO_OUT2_REG    0x21
  70#define AB8500_GPIO_OUT3_REG    0x22
  71#define AB8500_GPIO_OUT4_REG    0x23
  72#define AB8500_GPIO_OUT5_REG    0x24
  73#define AB8500_GPIO_OUT6_REG    0x25
  74#define AB9540_GPIO_OUT7_REG    0x26
  75
  76#define AB8500_GPIO_PUD1_REG    0x30
  77#define AB8500_GPIO_PUD2_REG    0x31
  78#define AB8500_GPIO_PUD3_REG    0x32
  79#define AB8500_GPIO_PUD4_REG    0x33
  80#define AB8500_GPIO_PUD5_REG    0x34
  81#define AB8500_GPIO_PUD6_REG    0x35
  82#define AB9540_GPIO_PUD7_REG    0x36
  83
  84#define AB8500_GPIO_IN1_REG     0x40
  85#define AB8500_GPIO_IN2_REG     0x41
  86#define AB8500_GPIO_IN3_REG     0x42
  87#define AB8500_GPIO_IN4_REG     0x43
  88#define AB8500_GPIO_IN5_REG     0x44
  89#define AB8500_GPIO_IN6_REG     0x45
  90#define AB9540_GPIO_IN7_REG     0x46
  91#define AB8540_GPIO_VINSEL_REG  0x47
  92#define AB8540_GPIO_PULL_UPDOWN_REG     0x48
  93#define AB8500_GPIO_ALTFUN_REG  0x50
  94#define AB8540_GPIO_PULL_UPDOWN_MASK    0x03
  95#define AB8540_GPIO_VINSEL_MASK 0x03
  96#define AB8540_GPIOX_VBAT_START 51
  97#define AB8540_GPIOX_VBAT_END   54
  98
  99#define ABX500_GPIO_INPUT       0
 100#define ABX500_GPIO_OUTPUT      1
 101
 102struct abx500_pinctrl {
 103        struct device *dev;
 104        struct pinctrl_dev *pctldev;
 105        struct abx500_pinctrl_soc_data *soc;
 106        struct gpio_chip chip;
 107        struct ab8500 *parent;
 108        struct abx500_gpio_irq_cluster *irq_cluster;
 109        int irq_cluster_size;
 110};
 111
 112/**
 113 * to_abx500_pinctrl() - get the pointer to abx500_pinctrl
 114 * @chip:       Member of the structure abx500_pinctrl
 115 */
 116static inline struct abx500_pinctrl *to_abx500_pinctrl(struct gpio_chip *chip)
 117{
 118        return container_of(chip, struct abx500_pinctrl, chip);
 119}
 120
 121static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
 122                               unsigned offset, bool *bit)
 123{
 124        struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
 125        u8 pos = offset % 8;
 126        u8 val;
 127        int ret;
 128
 129        reg += offset / 8;
 130        ret = abx500_get_register_interruptible(pct->dev,
 131                                                AB8500_MISC, reg, &val);
 132
 133        *bit = !!(val & BIT(pos));
 134
 135        if (ret < 0)
 136                dev_err(pct->dev,
 137                        "%s read reg =%x, offset=%x failed (%d)\n",
 138                        __func__, reg, offset, ret);
 139
 140        return ret;
 141}
 142
 143static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
 144                                unsigned offset, int val)
 145{
 146        struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
 147        u8 pos = offset % 8;
 148        int ret;
 149
 150        reg += offset / 8;
 151        ret = abx500_mask_and_set_register_interruptible(pct->dev,
 152                                AB8500_MISC, reg, BIT(pos), val << pos);
 153        if (ret < 0)
 154                dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
 155                                __func__, reg, offset, ret);
 156
 157        return ret;
 158}
 159
 160/**
 161 * abx500_gpio_get() - Get the particular GPIO value
 162 * @chip:       Gpio device
 163 * @offset:     GPIO number to read
 164 */
 165static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
 166{
 167        struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
 168        bool bit;
 169        bool is_out;
 170        u8 gpio_offset = offset - 1;
 171        int ret;
 172
 173        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
 174                        gpio_offset, &is_out);
 175        if (ret < 0)
 176                goto out;
 177
 178        if (is_out)
 179                ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
 180                                gpio_offset, &bit);
 181        else
 182                ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
 183                                gpio_offset, &bit);
 184out:
 185        if (ret < 0) {
 186                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 187                return ret;
 188        }
 189
 190        return bit;
 191}
 192
 193static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
 194{
 195        struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
 196        int ret;
 197
 198        ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
 199        if (ret < 0)
 200                dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
 201}
 202
 203static int abx500_get_pull_updown(struct abx500_pinctrl *pct, int offset,
 204                                  enum abx500_gpio_pull_updown *pull_updown)
 205{
 206        u8 pos;
 207        u8 val;
 208        int ret;
 209        struct pullud *pullud;
 210
 211        if (!pct->soc->pullud) {
 212                dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
 213                                __func__);
 214                ret = -EPERM;
 215                goto out;
 216        }
 217
 218        pullud = pct->soc->pullud;
 219
 220        if ((offset < pullud->first_pin)
 221                || (offset > pullud->last_pin)) {
 222                ret = -EINVAL;
 223                goto out;
 224        }
 225
 226        ret = abx500_get_register_interruptible(pct->dev,
 227                        AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG, &val);
 228
 229        pos = (offset - pullud->first_pin) << 1;
 230        *pull_updown = (val >> pos) & AB8540_GPIO_PULL_UPDOWN_MASK;
 231
 232out:
 233        if (ret < 0)
 234                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 235
 236        return ret;
 237}
 238
 239static int abx500_set_pull_updown(struct abx500_pinctrl *pct,
 240                                  int offset, enum abx500_gpio_pull_updown val)
 241{
 242        u8 pos;
 243        int ret;
 244        struct pullud *pullud;
 245
 246        if (!pct->soc->pullud) {
 247                dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
 248                                __func__);
 249                ret = -EPERM;
 250                goto out;
 251        }
 252
 253        pullud = pct->soc->pullud;
 254
 255        if ((offset < pullud->first_pin)
 256                || (offset > pullud->last_pin)) {
 257                ret = -EINVAL;
 258                goto out;
 259        }
 260        pos = (offset - pullud->first_pin) << 1;
 261
 262        ret = abx500_mask_and_set_register_interruptible(pct->dev,
 263                        AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG,
 264                        AB8540_GPIO_PULL_UPDOWN_MASK << pos, val << pos);
 265
 266out:
 267        if (ret < 0)
 268                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 269
 270        return ret;
 271}
 272
 273static bool abx500_pullud_supported(struct gpio_chip *chip, unsigned gpio)
 274{
 275        struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
 276        struct pullud *pullud = pct->soc->pullud;
 277
 278        return (pullud &&
 279                gpio >= pullud->first_pin &&
 280                gpio <= pullud->last_pin);
 281}
 282
 283static int abx500_gpio_direction_output(struct gpio_chip *chip,
 284                                        unsigned offset,
 285                                        int val)
 286{
 287        struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
 288        unsigned gpio;
 289        int ret;
 290
 291        /* set direction as output */
 292        ret = abx500_gpio_set_bits(chip,
 293                                AB8500_GPIO_DIR1_REG,
 294                                offset,
 295                                ABX500_GPIO_OUTPUT);
 296        if (ret < 0)
 297                goto out;
 298
 299        /* disable pull down */
 300        ret = abx500_gpio_set_bits(chip,
 301                                AB8500_GPIO_PUD1_REG,
 302                                offset,
 303                                ABX500_GPIO_PULL_NONE);
 304        if (ret < 0)
 305                goto out;
 306
 307        /* if supported, disable both pull down and pull up */
 308        gpio = offset + 1;
 309        if (abx500_pullud_supported(chip, gpio)) {
 310                ret = abx500_set_pull_updown(pct,
 311                                gpio,
 312                                ABX500_GPIO_PULL_NONE);
 313        }
 314out:
 315        if (ret < 0) {
 316                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 317                return ret;
 318        }
 319
 320        /* set the output as 1 or 0 */
 321        return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
 322}
 323
 324static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 325{
 326        /* set the register as input */
 327        return abx500_gpio_set_bits(chip,
 328                                AB8500_GPIO_DIR1_REG,
 329                                offset,
 330                                ABX500_GPIO_INPUT);
 331}
 332
 333static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
 334{
 335        struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
 336        /* The AB8500 GPIO numbers are off by one */
 337        int gpio = offset + 1;
 338        int hwirq;
 339        int i;
 340
 341        for (i = 0; i < pct->irq_cluster_size; i++) {
 342                struct abx500_gpio_irq_cluster *cluster =
 343                        &pct->irq_cluster[i];
 344
 345                if (gpio >= cluster->start && gpio <= cluster->end) {
 346                        /*
 347                         * The ABx500 GPIO's associated IRQs are clustered together
 348                         * throughout the interrupt numbers at irregular intervals.
 349                         * To solve this quandry, we have placed the read-in values
 350                         * into the cluster information table.
 351                         */
 352                        hwirq = gpio - cluster->start + cluster->to_irq;
 353                        return irq_create_mapping(pct->parent->domain, hwirq);
 354                }
 355        }
 356
 357        return -EINVAL;
 358}
 359
 360static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
 361                           unsigned gpio, int alt_setting)
 362{
 363        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 364        struct alternate_functions af = pct->soc->alternate_functions[gpio];
 365        int ret;
 366        int val;
 367        unsigned offset;
 368
 369        const char *modes[] = {
 370                [ABX500_DEFAULT]        = "default",
 371                [ABX500_ALT_A]          = "altA",
 372                [ABX500_ALT_B]          = "altB",
 373                [ABX500_ALT_C]          = "altC",
 374        };
 375
 376        /* sanity check */
 377        if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
 378            ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
 379            ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
 380                dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
 381                                modes[alt_setting]);
 382                return -EINVAL;
 383        }
 384
 385        /* on ABx5xx, there is no GPIO0, so adjust the offset */
 386        offset = gpio - 1;
 387
 388        switch (alt_setting) {
 389        case ABX500_DEFAULT:
 390                /*
 391                 * for ABx5xx family, default mode is always selected by
 392                 * writing 0 to GPIOSELx register, except for pins which
 393                 * support at least ALT_B mode, default mode is selected
 394                 * by writing 1 to GPIOSELx register
 395                 */
 396                val = 0;
 397                if (af.alt_bit1 != UNUSED)
 398                        val++;
 399
 400                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 401                                           offset, val);
 402                break;
 403
 404        case ABX500_ALT_A:
 405                /*
 406                 * for ABx5xx family, alt_a mode is always selected by
 407                 * writing 1 to GPIOSELx register, except for pins which
 408                 * support at least ALT_B mode, alt_a mode is selected
 409                 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
 410                 * register
 411                 */
 412                if (af.alt_bit1 != UNUSED) {
 413                        ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 414                                        offset, 0);
 415                        if (ret < 0)
 416                                goto out;
 417
 418                        ret = abx500_gpio_set_bits(chip,
 419                                        AB8500_GPIO_ALTFUN_REG,
 420                                        af.alt_bit1,
 421                                        !!(af.alta_val & BIT(0)));
 422                        if (ret < 0)
 423                                goto out;
 424
 425                        if (af.alt_bit2 != UNUSED)
 426                                ret = abx500_gpio_set_bits(chip,
 427                                        AB8500_GPIO_ALTFUN_REG,
 428                                        af.alt_bit2,
 429                                        !!(af.alta_val & BIT(1)));
 430                } else
 431                        ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 432                                        offset, 1);
 433                break;
 434
 435        case ABX500_ALT_B:
 436                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 437                                offset, 0);
 438                if (ret < 0)
 439                        goto out;
 440
 441                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 442                                af.alt_bit1, !!(af.altb_val & BIT(0)));
 443                if (ret < 0)
 444                        goto out;
 445
 446                if (af.alt_bit2 != UNUSED)
 447                        ret = abx500_gpio_set_bits(chip,
 448                                        AB8500_GPIO_ALTFUN_REG,
 449                                        af.alt_bit2,
 450                                        !!(af.altb_val & BIT(1)));
 451                break;
 452
 453        case ABX500_ALT_C:
 454                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 455                                offset, 0);
 456                if (ret < 0)
 457                        goto out;
 458
 459                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 460                                af.alt_bit2, !!(af.altc_val & BIT(0)));
 461                if (ret < 0)
 462                        goto out;
 463
 464                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 465                                af.alt_bit2, !!(af.altc_val & BIT(1)));
 466                break;
 467
 468        default:
 469                dev_dbg(pct->dev, "unknow alt_setting %d\n", alt_setting);
 470
 471                return -EINVAL;
 472        }
 473out:
 474        if (ret < 0)
 475                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 476
 477        return ret;
 478}
 479
 480static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
 481                          unsigned gpio)
 482{
 483        u8 mode;
 484        bool bit_mode;
 485        bool alt_bit1;
 486        bool alt_bit2;
 487        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 488        struct alternate_functions af = pct->soc->alternate_functions[gpio];
 489        /* on ABx5xx, there is no GPIO0, so adjust the offset */
 490        unsigned offset = gpio - 1;
 491        int ret;
 492
 493        /*
 494         * if gpiosel_bit is set to unused,
 495         * it means no GPIO or special case
 496         */
 497        if (af.gpiosel_bit == UNUSED)
 498                return ABX500_DEFAULT;
 499
 500        /* read GpioSelx register */
 501        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
 502                        af.gpiosel_bit, &bit_mode);
 503        if (ret < 0)
 504                goto out;
 505
 506        mode = bit_mode;
 507
 508        /* sanity check */
 509        if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
 510            (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
 511                dev_err(pct->dev,
 512                        "alt_bitX value not in correct range (-1 to 7)\n");
 513                return -EINVAL;
 514        }
 515
 516        /* if alt_bit2 is used, alt_bit1 must be used too */
 517        if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
 518                dev_err(pct->dev,
 519                        "if alt_bit2 is used, alt_bit1 can't be unused\n");
 520                return -EINVAL;
 521        }
 522
 523        /* check if pin use AlternateFunction register */
 524        if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
 525                return mode;
 526        /*
 527         * if pin GPIOSEL bit is set and pin supports alternate function,
 528         * it means DEFAULT mode
 529         */
 530        if (mode)
 531                return ABX500_DEFAULT;
 532
 533        /*
 534         * pin use the AlternatFunction register
 535         * read alt_bit1 value
 536         */
 537        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
 538                            af.alt_bit1, &alt_bit1);
 539        if (ret < 0)
 540                goto out;
 541
 542        if (af.alt_bit2 != UNUSED) {
 543                /* read alt_bit2 value */
 544                ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
 545                                af.alt_bit2,
 546                                &alt_bit2);
 547                if (ret < 0)
 548                        goto out;
 549        } else
 550                alt_bit2 = 0;
 551
 552        mode = (alt_bit2 << 1) + alt_bit1;
 553        if (mode == af.alta_val)
 554                return ABX500_ALT_A;
 555        else if (mode == af.altb_val)
 556                return ABX500_ALT_B;
 557        else
 558                return ABX500_ALT_C;
 559
 560out:
 561        dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 562        return ret;
 563}
 564
 565#ifdef CONFIG_DEBUG_FS
 566
 567#include <linux/seq_file.h>
 568
 569static void abx500_gpio_dbg_show_one(struct seq_file *s,
 570                                     struct pinctrl_dev *pctldev,
 571                                     struct gpio_chip *chip,
 572                                     unsigned offset, unsigned gpio)
 573{
 574        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 575        const char *label = gpiochip_is_requested(chip, offset - 1);
 576        u8 gpio_offset = offset - 1;
 577        int mode = -1;
 578        bool is_out;
 579        bool pd;
 580        enum abx500_gpio_pull_updown pud = 0;
 581        int ret;
 582
 583        const char *modes[] = {
 584                [ABX500_DEFAULT]        = "default",
 585                [ABX500_ALT_A]          = "altA",
 586                [ABX500_ALT_B]          = "altB",
 587                [ABX500_ALT_C]          = "altC",
 588        };
 589
 590        const char *pull_up_down[] = {
 591                [ABX500_GPIO_PULL_DOWN]         = "pull down",
 592                [ABX500_GPIO_PULL_NONE]         = "pull none",
 593                [ABX500_GPIO_PULL_NONE + 1]     = "pull none",
 594                [ABX500_GPIO_PULL_UP]           = "pull up",
 595        };
 596
 597        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
 598                        gpio_offset, &is_out);
 599        if (ret < 0)
 600                goto out;
 601
 602        seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
 603                   gpio, label ?: "(none)",
 604                   is_out ? "out" : "in ");
 605
 606        if (!is_out) {
 607                if (abx500_pullud_supported(chip, offset)) {
 608                        ret = abx500_get_pull_updown(pct, offset, &pud);
 609                        if (ret < 0)
 610                                goto out;
 611
 612                        seq_printf(s, " %-9s", pull_up_down[pud]);
 613                } else {
 614                        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
 615                                        gpio_offset, &pd);
 616                        if (ret < 0)
 617                                goto out;
 618
 619                        seq_printf(s, " %-9s", pull_up_down[pd]);
 620                }
 621        } else
 622                seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
 623
 624        mode = abx500_get_mode(pctldev, chip, offset);
 625
 626        seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
 627
 628out:
 629        if (ret < 0)
 630                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 631}
 632
 633static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 634{
 635        unsigned i;
 636        unsigned gpio = chip->base;
 637        struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
 638        struct pinctrl_dev *pctldev = pct->pctldev;
 639
 640        for (i = 0; i < chip->ngpio; i++, gpio++) {
 641                /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
 642                abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
 643                seq_printf(s, "\n");
 644        }
 645}
 646
 647#else
 648static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
 649                                            struct pinctrl_dev *pctldev,
 650                                            struct gpio_chip *chip,
 651                                            unsigned offset, unsigned gpio)
 652{
 653}
 654#define abx500_gpio_dbg_show    NULL
 655#endif
 656
 657static int abx500_gpio_request(struct gpio_chip *chip, unsigned offset)
 658{
 659        int gpio = chip->base + offset;
 660
 661        return pinctrl_request_gpio(gpio);
 662}
 663
 664static void abx500_gpio_free(struct gpio_chip *chip, unsigned offset)
 665{
 666        int gpio = chip->base + offset;
 667
 668        pinctrl_free_gpio(gpio);
 669}
 670
 671static struct gpio_chip abx500gpio_chip = {
 672        .label                  = "abx500-gpio",
 673        .owner                  = THIS_MODULE,
 674        .request                = abx500_gpio_request,
 675        .free                   = abx500_gpio_free,
 676        .direction_input        = abx500_gpio_direction_input,
 677        .get                    = abx500_gpio_get,
 678        .direction_output       = abx500_gpio_direction_output,
 679        .set                    = abx500_gpio_set,
 680        .to_irq                 = abx500_gpio_to_irq,
 681        .dbg_show               = abx500_gpio_dbg_show,
 682};
 683
 684static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
 685{
 686        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 687
 688        return pct->soc->nfunctions;
 689}
 690
 691static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
 692                                         unsigned function)
 693{
 694        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 695
 696        return pct->soc->functions[function].name;
 697}
 698
 699static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
 700                                      unsigned function,
 701                                      const char * const **groups,
 702                                      unsigned * const num_groups)
 703{
 704        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 705
 706        *groups = pct->soc->functions[function].groups;
 707        *num_groups = pct->soc->functions[function].ngroups;
 708
 709        return 0;
 710}
 711
 712static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
 713                          unsigned group)
 714{
 715        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 716        struct gpio_chip *chip = &pct->chip;
 717        const struct abx500_pingroup *g;
 718        int i;
 719        int ret = 0;
 720
 721        g = &pct->soc->groups[group];
 722        if (g->altsetting < 0)
 723                return -EINVAL;
 724
 725        dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
 726
 727        for (i = 0; i < g->npins; i++) {
 728                dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
 729                        g->pins[i], g->altsetting);
 730
 731                ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
 732        }
 733
 734        if (ret < 0)
 735                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 736
 737        return ret;
 738}
 739
 740static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
 741                               struct pinctrl_gpio_range *range,
 742                               unsigned offset)
 743{
 744        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 745        const struct abx500_pinrange *p;
 746        int ret;
 747        int i;
 748
 749        /*
 750         * Different ranges have different ways to enable GPIO function on a
 751         * pin, so refer back to our local range type, where we handily define
 752         * what altfunc enables GPIO for a certain pin.
 753         */
 754        for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
 755                p = &pct->soc->gpio_ranges[i];
 756                if ((offset >= p->offset) &&
 757                    (offset < (p->offset + p->npins)))
 758                  break;
 759        }
 760
 761        if (i == pct->soc->gpio_num_ranges) {
 762                dev_err(pct->dev, "%s failed to locate range\n", __func__);
 763                return -ENODEV;
 764        }
 765
 766        dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
 767                p->altfunc, offset);
 768
 769        ret = abx500_set_mode(pct->pctldev, &pct->chip,
 770                              offset, p->altfunc);
 771        if (ret < 0)
 772                dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
 773
 774        return ret;
 775}
 776
 777static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
 778                                     struct pinctrl_gpio_range *range,
 779                                     unsigned offset)
 780{
 781}
 782
 783static const struct pinmux_ops abx500_pinmux_ops = {
 784        .get_functions_count = abx500_pmx_get_funcs_cnt,
 785        .get_function_name = abx500_pmx_get_func_name,
 786        .get_function_groups = abx500_pmx_get_func_groups,
 787        .set_mux = abx500_pmx_set,
 788        .gpio_request_enable = abx500_gpio_request_enable,
 789        .gpio_disable_free = abx500_gpio_disable_free,
 790};
 791
 792static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
 793{
 794        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 795
 796        return pct->soc->ngroups;
 797}
 798
 799static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
 800                                         unsigned selector)
 801{
 802        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 803
 804        return pct->soc->groups[selector].name;
 805}
 806
 807static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
 808                                 unsigned selector,
 809                                 const unsigned **pins,
 810                                 unsigned *num_pins)
 811{
 812        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 813
 814        *pins = pct->soc->groups[selector].pins;
 815        *num_pins = pct->soc->groups[selector].npins;
 816
 817        return 0;
 818}
 819
 820static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
 821                                struct seq_file *s, unsigned offset)
 822{
 823        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 824        struct gpio_chip *chip = &pct->chip;
 825
 826        abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
 827                                 chip->base + offset - 1);
 828}
 829
 830static int abx500_dt_add_map_mux(struct pinctrl_map **map,
 831                unsigned *reserved_maps,
 832                unsigned *num_maps, const char *group,
 833                const char *function)
 834{
 835        if (*num_maps == *reserved_maps)
 836                return -ENOSPC;
 837
 838        (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
 839        (*map)[*num_maps].data.mux.group = group;
 840        (*map)[*num_maps].data.mux.function = function;
 841        (*num_maps)++;
 842
 843        return 0;
 844}
 845
 846static int abx500_dt_add_map_configs(struct pinctrl_map **map,
 847                unsigned *reserved_maps,
 848                unsigned *num_maps, const char *group,
 849                unsigned long *configs, unsigned num_configs)
 850{
 851        unsigned long *dup_configs;
 852
 853        if (*num_maps == *reserved_maps)
 854                return -ENOSPC;
 855
 856        dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
 857                              GFP_KERNEL);
 858        if (!dup_configs)
 859                return -ENOMEM;
 860
 861        (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
 862
 863        (*map)[*num_maps].data.configs.group_or_pin = group;
 864        (*map)[*num_maps].data.configs.configs = dup_configs;
 865        (*map)[*num_maps].data.configs.num_configs = num_configs;
 866        (*num_maps)++;
 867
 868        return 0;
 869}
 870
 871static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
 872                                        const char *pin_name)
 873{
 874        int i, pin_number;
 875        struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
 876
 877        if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
 878                for (i = 0; i < npct->soc->npins; i++)
 879                        if (npct->soc->pins[i].number == pin_number)
 880                                return npct->soc->pins[i].name;
 881        return NULL;
 882}
 883
 884static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 885                struct device_node *np,
 886                struct pinctrl_map **map,
 887                unsigned *reserved_maps,
 888                unsigned *num_maps)
 889{
 890        int ret;
 891        const char *function = NULL;
 892        unsigned long *configs;
 893        unsigned int nconfigs = 0;
 894        struct property *prop;
 895
 896        ret = of_property_read_string(np, "function", &function);
 897        if (ret >= 0) {
 898                const char *group;
 899
 900                ret = of_property_count_strings(np, "groups");
 901                if (ret < 0)
 902                        goto exit;
 903
 904                ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
 905                                                num_maps, ret);
 906                if (ret < 0)
 907                        goto exit;
 908
 909                of_property_for_each_string(np, "groups", prop, group) {
 910                        ret = abx500_dt_add_map_mux(map, reserved_maps,
 911                                        num_maps, group, function);
 912                        if (ret < 0)
 913                                goto exit;
 914                }
 915        }
 916
 917        ret = pinconf_generic_parse_dt_config(np, &configs, &nconfigs);
 918        if (nconfigs) {
 919                const char *gpio_name;
 920                const char *pin;
 921
 922                ret = of_property_count_strings(np, "pins");
 923                if (ret < 0)
 924                        goto exit;
 925
 926                ret = pinctrl_utils_reserve_map(pctldev, map,
 927                                                reserved_maps,
 928                                                num_maps, ret);
 929                if (ret < 0)
 930                        goto exit;
 931
 932                of_property_for_each_string(np, "pins", prop, pin) {
 933                        gpio_name = abx500_find_pin_name(pctldev, pin);
 934
 935                        ret = abx500_dt_add_map_configs(map, reserved_maps,
 936                                        num_maps, gpio_name, configs, 1);
 937                        if (ret < 0)
 938                                goto exit;
 939                }
 940        }
 941
 942exit:
 943        return ret;
 944}
 945
 946static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
 947                                 struct device_node *np_config,
 948                                 struct pinctrl_map **map, unsigned *num_maps)
 949{
 950        unsigned reserved_maps;
 951        struct device_node *np;
 952        int ret;
 953
 954        reserved_maps = 0;
 955        *map = NULL;
 956        *num_maps = 0;
 957
 958        for_each_child_of_node(np_config, np) {
 959                ret = abx500_dt_subnode_to_map(pctldev, np, map,
 960                                &reserved_maps, num_maps);
 961                if (ret < 0) {
 962                        pinctrl_utils_dt_free_map(pctldev, *map, *num_maps);
 963                        return ret;
 964                }
 965        }
 966
 967        return 0;
 968}
 969
 970static const struct pinctrl_ops abx500_pinctrl_ops = {
 971        .get_groups_count = abx500_get_groups_cnt,
 972        .get_group_name = abx500_get_group_name,
 973        .get_group_pins = abx500_get_group_pins,
 974        .pin_dbg_show = abx500_pin_dbg_show,
 975        .dt_node_to_map = abx500_dt_node_to_map,
 976        .dt_free_map = pinctrl_utils_dt_free_map,
 977};
 978
 979static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
 980                          unsigned pin,
 981                          unsigned long *config)
 982{
 983        return -ENOSYS;
 984}
 985
 986static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
 987                          unsigned pin,
 988                          unsigned long *configs,
 989                          unsigned num_configs)
 990{
 991        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 992        struct gpio_chip *chip = &pct->chip;
 993        unsigned offset;
 994        int ret = -EINVAL;
 995        int i;
 996        enum pin_config_param param;
 997        enum pin_config_param argument;
 998
 999        for (i = 0; i < num_configs; i++) {
1000                param = pinconf_to_config_param(configs[i]);
1001                argument = pinconf_to_config_argument(configs[i]);
1002
1003                dev_dbg(chip->dev, "pin %d [%#lx]: %s %s\n",
1004                        pin, configs[i],
1005                        (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
1006                        (param == PIN_CONFIG_OUTPUT) ?
1007                        (argument ? "high" : "low") :
1008                        (argument ? "pull up" : "pull down"));
1009
1010                /* on ABx500, there is no GPIO0, so adjust the offset */
1011                offset = pin - 1;
1012
1013                switch (param) {
1014                case PIN_CONFIG_BIAS_DISABLE:
1015                        ret = abx500_gpio_direction_input(chip, offset);
1016                        if (ret < 0)
1017                                goto out;
1018                        /*
1019                         * Some chips only support pull down, while some
1020                         * actually support both pull up and pull down. Such
1021                         * chips have a "pullud" range specified for the pins
1022                         * that support both features. If the pin is not
1023                         * within that range, we fall back to the old bit set
1024                         * that only support pull down.
1025                         */
1026                        if (abx500_pullud_supported(chip, pin))
1027                                ret = abx500_set_pull_updown(pct,
1028                                        pin,
1029                                        ABX500_GPIO_PULL_NONE);
1030                        else
1031                                /* Chip only supports pull down */
1032                                ret = abx500_gpio_set_bits(chip,
1033                                        AB8500_GPIO_PUD1_REG, offset,
1034                                        ABX500_GPIO_PULL_NONE);
1035                        break;
1036
1037                case PIN_CONFIG_BIAS_PULL_DOWN:
1038                        ret = abx500_gpio_direction_input(chip, offset);
1039                        if (ret < 0)
1040                                goto out;
1041                        /*
1042                         * if argument = 1 set the pull down
1043                         * else clear the pull down
1044                         * Some chips only support pull down, while some
1045                         * actually support both pull up and pull down. Such
1046                         * chips have a "pullud" range specified for the pins
1047                         * that support both features. If the pin is not
1048                         * within that range, we fall back to the old bit set
1049                         * that only support pull down.
1050                         */
1051                        if (abx500_pullud_supported(chip, pin))
1052                                ret = abx500_set_pull_updown(pct,
1053                                        pin,
1054                                        argument ? ABX500_GPIO_PULL_DOWN :
1055                                        ABX500_GPIO_PULL_NONE);
1056                        else
1057                                /* Chip only supports pull down */
1058                                ret = abx500_gpio_set_bits(chip,
1059                                AB8500_GPIO_PUD1_REG,
1060                                        offset,
1061                                        argument ? ABX500_GPIO_PULL_DOWN :
1062                                        ABX500_GPIO_PULL_NONE);
1063                        break;
1064
1065                case PIN_CONFIG_BIAS_PULL_UP:
1066                        ret = abx500_gpio_direction_input(chip, offset);
1067                        if (ret < 0)
1068                                goto out;
1069                        /*
1070                         * if argument = 1 set the pull up
1071                         * else clear the pull up
1072                         */
1073                        ret = abx500_gpio_direction_input(chip, offset);
1074                        /*
1075                         * Some chips only support pull down, while some
1076                         * actually support both pull up and pull down. Such
1077                         * chips have a "pullud" range specified for the pins
1078                         * that support both features. If the pin is not
1079                         * within that range, do nothing
1080                         */
1081                        if (abx500_pullud_supported(chip, pin))
1082                                ret = abx500_set_pull_updown(pct,
1083                                        pin,
1084                                        argument ? ABX500_GPIO_PULL_UP :
1085                                        ABX500_GPIO_PULL_NONE);
1086                        break;
1087
1088                case PIN_CONFIG_OUTPUT:
1089                        ret = abx500_gpio_direction_output(chip, offset,
1090                                argument);
1091                        break;
1092
1093                default:
1094                        dev_err(chip->dev, "illegal configuration requested\n");
1095                }
1096        } /* for each config */
1097out:
1098        if (ret < 0)
1099                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
1100
1101        return ret;
1102}
1103
1104static const struct pinconf_ops abx500_pinconf_ops = {
1105        .pin_config_get = abx500_pin_config_get,
1106        .pin_config_set = abx500_pin_config_set,
1107        .is_generic = true,
1108};
1109
1110static struct pinctrl_desc abx500_pinctrl_desc = {
1111        .name = "pinctrl-abx500",
1112        .pctlops = &abx500_pinctrl_ops,
1113        .pmxops = &abx500_pinmux_ops,
1114        .confops = &abx500_pinconf_ops,
1115        .owner = THIS_MODULE,
1116};
1117
1118static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
1119{
1120        unsigned int lowest = 0;
1121        unsigned int highest = 0;
1122        unsigned int npins = 0;
1123        int i;
1124
1125        /*
1126         * Compute number of GPIOs from the last SoC gpio range descriptors
1127         * These ranges may include "holes" but the GPIO number space shall
1128         * still be homogeneous, so we need to detect and account for any
1129         * such holes so that these are included in the number of GPIO pins.
1130         */
1131        for (i = 0; i < soc->gpio_num_ranges; i++) {
1132                unsigned gstart;
1133                unsigned gend;
1134                const struct abx500_pinrange *p;
1135
1136                p = &soc->gpio_ranges[i];
1137                gstart = p->offset;
1138                gend = p->offset + p->npins - 1;
1139
1140                if (i == 0) {
1141                        /* First iteration, set start values */
1142                        lowest = gstart;
1143                        highest = gend;
1144                } else {
1145                        if (gstart < lowest)
1146                                lowest = gstart;
1147                        if (gend > highest)
1148                                highest = gend;
1149                }
1150        }
1151        /* this gives the absolute number of pins */
1152        npins = highest - lowest + 1;
1153        return npins;
1154}
1155
1156static const struct of_device_id abx500_gpio_match[] = {
1157        { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
1158        { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
1159        { .compatible = "stericsson,ab8540-gpio", .data = (void *)PINCTRL_AB8540, },
1160        { .compatible = "stericsson,ab9540-gpio", .data = (void *)PINCTRL_AB9540, },
1161        { }
1162};
1163
1164static int abx500_gpio_probe(struct platform_device *pdev)
1165{
1166        struct device_node *np = pdev->dev.of_node;
1167        const struct of_device_id *match;
1168        struct abx500_pinctrl *pct;
1169        unsigned int id = -1;
1170        int ret;
1171        int i;
1172
1173        if (!np) {
1174                dev_err(&pdev->dev, "gpio dt node missing\n");
1175                return -ENODEV;
1176        }
1177
1178        pct = devm_kzalloc(&pdev->dev, sizeof(struct abx500_pinctrl),
1179                                   GFP_KERNEL);
1180        if (pct == NULL) {
1181                dev_err(&pdev->dev,
1182                        "failed to allocate memory for pct\n");
1183                return -ENOMEM;
1184        }
1185
1186        pct->dev = &pdev->dev;
1187        pct->parent = dev_get_drvdata(pdev->dev.parent);
1188        pct->chip = abx500gpio_chip;
1189        pct->chip.dev = &pdev->dev;
1190        pct->chip.base = -1; /* Dynamic allocation */
1191
1192        match = of_match_device(abx500_gpio_match, &pdev->dev);
1193        if (!match) {
1194                dev_err(&pdev->dev, "gpio dt not matching\n");
1195                return -ENODEV;
1196        }
1197        id = (unsigned long)match->data;
1198
1199        /* Poke in other ASIC variants here */
1200        switch (id) {
1201        case PINCTRL_AB8500:
1202                abx500_pinctrl_ab8500_init(&pct->soc);
1203                break;
1204        case PINCTRL_AB8540:
1205                abx500_pinctrl_ab8540_init(&pct->soc);
1206                break;
1207        case PINCTRL_AB9540:
1208                abx500_pinctrl_ab9540_init(&pct->soc);
1209                break;
1210        case PINCTRL_AB8505:
1211                abx500_pinctrl_ab8505_init(&pct->soc);
1212                break;
1213        default:
1214                dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1215                return -EINVAL;
1216        }
1217
1218        if (!pct->soc) {
1219                dev_err(&pdev->dev, "Invalid SOC data\n");
1220                return -EINVAL;
1221        }
1222
1223        pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
1224        pct->irq_cluster = pct->soc->gpio_irq_cluster;
1225        pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1226
1227        ret = gpiochip_add(&pct->chip);
1228        if (ret) {
1229                dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1230                return ret;
1231        }
1232        dev_info(&pdev->dev, "added gpiochip\n");
1233
1234        abx500_pinctrl_desc.pins = pct->soc->pins;
1235        abx500_pinctrl_desc.npins = pct->soc->npins;
1236        pct->pctldev = pinctrl_register(&abx500_pinctrl_desc, &pdev->dev, pct);
1237        if (!pct->pctldev) {
1238                dev_err(&pdev->dev,
1239                        "could not register abx500 pinctrl driver\n");
1240                ret = -EINVAL;
1241                goto out_rem_chip;
1242        }
1243        dev_info(&pdev->dev, "registered pin controller\n");
1244
1245        /* We will handle a range of GPIO pins */
1246        for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1247                const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1248
1249                ret = gpiochip_add_pin_range(&pct->chip,
1250                                        dev_name(&pdev->dev),
1251                                        p->offset - 1, p->offset, p->npins);
1252                if (ret < 0)
1253                        goto out_rem_chip;
1254        }
1255
1256        platform_set_drvdata(pdev, pct);
1257        dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1258
1259        return 0;
1260
1261out_rem_chip:
1262        gpiochip_remove(&pct->chip);
1263        return ret;
1264}
1265
1266/**
1267 * abx500_gpio_remove() - remove Ab8500-gpio driver
1268 * @pdev:       Platform device registered
1269 */
1270static int abx500_gpio_remove(struct platform_device *pdev)
1271{
1272        struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1273
1274        gpiochip_remove(&pct->chip);
1275        return 0;
1276}
1277
1278static struct platform_driver abx500_gpio_driver = {
1279        .driver = {
1280                .name = "abx500-gpio",
1281                .of_match_table = abx500_gpio_match,
1282        },
1283        .probe = abx500_gpio_probe,
1284        .remove = abx500_gpio_remove,
1285};
1286
1287static int __init abx500_gpio_init(void)
1288{
1289        return platform_driver_register(&abx500_gpio_driver);
1290}
1291core_initcall(abx500_gpio_init);
1292
1293MODULE_AUTHOR("Patrice Chotard <patrice.chotard@st.com>");
1294MODULE_DESCRIPTION("Driver allows to use AxB5xx unused pins to be used as GPIO");
1295MODULE_ALIAS("platform:abx500-gpio");
1296MODULE_LICENSE("GPL v2");
1297
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