linux/drivers/net/wireless/rtl818x/rtl8187_dev.c History
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   1/*
   2 * Linux device driver for RTL8187
   3 *
   4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   6 *
   7 * Based on the r8187 driver, which is:
   8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   9 *
  10 * The driver was extended to the RTL8187B in 2008 by:
  11 *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
  12 *      Hin-Tak Leung <htl10@users.sourceforge.net>
  13 *      Larry Finger <Larry.Finger@lwfinger.net>
  14 *
  15 * Magic delays and register offsets below are taken from the original
  16 * r8187 driver sources.  Thanks to Realtek for their support!
  17 *
  18 * This program is free software; you can redistribute it and/or modify
  19 * it under the terms of the GNU General Public License version 2 as
  20 * published by the Free Software Foundation.
  21 */
  22
  23#include <linux/init.h>
  24#include <linux/usb.h>
  25#include <linux/slab.h>
  26#include <linux/delay.h>
  27#include <linux/etherdevice.h>
  28#include <linux/eeprom_93cx6.h>
  29#include <net/mac80211.h>
  30
  31#include "rtl8187.h"
  32#include "rtl8187_rtl8225.h"
  33#ifdef CONFIG_RTL8187_LEDS
  34#include "rtl8187_leds.h"
  35#endif
  36#include "rtl8187_rfkill.h"
  37
  38MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  39MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  40MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
  41MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
  42MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
  43MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  44MODULE_LICENSE("GPL");
  45
  46static struct usb_device_id rtl8187_table[] __devinitdata = {
  47        /* Asus */
  48        {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  49        /* Belkin */
  50        {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
  51        /* Realtek */
  52        {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  53        {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  54        {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  55        {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  56        /* Surecom */
  57        {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
  58        /* Logitech */
  59        {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
  60        /* Netgear */
  61        {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  62        {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  63        {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  64        /* HP */
  65        {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  66        /* Sitecom */
  67        {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  68        {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
  69        {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
  70        /* Sphairon Access Systems GmbH */
  71        {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
  72        /* Dick Smith Electronics */
  73        {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
  74        /* Abocom */
  75        {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
  76        /* Qcom */
  77        {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
  78        /* AirLive */
  79        {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
  80        /* Linksys */
  81        {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
  82        {}
  83};
  84
  85MODULE_DEVICE_TABLE(usb, rtl8187_table);
  86
  87static const struct ieee80211_rate rtl818x_rates[] = {
  88        { .bitrate = 10, .hw_value = 0, },
  89        { .bitrate = 20, .hw_value = 1, },
  90        { .bitrate = 55, .hw_value = 2, },
  91        { .bitrate = 110, .hw_value = 3, },
  92        { .bitrate = 60, .hw_value = 4, },
  93        { .bitrate = 90, .hw_value = 5, },
  94        { .bitrate = 120, .hw_value = 6, },
  95        { .bitrate = 180, .hw_value = 7, },
  96        { .bitrate = 240, .hw_value = 8, },
  97        { .bitrate = 360, .hw_value = 9, },
  98        { .bitrate = 480, .hw_value = 10, },
  99        { .bitrate = 540, .hw_value = 11, },
 100};
 101
 102static const struct ieee80211_channel rtl818x_channels[] = {
 103        { .center_freq = 2412 },
 104        { .center_freq = 2417 },
 105        { .center_freq = 2422 },
 106        { .center_freq = 2427 },
 107        { .center_freq = 2432 },
 108        { .center_freq = 2437 },
 109        { .center_freq = 2442 },
 110        { .center_freq = 2447 },
 111        { .center_freq = 2452 },
 112        { .center_freq = 2457 },
 113        { .center_freq = 2462 },
 114        { .center_freq = 2467 },
 115        { .center_freq = 2472 },
 116        { .center_freq = 2484 },
 117};
 118
 119static void rtl8187_iowrite_async_cb(struct urb *urb)
 120{
 121        kfree(urb->context);
 122}
 123
 124static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
 125                                  void *data, u16 len)
 126{
 127        struct usb_ctrlrequest *dr;
 128        struct urb *urb;
 129        struct rtl8187_async_write_data {
 130                u8 data[4];
 131                struct usb_ctrlrequest dr;
 132        } *buf;
 133        int rc;
 134
 135        buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 136        if (!buf)
 137                return;
 138
 139        urb = usb_alloc_urb(0, GFP_ATOMIC);
 140        if (!urb) {
 141                kfree(buf);
 142                return;
 143        }
 144
 145        dr = &buf->dr;
 146
 147        dr->bRequestType = RTL8187_REQT_WRITE;
 148        dr->bRequest = RTL8187_REQ_SET_REG;
 149        dr->wValue = addr;
 150        dr->wIndex = 0;
 151        dr->wLength = cpu_to_le16(len);
 152
 153        memcpy(buf, data, len);
 154
 155        usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 156                             (unsigned char *)dr, buf, len,
 157                             rtl8187_iowrite_async_cb, buf);
 158        usb_anchor_urb(urb, &priv->anchored);
 159        rc = usb_submit_urb(urb, GFP_ATOMIC);
 160        if (rc < 0) {
 161                kfree(buf);
 162                usb_unanchor_urb(urb);
 163        }
 164        usb_free_urb(urb);
 165}
 166
 167static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 168                                           __le32 *addr, u32 val)
 169{
 170        __le32 buf = cpu_to_le32(val);
 171
 172        rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 173                              &buf, sizeof(buf));
 174}
 175
 176void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 177{
 178        struct rtl8187_priv *priv = dev->priv;
 179
 180        data <<= 8;
 181        data |= addr | 0x80;
 182
 183        rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 184        rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 185        rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 186        rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 187}
 188
 189static void rtl8187_tx_cb(struct urb *urb)
 190{
 191        struct sk_buff *skb = (struct sk_buff *)urb->context;
 192        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 193        struct ieee80211_hw *hw = info->rate_driver_data[0];
 194        struct rtl8187_priv *priv = hw->priv;
 195
 196        skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 197                                          sizeof(struct rtl8187_tx_hdr));
 198        ieee80211_tx_info_clear_status(info);
 199
 200        if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
 201                if (priv->is_rtl8187b) {
 202                        skb_queue_tail(&priv->b_tx_status.queue, skb);
 203
 204                        /* queue is "full", discard last items */
 205                        while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
 206                                struct sk_buff *old_skb;
 207
 208                                dev_dbg(&priv->udev->dev,
 209                                        "transmit status queue full\n");
 210
 211                                old_skb = skb_dequeue(&priv->b_tx_status.queue);
 212                                ieee80211_tx_status_irqsafe(hw, old_skb);
 213                        }
 214                        return;
 215                } else {
 216                        info->flags |= IEEE80211_TX_STAT_ACK;
 217                }
 218        }
 219        if (priv->is_rtl8187b)
 220                ieee80211_tx_status_irqsafe(hw, skb);
 221        else {
 222                /* Retry information for the RTI8187 is only available by
 223                 * reading a register in the device. We are in interrupt mode
 224                 * here, thus queue the skb and finish on a work queue. */
 225                skb_queue_tail(&priv->b_tx_status.queue, skb);
 226                ieee80211_queue_delayed_work(hw, &priv->work, 0);
 227        }
 228}
 229
 230static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 231{
 232        struct rtl8187_priv *priv = dev->priv;
 233        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 234        unsigned int ep;
 235        void *buf;
 236        struct urb *urb;
 237        __le16 rts_dur = 0;
 238        u32 flags;
 239        int rc;
 240
 241        urb = usb_alloc_urb(0, GFP_ATOMIC);
 242        if (!urb) {
 243                kfree_skb(skb);
 244                return NETDEV_TX_OK;
 245        }
 246
 247        flags = skb->len;
 248        flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
 249
 250        flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 251        if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
 252                flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
 253        if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 254                flags |= RTL818X_TX_DESC_FLAG_RTS;
 255                flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 256                rts_dur = ieee80211_rts_duration(dev, priv->vif,
 257                                                 skb->len, info);
 258        } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 259                flags |= RTL818X_TX_DESC_FLAG_CTS;
 260                flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 261        }
 262
 263        if (!priv->is_rtl8187b) {
 264                struct rtl8187_tx_hdr *hdr =
 265                        (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 266                hdr->flags = cpu_to_le32(flags);
 267                hdr->len = 0;
 268                hdr->rts_duration = rts_dur;
 269                hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 270                buf = hdr;
 271
 272                ep = 2;
 273        } else {
 274                /* fc needs to be calculated before skb_push() */
 275                unsigned int epmap[4] = { 6, 7, 5, 4 };
 276                struct ieee80211_hdr *tx_hdr =
 277                        (struct ieee80211_hdr *)(skb->data);
 278                u16 fc = le16_to_cpu(tx_hdr->frame_control);
 279
 280                struct rtl8187b_tx_hdr *hdr =
 281                        (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
 282                struct ieee80211_rate *txrate =
 283                        ieee80211_get_tx_rate(dev, info);
 284                memset(hdr, 0, sizeof(*hdr));
 285                hdr->flags = cpu_to_le32(flags);
 286                hdr->rts_duration = rts_dur;
 287                hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 288                hdr->tx_duration =
 289                        ieee80211_generic_frame_duration(dev, priv->vif,
 290                                                         skb->len, txrate);
 291                buf = hdr;
 292
 293                if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 294                        ep = 12;
 295                else
 296                        ep = epmap[skb_get_queue_mapping(skb)];
 297        }
 298
 299        info->rate_driver_data[0] = dev;
 300        info->rate_driver_data[1] = urb;
 301
 302        usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 303                          buf, skb->len, rtl8187_tx_cb, skb);
 304        urb->transfer_flags |= URB_ZERO_PACKET;
 305        usb_anchor_urb(urb, &priv->anchored);
 306        rc = usb_submit_urb(urb, GFP_ATOMIC);
 307        if (rc < 0) {
 308                usb_unanchor_urb(urb);
 309                kfree_skb(skb);
 310        }
 311        usb_free_urb(urb);
 312
 313        return NETDEV_TX_OK;
 314}
 315
 316static void rtl8187_rx_cb(struct urb *urb)
 317{
 318        struct sk_buff *skb = (struct sk_buff *)urb->context;
 319        struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 320        struct ieee80211_hw *dev = info->dev;
 321        struct rtl8187_priv *priv = dev->priv;
 322        struct ieee80211_rx_status rx_status = { 0 };
 323        int rate, signal;
 324        u32 flags;
 325        unsigned long f;
 326
 327        spin_lock_irqsave(&priv->rx_queue.lock, f);
 328        __skb_unlink(skb, &priv->rx_queue);
 329        spin_unlock_irqrestore(&priv->rx_queue.lock, f);
 330        skb_put(skb, urb->actual_length);
 331
 332        if (unlikely(urb->status)) {
 333                dev_kfree_skb_irq(skb);
 334                return;
 335        }
 336
 337        if (!priv->is_rtl8187b) {
 338                struct rtl8187_rx_hdr *hdr =
 339                        (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 340                flags = le32_to_cpu(hdr->flags);
 341                /* As with the RTL8187B below, the AGC is used to calculate
 342                 * signal strength. In this case, the scaling
 343                 * constants are derived from the output of p54usb.
 344                 */
 345                signal = -4 - ((27 * hdr->agc) >> 6);
 346                rx_status.antenna = (hdr->signal >> 7) & 1;
 347                rx_status.mactime = le64_to_cpu(hdr->mac_time);
 348        } else {
 349                struct rtl8187b_rx_hdr *hdr =
 350                        (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 351                /* The Realtek datasheet for the RTL8187B shows that the RX
 352                 * header contains the following quantities: signal quality,
 353                 * RSSI, AGC, the received power in dB, and the measured SNR.
 354                 * In testing, none of these quantities show qualitative
 355                 * agreement with AP signal strength, except for the AGC,
 356                 * which is inversely proportional to the strength of the
 357                 * signal. In the following, the signal strength
 358                 * is derived from the AGC. The arbitrary scaling constants
 359                 * are chosen to make the results close to the values obtained
 360                 * for a BCM4312 using b43 as the driver. The noise is ignored
 361                 * for now.
 362                 */
 363                flags = le32_to_cpu(hdr->flags);
 364                signal = 14 - hdr->agc / 2;
 365                rx_status.antenna = (hdr->rssi >> 7) & 1;
 366                rx_status.mactime = le64_to_cpu(hdr->mac_time);
 367        }
 368
 369        rx_status.signal = signal;
 370        priv->signal = signal;
 371        rate = (flags >> 20) & 0xF;
 372        skb_trim(skb, flags & 0x0FFF);
 373        rx_status.rate_idx = rate;
 374        rx_status.freq = dev->conf.channel->center_freq;
 375        rx_status.band = dev->conf.channel->band;
 376        rx_status.flag |= RX_FLAG_TSFT;
 377        if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 378                rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 379        memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 380        ieee80211_rx_irqsafe(dev, skb);
 381
 382        skb = dev_alloc_skb(RTL8187_MAX_RX);
 383        if (unlikely(!skb)) {
 384                /* TODO check rx queue length and refill *somewhere* */
 385                return;
 386        }
 387
 388        info = (struct rtl8187_rx_info *)skb->cb;
 389        info->urb = urb;
 390        info->dev = dev;
 391        urb->transfer_buffer = skb_tail_pointer(skb);
 392        urb->context = skb;
 393        skb_queue_tail(&priv->rx_queue, skb);
 394
 395        usb_anchor_urb(urb, &priv->anchored);
 396        if (usb_submit_urb(urb, GFP_ATOMIC)) {
 397                usb_unanchor_urb(urb);
 398                skb_unlink(skb, &priv->rx_queue);
 399                dev_kfree_skb_irq(skb);
 400        }
 401}
 402
 403static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 404{
 405        struct rtl8187_priv *priv = dev->priv;
 406        struct urb *entry = NULL;
 407        struct sk_buff *skb;
 408        struct rtl8187_rx_info *info;
 409        int ret = 0;
 410
 411        while (skb_queue_len(&priv->rx_queue) < 16) {
 412                skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 413                if (!skb) {
 414                        ret = -ENOMEM;
 415                        goto err;
 416                }
 417                entry = usb_alloc_urb(0, GFP_KERNEL);
 418                if (!entry) {
 419                        ret = -ENOMEM;
 420                        goto err;
 421                }
 422                usb_fill_bulk_urb(entry, priv->udev,
 423                                  usb_rcvbulkpipe(priv->udev,
 424                                  priv->is_rtl8187b ? 3 : 1),
 425                                  skb_tail_pointer(skb),
 426                                  RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 427                info = (struct rtl8187_rx_info *)skb->cb;
 428                info->urb = entry;
 429                info->dev = dev;
 430                skb_queue_tail(&priv->rx_queue, skb);
 431                usb_anchor_urb(entry, &priv->anchored);
 432                ret = usb_submit_urb(entry, GFP_KERNEL);
 433                if (ret) {
 434                        skb_unlink(skb, &priv->rx_queue);
 435                        usb_unanchor_urb(entry);
 436                        goto err;
 437                }
 438                usb_free_urb(entry);
 439        }
 440        return ret;
 441
 442err:
 443        usb_free_urb(entry);
 444        kfree_skb(skb);
 445        usb_kill_anchored_urbs(&priv->anchored);
 446        return ret;
 447}
 448
 449static void rtl8187b_status_cb(struct urb *urb)
 450{
 451        struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
 452        struct rtl8187_priv *priv = hw->priv;
 453        u64 val;
 454        unsigned int cmd_type;
 455
 456        if (unlikely(urb->status))
 457                return;
 458
 459        /*
 460         * Read from status buffer:
 461         *
 462         * bits [30:31] = cmd type:
 463         * - 0 indicates tx beacon interrupt
 464         * - 1 indicates tx close descriptor
 465         *
 466         * In the case of tx beacon interrupt:
 467         * [0:9] = Last Beacon CW
 468         * [10:29] = reserved
 469         * [30:31] = 00b
 470         * [32:63] = Last Beacon TSF
 471         *
 472         * If it's tx close descriptor:
 473         * [0:7] = Packet Retry Count
 474         * [8:14] = RTS Retry Count
 475         * [15] = TOK
 476         * [16:27] = Sequence No
 477         * [28] = LS
 478         * [29] = FS
 479         * [30:31] = 01b
 480         * [32:47] = unused (reserved?)
 481         * [48:63] = MAC Used Time
 482         */
 483        val = le64_to_cpu(priv->b_tx_status.buf);
 484
 485        cmd_type = (val >> 30) & 0x3;
 486        if (cmd_type == 1) {
 487                unsigned int pkt_rc, seq_no;
 488                bool tok;
 489                struct sk_buff *skb;
 490                struct ieee80211_hdr *ieee80211hdr;
 491                unsigned long flags;
 492
 493                pkt_rc = val & 0xFF;
 494                tok = val & (1 << 15);
 495                seq_no = (val >> 16) & 0xFFF;
 496
 497                spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
 498                skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
 499                        ieee80211hdr = (struct ieee80211_hdr *)skb->data;
 500
 501                        /*
 502                         * While testing, it was discovered that the seq_no
 503                         * doesn't actually contains the sequence number.
 504                         * Instead of returning just the 12 bits of sequence
 505                         * number, hardware is returning entire sequence control
 506                         * (fragment number plus sequence number) in a 12 bit
 507                         * only field overflowing after some time. As a
 508                         * workaround, just consider the lower bits, and expect
 509                         * it's unlikely we wrongly ack some sent data
 510                         */
 511                        if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
 512                            & 0xFFF) == seq_no)
 513                                break;
 514                }
 515                if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
 516                        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 517
 518                        __skb_unlink(skb, &priv->b_tx_status.queue);
 519                        if (tok)
 520                                info->flags |= IEEE80211_TX_STAT_ACK;
 521                        info->status.rates[0].count = pkt_rc + 1;
 522
 523                        ieee80211_tx_status_irqsafe(hw, skb);
 524                }
 525                spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
 526        }
 527
 528        usb_anchor_urb(urb, &priv->anchored);
 529        if (usb_submit_urb(urb, GFP_ATOMIC))
 530                usb_unanchor_urb(urb);
 531}
 532
 533static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
 534{
 535        struct rtl8187_priv *priv = dev->priv;
 536        struct urb *entry;
 537        int ret = 0;
 538
 539        entry = usb_alloc_urb(0, GFP_KERNEL);
 540        if (!entry)
 541                return -ENOMEM;
 542
 543        usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
 544                          &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
 545                          rtl8187b_status_cb, dev);
 546
 547        usb_anchor_urb(entry, &priv->anchored);
 548        ret = usb_submit_urb(entry, GFP_KERNEL);
 549        if (ret)
 550                usb_unanchor_urb(entry);
 551        usb_free_urb(entry);
 552
 553        return ret;
 554}
 555
 556static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 557{
 558        struct rtl8187_priv *priv = dev->priv;
 559        u8 reg;
 560        int i;
 561
 562        reg = rtl818x_ioread8(priv, &priv->map->CMD);
 563        reg &= (1 << 1);
 564        reg |= RTL818X_CMD_RESET;
 565        rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 566
 567        i = 10;
 568        do {
 569                msleep(2);
 570                if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 571                      RTL818X_CMD_RESET))
 572                        break;
 573        } while (--i);
 574
 575        if (!i) {
 576                printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
 577                return -ETIMEDOUT;
 578        }
 579
 580        /* reload registers from eeprom */
 581        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 582
 583        i = 10;
 584        do {
 585                msleep(4);
 586                if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 587                      RTL818X_EEPROM_CMD_CONFIG))
 588                        break;
 589        } while (--i);
 590
 591        if (!i) {
 592                printk(KERN_ERR "%s: eeprom reset timeout!\n",
 593                       wiphy_name(dev->wiphy));
 594                return -ETIMEDOUT;
 595        }
 596
 597        return 0;
 598}
 599
 600static int rtl8187_init_hw(struct ieee80211_hw *dev)
 601{
 602        struct rtl8187_priv *priv = dev->priv;
 603        u8 reg;
 604        int res;
 605
 606        /* reset */
 607        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 608                         RTL818X_EEPROM_CMD_CONFIG);
 609        reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 610        rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
 611                         RTL818X_CONFIG3_ANAPARAM_WRITE);
 612        rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 613                          RTL8187_RTL8225_ANAPARAM_ON);
 614        rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 615                          RTL8187_RTL8225_ANAPARAM2_ON);
 616        rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
 617                         ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 618        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 619                         RTL818X_EEPROM_CMD_NORMAL);
 620
 621        rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 622
 623        msleep(200);
 624        rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 625        rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 626        rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 627        msleep(200);
 628
 629        res = rtl8187_cmd_reset(dev);
 630        if (res)
 631                return res;
 632
 633        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 634        reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 635        rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 636                        reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 637        rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 638                          RTL8187_RTL8225_ANAPARAM_ON);
 639        rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 640                          RTL8187_RTL8225_ANAPARAM2_ON);
 641        rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 642                        reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 643        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 644
 645        /* setup card */
 646        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 647        rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
 648
 649        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 650        rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
 651        rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 652
 653        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 654
 655        rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 656        reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 657        reg &= 0x3F;
 658        reg |= 0x80;
 659        rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 660
 661        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 662
 663        rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 664        rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 665        rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
 666
 667        // TODO: set RESP_RATE and BRSR properly
 668        rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 669        rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 670
 671        /* host_usb_init */
 672        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 673        rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
 674        reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 675        rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 676        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 677        rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
 678        rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 679        rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 680        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 681        rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 682        msleep(100);
 683
 684        rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 685        rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 686        rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 687        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 688                         RTL818X_EEPROM_CMD_CONFIG);
 689        rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 690        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 691                         RTL818X_EEPROM_CMD_NORMAL);
 692        rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 693        msleep(100);
 694
 695        priv->rf->init(dev);
 696
 697        rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 698        reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 699        rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 700        rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 701        rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 702        rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 703        rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 704
 705        return 0;
 706}
 707
 708static const u8 rtl8187b_reg_table[][3] = {
 709        {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 710        {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 711        {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 712        {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 713
 714        {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 715        {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 716        {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
 717        {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
 718        {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
 719        {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 720
 721        {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 722        {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 723        {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 724        {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 725        {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 726        {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 727        {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
 728        {0x73, 0x9A, 2},
 729
 730        {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
 731        {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
 732        {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
 733        {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
 734        {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
 735
 736        {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
 737        {0x8F, 0x00, 0}
 738};
 739
 740static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 741{
 742        struct rtl8187_priv *priv = dev->priv;
 743        int res, i;
 744        u8 reg;
 745
 746        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 747                         RTL818X_EEPROM_CMD_CONFIG);
 748
 749        reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 750        reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
 751        rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 752        rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 753                          RTL8187B_RTL8225_ANAPARAM2_ON);
 754        rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 755                          RTL8187B_RTL8225_ANAPARAM_ON);
 756        rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
 757                         RTL8187B_RTL8225_ANAPARAM3_ON);
 758
 759        rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 760        reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 761        rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 762        rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 763
 764        reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 765        reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 766        rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 767
 768        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 769                         RTL818X_EEPROM_CMD_NORMAL);
 770
 771        res = rtl8187_cmd_reset(dev);
 772        if (res)
 773                return res;
 774
 775        rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
 776        reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 777        reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 778        rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 779        reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 780        reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
 781               RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 782        rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 783
 784        rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 785
 786        rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 787        rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 788        rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 789
 790        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 791                         RTL818X_EEPROM_CMD_CONFIG);
 792        reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 793        rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 794        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 795                         RTL818X_EEPROM_CMD_NORMAL);
 796
 797        rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 798        for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 799                rtl818x_iowrite8_idx(priv,
 800                                     (u8 *)(uintptr_t)
 801                                     (rtl8187b_reg_table[i][0] | 0xFF00),
 802                                     rtl8187b_reg_table[i][1],
 803                                     rtl8187b_reg_table[i][2]);
 804        }
 805
 806        rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 807        rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 808
 809        rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 810        rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 811        rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 812
 813        rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 814
 815        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 816
 817        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 818                         RTL818X_EEPROM_CMD_CONFIG);
 819        reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 820        reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 821        rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 822        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 823                         RTL818X_EEPROM_CMD_NORMAL);
 824
 825        rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 826        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 827        rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 828        msleep(100);
 829
 830        priv->rf->init(dev);
 831
 832        reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 833        rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 834        rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 835
 836        rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 837        rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 838        rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 839        rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 840        rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 841        rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 842        rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 843
 844        reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 845        rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 846        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 847        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 848        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 849        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 850        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 851        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 852        rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 853        rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 854        rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 855        rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 856        rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 857
 858        rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 859
 860        rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 861
 862        priv->slot_time = 0x9;
 863        priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
 864        priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
 865        priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
 866        priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
 867        rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
 868
 869        /* ENEDCA flag must always be set, transmit issues? */
 870        rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
 871
 872        return 0;
 873}
 874
 875static void rtl8187_work(struct work_struct *work)
 876{
 877        /* The RTL8187 returns the retry count through register 0xFFFA. In
 878         * addition, it appears to be a cumulative retry count, not the
 879         * value for the current TX packet. When multiple TX entries are
 880         * queued, the retry count will be valid for the last one in the queue.
 881         * The "error" should not matter for purposes of rate setting. */
 882        struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
 883                                    work.work);
 884        struct ieee80211_tx_info *info;
 885        struct ieee80211_hw *dev = priv->dev;
 886        static u16 retry;
 887        u16 tmp;
 888
 889        mutex_lock(&priv->conf_mutex);
 890        tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
 891        while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
 892                struct sk_buff *old_skb;
 893
 894                old_skb = skb_dequeue(&priv->b_tx_status.queue);
 895                info = IEEE80211_SKB_CB(old_skb);
 896                info->status.rates[0].count = tmp - retry + 1;
 897                ieee80211_tx_status_irqsafe(dev, old_skb);
 898        }
 899        retry = tmp;
 900        mutex_unlock(&priv->conf_mutex);
 901}
 902
 903static int rtl8187_start(struct ieee80211_hw *dev)
 904{
 905        struct rtl8187_priv *priv = dev->priv;
 906        u32 reg;
 907        int ret;
 908
 909        mutex_lock(&priv->conf_mutex);
 910
 911        ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 912                                     rtl8187b_init_hw(dev);
 913        if (ret)
 914                goto rtl8187_start_exit;
 915
 916        init_usb_anchor(&priv->anchored);
 917        priv->dev = dev;
 918
 919        if (priv->is_rtl8187b) {
 920                reg = RTL818X_RX_CONF_MGMT |
 921                      RTL818X_RX_CONF_DATA |
 922                      RTL818X_RX_CONF_BROADCAST |
 923                      RTL818X_RX_CONF_NICMAC |
 924                      RTL818X_RX_CONF_BSSID |
 925                      (7 << 13 /* RX FIFO threshold NONE */) |
 926                      (7 << 10 /* MAX RX DMA */) |
 927                      RTL818X_RX_CONF_RX_AUTORESETPHY |
 928                      RTL818X_RX_CONF_ONLYERLPKT |
 929                      RTL818X_RX_CONF_MULTICAST;
 930                priv->rx_conf = reg;
 931                rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 932
 933                rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 934                                  RTL818X_TX_CONF_HW_SEQNUM |
 935                                  RTL818X_TX_CONF_DISREQQSIZE |
 936                                  (7 << 8  /* short retry limit */) |
 937                                  (7 << 0  /* long retry limit */) |
 938                                  (7 << 21 /* MAX TX DMA */));
 939                rtl8187_init_urbs(dev);
 940                rtl8187b_init_status_urb(dev);
 941                goto rtl8187_start_exit;
 942        }
 943
 944        rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 945
 946        rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 947        rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 948
 949        rtl8187_init_urbs(dev);
 950
 951        reg = RTL818X_RX_CONF_ONLYERLPKT |
 952              RTL818X_RX_CONF_RX_AUTORESETPHY |
 953              RTL818X_RX_CONF_BSSID |
 954              RTL818X_RX_CONF_MGMT |
 955              RTL818X_RX_CONF_DATA |
 956              (7 << 13 /* RX FIFO threshold NONE */) |
 957              (7 << 10 /* MAX RX DMA */) |
 958              RTL818X_RX_CONF_BROADCAST |
 959              RTL818X_RX_CONF_NICMAC;
 960
 961        priv->rx_conf = reg;
 962        rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 963
 964        reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 965        reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 966        reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 967        rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 968
 969        reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 970        reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 971        reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 972        reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 973        rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 974
 975        reg  = RTL818X_TX_CONF_CW_MIN |
 976               (7 << 21 /* MAX TX DMA */) |
 977               RTL818X_TX_CONF_NO_ICV;
 978        rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 979
 980        reg = rtl818x_ioread8(priv, &priv->map->CMD);
 981        reg |= RTL818X_CMD_TX_ENABLE;
 982        reg |= RTL818X_CMD_RX_ENABLE;
 983        rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 984        INIT_DELAYED_WORK(&priv->work, rtl8187_work);
 985
 986rtl8187_start_exit:
 987        mutex_unlock(&priv->conf_mutex);
 988        return ret;
 989}
 990
 991static void rtl8187_stop(struct ieee80211_hw *dev)
 992{
 993        struct rtl8187_priv *priv = dev->priv;
 994        struct sk_buff *skb;
 995        u32 reg;
 996
 997        mutex_lock(&priv->conf_mutex);
 998        rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 999
1000        reg = rtl818x_ioread8(priv, &priv->map->CMD);
1001        reg &= ~RTL818X_CMD_TX_ENABLE;
1002        reg &= ~RTL818X_CMD_RX_ENABLE;
1003        rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1004
1005        priv->rf->stop(dev);
1006
1007        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1008        reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1009        rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1010        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1011
1012        while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1013                dev_kfree_skb_any(skb);
1014
1015        usb_kill_anchored_urbs(&priv->anchored);
1016        mutex_unlock(&priv->conf_mutex);
1017
1018        if (!priv->is_rtl8187b)
1019                cancel_delayed_work_sync(&priv->work);
1020}
1021
1022static int rtl8187_add_interface(struct ieee80211_hw *dev,
1023                                 struct ieee80211_vif *vif)
1024{
1025        struct rtl8187_priv *priv = dev->priv;
1026        int i;
1027        int ret = -EOPNOTSUPP;
1028
1029        mutex_lock(&priv->conf_mutex);
1030        if (priv->vif)
1031                goto exit;
1032
1033        switch (vif->type) {
1034        case NL80211_IFTYPE_STATION:
1035                break;
1036        default:
1037                goto exit;
1038        }
1039
1040        ret = 0;
1041        priv->vif = vif;
1042
1043        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1044        for (i = 0; i < ETH_ALEN; i++)
1045                rtl818x_iowrite8(priv, &priv->map->MAC[i],
1046                                 ((u8 *)vif->addr)[i]);
1047        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1048
1049exit:
1050        mutex_unlock(&priv->conf_mutex);
1051        return ret;
1052}
1053
1054static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1055                                     struct ieee80211_vif *vif)
1056{
1057        struct rtl8187_priv *priv = dev->priv;
1058        mutex_lock(&priv->conf_mutex);
1059        priv->vif = NULL;
1060        mutex_unlock(&priv->conf_mutex);
1061}
1062
1063static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1064{
1065        struct rtl8187_priv *priv = dev->priv;
1066        struct ieee80211_conf *conf = &dev->conf;
1067        u32 reg;
1068
1069        mutex_lock(&priv->conf_mutex);
1070        reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1071        /* Enable TX loopback on MAC level to avoid TX during channel
1072         * changes, as this has be seen to causes problems and the
1073         * card will stop work until next reset
1074         */
1075        rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1076                          reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1077        priv->rf->set_chan(dev, conf);
1078        msleep(10);
1079        rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1080
1081        rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1082        rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1083        rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1084        rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1085        mutex_unlock(&priv->conf_mutex);
1086        return 0;
1087}
1088
1089/*
1090 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1091 * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1092 */
1093static __le32 *rtl8187b_ac_addr[4] = {
1094        (__le32 *) 0xFFF0, /* AC_VO */
1095        (__le32 *) 0xFFF4, /* AC_VI */
1096        (__le32 *) 0xFFFC, /* AC_BK */
1097        (__le32 *) 0xFFF8, /* AC_BE */
1098};
1099
1100#define SIFS_TIME 0xa
1101
1102static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1103                             bool use_short_preamble)
1104{
1105        if (priv->is_rtl8187b) {
1106                u8 difs, eifs;
1107                u16 ack_timeout;
1108                int queue;
1109
1110                if (use_short_slot) {
1111                        priv->slot_time = 0x9;
1112                        difs = 0x1c;
1113                        eifs = 0x53;
1114                } else {
1115                        priv->slot_time = 0x14;
1116                        difs = 0x32;
1117                        eifs = 0x5b;
1118                }
1119                rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1120                rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1121                rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1122
1123                /*
1124                 * BRSR+1 on 8187B is in fact EIFS register
1125                 * Value in units of 4 us
1126                 */
1127                rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1128
1129                /*
1130                 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1131                 * register. In units of 4 us like eifs register
1132                 * ack_timeout = ack duration + plcp + difs + preamble
1133                 */
1134                ack_timeout = 112 + 48 + difs;
1135                if (use_short_preamble)
1136                        ack_timeout += 72;
1137                else
1138                        ack_timeout += 144;
1139                rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1140                                 DIV_ROUND_UP(ack_timeout, 4));
1141
1142                for (queue = 0; queue < 4; queue++)
1143                        rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1144                                         priv->aifsn[queue] * priv->slot_time +
1145                                         SIFS_TIME);
1146        } else {
1147                rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1148                if (use_short_slot) {
1149                        rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1150                        rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1151                        rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1152                } else {
1153                        rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1154                        rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1155                        rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1156                }
1157        }
1158}
1159
1160static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1161                                     struct ieee80211_vif *vif,
1162                                     struct ieee80211_bss_conf *info,
1163                                     u32 changed)
1164{
1165        struct rtl8187_priv *priv = dev->priv;
1166        int i;
1167        u8 reg;
1168
1169        if (changed & BSS_CHANGED_BSSID) {
1170                mutex_lock(&priv->conf_mutex);
1171                for (i = 0; i < ETH_ALEN; i++)
1172                        rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1173                                         info->bssid[i]);
1174
1175                if (priv->is_rtl8187b)
1176                        reg = RTL818X_MSR_ENEDCA;
1177                else
1178                        reg = 0;
1179
1180                if (is_valid_ether_addr(info->bssid)) {
1181                        reg |= RTL818X_MSR_INFRA;
1182                        rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1183                } else {
1184                        reg |= RTL818X_MSR_NO_LINK;
1185                        rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1186                }
1187
1188                mutex_unlock(&priv->conf_mutex);
1189        }
1190
1191        if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1192                rtl8187_conf_erp(priv, info->use_short_slot,
1193                                 info->use_short_preamble);
1194}
1195
1196static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
1197                                     int mc_count, struct dev_addr_list *mc_list)
1198{
1199        return mc_count;
1200}
1201
1202static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1203                                     unsigned int changed_flags,
1204                                     unsigned int *total_flags,
1205                                     u64 multicast)
1206{
1207        struct rtl8187_priv *priv = dev->priv;
1208
1209        if (changed_flags & FIF_FCSFAIL)
1210                priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1211        if (changed_flags & FIF_CONTROL)
1212                priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1213        if (changed_flags & FIF_OTHER_BSS)
1214                priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1215        if (*total_flags & FIF_ALLMULTI || multicast > 0)
1216                priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1217        else
1218                priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1219
1220        *total_flags = 0;
1221
1222        if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1223                *total_flags |= FIF_FCSFAIL;
1224        if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1225                *total_flags |= FIF_CONTROL;
1226        if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1227                *total_flags |= FIF_OTHER_BSS;
1228        if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1229                *total_flags |= FIF_ALLMULTI;
1230
1231        rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1232}
1233
1234static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue,
1235                           const struct ieee80211_tx_queue_params *params)
1236{
1237        struct rtl8187_priv *priv = dev->priv;
1238        u8 cw_min, cw_max;
1239
1240        if (queue > 3)
1241                return -EINVAL;
1242
1243        cw_min = fls(params->cw_min);
1244        cw_max = fls(params->cw_max);
1245
1246        if (priv->is_rtl8187b) {
1247                priv->aifsn[queue] = params->aifs;
1248
1249                /*
1250                 * This is the structure of AC_*_PARAM registers in 8187B:
1251                 * - TXOP limit field, bit offset = 16
1252                 * - ECWmax, bit offset = 12
1253                 * - ECWmin, bit offset = 8
1254                 * - AIFS, bit offset = 0
1255                 */
1256                rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1257                                  (params->txop << 16) | (cw_max << 12) |
1258                                  (cw_min << 8) | (params->aifs *
1259                                  priv->slot_time + SIFS_TIME));
1260        } else {
1261                if (queue != 0)
1262                        return -EINVAL;
1263
1264                rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1265                                 cw_min | (cw_max << 4));
1266        }
1267        return 0;
1268}
1269
1270static u64 rtl8187_get_tsf(struct ieee80211_hw *dev)
1271{
1272        struct rtl8187_priv *priv = dev->priv;
1273
1274        return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1275               (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1276}
1277
1278static const struct ieee80211_ops rtl8187_ops = {
1279        .tx                     = rtl8187_tx,
1280        .start                  = rtl8187_start,
1281        .stop                   = rtl8187_stop,
1282        .add_interface          = rtl8187_add_interface,
1283        .remove_interface       = rtl8187_remove_interface,
1284        .config                 = rtl8187_config,
1285        .bss_info_changed       = rtl8187_bss_info_changed,
1286        .prepare_multicast      = rtl8187_prepare_multicast,
1287        .configure_filter       = rtl8187_configure_filter,
1288        .conf_tx                = rtl8187_conf_tx,
1289        .rfkill_poll            = rtl8187_rfkill_poll,
1290        .get_tsf                = rtl8187_get_tsf,
1291};
1292
1293static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1294{
1295        struct ieee80211_hw *dev = eeprom->data;
1296        struct rtl8187_priv *priv = dev->priv;
1297        u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1298
1299        eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1300        eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1301        eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1302        eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1303}
1304
1305static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1306{
1307        struct ieee80211_hw *dev = eeprom->data;
1308        struct rtl8187_priv *priv = dev->priv;
1309        u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1310
1311        if (eeprom->reg_data_in)
1312                reg |= RTL818X_EEPROM_CMD_WRITE;
1313        if (eeprom->reg_data_out)
1314                reg |= RTL818X_EEPROM_CMD_READ;
1315        if (eeprom->reg_data_clock)
1316                reg |= RTL818X_EEPROM_CMD_CK;
1317        if (eeprom->reg_chip_select)
1318                reg |= RTL818X_EEPROM_CMD_CS;
1319
1320        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1321        udelay(10);
1322}
1323
1324static int __devinit rtl8187_probe(struct usb_interface *intf,
1325                                   const struct usb_device_id *id)
1326{
1327        struct usb_device *udev = interface_to_usbdev(intf);
1328        struct ieee80211_hw *dev;
1329        struct rtl8187_priv *priv;
1330        struct eeprom_93cx6 eeprom;
1331        struct ieee80211_channel *channel;
1332        const char *chip_name;
1333        u16 txpwr, reg;
1334        u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
1335        int err, i;
1336
1337        dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1338        if (!dev) {
1339                printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1340                return -ENOMEM;
1341        }
1342
1343        priv = dev->priv;
1344        priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1345
1346        /* allocate "DMA aware" buffer for register accesses */
1347        priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1348        if (!priv->io_dmabuf) {
1349                err = -ENOMEM;
1350                goto err_free_dev;
1351        }
1352        mutex_init(&priv->io_mutex);
1353
1354        SET_IEEE80211_DEV(dev, &intf->dev);
1355        usb_set_intfdata(intf, dev);
1356        priv->udev = udev;
1357
1358        usb_get_dev(udev);
1359
1360        skb_queue_head_init(&priv->rx_queue);
1361
1362        BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1363        BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1364
1365        memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1366        memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1367        priv->map = (struct rtl818x_csr *)0xFF00;
1368
1369        priv->band.band = IEEE80211_BAND_2GHZ;
1370        priv->band.channels = priv->channels;
1371        priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1372        priv->band.bitrates = priv->rates;
1373        priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1374        dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1375
1376
1377        dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1378                     IEEE80211_HW_SIGNAL_DBM |
1379                     IEEE80211_HW_RX_INCLUDES_FCS;
1380
1381        eeprom.data = dev;
1382        eeprom.register_read = rtl8187_eeprom_register_read;
1383        eeprom.register_write = rtl8187_eeprom_register_write;
1384        if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1385                eeprom.width = PCI_EEPROM_WIDTH_93C66;
1386        else
1387                eeprom.width = PCI_EEPROM_WIDTH_93C46;
1388
1389        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1390        udelay(10);
1391
1392        eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1393                               (__le16 __force *)dev->wiphy->perm_addr, 3);
1394        if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1395                printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1396                       "generated MAC address\n");
1397                random_ether_addr(dev->wiphy->perm_addr);
1398        }
1399
1400        channel = priv->channels;
1401        for (i = 0; i < 3; i++) {
1402                eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1403                                  &txpwr);
1404                (*channel++).hw_value = txpwr & 0xFF;
1405                (*channel++).hw_value = txpwr >> 8;
1406        }
1407        for (i = 0; i < 2; i++) {
1408                eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1409                                  &txpwr);
1410                (*channel++).hw_value = txpwr & 0xFF;
1411                (*channel++).hw_value = txpwr >> 8;
1412        }
1413
1414        eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1415                          &priv->txpwr_base);
1416
1417        reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1418        rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1419        /* 0 means asic B-cut, we should use SW 3 wire
1420         * bit-by-bit banging for radio. 1 means we can use
1421         * USB specific request to write radio registers */
1422        priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1423        rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1424        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1425
1426        if (!priv->is_rtl8187b) {
1427                u32 reg32;
1428                reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1429                reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1430                switch (reg32) {
1431                case RTL818X_TX_CONF_R8187vD_B:
1432                        /* Some RTL8187B devices have a USB ID of 0x8187
1433                         * detect them here */
1434                        chip_name = "RTL8187BvB(early)";
1435                        priv->is_rtl8187b = 1;
1436                        priv->hw_rev = RTL8187BvB;
1437                        break;
1438                case RTL818X_TX_CONF_R8187vD:
1439                        chip_name = "RTL8187vD";
1440                        break;
1441                default:
1442                        chip_name = "RTL8187vB (default)";
1443                }
1444       } else {
1445                /*
1446                 * Force USB request to write radio registers for 8187B, Realtek
1447                 * only uses it in their sources
1448                 */
1449                /*if (priv->asic_rev == 0) {
1450                        printk(KERN_WARNING "rtl8187: Forcing use of USB "
1451                               "requests to write to radio registers\n");
1452                        priv->asic_rev = 1;
1453                }*/
1454                switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1455                case RTL818X_R8187B_B:
1456                        chip_name = "RTL8187BvB";
1457                        priv->hw_rev = RTL8187BvB;
1458                        break;
1459                case RTL818X_R8187B_D:
1460                        chip_name = "RTL8187BvD";
1461                        priv->hw_rev = RTL8187BvD;
1462                        break;
1463                case RTL818X_R8187B_E:
1464                        chip_name = "RTL8187BvE";
1465                        priv->hw_rev = RTL8187BvE;
1466                        break;
1467                default:
1468                        chip_name = "RTL8187BvB (default)";
1469                        priv->hw_rev = RTL8187BvB;
1470                }
1471        }
1472
1473        if (!priv->is_rtl8187b) {
1474                for (i = 0; i < 2; i++) {
1475                        eeprom_93cx6_read(&eeprom,
1476                                          RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1477                                          &txpwr);
1478                        (*channel++).hw_value = txpwr & 0xFF;
1479                        (*channel++).hw_value = txpwr >> 8;
1480                }
1481        } else {
1482                eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1483                                  &txpwr);
1484                (*channel++).hw_value = txpwr & 0xFF;
1485
1486                eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1487                (*channel++).hw_value = txpwr & 0xFF;
1488
1489                eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1490                (*channel++).hw_value = txpwr & 0xFF;
1491                (*channel++).hw_value = txpwr >> 8;
1492        }
1493        /* Handle the differing rfkill GPIO bit in different models */
1494        priv->rfkill_mask = RFKILL_MASK_8187_89_97;
1495        if (product_id == 0x8197 || product_id == 0x8198) {
1496                eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, &reg);
1497                if (reg & 0xFF00)
1498                        priv->rfkill_mask = RFKILL_MASK_8198;
1499        }
1500
1501        /*
1502         * XXX: Once this driver supports anything that requires
1503         *      beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1504         */
1505        dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1506
1507        if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1508                printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1509                       " info!\n");
1510
1511        priv->rf = rtl8187_detect_rf(dev);
1512        dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1513                                  sizeof(struct rtl8187_tx_hdr) :
1514                                  sizeof(struct rtl8187b_tx_hdr);
1515        if (!priv->is_rtl8187b)
1516                dev->queues = 1;
1517        else
1518                dev->queues = 4;
1519
1520        err = ieee80211_register_hw(dev);
1521        if (err) {
1522                printk(KERN_ERR "rtl8187: Cannot register device\n");
1523                goto err_free_dmabuf;
1524        }
1525        mutex_init(&priv->conf_mutex);
1526        skb_queue_head_init(&priv->b_tx_status.queue);
1527
1528        printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
1529               wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1530               chip_name, priv->asic_rev, priv->rf->name, priv->rfkill_mask);
1531
1532#ifdef CONFIG_RTL8187_LEDS
1533        eeprom_93cx6_read(&eeprom, 0x3F, &reg);
1534        reg &= 0xFF;
1535        rtl8187_leds_init(dev, reg);
1536#endif
1537        rtl8187_rfkill_init(dev);
1538
1539        return 0;
1540
1541 err_free_dmabuf:
1542        kfree(priv->io_dmabuf);
1543 err_free_dev:
1544        ieee80211_free_hw(dev);
1545        usb_set_intfdata(intf, NULL);
1546        usb_put_dev(udev);
1547        return err;
1548}
1549
1550static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1551{
1552        struct ieee80211_hw *dev = usb_get_intfdata(intf);
1553        struct rtl8187_priv *priv;
1554
1555        if (!dev)
1556                return;
1557
1558#ifdef CONFIG_RTL8187_LEDS
1559        rtl8187_leds_exit(dev);
1560#endif
1561        rtl8187_rfkill_exit(dev);
1562        ieee80211_unregister_hw(dev);
1563
1564        priv = dev->priv;
1565        usb_reset_device(priv->udev);
1566        usb_put_dev(interface_to_usbdev(intf));
1567        kfree(priv->io_dmabuf);
1568        ieee80211_free_hw(dev);
1569}
1570
1571static struct usb_driver rtl8187_driver = {
1572        .name           = KBUILD_MODNAME,
1573        .id_table       = rtl8187_table,
1574        .probe          = rtl8187_probe,
1575        .disconnect     = __devexit_p(rtl8187_disconnect),
1576};
1577
1578static int __init rtl8187_init(void)
1579{
1580        return usb_register(&rtl8187_driver);
1581}
1582
1583static void __exit rtl8187_exit(void)
1584{
1585        usb_deregister(&rtl8187_driver);
1586}
1587
1588module_init(rtl8187_init);
1589module_exit(rtl8187_exit);
1590
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