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52#include <linux/module.h>
53#include <linux/moduleparam.h>
54#include <linux/kernel.h>
55#include <linux/sched.h>
56#include <linux/string.h>
57#include <linux/timer.h>
58#include <linux/errno.h>
59#include <linux/ioport.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
62#include <linux/pci.h>
63#include <linux/netdevice.h>
64#include <linux/init.h>
65#include <linux/mii.h>
66#include <linux/etherdevice.h>
67#include <linux/skbuff.h>
68#include <linux/delay.h>
69#include <linux/ethtool.h>
70#include <linux/crc32.h>
71#include <linux/bitops.h>
72#include <linux/dma-mapping.h>
73
74#include <asm/processor.h>
75#include <asm/io.h>
76#include <asm/irq.h>
77#include <asm/uaccess.h>
78
79#include "sis900.h"
80
81#define SIS900_MODULE_NAME "sis900"
82#define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
83
84static const char version[] __devinitconst =
85 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
86
87static int max_interrupt_work = 40;
88static int multicast_filter_limit = 128;
89
90static int sis900_debug = -1;
91
92#define SIS900_DEF_MSG \
93 (NETIF_MSG_DRV | \
94 NETIF_MSG_LINK | \
95 NETIF_MSG_RX_ERR | \
96 NETIF_MSG_TX_ERR)
97
98
99#define TX_TIMEOUT (4*HZ)
100
101enum {
102 SIS_900 = 0,
103 SIS_7016
104};
105static const char * card_names[] = {
106 "SiS 900 PCI Fast Ethernet",
107 "SiS 7016 PCI Fast Ethernet"
108};
109static struct pci_device_id sis900_pci_tbl [] = {
110 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
111 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
112 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
113 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
114 {0,}
115};
116MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
117
118static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
119
120static const struct mii_chip_info {
121 const char * name;
122 u16 phy_id0;
123 u16 phy_id1;
124 u8 phy_types;
125#define HOME 0x0001
126#define LAN 0x0002
127#define MIX 0x0003
128#define UNKNOWN 0x0
129} mii_chip_table[] = {
130 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
131 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
132 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
133 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
134 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
135 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
136 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
137 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
138 { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
139 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
140 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
141 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
142 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
143 {NULL,},
144};
145
146struct mii_phy {
147 struct mii_phy * next;
148 int phy_addr;
149 u16 phy_id0;
150 u16 phy_id1;
151 u16 status;
152 u8 phy_types;
153};
154
155typedef struct _BufferDesc {
156 u32 link;
157 u32 cmdsts;
158 u32 bufptr;
159} BufferDesc;
160
161struct sis900_private {
162 struct pci_dev * pci_dev;
163
164 spinlock_t lock;
165
166 struct mii_phy * mii;
167 struct mii_phy * first_mii;
168 unsigned int cur_phy;
169 struct mii_if_info mii_info;
170
171 struct timer_list timer;
172 u8 autong_complete;
173
174 u32 msg_enable;
175
176 unsigned int cur_rx, dirty_rx;
177 unsigned int cur_tx, dirty_tx;
178
179
180 struct sk_buff *tx_skbuff[NUM_TX_DESC];
181 struct sk_buff *rx_skbuff[NUM_RX_DESC];
182 BufferDesc *tx_ring;
183 BufferDesc *rx_ring;
184
185 dma_addr_t tx_ring_dma;
186 dma_addr_t rx_ring_dma;
187
188 unsigned int tx_full;
189 u8 host_bridge_rev;
190 u8 chipset_rev;
191};
192
193MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
194MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
195MODULE_LICENSE("GPL");
196
197module_param(multicast_filter_limit, int, 0444);
198module_param(max_interrupt_work, int, 0444);
199module_param(sis900_debug, int, 0444);
200MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
201MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
202MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
203
204#ifdef CONFIG_NET_POLL_CONTROLLER
205static void sis900_poll(struct net_device *dev);
206#endif
207static int sis900_open(struct net_device *net_dev);
208static int sis900_mii_probe (struct net_device * net_dev);
209static void sis900_init_rxfilter (struct net_device * net_dev);
210static u16 read_eeprom(long ioaddr, int location);
211static int mdio_read(struct net_device *net_dev, int phy_id, int location);
212static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
213static void sis900_timer(unsigned long data);
214static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
215static void sis900_tx_timeout(struct net_device *net_dev);
216static void sis900_init_tx_ring(struct net_device *net_dev);
217static void sis900_init_rx_ring(struct net_device *net_dev);
218static netdev_tx_t sis900_start_xmit(struct sk_buff *skb,
219 struct net_device *net_dev);
220static int sis900_rx(struct net_device *net_dev);
221static void sis900_finish_xmit (struct net_device *net_dev);
222static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
223static int sis900_close(struct net_device *net_dev);
224static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
225static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
226static void set_rx_mode(struct net_device *net_dev);
227static void sis900_reset(struct net_device *net_dev);
228static void sis630_set_eq(struct net_device *net_dev, u8 revision);
229static int sis900_set_config(struct net_device *dev, struct ifmap *map);
230static u16 sis900_default_phy(struct net_device * net_dev);
231static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
232static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
233static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
234static void sis900_set_mode (long ioaddr, int speed, int duplex);
235static const struct ethtool_ops sis900_ethtool_ops;
236
237
238
239
240
241
242
243
244
245
246static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
247{
248 long ioaddr = pci_resource_start(pci_dev, 0);
249 u16 signature;
250 int i;
251
252
253 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
254 if (signature == 0xffff || signature == 0x0000) {
255 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
256 pci_name(pci_dev), signature);
257 return 0;
258 }
259
260
261 for (i = 0; i < 3; i++)
262 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
263
264 return 1;
265}
266
267
268
269
270
271
272
273
274
275
276
277static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
278 struct net_device *net_dev)
279{
280 struct pci_dev *isa_bridge = NULL;
281 u8 reg;
282 int i;
283
284 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
285 if (!isa_bridge)
286 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
287 if (!isa_bridge) {
288 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
289 pci_name(pci_dev));
290 return 0;
291 }
292 pci_read_config_byte(isa_bridge, 0x48, ®);
293 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
294
295 for (i = 0; i < 6; i++) {
296 outb(0x09 + i, 0x70);
297 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
298 }
299 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
300 pci_dev_put(isa_bridge);
301
302 return 1;
303}
304
305
306
307
308
309
310
311
312
313
314
315
316static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
317 struct net_device *net_dev)
318{
319 long ioaddr = net_dev->base_addr;
320 u32 rfcrSave;
321 u32 i;
322
323 rfcrSave = inl(rfcr + ioaddr);
324
325 outl(rfcrSave | RELOAD, ioaddr + cr);
326 outl(0, ioaddr + cr);
327
328
329 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
330
331
332 for (i = 0 ; i < 3 ; i++) {
333 outl((i << RFADDR_shift), ioaddr + rfcr);
334 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
335 }
336
337
338 outl(rfcrSave | RFEN, rfcr + ioaddr);
339
340 return 1;
341}
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
360 struct net_device *net_dev)
361{
362 long ioaddr = net_dev->base_addr;
363 long ee_addr = ioaddr + mear;
364 u32 waittime = 0;
365 int i;
366
367 outl(EEREQ, ee_addr);
368 while(waittime < 2000) {
369 if(inl(ee_addr) & EEGNT) {
370
371
372 for (i = 0; i < 3; i++)
373 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
374
375 outl(EEDONE, ee_addr);
376 return 1;
377 } else {
378 udelay(1);
379 waittime ++;
380 }
381 }
382 outl(EEDONE, ee_addr);
383 return 0;
384}
385
386static const struct net_device_ops sis900_netdev_ops = {
387 .ndo_open = sis900_open,
388 .ndo_stop = sis900_close,
389 .ndo_start_xmit = sis900_start_xmit,
390 .ndo_set_config = sis900_set_config,
391 .ndo_set_multicast_list = set_rx_mode,
392 .ndo_change_mtu = eth_change_mtu,
393 .ndo_validate_addr = eth_validate_addr,
394 .ndo_set_mac_address = eth_mac_addr,
395 .ndo_do_ioctl = mii_ioctl,
396 .ndo_tx_timeout = sis900_tx_timeout,
397#ifdef CONFIG_NET_POLL_CONTROLLER
398 .ndo_poll_controller = sis900_poll,
399#endif
400};
401
402
403
404
405
406
407
408
409
410
411
412
413static int __devinit sis900_probe(struct pci_dev *pci_dev,
414 const struct pci_device_id *pci_id)
415{
416 struct sis900_private *sis_priv;
417 struct net_device *net_dev;
418 struct pci_dev *dev;
419 dma_addr_t ring_dma;
420 void *ring_space;
421 long ioaddr;
422 int i, ret;
423 const char *card_name = card_names[pci_id->driver_data];
424 const char *dev_name = pci_name(pci_dev);
425
426
427#ifndef MODULE
428 static int printed_version;
429 if (!printed_version++)
430 printk(version);
431#endif
432
433
434 ret = pci_enable_device(pci_dev);
435 if(ret) return ret;
436
437 i = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
438 if(i){
439 printk(KERN_ERR "sis900.c: architecture does not support "
440 "32bit PCI busmaster DMA\n");
441 return i;
442 }
443
444 pci_set_master(pci_dev);
445
446 net_dev = alloc_etherdev(sizeof(struct sis900_private));
447 if (!net_dev)
448 return -ENOMEM;
449 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
450
451
452 ioaddr = pci_resource_start(pci_dev, 0);
453 ret = pci_request_regions(pci_dev, "sis900");
454 if (ret)
455 goto err_out;
456
457 sis_priv = netdev_priv(net_dev);
458 net_dev->base_addr = ioaddr;
459 net_dev->irq = pci_dev->irq;
460 sis_priv->pci_dev = pci_dev;
461 spin_lock_init(&sis_priv->lock);
462
463 pci_set_drvdata(pci_dev, net_dev);
464
465 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
466 if (!ring_space) {
467 ret = -ENOMEM;
468 goto err_out_cleardev;
469 }
470 sis_priv->tx_ring = (BufferDesc *)ring_space;
471 sis_priv->tx_ring_dma = ring_dma;
472
473 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
474 if (!ring_space) {
475 ret = -ENOMEM;
476 goto err_unmap_tx;
477 }
478 sis_priv->rx_ring = (BufferDesc *)ring_space;
479 sis_priv->rx_ring_dma = ring_dma;
480
481
482 net_dev->netdev_ops = &sis900_netdev_ops;
483 net_dev->watchdog_timeo = TX_TIMEOUT;
484 net_dev->ethtool_ops = &sis900_ethtool_ops;
485
486 if (sis900_debug > 0)
487 sis_priv->msg_enable = sis900_debug;
488 else
489 sis_priv->msg_enable = SIS900_DEF_MSG;
490
491 sis_priv->mii_info.dev = net_dev;
492 sis_priv->mii_info.mdio_read = mdio_read;
493 sis_priv->mii_info.mdio_write = mdio_write;
494 sis_priv->mii_info.phy_id_mask = 0x1f;
495 sis_priv->mii_info.reg_num_mask = 0x1f;
496
497
498 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
499 if(netif_msg_probe(sis_priv))
500 printk(KERN_DEBUG "%s: detected revision %2.2x, "
501 "trying to get MAC address...\n",
502 dev_name, sis_priv->chipset_rev);
503
504 ret = 0;
505 if (sis_priv->chipset_rev == SIS630E_900_REV)
506 ret = sis630e_get_mac_addr(pci_dev, net_dev);
507 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
508 ret = sis635_get_mac_addr(pci_dev, net_dev);
509 else if (sis_priv->chipset_rev == SIS96x_900_REV)
510 ret = sis96x_get_mac_addr(pci_dev, net_dev);
511 else
512 ret = sis900_get_mac_addr(pci_dev, net_dev);
513
514 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) {
515 random_ether_addr(net_dev->dev_addr);
516 printk(KERN_WARNING "%s: Unreadable or invalid MAC address,"
517 "using random generated one\n", dev_name);
518 }
519
520
521 if (sis_priv->chipset_rev == SIS630ET_900_REV)
522 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
523
524
525 if (sis900_mii_probe(net_dev) == 0) {
526 printk(KERN_WARNING "%s: Error probing MII device.\n",
527 dev_name);
528 ret = -ENODEV;
529 goto err_unmap_rx;
530 }
531
532
533 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
534 if (dev) {
535 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
536 pci_dev_put(dev);
537 }
538
539 ret = register_netdev(net_dev);
540 if (ret)
541 goto err_unmap_rx;
542
543
544 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %pM\n",
545 net_dev->name, card_name, ioaddr, net_dev->irq,
546 net_dev->dev_addr);
547
548
549 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
550 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
551 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
552
553 return 0;
554
555 err_unmap_rx:
556 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
557 sis_priv->rx_ring_dma);
558 err_unmap_tx:
559 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
560 sis_priv->tx_ring_dma);
561 err_out_cleardev:
562 pci_set_drvdata(pci_dev, NULL);
563 pci_release_regions(pci_dev);
564 err_out:
565 free_netdev(net_dev);
566 return ret;
567}
568
569
570
571
572
573
574
575
576
577
578static int __devinit sis900_mii_probe(struct net_device * net_dev)
579{
580 struct sis900_private *sis_priv = netdev_priv(net_dev);
581 const char *dev_name = pci_name(sis_priv->pci_dev);
582 u16 poll_bit = MII_STAT_LINK, status = 0;
583 unsigned long timeout = jiffies + 5 * HZ;
584 int phy_addr;
585
586 sis_priv->mii = NULL;
587
588
589 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
590 struct mii_phy * mii_phy = NULL;
591 u16 mii_status;
592 int i;
593
594 mii_phy = NULL;
595 for(i = 0; i < 2; i++)
596 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
597
598 if (mii_status == 0xffff || mii_status == 0x0000) {
599 if (netif_msg_probe(sis_priv))
600 printk(KERN_DEBUG "%s: MII at address %d"
601 " not accessible\n",
602 dev_name, phy_addr);
603 continue;
604 }
605
606 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
607 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
608 mii_phy = sis_priv->first_mii;
609 while (mii_phy) {
610 struct mii_phy *phy;
611 phy = mii_phy;
612 mii_phy = mii_phy->next;
613 kfree(phy);
614 }
615 return 0;
616 }
617
618 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
619 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
620 mii_phy->phy_addr = phy_addr;
621 mii_phy->status = mii_status;
622 mii_phy->next = sis_priv->mii;
623 sis_priv->mii = mii_phy;
624 sis_priv->first_mii = mii_phy;
625
626 for (i = 0; mii_chip_table[i].phy_id1; i++)
627 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
628 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
629 mii_phy->phy_types = mii_chip_table[i].phy_types;
630 if (mii_chip_table[i].phy_types == MIX)
631 mii_phy->phy_types =
632 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
633 printk(KERN_INFO "%s: %s transceiver found "
634 "at address %d.\n",
635 dev_name,
636 mii_chip_table[i].name,
637 phy_addr);
638 break;
639 }
640
641 if( !mii_chip_table[i].phy_id1 ) {
642 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
643 dev_name, phy_addr);
644 mii_phy->phy_types = UNKNOWN;
645 }
646 }
647
648 if (sis_priv->mii == NULL) {
649 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
650 return 0;
651 }
652
653
654 sis_priv->mii = NULL;
655 sis900_default_phy( net_dev );
656
657
658 if ((sis_priv->mii->phy_id0 == 0x001D) &&
659 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
660 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
661
662
663 if ((sis_priv->mii->phy_id0 == 0x0015) &&
664 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
665 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
666
667 if(status & MII_STAT_LINK){
668 while (poll_bit) {
669 yield();
670
671 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
672 if (time_after_eq(jiffies, timeout)) {
673 printk(KERN_WARNING "%s: reset phy and link down now\n",
674 dev_name);
675 return -ETIME;
676 }
677 }
678 }
679
680 if (sis_priv->chipset_rev == SIS630E_900_REV) {
681
682 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
683 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
684 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
685 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
686
687 }
688
689 if (sis_priv->mii->status & MII_STAT_LINK)
690 netif_carrier_on(net_dev);
691 else
692 netif_carrier_off(net_dev);
693
694 return 1;
695}
696
697
698
699
700
701
702
703
704
705
706static u16 sis900_default_phy(struct net_device * net_dev)
707{
708 struct sis900_private *sis_priv = netdev_priv(net_dev);
709 struct mii_phy *phy = NULL, *phy_home = NULL,
710 *default_phy = NULL, *phy_lan = NULL;
711 u16 status;
712
713 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
714 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
715 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
716
717
718 if ((status & MII_STAT_LINK) && !default_phy &&
719 (phy->phy_types != UNKNOWN))
720 default_phy = phy;
721 else {
722 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
723 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
724 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
725 if (phy->phy_types == HOME)
726 phy_home = phy;
727 else if(phy->phy_types == LAN)
728 phy_lan = phy;
729 }
730 }
731
732 if (!default_phy && phy_home)
733 default_phy = phy_home;
734 else if (!default_phy && phy_lan)
735 default_phy = phy_lan;
736 else if (!default_phy)
737 default_phy = sis_priv->first_mii;
738
739 if (sis_priv->mii != default_phy) {
740 sis_priv->mii = default_phy;
741 sis_priv->cur_phy = default_phy->phy_addr;
742 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
743 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
744 }
745
746 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
747
748 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
749 status &= (~MII_CNTL_ISOLATE);
750
751 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
752 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
753 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
754
755 return status;
756}
757
758
759
760
761
762
763
764
765
766
767
768static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
769{
770 u16 cap;
771 u16 status;
772
773 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
774 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
775
776 cap = MII_NWAY_CSMA_CD |
777 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
778 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
779 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
780 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
781
782 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
783}
784
785
786
787#define eeprom_delay() inl(ee_addr)
788
789
790
791
792
793
794
795
796
797
798static u16 __devinit read_eeprom(long ioaddr, int location)
799{
800 int i;
801 u16 retval = 0;
802 long ee_addr = ioaddr + mear;
803 u32 read_cmd = location | EEread;
804
805 outl(0, ee_addr);
806 eeprom_delay();
807 outl(EECS, ee_addr);
808 eeprom_delay();
809
810
811 for (i = 8; i >= 0; i--) {
812 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
813 outl(dataval, ee_addr);
814 eeprom_delay();
815 outl(dataval | EECLK, ee_addr);
816 eeprom_delay();
817 }
818 outl(EECS, ee_addr);
819 eeprom_delay();
820
821
822 for (i = 16; i > 0; i--) {
823 outl(EECS, ee_addr);
824 eeprom_delay();
825 outl(EECS | EECLK, ee_addr);
826 eeprom_delay();
827 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
828 eeprom_delay();
829 }
830
831
832 outl(0, ee_addr);
833 eeprom_delay();
834
835 return (retval);
836}
837
838
839
840
841#define mdio_delay() inl(mdio_addr)
842
843static void mdio_idle(long mdio_addr)
844{
845 outl(MDIO | MDDIR, mdio_addr);
846 mdio_delay();
847 outl(MDIO | MDDIR | MDC, mdio_addr);
848}
849
850
851static void mdio_reset(long mdio_addr)
852{
853 int i;
854
855 for (i = 31; i >= 0; i--) {
856 outl(MDDIR | MDIO, mdio_addr);
857 mdio_delay();
858 outl(MDDIR | MDIO | MDC, mdio_addr);
859 mdio_delay();
860 }
861 return;
862}
863
864
865
866
867
868
869
870
871
872
873
874
875static int mdio_read(struct net_device *net_dev, int phy_id, int location)
876{
877 long mdio_addr = net_dev->base_addr + mear;
878 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
879 u16 retval = 0;
880 int i;
881
882 mdio_reset(mdio_addr);
883 mdio_idle(mdio_addr);
884
885 for (i = 15; i >= 0; i--) {
886 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
887 outl(dataval, mdio_addr);
888 mdio_delay();
889 outl(dataval | MDC, mdio_addr);
890 mdio_delay();
891 }
892
893
894 for (i = 16; i > 0; i--) {
895 outl(0, mdio_addr);
896 mdio_delay();
897 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
898 outl(MDC, mdio_addr);
899 mdio_delay();
900 }
901 outl(0x00, mdio_addr);
902
903 return retval;
904}
905
906
907
908
909
910
911
912
913
914
915
916
917
918static void mdio_write(struct net_device *net_dev, int phy_id, int location,
919 int value)
920{
921 long mdio_addr = net_dev->base_addr + mear;
922 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
923 int i;
924
925 mdio_reset(mdio_addr);
926 mdio_idle(mdio_addr);
927
928
929 for (i = 15; i >= 0; i--) {
930 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
931 outb(dataval, mdio_addr);
932 mdio_delay();
933 outb(dataval | MDC, mdio_addr);
934 mdio_delay();
935 }
936 mdio_delay();
937
938
939 for (i = 15; i >= 0; i--) {
940 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
941 outl(dataval, mdio_addr);
942 mdio_delay();
943 outl(dataval | MDC, mdio_addr);
944 mdio_delay();
945 }
946 mdio_delay();
947
948
949 for (i = 2; i > 0; i--) {
950 outb(0, mdio_addr);
951 mdio_delay();
952 outb(MDC, mdio_addr);
953 mdio_delay();
954 }
955 outl(0x00, mdio_addr);
956
957 return;
958}
959
960
961
962
963
964
965
966
967
968
969
970
971static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
972{
973 int i;
974 u16 status;
975
976 for (i = 0; i < 2; i++)
977 status = mdio_read(net_dev, phy_addr, MII_STATUS);
978
979 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
980
981 return status;
982}
983
984#ifdef CONFIG_NET_POLL_CONTROLLER
985
986
987
988
989
990static void sis900_poll(struct net_device *dev)
991{
992 disable_irq(dev->irq);
993 sis900_interrupt(dev->irq, dev);
994 enable_irq(dev->irq);
995}
996#endif
997
998
999
1000
1001
1002
1003
1004
1005
1006static int
1007sis900_open(struct net_device *net_dev)
1008{
1009 struct sis900_private *sis_priv = netdev_priv(net_dev);
1010 long ioaddr = net_dev->base_addr;
1011 int ret;
1012
1013
1014 sis900_reset(net_dev);
1015
1016
1017 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1018
1019 ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED,
1020 net_dev->name, net_dev);
1021 if (ret)
1022 return ret;
1023
1024 sis900_init_rxfilter(net_dev);
1025
1026 sis900_init_tx_ring(net_dev);
1027 sis900_init_rx_ring(net_dev);
1028
1029 set_rx_mode(net_dev);
1030
1031 netif_start_queue(net_dev);
1032
1033
1034 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1035
1036
1037 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1038 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1039 outl(IE, ioaddr + ier);
1040
1041 sis900_check_mode(net_dev, sis_priv->mii);
1042
1043
1044
1045 init_timer(&sis_priv->timer);
1046 sis_priv->timer.expires = jiffies + HZ;
1047 sis_priv->timer.data = (unsigned long)net_dev;
1048 sis_priv->timer.function = &sis900_timer;
1049 add_timer(&sis_priv->timer);
1050
1051 return 0;
1052}
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062static void
1063sis900_init_rxfilter (struct net_device * net_dev)
1064{
1065 struct sis900_private *sis_priv = netdev_priv(net_dev);
1066 long ioaddr = net_dev->base_addr;
1067 u32 rfcrSave;
1068 u32 i;
1069
1070 rfcrSave = inl(rfcr + ioaddr);
1071
1072
1073 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1074
1075
1076 for (i = 0 ; i < 3 ; i++) {
1077 u32 w;
1078
1079 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1080 outl((i << RFADDR_shift), ioaddr + rfcr);
1081 outl(w, ioaddr + rfdr);
1082
1083 if (netif_msg_hw(sis_priv)) {
1084 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1085 net_dev->name, i, inl(ioaddr + rfdr));
1086 }
1087 }
1088
1089
1090 outl(rfcrSave | RFEN, rfcr + ioaddr);
1091}
1092
1093
1094
1095
1096
1097
1098
1099
1100static void
1101sis900_init_tx_ring(struct net_device *net_dev)
1102{
1103 struct sis900_private *sis_priv = netdev_priv(net_dev);
1104 long ioaddr = net_dev->base_addr;
1105 int i;
1106
1107 sis_priv->tx_full = 0;
1108 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1109
1110 for (i = 0; i < NUM_TX_DESC; i++) {
1111 sis_priv->tx_skbuff[i] = NULL;
1112
1113 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1114 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1115 sis_priv->tx_ring[i].cmdsts = 0;
1116 sis_priv->tx_ring[i].bufptr = 0;
1117 }
1118
1119
1120 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1121 if (netif_msg_hw(sis_priv))
1122 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1123 net_dev->name, inl(ioaddr + txdp));
1124}
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134static void
1135sis900_init_rx_ring(struct net_device *net_dev)
1136{
1137 struct sis900_private *sis_priv = netdev_priv(net_dev);
1138 long ioaddr = net_dev->base_addr;
1139 int i;
1140
1141 sis_priv->cur_rx = 0;
1142 sis_priv->dirty_rx = 0;
1143
1144
1145 for (i = 0; i < NUM_RX_DESC; i++) {
1146 sis_priv->rx_skbuff[i] = NULL;
1147
1148 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1149 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1150 sis_priv->rx_ring[i].cmdsts = 0;
1151 sis_priv->rx_ring[i].bufptr = 0;
1152 }
1153
1154
1155 for (i = 0; i < NUM_RX_DESC; i++) {
1156 struct sk_buff *skb;
1157
1158 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1159
1160
1161
1162
1163 break;
1164 }
1165 sis_priv->rx_skbuff[i] = skb;
1166 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1167 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1168 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1169 }
1170 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1171
1172
1173 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1174 if (netif_msg_hw(sis_priv))
1175 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1176 net_dev->name, inl(ioaddr + rxdp));
1177}
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1207{
1208 struct sis900_private *sis_priv = netdev_priv(net_dev);
1209 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1210 int i, maxcount=10;
1211
1212 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1213 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1214 return;
1215
1216 if (netif_carrier_ok(net_dev)) {
1217 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1218 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1219 (0x2200 | reg14h) & 0xBFFF);
1220 for (i=0; i < maxcount; i++) {
1221 eq_value = (0x00F8 & mdio_read(net_dev,
1222 sis_priv->cur_phy, MII_RESV)) >> 3;
1223 if (i == 0)
1224 max_value=min_value=eq_value;
1225 max_value = (eq_value > max_value) ?
1226 eq_value : max_value;
1227 min_value = (eq_value < min_value) ?
1228 eq_value : min_value;
1229 }
1230
1231 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1232 revision == SIS630ET_900_REV) {
1233 if (max_value < 5)
1234 eq_value = max_value;
1235 else if (max_value >= 5 && max_value < 15)
1236 eq_value = (max_value == min_value) ?
1237 max_value+2 : max_value+1;
1238 else if (max_value >= 15)
1239 eq_value=(max_value == min_value) ?
1240 max_value+6 : max_value+5;
1241 }
1242
1243 if (revision == SIS630A_900_REV &&
1244 (sis_priv->host_bridge_rev == SIS630B0 ||
1245 sis_priv->host_bridge_rev == SIS630B1)) {
1246 if (max_value == 0)
1247 eq_value = 3;
1248 else
1249 eq_value = (max_value + min_value + 1)/2;
1250 }
1251
1252 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1253 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1254 reg14h = (reg14h | 0x6000) & 0xFDFF;
1255 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1256 } else {
1257 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1258 if (revision == SIS630A_900_REV &&
1259 (sis_priv->host_bridge_rev == SIS630B0 ||
1260 sis_priv->host_bridge_rev == SIS630B1))
1261 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1262 (reg14h | 0x2200) & 0xBFFF);
1263 else
1264 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1265 (reg14h | 0x2000) & 0xBFFF);
1266 }
1267 return;
1268}
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278static void sis900_timer(unsigned long data)
1279{
1280 struct net_device *net_dev = (struct net_device *)data;
1281 struct sis900_private *sis_priv = netdev_priv(net_dev);
1282 struct mii_phy *mii_phy = sis_priv->mii;
1283 static const int next_tick = 5*HZ;
1284 u16 status;
1285
1286 if (!sis_priv->autong_complete){
1287 int uninitialized_var(speed), duplex = 0;
1288
1289 sis900_read_mode(net_dev, &speed, &duplex);
1290 if (duplex){
1291 sis900_set_mode(net_dev->base_addr, speed, duplex);
1292 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1293 netif_start_queue(net_dev);
1294 }
1295
1296 sis_priv->timer.expires = jiffies + HZ;
1297 add_timer(&sis_priv->timer);
1298 return;
1299 }
1300
1301 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1302 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1303
1304
1305 if (!netif_carrier_ok(net_dev)) {
1306 LookForLink:
1307
1308 status = sis900_default_phy(net_dev);
1309 mii_phy = sis_priv->mii;
1310
1311 if (status & MII_STAT_LINK){
1312 sis900_check_mode(net_dev, mii_phy);
1313 netif_carrier_on(net_dev);
1314 }
1315 } else {
1316
1317 if (!(status & MII_STAT_LINK)){
1318 netif_carrier_off(net_dev);
1319 if(netif_msg_link(sis_priv))
1320 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1321
1322
1323 if ((mii_phy->phy_id0 == 0x001D) &&
1324 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1325 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1326
1327 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1328
1329 goto LookForLink;
1330 }
1331 }
1332
1333 sis_priv->timer.expires = jiffies + next_tick;
1334 add_timer(&sis_priv->timer);
1335}
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1350{
1351 struct sis900_private *sis_priv = netdev_priv(net_dev);
1352 long ioaddr = net_dev->base_addr;
1353 int speed, duplex;
1354
1355 if (mii_phy->phy_types == LAN) {
1356 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1357 sis900_set_capability(net_dev , mii_phy);
1358 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1359 } else {
1360 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1361 speed = HW_SPEED_HOME;
1362 duplex = FDX_CAPABLE_HALF_SELECTED;
1363 sis900_set_mode(ioaddr, speed, duplex);
1364 sis_priv->autong_complete = 1;
1365 }
1366}
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381static void sis900_set_mode (long ioaddr, int speed, int duplex)
1382{
1383 u32 tx_flags = 0, rx_flags = 0;
1384
1385 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1386 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1387 (TX_FILL_THRESH << TxFILLT_shift);
1388 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1389 } else {
1390 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1391 (TX_FILL_THRESH << TxFILLT_shift);
1392 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1393 }
1394
1395 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1396 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1397 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1398 } else {
1399 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1400 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1401 }
1402
1403 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1404 tx_flags |= (TxCSI | TxHBI);
1405 rx_flags |= RxATX;
1406 }
1407
1408#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1409
1410 rx_flags |= RxAJAB;
1411#endif
1412
1413 outl (tx_flags, ioaddr + txcfg);
1414 outl (rx_flags, ioaddr + rxcfg);
1415}
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1429{
1430 struct sis900_private *sis_priv = netdev_priv(net_dev);
1431 int i = 0;
1432 u32 status;
1433
1434 for (i = 0; i < 2; i++)
1435 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1436
1437 if (!(status & MII_STAT_LINK)){
1438 if(netif_msg_link(sis_priv))
1439 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1440 sis_priv->autong_complete = 1;
1441 netif_carrier_off(net_dev);
1442 return;
1443 }
1444
1445
1446 mdio_write(net_dev, phy_addr, MII_CONTROL,
1447 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1448 sis_priv->autong_complete = 0;
1449}
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1464{
1465 struct sis900_private *sis_priv = netdev_priv(net_dev);
1466 struct mii_phy *phy = sis_priv->mii;
1467 int phy_addr = sis_priv->cur_phy;
1468 u32 status;
1469 u16 autoadv, autorec;
1470 int i;
1471
1472 for (i = 0; i < 2; i++)
1473 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1474
1475 if (!(status & MII_STAT_LINK))
1476 return;
1477
1478
1479 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1480 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1481 status = autoadv & autorec;
1482
1483 *speed = HW_SPEED_10_MBPS;
1484 *duplex = FDX_CAPABLE_HALF_SELECTED;
1485
1486 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1487 *speed = HW_SPEED_100_MBPS;
1488 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1489 *duplex = FDX_CAPABLE_FULL_SELECTED;
1490
1491 sis_priv->autong_complete = 1;
1492
1493
1494 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1495 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1496 *duplex = FDX_CAPABLE_FULL_SELECTED;
1497 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1498 *speed = HW_SPEED_100_MBPS;
1499 }
1500
1501 if(netif_msg_link(sis_priv))
1502 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1503 net_dev->name,
1504 *speed == HW_SPEED_100_MBPS ?
1505 "100mbps" : "10mbps",
1506 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1507 "full" : "half");
1508}
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518static void sis900_tx_timeout(struct net_device *net_dev)
1519{
1520 struct sis900_private *sis_priv = netdev_priv(net_dev);
1521 long ioaddr = net_dev->base_addr;
1522 unsigned long flags;
1523 int i;
1524
1525 if(netif_msg_tx_err(sis_priv))
1526 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1527 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1528
1529
1530 outl(0x0000, ioaddr + imr);
1531
1532
1533 spin_lock_irqsave(&sis_priv->lock, flags);
1534
1535
1536 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1537 for (i = 0; i < NUM_TX_DESC; i++) {
1538 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1539
1540 if (skb) {
1541 pci_unmap_single(sis_priv->pci_dev,
1542 sis_priv->tx_ring[i].bufptr, skb->len,
1543 PCI_DMA_TODEVICE);
1544 dev_kfree_skb_irq(skb);
1545 sis_priv->tx_skbuff[i] = NULL;
1546 sis_priv->tx_ring[i].cmdsts = 0;
1547 sis_priv->tx_ring[i].bufptr = 0;
1548 net_dev->stats.tx_dropped++;
1549 }
1550 }
1551 sis_priv->tx_full = 0;
1552 netif_wake_queue(net_dev);
1553
1554 spin_unlock_irqrestore(&sis_priv->lock, flags);
1555
1556 net_dev->trans_start = jiffies;
1557
1558
1559 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1560
1561
1562 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1563 return;
1564}
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576static netdev_tx_t
1577sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1578{
1579 struct sis900_private *sis_priv = netdev_priv(net_dev);
1580 long ioaddr = net_dev->base_addr;
1581 unsigned int entry;
1582 unsigned long flags;
1583 unsigned int index_cur_tx, index_dirty_tx;
1584 unsigned int count_dirty_tx;
1585
1586
1587 if(!sis_priv->autong_complete){
1588 netif_stop_queue(net_dev);
1589 return NETDEV_TX_BUSY;
1590 }
1591
1592 spin_lock_irqsave(&sis_priv->lock, flags);
1593
1594
1595 entry = sis_priv->cur_tx % NUM_TX_DESC;
1596 sis_priv->tx_skbuff[entry] = skb;
1597
1598
1599 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1600 skb->data, skb->len, PCI_DMA_TODEVICE);
1601 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1602 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1603
1604 sis_priv->cur_tx ++;
1605 index_cur_tx = sis_priv->cur_tx;
1606 index_dirty_tx = sis_priv->dirty_tx;
1607
1608 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1609 count_dirty_tx ++;
1610
1611 if (index_cur_tx == index_dirty_tx) {
1612
1613 sis_priv->tx_full = 1;
1614 netif_stop_queue(net_dev);
1615 } else if (count_dirty_tx < NUM_TX_DESC) {
1616
1617 netif_start_queue(net_dev);
1618 } else {
1619
1620 sis_priv->tx_full = 1;
1621 netif_stop_queue(net_dev);
1622 }
1623
1624 spin_unlock_irqrestore(&sis_priv->lock, flags);
1625
1626 net_dev->trans_start = jiffies;
1627
1628 if (netif_msg_tx_queued(sis_priv))
1629 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1630 "to slot %d.\n",
1631 net_dev->name, skb->data, (int)skb->len, entry);
1632
1633 return NETDEV_TX_OK;
1634}
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1646{
1647 struct net_device *net_dev = dev_instance;
1648 struct sis900_private *sis_priv = netdev_priv(net_dev);
1649 int boguscnt = max_interrupt_work;
1650 long ioaddr = net_dev->base_addr;
1651 u32 status;
1652 unsigned int handled = 0;
1653
1654 spin_lock (&sis_priv->lock);
1655
1656 do {
1657 status = inl(ioaddr + isr);
1658
1659 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1660
1661 break;
1662 handled = 1;
1663
1664
1665 if (status & (RxORN | RxERR | RxOK))
1666
1667 sis900_rx(net_dev);
1668
1669 if (status & (TxURN | TxERR | TxIDLE))
1670
1671 sis900_finish_xmit(net_dev);
1672
1673
1674 if (status & HIBERR) {
1675 if(netif_msg_intr(sis_priv))
1676 printk(KERN_INFO "%s: Abnormal interrupt, "
1677 "status %#8.8x.\n", net_dev->name, status);
1678 break;
1679 }
1680 if (--boguscnt < 0) {
1681 if(netif_msg_intr(sis_priv))
1682 printk(KERN_INFO "%s: Too much work at interrupt, "
1683 "interrupt status = %#8.8x.\n",
1684 net_dev->name, status);
1685 break;
1686 }
1687 } while (1);
1688
1689 if(netif_msg_intr(sis_priv))
1690 printk(KERN_DEBUG "%s: exiting interrupt, "
1691 "interrupt status = 0x%#8.8x.\n",
1692 net_dev->name, inl(ioaddr + isr));
1693
1694 spin_unlock (&sis_priv->lock);
1695 return IRQ_RETVAL(handled);
1696}
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708static int sis900_rx(struct net_device *net_dev)
1709{
1710 struct sis900_private *sis_priv = netdev_priv(net_dev);
1711 long ioaddr = net_dev->base_addr;
1712 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1713 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1714 int rx_work_limit;
1715
1716 if (netif_msg_rx_status(sis_priv))
1717 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1718 "status:0x%8.8x\n",
1719 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1720 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1721
1722 while (rx_status & OWN) {
1723 unsigned int rx_size;
1724 unsigned int data_size;
1725
1726 if (--rx_work_limit < 0)
1727 break;
1728
1729 data_size = rx_status & DSIZE;
1730 rx_size = data_size - CRC_SIZE;
1731
1732#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1733
1734 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1735 rx_status &= (~ ((unsigned int)TOOLONG));
1736#endif
1737
1738 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1739
1740 if (netif_msg_rx_err(sis_priv))
1741 printk(KERN_DEBUG "%s: Corrupted packet "
1742 "received, buffer status = 0x%8.8x/%d.\n",
1743 net_dev->name, rx_status, data_size);
1744 net_dev->stats.rx_errors++;
1745 if (rx_status & OVERRUN)
1746 net_dev->stats.rx_over_errors++;
1747 if (rx_status & (TOOLONG|RUNT))
1748 net_dev->stats.rx_length_errors++;
1749 if (rx_status & (RXISERR | FAERR))
1750 net_dev->stats.rx_frame_errors++;
1751 if (rx_status & CRCERR)
1752 net_dev->stats.rx_crc_errors++;
1753
1754 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1755 } else {
1756 struct sk_buff * skb;
1757 struct sk_buff * rx_skb;
1758
1759 pci_unmap_single(sis_priv->pci_dev,
1760 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1761 PCI_DMA_FROMDEVICE);
1762
1763
1764
1765 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1766
1767
1768
1769
1770
1771
1772 skb = sis_priv->rx_skbuff[entry];
1773 net_dev->stats.rx_dropped++;
1774 goto refill_rx_ring;
1775 }
1776
1777
1778
1779
1780 if (sis_priv->rx_skbuff[entry] == NULL) {
1781 if (netif_msg_rx_err(sis_priv))
1782 printk(KERN_WARNING "%s: NULL pointer "
1783 "encountered in Rx ring\n"
1784 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1785 net_dev->name, sis_priv->cur_rx,
1786 sis_priv->dirty_rx);
1787 break;
1788 }
1789
1790
1791 rx_skb = sis_priv->rx_skbuff[entry];
1792 skb_put(rx_skb, rx_size);
1793 rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
1794 netif_rx(rx_skb);
1795
1796
1797 if ((rx_status & BCAST) == MCAST)
1798 net_dev->stats.multicast++;
1799 net_dev->stats.rx_bytes += rx_size;
1800 net_dev->stats.rx_packets++;
1801 sis_priv->dirty_rx++;
1802refill_rx_ring:
1803 sis_priv->rx_skbuff[entry] = skb;
1804 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1805 sis_priv->rx_ring[entry].bufptr =
1806 pci_map_single(sis_priv->pci_dev, skb->data,
1807 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1808 }
1809 sis_priv->cur_rx++;
1810 entry = sis_priv->cur_rx % NUM_RX_DESC;
1811 rx_status = sis_priv->rx_ring[entry].cmdsts;
1812 }
1813
1814
1815
1816 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1817 struct sk_buff *skb;
1818
1819 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1820
1821 if (sis_priv->rx_skbuff[entry] == NULL) {
1822 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1823
1824
1825
1826
1827 if (netif_msg_rx_err(sis_priv))
1828 printk(KERN_INFO "%s: Memory squeeze, "
1829 "deferring packet.\n",
1830 net_dev->name);
1831 net_dev->stats.rx_dropped++;
1832 break;
1833 }
1834 sis_priv->rx_skbuff[entry] = skb;
1835 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1836 sis_priv->rx_ring[entry].bufptr =
1837 pci_map_single(sis_priv->pci_dev, skb->data,
1838 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1839 }
1840 }
1841
1842 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1843
1844 return 0;
1845}
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857static void sis900_finish_xmit (struct net_device *net_dev)
1858{
1859 struct sis900_private *sis_priv = netdev_priv(net_dev);
1860
1861 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1862 struct sk_buff *skb;
1863 unsigned int entry;
1864 u32 tx_status;
1865
1866 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1867 tx_status = sis_priv->tx_ring[entry].cmdsts;
1868
1869 if (tx_status & OWN) {
1870
1871
1872
1873 break;
1874 }
1875
1876 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1877
1878 if (netif_msg_tx_err(sis_priv))
1879 printk(KERN_DEBUG "%s: Transmit "
1880 "error, Tx status %8.8x.\n",
1881 net_dev->name, tx_status);
1882 net_dev->stats.tx_errors++;
1883 if (tx_status & UNDERRUN)
1884 net_dev->stats.tx_fifo_errors++;
1885 if (tx_status & ABORT)
1886 net_dev->stats.tx_aborted_errors++;
1887 if (tx_status & NOCARRIER)
1888 net_dev->stats.tx_carrier_errors++;
1889 if (tx_status & OWCOLL)
1890 net_dev->stats.tx_window_errors++;
1891 } else {
1892
1893 net_dev->stats.collisions += (tx_status & COLCNT) >> 16;
1894 net_dev->stats.tx_bytes += tx_status & DSIZE;
1895 net_dev->stats.tx_packets++;
1896 }
1897
1898 skb = sis_priv->tx_skbuff[entry];
1899 pci_unmap_single(sis_priv->pci_dev,
1900 sis_priv->tx_ring[entry].bufptr, skb->len,
1901 PCI_DMA_TODEVICE);
1902 dev_kfree_skb_irq(skb);
1903 sis_priv->tx_skbuff[entry] = NULL;
1904 sis_priv->tx_ring[entry].bufptr = 0;
1905 sis_priv->tx_ring[entry].cmdsts = 0;
1906 }
1907
1908 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1909 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1910
1911
1912 sis_priv->tx_full = 0;
1913 netif_wake_queue (net_dev);
1914 }
1915}
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925static int sis900_close(struct net_device *net_dev)
1926{
1927 long ioaddr = net_dev->base_addr;
1928 struct sis900_private *sis_priv = netdev_priv(net_dev);
1929 struct sk_buff *skb;
1930 int i;
1931
1932 netif_stop_queue(net_dev);
1933
1934
1935 outl(0x0000, ioaddr + imr);
1936 outl(0x0000, ioaddr + ier);
1937
1938
1939 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1940
1941 del_timer(&sis_priv->timer);
1942
1943 free_irq(net_dev->irq, net_dev);
1944
1945
1946 for (i = 0; i < NUM_RX_DESC; i++) {
1947 skb = sis_priv->rx_skbuff[i];
1948 if (skb) {
1949 pci_unmap_single(sis_priv->pci_dev,
1950 sis_priv->rx_ring[i].bufptr,
1951 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1952 dev_kfree_skb(skb);
1953 sis_priv->rx_skbuff[i] = NULL;
1954 }
1955 }
1956 for (i = 0; i < NUM_TX_DESC; i++) {
1957 skb = sis_priv->tx_skbuff[i];
1958 if (skb) {
1959 pci_unmap_single(sis_priv->pci_dev,
1960 sis_priv->tx_ring[i].bufptr, skb->len,
1961 PCI_DMA_TODEVICE);
1962 dev_kfree_skb(skb);
1963 sis_priv->tx_skbuff[i] = NULL;
1964 }
1965 }
1966
1967
1968
1969 return 0;
1970}
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980static void sis900_get_drvinfo(struct net_device *net_dev,
1981 struct ethtool_drvinfo *info)
1982{
1983 struct sis900_private *sis_priv = netdev_priv(net_dev);
1984
1985 strcpy (info->driver, SIS900_MODULE_NAME);
1986 strcpy (info->version, SIS900_DRV_VERSION);
1987 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1988}
1989
1990static u32 sis900_get_msglevel(struct net_device *net_dev)
1991{
1992 struct sis900_private *sis_priv = netdev_priv(net_dev);
1993 return sis_priv->msg_enable;
1994}
1995
1996static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
1997{
1998 struct sis900_private *sis_priv = netdev_priv(net_dev);
1999 sis_priv->msg_enable = value;
2000}
2001
2002static u32 sis900_get_link(struct net_device *net_dev)
2003{
2004 struct sis900_private *sis_priv = netdev_priv(net_dev);
2005 return mii_link_ok(&sis_priv->mii_info);
2006}
2007
2008static int sis900_get_settings(struct net_device *net_dev,
2009 struct ethtool_cmd *cmd)
2010{
2011 struct sis900_private *sis_priv = netdev_priv(net_dev);
2012 spin_lock_irq(&sis_priv->lock);
2013 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2014 spin_unlock_irq(&sis_priv->lock);
2015 return 0;
2016}
2017
2018static int sis900_set_settings(struct net_device *net_dev,
2019 struct ethtool_cmd *cmd)
2020{
2021 struct sis900_private *sis_priv = netdev_priv(net_dev);
2022 int rt;
2023 spin_lock_irq(&sis_priv->lock);
2024 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2025 spin_unlock_irq(&sis_priv->lock);
2026 return rt;
2027}
2028
2029static int sis900_nway_reset(struct net_device *net_dev)
2030{
2031 struct sis900_private *sis_priv = netdev_priv(net_dev);
2032 return mii_nway_restart(&sis_priv->mii_info);
2033}
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2047{
2048 struct sis900_private *sis_priv = netdev_priv(net_dev);
2049 long pmctrl_addr = net_dev->base_addr + pmctrl;
2050 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2051
2052 if (wol->wolopts == 0) {
2053 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2054 cfgpmcsr &= ~PME_EN;
2055 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2056 outl(pmctrl_bits, pmctrl_addr);
2057 if (netif_msg_wol(sis_priv))
2058 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2059 return 0;
2060 }
2061
2062 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2063 | WAKE_BCAST | WAKE_ARP))
2064 return -EINVAL;
2065
2066 if (wol->wolopts & WAKE_MAGIC)
2067 pmctrl_bits |= MAGICPKT;
2068 if (wol->wolopts & WAKE_PHY)
2069 pmctrl_bits |= LINKON;
2070
2071 outl(pmctrl_bits, pmctrl_addr);
2072
2073 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2074 cfgpmcsr |= PME_EN;
2075 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2076 if (netif_msg_wol(sis_priv))
2077 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2078
2079 return 0;
2080}
2081
2082static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2083{
2084 long pmctrl_addr = net_dev->base_addr + pmctrl;
2085 u32 pmctrl_bits;
2086
2087 pmctrl_bits = inl(pmctrl_addr);
2088 if (pmctrl_bits & MAGICPKT)
2089 wol->wolopts |= WAKE_MAGIC;
2090 if (pmctrl_bits & LINKON)
2091 wol->wolopts |= WAKE_PHY;
2092
2093 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2094}
2095
2096static const struct ethtool_ops sis900_ethtool_ops = {
2097 .get_drvinfo = sis900_get_drvinfo,
2098 .get_msglevel = sis900_get_msglevel,
2099 .set_msglevel = sis900_set_msglevel,
2100 .get_link = sis900_get_link,
2101 .get_settings = sis900_get_settings,
2102 .set_settings = sis900_set_settings,
2103 .nway_reset = sis900_nway_reset,
2104 .get_wol = sis900_get_wol,
2105 .set_wol = sis900_set_wol
2106};
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2118{
2119 struct sis900_private *sis_priv = netdev_priv(net_dev);
2120 struct mii_ioctl_data *data = if_mii(rq);
2121
2122 switch(cmd) {
2123 case SIOCGMIIPHY:
2124 data->phy_id = sis_priv->mii->phy_addr;
2125
2126
2127 case SIOCGMIIREG:
2128 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2129 return 0;
2130
2131 case SIOCSMIIREG:
2132 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2133 return 0;
2134 default:
2135 return -EOPNOTSUPP;
2136 }
2137}
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2150{
2151 struct sis900_private *sis_priv = netdev_priv(dev);
2152 struct mii_phy *mii_phy = sis_priv->mii;
2153
2154 u16 status;
2155
2156 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2157
2158
2159
2160
2161
2162
2163 switch(map->port){
2164 case IF_PORT_UNKNOWN:
2165 dev->if_port = map->port;
2166
2167
2168
2169
2170
2171 netif_carrier_off(dev);
2172
2173
2174 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2175
2176
2177
2178
2179
2180 mdio_write(dev, mii_phy->phy_addr,
2181 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2182
2183 break;
2184
2185 case IF_PORT_10BASET:
2186 dev->if_port = map->port;
2187
2188
2189
2190
2191
2192
2193 netif_carrier_off(dev);
2194
2195
2196
2197 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2198
2199
2200 mdio_write(dev, mii_phy->phy_addr,
2201 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2202 MII_CNTL_AUTO));
2203 break;
2204
2205 case IF_PORT_100BASET:
2206 case IF_PORT_100BASETX:
2207 dev->if_port = map->port;
2208
2209
2210
2211
2212
2213
2214 netif_carrier_off(dev);
2215
2216
2217
2218 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2219 mdio_write(dev, mii_phy->phy_addr,
2220 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2221 MII_CNTL_SPEED);
2222
2223 break;
2224
2225 case IF_PORT_10BASE2:
2226 case IF_PORT_AUI:
2227 case IF_PORT_100BASEFX:
2228
2229 return -EOPNOTSUPP;
2230 break;
2231
2232 default:
2233 return -EINVAL;
2234 }
2235 }
2236 return 0;
2237}
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2251{
2252
2253 u32 crc = ether_crc(6, addr);
2254
2255
2256 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2257 return ((int)(crc >> 24));
2258 else
2259 return ((int)(crc >> 25));
2260}
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271static void set_rx_mode(struct net_device *net_dev)
2272{
2273 long ioaddr = net_dev->base_addr;
2274 struct sis900_private *sis_priv = netdev_priv(net_dev);
2275 u16 mc_filter[16] = {0};
2276 int i, table_entries;
2277 u32 rx_mode;
2278
2279
2280 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2281 (sis_priv->chipset_rev == SIS900B_900_REV))
2282 table_entries = 16;
2283 else
2284 table_entries = 8;
2285
2286 if (net_dev->flags & IFF_PROMISC) {
2287
2288 rx_mode = RFPromiscuous;
2289 for (i = 0; i < table_entries; i++)
2290 mc_filter[i] = 0xffff;
2291 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2292 (net_dev->flags & IFF_ALLMULTI)) {
2293
2294 rx_mode = RFAAB | RFAAM;
2295 for (i = 0; i < table_entries; i++)
2296 mc_filter[i] = 0xffff;
2297 } else {
2298
2299
2300
2301 struct dev_mc_list *mclist;
2302 rx_mode = RFAAB;
2303 for (i = 0, mclist = net_dev->mc_list;
2304 mclist && i < net_dev->mc_count;
2305 i++, mclist = mclist->next) {
2306 unsigned int bit_nr =
2307 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2308 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2309 }
2310 }
2311
2312
2313 for (i = 0; i < table_entries; i++) {
2314
2315 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2316 outl(mc_filter[i], ioaddr + rfdr);
2317 }
2318
2319 outl(RFEN | rx_mode, ioaddr + rfcr);
2320
2321
2322
2323 if (net_dev->flags & IFF_LOOPBACK) {
2324 u32 cr_saved;
2325
2326 cr_saved = inl(ioaddr + cr);
2327 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2328
2329 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2330 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2331
2332 outl(cr_saved, ioaddr + cr);
2333 }
2334
2335 return;
2336}
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347static void sis900_reset(struct net_device *net_dev)
2348{
2349 struct sis900_private *sis_priv = netdev_priv(net_dev);
2350 long ioaddr = net_dev->base_addr;
2351 int i = 0;
2352 u32 status = TxRCMP | RxRCMP;
2353
2354 outl(0, ioaddr + ier);
2355 outl(0, ioaddr + imr);
2356 outl(0, ioaddr + rfcr);
2357
2358 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2359
2360
2361 while (status && (i++ < 1000)) {
2362 status ^= (inl(isr + ioaddr) & status);
2363 }
2364
2365 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2366 (sis_priv->chipset_rev == SIS900B_900_REV) )
2367 outl(PESEL | RND_CNT, ioaddr + cfg);
2368 else
2369 outl(PESEL, ioaddr + cfg);
2370}
2371
2372
2373
2374
2375
2376
2377
2378
2379static void __devexit sis900_remove(struct pci_dev *pci_dev)
2380{
2381 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2382 struct sis900_private *sis_priv = netdev_priv(net_dev);
2383 struct mii_phy *phy = NULL;
2384
2385 while (sis_priv->first_mii) {
2386 phy = sis_priv->first_mii;
2387 sis_priv->first_mii = phy->next;
2388 kfree(phy);
2389 }
2390
2391 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2392 sis_priv->rx_ring_dma);
2393 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2394 sis_priv->tx_ring_dma);
2395 unregister_netdev(net_dev);
2396 free_netdev(net_dev);
2397 pci_release_regions(pci_dev);
2398 pci_set_drvdata(pci_dev, NULL);
2399}
2400
2401#ifdef CONFIG_PM
2402
2403static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2404{
2405 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2406 long ioaddr = net_dev->base_addr;
2407
2408 if(!netif_running(net_dev))
2409 return 0;
2410
2411 netif_stop_queue(net_dev);
2412 netif_device_detach(net_dev);
2413
2414
2415 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2416
2417 pci_set_power_state(pci_dev, PCI_D3hot);
2418 pci_save_state(pci_dev);
2419
2420 return 0;
2421}
2422
2423static int sis900_resume(struct pci_dev *pci_dev)
2424{
2425 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2426 struct sis900_private *sis_priv = netdev_priv(net_dev);
2427 long ioaddr = net_dev->base_addr;
2428
2429 if(!netif_running(net_dev))
2430 return 0;
2431 pci_restore_state(pci_dev);
2432 pci_set_power_state(pci_dev, PCI_D0);
2433
2434 sis900_init_rxfilter(net_dev);
2435
2436 sis900_init_tx_ring(net_dev);
2437 sis900_init_rx_ring(net_dev);
2438
2439 set_rx_mode(net_dev);
2440
2441 netif_device_attach(net_dev);
2442 netif_start_queue(net_dev);
2443
2444
2445 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2446
2447
2448 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2449 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2450 outl(IE, ioaddr + ier);
2451
2452 sis900_check_mode(net_dev, sis_priv->mii);
2453
2454 return 0;
2455}
2456#endif
2457
2458static struct pci_driver sis900_pci_driver = {
2459 .name = SIS900_MODULE_NAME,
2460 .id_table = sis900_pci_tbl,
2461 .probe = sis900_probe,
2462 .remove = __devexit_p(sis900_remove),
2463#ifdef CONFIG_PM
2464 .suspend = sis900_suspend,
2465 .resume = sis900_resume,
2466#endif
2467};
2468
2469static int __init sis900_init_module(void)
2470{
2471
2472#ifdef MODULE
2473 printk(version);
2474#endif
2475
2476 return pci_register_driver(&sis900_pci_driver);
2477}
2478
2479static void __exit sis900_cleanup_module(void)
2480{
2481 pci_unregister_driver(&sis900_pci_driver);
2482}
2483
2484module_init(sis900_init_module);
2485module_exit(sis900_cleanup_module);
2486
2487