1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
37
38#include <linux/module.h>
39#include <linux/moduleparam.h>
40#include <linux/init.h>
41#include <linux/pci.h>
42#include <linux/dma-mapping.h>
43#include <linux/netdevice.h>
44#include <linux/etherdevice.h>
45#include <linux/debugfs.h>
46#include <linux/ethtool.h>
47
48#include "t4vf_common.h"
49#include "t4vf_defs.h"
50
51#include "../cxgb4/t4_regs.h"
52#include "../cxgb4/t4_msg.h"
53
54
55
56
57#define DRV_VERSION "1.0.0"
58#define DRV_DESC "Chelsio T4 Virtual Function (VF) Network Driver"
59
60
61
62
63
64
65
66
67
68#define DFLT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \
69 NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP |\
70 NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
71
72static int dflt_msg_enable = DFLT_MSG_ENABLE;
73
74module_param(dflt_msg_enable, int, 0644);
75MODULE_PARM_DESC(dflt_msg_enable,
76 "default adapter ethtool message level bitmap");
77
78
79
80
81
82
83
84
85
86
87
88
89
90#define MSI_MSIX 2
91#define MSI_MSI 1
92#define MSI_DEFAULT MSI_MSIX
93
94static int msi = MSI_DEFAULT;
95
96module_param(msi, int, 0644);
97MODULE_PARM_DESC(msi, "whether to use MSI-X or MSI");
98
99
100
101
102
103
104enum {
105 MAX_TXQ_ENTRIES = 16384,
106 MAX_RSPQ_ENTRIES = 16384,
107 MAX_RX_BUFFERS = 16384,
108
109 MIN_TXQ_ENTRIES = 32,
110 MIN_RSPQ_ENTRIES = 128,
111 MIN_FL_ENTRIES = 16,
112
113
114
115
116
117
118
119
120
121
122
123 EQ_UNIT = SGE_EQ_IDXSIZE,
124 FL_PER_EQ_UNIT = EQ_UNIT / sizeof(__be64),
125 MIN_FL_RESID = FL_PER_EQ_UNIT,
126};
127
128
129
130
131
132
133static struct dentry *cxgb4vf_debugfs_root;
134
135
136
137
138
139
140
141
142
143void t4vf_os_link_changed(struct adapter *adapter, int pidx, int link_ok)
144{
145 struct net_device *dev = adapter->port[pidx];
146
147
148
149
150
151 if (!netif_running(dev) || link_ok == netif_carrier_ok(dev))
152 return;
153
154
155
156
157
158 if (link_ok) {
159 const char *s;
160 const char *fc;
161 const struct port_info *pi = netdev_priv(dev);
162
163 netif_carrier_on(dev);
164
165 switch (pi->link_cfg.speed) {
166 case SPEED_10000:
167 s = "10Gbps";
168 break;
169
170 case SPEED_1000:
171 s = "1000Mbps";
172 break;
173
174 case SPEED_100:
175 s = "100Mbps";
176 break;
177
178 default:
179 s = "unknown";
180 break;
181 }
182
183 switch (pi->link_cfg.fc) {
184 case PAUSE_RX:
185 fc = "RX";
186 break;
187
188 case PAUSE_TX:
189 fc = "TX";
190 break;
191
192 case PAUSE_RX|PAUSE_TX:
193 fc = "RX/TX";
194 break;
195
196 default:
197 fc = "no";
198 break;
199 }
200
201 netdev_info(dev, "link up, %s, full-duplex, %s PAUSE\n", s, fc);
202 } else {
203 netif_carrier_off(dev);
204 netdev_info(dev, "link down\n");
205 }
206}
207
208
209
210
211
212
213
214
215
216
217
218
219
220static int link_start(struct net_device *dev)
221{
222 int ret;
223 struct port_info *pi = netdev_priv(dev);
224
225
226
227
228
229 ret = t4vf_set_rxmode(pi->adapter, pi->viid, dev->mtu, -1, -1, -1, 1,
230 true);
231 if (ret == 0) {
232 ret = t4vf_change_mac(pi->adapter, pi->viid,
233 pi->xact_addr_filt, dev->dev_addr, true);
234 if (ret >= 0) {
235 pi->xact_addr_filt = ret;
236 ret = 0;
237 }
238 }
239
240
241
242
243
244
245 if (ret == 0)
246 ret = t4vf_enable_vi(pi->adapter, pi->viid, true, true);
247 return ret;
248}
249
250
251
252
253static void name_msix_vecs(struct adapter *adapter)
254{
255 int namelen = sizeof(adapter->msix_info[0].desc) - 1;
256 int pidx;
257
258
259
260
261 snprintf(adapter->msix_info[MSIX_FW].desc, namelen,
262 "%s-FWeventq", adapter->name);
263 adapter->msix_info[MSIX_FW].desc[namelen] = 0;
264
265
266
267
268 for_each_port(adapter, pidx) {
269 struct net_device *dev = adapter->port[pidx];
270 const struct port_info *pi = netdev_priv(dev);
271 int qs, msi;
272
273 for (qs = 0, msi = MSIX_IQFLINT; qs < pi->nqsets; qs++, msi++) {
274 snprintf(adapter->msix_info[msi].desc, namelen,
275 "%s-%d", dev->name, qs);
276 adapter->msix_info[msi].desc[namelen] = 0;
277 }
278 }
279}
280
281
282
283
284static int request_msix_queue_irqs(struct adapter *adapter)
285{
286 struct sge *s = &adapter->sge;
287 int rxq, msi, err;
288
289
290
291
292 err = request_irq(adapter->msix_info[MSIX_FW].vec, t4vf_sge_intr_msix,
293 0, adapter->msix_info[MSIX_FW].desc, &s->fw_evtq);
294 if (err)
295 return err;
296
297
298
299
300 msi = MSIX_IQFLINT;
301 for_each_ethrxq(s, rxq) {
302 err = request_irq(adapter->msix_info[msi].vec,
303 t4vf_sge_intr_msix, 0,
304 adapter->msix_info[msi].desc,
305 &s->ethrxq[rxq].rspq);
306 if (err)
307 goto err_free_irqs;
308 msi++;
309 }
310 return 0;
311
312err_free_irqs:
313 while (--rxq >= 0)
314 free_irq(adapter->msix_info[--msi].vec, &s->ethrxq[rxq].rspq);
315 free_irq(adapter->msix_info[MSIX_FW].vec, &s->fw_evtq);
316 return err;
317}
318
319
320
321
322static void free_msix_queue_irqs(struct adapter *adapter)
323{
324 struct sge *s = &adapter->sge;
325 int rxq, msi;
326
327 free_irq(adapter->msix_info[MSIX_FW].vec, &s->fw_evtq);
328 msi = MSIX_IQFLINT;
329 for_each_ethrxq(s, rxq)
330 free_irq(adapter->msix_info[msi++].vec,
331 &s->ethrxq[rxq].rspq);
332}
333
334
335
336
337static void qenable(struct sge_rspq *rspq)
338{
339 napi_enable(&rspq->napi);
340
341
342
343
344
345 t4_write_reg(rspq->adapter, T4VF_SGE_BASE_ADDR + SGE_VF_GTS,
346 CIDXINC(0) |
347 SEINTARM(rspq->intr_params) |
348 INGRESSQID(rspq->cntxt_id));
349}
350
351
352
353
354static void enable_rx(struct adapter *adapter)
355{
356 int rxq;
357 struct sge *s = &adapter->sge;
358
359 for_each_ethrxq(s, rxq)
360 qenable(&s->ethrxq[rxq].rspq);
361 qenable(&s->fw_evtq);
362
363
364
365
366
367 if (adapter->flags & USING_MSI)
368 t4_write_reg(adapter, T4VF_SGE_BASE_ADDR + SGE_VF_GTS,
369 CIDXINC(0) |
370 SEINTARM(s->intrq.intr_params) |
371 INGRESSQID(s->intrq.cntxt_id));
372
373}
374
375
376
377
378static void quiesce_rx(struct adapter *adapter)
379{
380 struct sge *s = &adapter->sge;
381 int rxq;
382
383 for_each_ethrxq(s, rxq)
384 napi_disable(&s->ethrxq[rxq].rspq.napi);
385 napi_disable(&s->fw_evtq.napi);
386}
387
388
389
390
391static int fwevtq_handler(struct sge_rspq *rspq, const __be64 *rsp,
392 const struct pkt_gl *gl)
393{
394
395
396
397 struct adapter *adapter = rspq->adapter;
398 u8 opcode = ((const struct rss_header *)rsp)->opcode;
399 void *cpl = (void *)(rsp + 1);
400
401 switch (opcode) {
402 case CPL_FW6_MSG: {
403
404
405
406 const struct cpl_fw6_msg *fw_msg = cpl;
407 if (fw_msg->type == FW6_TYPE_CMD_RPL)
408 t4vf_handle_fw_rpl(adapter, fw_msg->data);
409 break;
410 }
411
412 case CPL_SGE_EGR_UPDATE: {
413
414
415
416
417
418
419
420
421
422 const struct cpl_sge_egr_update *p = cpl;
423 unsigned int qid = EGR_QID(be32_to_cpu(p->opcode_qid));
424 struct sge *s = &adapter->sge;
425 struct sge_txq *tq;
426 struct sge_eth_txq *txq;
427 unsigned int eq_idx;
428
429
430
431
432
433
434
435
436 eq_idx = EQ_IDX(s, qid);
437 if (unlikely(eq_idx >= MAX_EGRQ)) {
438 dev_err(adapter->pdev_dev,
439 "Egress Update QID %d out of range\n", qid);
440 break;
441 }
442 tq = s->egr_map[eq_idx];
443 if (unlikely(tq == NULL)) {
444 dev_err(adapter->pdev_dev,
445 "Egress Update QID %d TXQ=NULL\n", qid);
446 break;
447 }
448 txq = container_of(tq, struct sge_eth_txq, q);
449 if (unlikely(tq->abs_id != qid)) {
450 dev_err(adapter->pdev_dev,
451 "Egress Update QID %d refers to TXQ %d\n",
452 qid, tq->abs_id);
453 break;
454 }
455
456
457
458
459
460 txq->q.restarts++;
461 netif_tx_wake_queue(txq->txq);
462 break;
463 }
464
465 default:
466 dev_err(adapter->pdev_dev,
467 "unexpected CPL %#x on FW event queue\n", opcode);
468 }
469
470 return 0;
471}
472
473
474
475
476
477
478static int setup_sge_queues(struct adapter *adapter)
479{
480 struct sge *s = &adapter->sge;
481 int err, pidx, msix;
482
483
484
485
486
487 bitmap_zero(s->starving_fl, MAX_EGRQ);
488
489
490
491
492
493
494
495
496
497 if (adapter->flags & USING_MSI) {
498 err = t4vf_sge_alloc_rxq(adapter, &s->intrq, false,
499 adapter->port[0], 0, NULL, NULL);
500 if (err)
501 goto err_free_queues;
502 }
503
504
505
506
507 err = t4vf_sge_alloc_rxq(adapter, &s->fw_evtq, true, adapter->port[0],
508 MSIX_FW, NULL, fwevtq_handler);
509 if (err)
510 goto err_free_queues;
511
512
513
514
515
516
517
518 msix = MSIX_IQFLINT;
519 for_each_port(adapter, pidx) {
520 struct net_device *dev = adapter->port[pidx];
521 struct port_info *pi = netdev_priv(dev);
522 struct sge_eth_rxq *rxq = &s->ethrxq[pi->first_qset];
523 struct sge_eth_txq *txq = &s->ethtxq[pi->first_qset];
524 int qs;
525
526 for (qs = 0; qs < pi->nqsets; qs++, rxq++, txq++) {
527 err = t4vf_sge_alloc_rxq(adapter, &rxq->rspq, false,
528 dev, msix++,
529 &rxq->fl, t4vf_ethrx_handler);
530 if (err)
531 goto err_free_queues;
532
533 err = t4vf_sge_alloc_eth_txq(adapter, txq, dev,
534 netdev_get_tx_queue(dev, qs),
535 s->fw_evtq.cntxt_id);
536 if (err)
537 goto err_free_queues;
538
539 rxq->rspq.idx = qs;
540 memset(&rxq->stats, 0, sizeof(rxq->stats));
541 }
542 }
543
544
545
546
547 s->egr_base = s->ethtxq[0].q.abs_id - s->ethtxq[0].q.cntxt_id;
548 s->ingr_base = s->ethrxq[0].rspq.abs_id - s->ethrxq[0].rspq.cntxt_id;
549 IQ_MAP(s, s->fw_evtq.abs_id) = &s->fw_evtq;
550 for_each_port(adapter, pidx) {
551 struct net_device *dev = adapter->port[pidx];
552 struct port_info *pi = netdev_priv(dev);
553 struct sge_eth_rxq *rxq = &s->ethrxq[pi->first_qset];
554 struct sge_eth_txq *txq = &s->ethtxq[pi->first_qset];
555 int qs;
556
557 for (qs = 0; qs < pi->nqsets; qs++, rxq++, txq++) {
558 IQ_MAP(s, rxq->rspq.abs_id) = &rxq->rspq;
559 EQ_MAP(s, txq->q.abs_id) = &txq->q;
560
561
562
563
564
565
566
567
568
569
570 rxq->fl.abs_id = rxq->fl.cntxt_id + s->egr_base;
571 EQ_MAP(s, rxq->fl.abs_id) = &rxq->fl;
572 }
573 }
574 return 0;
575
576err_free_queues:
577 t4vf_free_sge_resources(adapter);
578 return err;
579}
580
581
582
583
584
585
586
587
588
589static int setup_rss(struct adapter *adapter)
590{
591 int pidx;
592
593 for_each_port(adapter, pidx) {
594 struct port_info *pi = adap2pinfo(adapter, pidx);
595 struct sge_eth_rxq *rxq = &adapter->sge.ethrxq[pi->first_qset];
596 u16 rss[MAX_PORT_QSETS];
597 int qs, err;
598
599 for (qs = 0; qs < pi->nqsets; qs++)
600 rss[qs] = rxq[qs].rspq.abs_id;
601
602 err = t4vf_config_rss_range(adapter, pi->viid,
603 0, pi->rss_size, rss, pi->nqsets);
604 if (err)
605 return err;
606
607
608
609
610 switch (adapter->params.rss.mode) {
611 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL:
612
613
614
615
616
617
618
619 if (!adapter->params.rss.u.basicvirtual.tnlalllookup) {
620 union rss_vi_config config;
621 err = t4vf_read_rss_vi_config(adapter,
622 pi->viid,
623 &config);
624 if (err)
625 return err;
626 config.basicvirtual.defaultq =
627 rxq[0].rspq.abs_id;
628 err = t4vf_write_rss_vi_config(adapter,
629 pi->viid,
630 &config);
631 if (err)
632 return err;
633 }
634 break;
635 }
636 }
637
638 return 0;
639}
640
641
642
643
644
645
646
647
648static int adapter_up(struct adapter *adapter)
649{
650 int err;
651
652
653
654
655
656
657 if ((adapter->flags & FULL_INIT_DONE) == 0) {
658 err = setup_sge_queues(adapter);
659 if (err)
660 return err;
661 err = setup_rss(adapter);
662 if (err) {
663 t4vf_free_sge_resources(adapter);
664 return err;
665 }
666
667 if (adapter->flags & USING_MSIX)
668 name_msix_vecs(adapter);
669 adapter->flags |= FULL_INIT_DONE;
670 }
671
672
673
674
675 BUG_ON((adapter->flags & (USING_MSIX|USING_MSI)) == 0);
676 if (adapter->flags & USING_MSIX)
677 err = request_msix_queue_irqs(adapter);
678 else
679 err = request_irq(adapter->pdev->irq,
680 t4vf_intr_handler(adapter), 0,
681 adapter->name, adapter);
682 if (err) {
683 dev_err(adapter->pdev_dev, "request_irq failed, err %d\n",
684 err);
685 return err;
686 }
687
688
689
690
691 enable_rx(adapter);
692 t4vf_sge_start(adapter);
693 return 0;
694}
695
696
697
698
699
700
701static void adapter_down(struct adapter *adapter)
702{
703
704
705
706 if (adapter->flags & USING_MSIX)
707 free_msix_queue_irqs(adapter);
708 else
709 free_irq(adapter->pdev->irq, adapter);
710
711
712
713
714 quiesce_rx(adapter);
715}
716
717
718
719
720static int cxgb4vf_open(struct net_device *dev)
721{
722 int err;
723 struct port_info *pi = netdev_priv(dev);
724 struct adapter *adapter = pi->adapter;
725
726
727
728
729
730 if (adapter->open_device_map == 0) {
731 err = adapter_up(adapter);
732 if (err)
733 return err;
734 }
735
736
737
738
739 netif_set_real_num_tx_queues(dev, pi->nqsets);
740 err = netif_set_real_num_rx_queues(dev, pi->nqsets);
741 if (err)
742 goto err_unwind;
743 err = link_start(dev);
744 if (err)
745 goto err_unwind;
746
747 netif_tx_start_all_queues(dev);
748 set_bit(pi->port_id, &adapter->open_device_map);
749 return 0;
750
751err_unwind:
752 if (adapter->open_device_map == 0)
753 adapter_down(adapter);
754 return err;
755}
756
757
758
759
760
761static int cxgb4vf_stop(struct net_device *dev)
762{
763 struct port_info *pi = netdev_priv(dev);
764 struct adapter *adapter = pi->adapter;
765
766 netif_tx_stop_all_queues(dev);
767 netif_carrier_off(dev);
768 t4vf_enable_vi(adapter, pi->viid, false, false);
769 pi->link_cfg.link_ok = 0;
770
771 clear_bit(pi->port_id, &adapter->open_device_map);
772 if (adapter->open_device_map == 0)
773 adapter_down(adapter);
774 return 0;
775}
776
777
778
779
780static struct net_device_stats *cxgb4vf_get_stats(struct net_device *dev)
781{
782 struct t4vf_port_stats stats;
783 struct port_info *pi = netdev2pinfo(dev);
784 struct adapter *adapter = pi->adapter;
785 struct net_device_stats *ns = &dev->stats;
786 int err;
787
788 spin_lock(&adapter->stats_lock);
789 err = t4vf_get_port_stats(adapter, pi->pidx, &stats);
790 spin_unlock(&adapter->stats_lock);
791
792 memset(ns, 0, sizeof(*ns));
793 if (err)
794 return ns;
795
796 ns->tx_bytes = (stats.tx_bcast_bytes + stats.tx_mcast_bytes +
797 stats.tx_ucast_bytes + stats.tx_offload_bytes);
798 ns->tx_packets = (stats.tx_bcast_frames + stats.tx_mcast_frames +
799 stats.tx_ucast_frames + stats.tx_offload_frames);
800 ns->rx_bytes = (stats.rx_bcast_bytes + stats.rx_mcast_bytes +
801 stats.rx_ucast_bytes);
802 ns->rx_packets = (stats.rx_bcast_frames + stats.rx_mcast_frames +
803 stats.rx_ucast_frames);
804 ns->multicast = stats.rx_mcast_frames;
805 ns->tx_errors = stats.tx_drop_frames;
806 ns->rx_errors = stats.rx_err_frames;
807
808 return ns;
809}
810
811
812
813
814
815
816static inline unsigned int collect_netdev_uc_list_addrs(const struct net_device *dev,
817 const u8 **addr,
818 unsigned int offset,
819 unsigned int maxaddrs)
820{
821 unsigned int index = 0;
822 unsigned int naddr = 0;
823 const struct netdev_hw_addr *ha;
824
825 for_each_dev_addr(dev, ha)
826 if (index++ >= offset) {
827 addr[naddr++] = ha->addr;
828 if (naddr >= maxaddrs)
829 break;
830 }
831 return naddr;
832}
833
834
835
836
837
838
839static inline unsigned int collect_netdev_mc_list_addrs(const struct net_device *dev,
840 const u8 **addr,
841 unsigned int offset,
842 unsigned int maxaddrs)
843{
844 unsigned int index = 0;
845 unsigned int naddr = 0;
846 const struct netdev_hw_addr *ha;
847
848 netdev_for_each_mc_addr(ha, dev)
849 if (index++ >= offset) {
850 addr[naddr++] = ha->addr;
851 if (naddr >= maxaddrs)
852 break;
853 }
854 return naddr;
855}
856
857
858
859
860
861static int set_addr_filters(const struct net_device *dev, bool sleep)
862{
863 u64 mhash = 0;
864 u64 uhash = 0;
865 bool free = true;
866 unsigned int offset, naddr;
867 const u8 *addr[7];
868 int ret;
869 const struct port_info *pi = netdev_priv(dev);
870
871
872 for (offset = 0; ; offset += naddr) {
873 naddr = collect_netdev_uc_list_addrs(dev, addr, offset,
874 ARRAY_SIZE(addr));
875 if (naddr == 0)
876 break;
877
878 ret = t4vf_alloc_mac_filt(pi->adapter, pi->viid, free,
879 naddr, addr, NULL, &uhash, sleep);
880 if (ret < 0)
881 return ret;
882
883 free = false;
884 }
885
886
887 for (offset = 0; ; offset += naddr) {
888 naddr = collect_netdev_mc_list_addrs(dev, addr, offset,
889 ARRAY_SIZE(addr));
890 if (naddr == 0)
891 break;
892
893 ret = t4vf_alloc_mac_filt(pi->adapter, pi->viid, free,
894 naddr, addr, NULL, &mhash, sleep);
895 if (ret < 0)
896 return ret;
897 free = false;
898 }
899
900 return t4vf_set_addr_hash(pi->adapter, pi->viid, uhash != 0,
901 uhash | mhash, sleep);
902}
903
904
905
906
907
908static int set_rxmode(struct net_device *dev, int mtu, bool sleep_ok)
909{
910 int ret;
911 struct port_info *pi = netdev_priv(dev);
912
913 ret = set_addr_filters(dev, sleep_ok);
914 if (ret == 0)
915 ret = t4vf_set_rxmode(pi->adapter, pi->viid, -1,
916 (dev->flags & IFF_PROMISC) != 0,
917 (dev->flags & IFF_ALLMULTI) != 0,
918 1, -1, sleep_ok);
919 return ret;
920}
921
922
923
924
925static void cxgb4vf_set_rxmode(struct net_device *dev)
926{
927
928 set_rxmode(dev, -1, false);
929}
930
931
932
933
934
935static int closest_timer(const struct sge *s, int us)
936{
937 int i, timer_idx = 0, min_delta = INT_MAX;
938
939 for (i = 0; i < ARRAY_SIZE(s->timer_val); i++) {
940 int delta = us - s->timer_val[i];
941 if (delta < 0)
942 delta = -delta;
943 if (delta < min_delta) {
944 min_delta = delta;
945 timer_idx = i;
946 }
947 }
948 return timer_idx;
949}
950
951static int closest_thres(const struct sge *s, int thres)
952{
953 int i, delta, pktcnt_idx = 0, min_delta = INT_MAX;
954
955 for (i = 0; i < ARRAY_SIZE(s->counter_val); i++) {
956 delta = thres - s->counter_val[i];
957 if (delta < 0)
958 delta = -delta;
959 if (delta < min_delta) {
960 min_delta = delta;
961 pktcnt_idx = i;
962 }
963 }
964 return pktcnt_idx;
965}
966
967
968
969
970static unsigned int qtimer_val(const struct adapter *adapter,
971 const struct sge_rspq *rspq)
972{
973 unsigned int timer_idx = QINTR_TIMER_IDX_GET(rspq->intr_params);
974
975 return timer_idx < SGE_NTIMERS
976 ? adapter->sge.timer_val[timer_idx]
977 : 0;
978}
979
980
981
982
983
984
985
986
987
988
989
990
991static int set_rxq_intr_params(struct adapter *adapter, struct sge_rspq *rspq,
992 unsigned int us, unsigned int cnt)
993{
994 unsigned int timer_idx;
995
996
997
998
999
1000 if ((us | cnt) == 0)
1001 cnt = 1;
1002
1003
1004
1005
1006
1007
1008
1009 if (cnt) {
1010 int err;
1011 u32 v, pktcnt_idx;
1012
1013 pktcnt_idx = closest_thres(&adapter->sge, cnt);
1014 if (rspq->desc && rspq->pktcnt_idx != pktcnt_idx) {
1015 v = FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) |
1016 FW_PARAMS_PARAM_X(
1017 FW_PARAMS_PARAM_DMAQ_IQ_INTCNTTHRESH) |
1018 FW_PARAMS_PARAM_YZ(rspq->cntxt_id);
1019 err = t4vf_set_params(adapter, 1, &v, &pktcnt_idx);
1020 if (err)
1021 return err;
1022 }
1023 rspq->pktcnt_idx = pktcnt_idx;
1024 }
1025
1026
1027
1028
1029
1030 timer_idx = (us == 0
1031 ? SGE_TIMER_RSTRT_CNTR
1032 : closest_timer(&adapter->sge, us));
1033
1034
1035
1036
1037
1038 rspq->intr_params = (QINTR_TIMER_IDX(timer_idx) |
1039 (cnt > 0 ? QINTR_CNT_EN : 0));
1040 return 0;
1041}
1042
1043
1044
1045
1046
1047
1048static inline unsigned int mk_adap_vers(const struct adapter *adapter)
1049{
1050
1051
1052
1053 return 4 | (0x3f << 10);
1054}
1055
1056
1057
1058
1059static int cxgb4vf_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1060{
1061 int ret = 0;
1062
1063 switch (cmd) {
1064
1065
1066
1067
1068
1069
1070 default:
1071 ret = -EOPNOTSUPP;
1072 break;
1073 }
1074 return ret;
1075}
1076
1077
1078
1079
1080static int cxgb4vf_change_mtu(struct net_device *dev, int new_mtu)
1081{
1082 int ret;
1083 struct port_info *pi = netdev_priv(dev);
1084
1085
1086 if (new_mtu < 81)
1087 return -EINVAL;
1088
1089 ret = t4vf_set_rxmode(pi->adapter, pi->viid, new_mtu,
1090 -1, -1, -1, -1, true);
1091 if (!ret)
1092 dev->mtu = new_mtu;
1093 return ret;
1094}
1095
1096static netdev_features_t cxgb4vf_fix_features(struct net_device *dev,
1097 netdev_features_t features)
1098{
1099
1100
1101
1102
1103 if (features & NETIF_F_HW_VLAN_RX)
1104 features |= NETIF_F_HW_VLAN_TX;
1105 else
1106 features &= ~NETIF_F_HW_VLAN_TX;
1107
1108 return features;
1109}
1110
1111static int cxgb4vf_set_features(struct net_device *dev,
1112 netdev_features_t features)
1113{
1114 struct port_info *pi = netdev_priv(dev);
1115 netdev_features_t changed = dev->features ^ features;
1116
1117 if (changed & NETIF_F_HW_VLAN_RX)
1118 t4vf_set_rxmode(pi->adapter, pi->viid, -1, -1, -1, -1,
1119 features & NETIF_F_HW_VLAN_TX, 0);
1120
1121 return 0;
1122}
1123
1124
1125
1126
1127static int cxgb4vf_set_mac_addr(struct net_device *dev, void *_addr)
1128{
1129 int ret;
1130 struct sockaddr *addr = _addr;
1131 struct port_info *pi = netdev_priv(dev);
1132
1133 if (!is_valid_ether_addr(addr->sa_data))
1134 return -EADDRNOTAVAIL;
1135
1136 ret = t4vf_change_mac(pi->adapter, pi->viid, pi->xact_addr_filt,
1137 addr->sa_data, true);
1138 if (ret < 0)
1139 return ret;
1140
1141 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1142 pi->xact_addr_filt = ret;
1143 return 0;
1144}
1145
1146#ifdef CONFIG_NET_POLL_CONTROLLER
1147
1148
1149
1150
1151static void cxgb4vf_poll_controller(struct net_device *dev)
1152{
1153 struct port_info *pi = netdev_priv(dev);
1154 struct adapter *adapter = pi->adapter;
1155
1156 if (adapter->flags & USING_MSIX) {
1157 struct sge_eth_rxq *rxq;
1158 int nqsets;
1159
1160 rxq = &adapter->sge.ethrxq[pi->first_qset];
1161 for (nqsets = pi->nqsets; nqsets; nqsets--) {
1162 t4vf_sge_intr_msix(0, &rxq->rspq);
1163 rxq++;
1164 }
1165 } else
1166 t4vf_intr_handler(adapter)(0, adapter);
1167}
1168#endif
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181static int cxgb4vf_get_settings(struct net_device *dev,
1182 struct ethtool_cmd *cmd)
1183{
1184 const struct port_info *pi = netdev_priv(dev);
1185
1186 cmd->supported = pi->link_cfg.supported;
1187 cmd->advertising = pi->link_cfg.advertising;
1188 ethtool_cmd_speed_set(cmd,
1189 netif_carrier_ok(dev) ? pi->link_cfg.speed : -1);
1190 cmd->duplex = DUPLEX_FULL;
1191
1192 cmd->port = (cmd->supported & SUPPORTED_TP) ? PORT_TP : PORT_FIBRE;
1193 cmd->phy_address = pi->port_id;
1194 cmd->transceiver = XCVR_EXTERNAL;
1195 cmd->autoneg = pi->link_cfg.autoneg;
1196 cmd->maxtxpkt = 0;
1197 cmd->maxrxpkt = 0;
1198 return 0;
1199}
1200
1201
1202
1203
1204static void cxgb4vf_get_drvinfo(struct net_device *dev,
1205 struct ethtool_drvinfo *drvinfo)
1206{
1207 struct adapter *adapter = netdev2adap(dev);
1208
1209 strlcpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
1210 strlcpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
1211 strlcpy(drvinfo->bus_info, pci_name(to_pci_dev(dev->dev.parent)),
1212 sizeof(drvinfo->bus_info));
1213 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1214 "%u.%u.%u.%u, TP %u.%u.%u.%u",
1215 FW_HDR_FW_VER_MAJOR_GET(adapter->params.dev.fwrev),
1216 FW_HDR_FW_VER_MINOR_GET(adapter->params.dev.fwrev),
1217 FW_HDR_FW_VER_MICRO_GET(adapter->params.dev.fwrev),
1218 FW_HDR_FW_VER_BUILD_GET(adapter->params.dev.fwrev),
1219 FW_HDR_FW_VER_MAJOR_GET(adapter->params.dev.tprev),
1220 FW_HDR_FW_VER_MINOR_GET(adapter->params.dev.tprev),
1221 FW_HDR_FW_VER_MICRO_GET(adapter->params.dev.tprev),
1222 FW_HDR_FW_VER_BUILD_GET(adapter->params.dev.tprev));
1223}
1224
1225
1226
1227
1228static u32 cxgb4vf_get_msglevel(struct net_device *dev)
1229{
1230 return netdev2adap(dev)->msg_enable;
1231}
1232
1233
1234
1235
1236static void cxgb4vf_set_msglevel(struct net_device *dev, u32 msglevel)
1237{
1238 netdev2adap(dev)->msg_enable = msglevel;
1239}
1240
1241
1242
1243
1244
1245
1246
1247static void cxgb4vf_get_ringparam(struct net_device *dev,
1248 struct ethtool_ringparam *rp)
1249{
1250 const struct port_info *pi = netdev_priv(dev);
1251 const struct sge *s = &pi->adapter->sge;
1252
1253 rp->rx_max_pending = MAX_RX_BUFFERS;
1254 rp->rx_mini_max_pending = MAX_RSPQ_ENTRIES;
1255 rp->rx_jumbo_max_pending = 0;
1256 rp->tx_max_pending = MAX_TXQ_ENTRIES;
1257
1258 rp->rx_pending = s->ethrxq[pi->first_qset].fl.size - MIN_FL_RESID;
1259 rp->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size;
1260 rp->rx_jumbo_pending = 0;
1261 rp->tx_pending = s->ethtxq[pi->first_qset].q.size;
1262}
1263
1264
1265
1266
1267
1268
1269
1270static int cxgb4vf_set_ringparam(struct net_device *dev,
1271 struct ethtool_ringparam *rp)
1272{
1273 const struct port_info *pi = netdev_priv(dev);
1274 struct adapter *adapter = pi->adapter;
1275 struct sge *s = &adapter->sge;
1276 int qs;
1277
1278 if (rp->rx_pending > MAX_RX_BUFFERS ||
1279 rp->rx_jumbo_pending ||
1280 rp->tx_pending > MAX_TXQ_ENTRIES ||
1281 rp->rx_mini_pending > MAX_RSPQ_ENTRIES ||
1282 rp->rx_mini_pending < MIN_RSPQ_ENTRIES ||
1283 rp->rx_pending < MIN_FL_ENTRIES ||
1284 rp->tx_pending < MIN_TXQ_ENTRIES)
1285 return -EINVAL;
1286
1287 if (adapter->flags & FULL_INIT_DONE)
1288 return -EBUSY;
1289
1290 for (qs = pi->first_qset; qs < pi->first_qset + pi->nqsets; qs++) {
1291 s->ethrxq[qs].fl.size = rp->rx_pending + MIN_FL_RESID;
1292 s->ethrxq[qs].rspq.size = rp->rx_mini_pending;
1293 s->ethtxq[qs].q.size = rp->tx_pending;
1294 }
1295 return 0;
1296}
1297
1298
1299
1300
1301
1302
1303static int cxgb4vf_get_coalesce(struct net_device *dev,
1304 struct ethtool_coalesce *coalesce)
1305{
1306 const struct port_info *pi = netdev_priv(dev);
1307 const struct adapter *adapter = pi->adapter;
1308 const struct sge_rspq *rspq = &adapter->sge.ethrxq[pi->first_qset].rspq;
1309
1310 coalesce->rx_coalesce_usecs = qtimer_val(adapter, rspq);
1311 coalesce->rx_max_coalesced_frames =
1312 ((rspq->intr_params & QINTR_CNT_EN)
1313 ? adapter->sge.counter_val[rspq->pktcnt_idx]
1314 : 0);
1315 return 0;
1316}
1317
1318
1319
1320
1321
1322
1323static int cxgb4vf_set_coalesce(struct net_device *dev,
1324 struct ethtool_coalesce *coalesce)
1325{
1326 const struct port_info *pi = netdev_priv(dev);
1327 struct adapter *adapter = pi->adapter;
1328
1329 return set_rxq_intr_params(adapter,
1330 &adapter->sge.ethrxq[pi->first_qset].rspq,
1331 coalesce->rx_coalesce_usecs,
1332 coalesce->rx_max_coalesced_frames);
1333}
1334
1335
1336
1337
1338static void cxgb4vf_get_pauseparam(struct net_device *dev,
1339 struct ethtool_pauseparam *pauseparam)
1340{
1341 struct port_info *pi = netdev_priv(dev);
1342
1343 pauseparam->autoneg = (pi->link_cfg.requested_fc & PAUSE_AUTONEG) != 0;
1344 pauseparam->rx_pause = (pi->link_cfg.fc & PAUSE_RX) != 0;
1345 pauseparam->tx_pause = (pi->link_cfg.fc & PAUSE_TX) != 0;
1346}
1347
1348
1349
1350
1351static int cxgb4vf_phys_id(struct net_device *dev,
1352 enum ethtool_phys_id_state state)
1353{
1354 unsigned int val;
1355 struct port_info *pi = netdev_priv(dev);
1356
1357 if (state == ETHTOOL_ID_ACTIVE)
1358 val = 0xffff;
1359 else if (state == ETHTOOL_ID_INACTIVE)
1360 val = 0;
1361 else
1362 return -EINVAL;
1363
1364 return t4vf_identify_port(pi->adapter, pi->viid, val);
1365}
1366
1367
1368
1369
1370struct queue_port_stats {
1371 u64 tso;
1372 u64 tx_csum;
1373 u64 rx_csum;
1374 u64 vlan_ex;
1375 u64 vlan_ins;
1376 u64 lro_pkts;
1377 u64 lro_merged;
1378};
1379
1380
1381
1382
1383
1384
1385static const char stats_strings[][ETH_GSTRING_LEN] = {
1386
1387
1388
1389 "TxBroadcastBytes ",
1390 "TxBroadcastFrames ",
1391 "TxMulticastBytes ",
1392 "TxMulticastFrames ",
1393 "TxUnicastBytes ",
1394 "TxUnicastFrames ",
1395 "TxDroppedFrames ",
1396 "TxOffloadBytes ",
1397 "TxOffloadFrames ",
1398 "RxBroadcastBytes ",
1399 "RxBroadcastFrames ",
1400 "RxMulticastBytes ",
1401 "RxMulticastFrames ",
1402 "RxUnicastBytes ",
1403 "RxUnicastFrames ",
1404 "RxErrorFrames ",
1405
1406
1407
1408
1409
1410 "TSO ",
1411 "TxCsumOffload ",
1412 "RxCsumGood ",
1413 "VLANextractions ",
1414 "VLANinsertions ",
1415 "GROPackets ",
1416 "GROMerged ",
1417};
1418
1419
1420
1421
1422static int cxgb4vf_get_sset_count(struct net_device *dev, int sset)
1423{
1424 switch (sset) {
1425 case ETH_SS_STATS:
1426 return ARRAY_SIZE(stats_strings);
1427 default:
1428 return -EOPNOTSUPP;
1429 }
1430
1431}
1432
1433
1434
1435
1436static void cxgb4vf_get_strings(struct net_device *dev,
1437 u32 sset,
1438 u8 *data)
1439{
1440 switch (sset) {
1441 case ETH_SS_STATS:
1442 memcpy(data, stats_strings, sizeof(stats_strings));
1443 break;
1444 }
1445}
1446
1447
1448
1449
1450
1451static void collect_sge_port_stats(const struct adapter *adapter,
1452 const struct port_info *pi,
1453 struct queue_port_stats *stats)
1454{
1455 const struct sge_eth_txq *txq = &adapter->sge.ethtxq[pi->first_qset];
1456 const struct sge_eth_rxq *rxq = &adapter->sge.ethrxq[pi->first_qset];
1457 int qs;
1458
1459 memset(stats, 0, sizeof(*stats));
1460 for (qs = 0; qs < pi->nqsets; qs++, rxq++, txq++) {
1461 stats->tso += txq->tso;
1462 stats->tx_csum += txq->tx_cso;
1463 stats->rx_csum += rxq->stats.rx_cso;
1464 stats->vlan_ex += rxq->stats.vlan_ex;
1465 stats->vlan_ins += txq->vlan_ins;
1466 stats->lro_pkts += rxq->stats.lro_pkts;
1467 stats->lro_merged += rxq->stats.lro_merged;
1468 }
1469}
1470
1471
1472
1473
1474static void cxgb4vf_get_ethtool_stats(struct net_device *dev,
1475 struct ethtool_stats *stats,
1476 u64 *data)
1477{
1478 struct port_info *pi = netdev2pinfo(dev);
1479 struct adapter *adapter = pi->adapter;
1480 int err = t4vf_get_port_stats(adapter, pi->pidx,
1481 (struct t4vf_port_stats *)data);
1482 if (err)
1483 memset(data, 0, sizeof(struct t4vf_port_stats));
1484
1485 data += sizeof(struct t4vf_port_stats) / sizeof(u64);
1486 collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data);
1487}
1488
1489
1490
1491
1492static int cxgb4vf_get_regs_len(struct net_device *dev)
1493{
1494 return T4VF_REGMAP_SIZE;
1495}
1496
1497
1498
1499
1500static void reg_block_dump(struct adapter *adapter, void *regbuf,
1501 unsigned int start, unsigned int end)
1502{
1503 u32 *bp = regbuf + start - T4VF_REGMAP_START;
1504
1505 for ( ; start <= end; start += sizeof(u32)) {
1506
1507
1508
1509
1510
1511 if (start == T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL)
1512 *bp++ = 0xffff;
1513 else
1514 *bp++ = t4_read_reg(adapter, start);
1515 }
1516}
1517
1518
1519
1520
1521static void cxgb4vf_get_regs(struct net_device *dev,
1522 struct ethtool_regs *regs,
1523 void *regbuf)
1524{
1525 struct adapter *adapter = netdev2adap(dev);
1526
1527 regs->version = mk_adap_vers(adapter);
1528
1529
1530
1531
1532 memset(regbuf, 0, T4VF_REGMAP_SIZE);
1533
1534 reg_block_dump(adapter, regbuf,
1535 T4VF_SGE_BASE_ADDR + T4VF_MOD_MAP_SGE_FIRST,
1536 T4VF_SGE_BASE_ADDR + T4VF_MOD_MAP_SGE_LAST);
1537 reg_block_dump(adapter, regbuf,
1538 T4VF_MPS_BASE_ADDR + T4VF_MOD_MAP_MPS_FIRST,
1539 T4VF_MPS_BASE_ADDR + T4VF_MOD_MAP_MPS_LAST);
1540 reg_block_dump(adapter, regbuf,
1541 T4VF_PL_BASE_ADDR + T4VF_MOD_MAP_PL_FIRST,
1542 T4VF_PL_BASE_ADDR + T4VF_MOD_MAP_PL_LAST);
1543 reg_block_dump(adapter, regbuf,
1544 T4VF_CIM_BASE_ADDR + T4VF_MOD_MAP_CIM_FIRST,
1545 T4VF_CIM_BASE_ADDR + T4VF_MOD_MAP_CIM_LAST);
1546
1547 reg_block_dump(adapter, regbuf,
1548 T4VF_MBDATA_BASE_ADDR + T4VF_MBDATA_FIRST,
1549 T4VF_MBDATA_BASE_ADDR + T4VF_MBDATA_LAST);
1550}
1551
1552
1553
1554
1555static void cxgb4vf_get_wol(struct net_device *dev,
1556 struct ethtool_wolinfo *wol)
1557{
1558 wol->supported = 0;
1559 wol->wolopts = 0;
1560 memset(&wol->sopass, 0, sizeof(wol->sopass));
1561}
1562
1563
1564
1565
1566#define TSO_FLAGS (NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN)
1567
1568static const struct ethtool_ops cxgb4vf_ethtool_ops = {
1569 .get_settings = cxgb4vf_get_settings,
1570 .get_drvinfo = cxgb4vf_get_drvinfo,
1571 .get_msglevel = cxgb4vf_get_msglevel,
1572 .set_msglevel = cxgb4vf_set_msglevel,
1573 .get_ringparam = cxgb4vf_get_ringparam,
1574 .set_ringparam = cxgb4vf_set_ringparam,
1575 .get_coalesce = cxgb4vf_get_coalesce,
1576 .set_coalesce = cxgb4vf_set_coalesce,
1577 .get_pauseparam = cxgb4vf_get_pauseparam,
1578 .get_link = ethtool_op_get_link,
1579 .get_strings = cxgb4vf_get_strings,
1580 .set_phys_id = cxgb4vf_phys_id,
1581 .get_sset_count = cxgb4vf_get_sset_count,
1582 .get_ethtool_stats = cxgb4vf_get_ethtool_stats,
1583 .get_regs_len = cxgb4vf_get_regs_len,
1584 .get_regs = cxgb4vf_get_regs,
1585 .get_wol = cxgb4vf_get_wol,
1586};
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596#define QPL 4
1597
1598static int sge_qinfo_show(struct seq_file *seq, void *v)
1599{
1600 struct adapter *adapter = seq->private;
1601 int eth_entries = DIV_ROUND_UP(adapter->sge.ethqsets, QPL);
1602 int qs, r = (uintptr_t)v - 1;
1603
1604 if (r)
1605 seq_putc(seq, '\n');
1606
1607 #define S3(fmt_spec, s, v) \
1608 do {\
1609 seq_printf(seq, "%-12s", s); \
1610 for (qs = 0; qs < n; ++qs) \
1611 seq_printf(seq, " %16" fmt_spec, v); \
1612 seq_putc(seq, '\n'); \
1613 } while (0)
1614 #define S(s, v) S3("s", s, v)
1615 #define T(s, v) S3("u", s, txq[qs].v)
1616 #define R(s, v) S3("u", s, rxq[qs].v)
1617
1618 if (r < eth_entries) {
1619 const struct sge_eth_rxq *rxq = &adapter->sge.ethrxq[r * QPL];
1620 const struct sge_eth_txq *txq = &adapter->sge.ethtxq[r * QPL];
1621 int n = min(QPL, adapter->sge.ethqsets - QPL * r);
1622
1623 S("QType:", "Ethernet");
1624 S("Interface:",
1625 (rxq[qs].rspq.netdev
1626 ? rxq[qs].rspq.netdev->name
1627 : "N/A"));
1628 S3("d", "Port:",
1629 (rxq[qs].rspq.netdev
1630 ? ((struct port_info *)
1631 netdev_priv(rxq[qs].rspq.netdev))->port_id
1632 : -1));
1633 T("TxQ ID:", q.abs_id);
1634 T("TxQ size:", q.size);
1635 T("TxQ inuse:", q.in_use);
1636 T("TxQ PIdx:", q.pidx);
1637 T("TxQ CIdx:", q.cidx);
1638 R("RspQ ID:", rspq.abs_id);
1639 R("RspQ size:", rspq.size);
1640 R("RspQE size:", rspq.iqe_len);
1641 S3("u", "Intr delay:", qtimer_val(adapter, &rxq[qs].rspq));
1642 S3("u", "Intr pktcnt:",
1643 adapter->sge.counter_val[rxq[qs].rspq.pktcnt_idx]);
1644 R("RspQ CIdx:", rspq.cidx);
1645 R("RspQ Gen:", rspq.gen);
1646 R("FL ID:", fl.abs_id);
1647 R("FL size:", fl.size - MIN_FL_RESID);
1648 R("FL avail:", fl.avail);
1649 R("FL PIdx:", fl.pidx);
1650 R("FL CIdx:", fl.cidx);
1651 return 0;
1652 }
1653
1654 r -= eth_entries;
1655 if (r == 0) {
1656 const struct sge_rspq *evtq = &adapter->sge.fw_evtq;
1657
1658 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
1659 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
1660 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
1661 qtimer_val(adapter, evtq));
1662 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
1663 adapter->sge.counter_val[evtq->pktcnt_idx]);
1664 seq_printf(seq, "%-12s %16u\n", "RspQ Cidx:", evtq->cidx);
1665 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
1666 } else if (r == 1) {
1667 const struct sge_rspq *intrq = &adapter->sge.intrq;
1668
1669 seq_printf(seq, "%-12s %16s\n", "QType:", "Interrupt Queue");
1670 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", intrq->abs_id);
1671 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
1672 qtimer_val(adapter, intrq));
1673 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
1674 adapter->sge.counter_val[intrq->pktcnt_idx]);
1675 seq_printf(seq, "%-12s %16u\n", "RspQ Cidx:", intrq->cidx);
1676 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", intrq->gen);
1677 }
1678
1679 #undef R
1680 #undef T
1681 #undef S
1682 #undef S3
1683
1684 return 0;
1685}
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695static int sge_queue_entries(const struct adapter *adapter)
1696{
1697 return DIV_ROUND_UP(adapter->sge.ethqsets, QPL) + 1 +
1698 ((adapter->flags & USING_MSI) != 0);
1699}
1700
1701static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
1702{
1703 int entries = sge_queue_entries(seq->private);
1704
1705 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1706}
1707
1708static void sge_queue_stop(struct seq_file *seq, void *v)
1709{
1710}
1711
1712static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
1713{
1714 int entries = sge_queue_entries(seq->private);
1715
1716 ++*pos;
1717 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1718}
1719
1720static const struct seq_operations sge_qinfo_seq_ops = {
1721 .start = sge_queue_start,
1722 .next = sge_queue_next,
1723 .stop = sge_queue_stop,
1724 .show = sge_qinfo_show
1725};
1726
1727static int sge_qinfo_open(struct inode *inode, struct file *file)
1728{
1729 int res = seq_open(file, &sge_qinfo_seq_ops);
1730
1731 if (!res) {
1732 struct seq_file *seq = file->private_data;
1733 seq->private = inode->i_private;
1734 }
1735 return res;
1736}
1737
1738static const struct file_operations sge_qinfo_debugfs_fops = {
1739 .owner = THIS_MODULE,
1740 .open = sge_qinfo_open,
1741 .read = seq_read,
1742 .llseek = seq_lseek,
1743 .release = seq_release,
1744};
1745
1746
1747
1748
1749#define QPL 4
1750
1751static int sge_qstats_show(struct seq_file *seq, void *v)
1752{
1753 struct adapter *adapter = seq->private;
1754 int eth_entries = DIV_ROUND_UP(adapter->sge.ethqsets, QPL);
1755 int qs, r = (uintptr_t)v - 1;
1756
1757 if (r)
1758 seq_putc(seq, '\n');
1759
1760 #define S3(fmt, s, v) \
1761 do { \
1762 seq_printf(seq, "%-16s", s); \
1763 for (qs = 0; qs < n; ++qs) \
1764 seq_printf(seq, " %8" fmt, v); \
1765 seq_putc(seq, '\n'); \
1766 } while (0)
1767 #define S(s, v) S3("s", s, v)
1768
1769 #define T3(fmt, s, v) S3(fmt, s, txq[qs].v)
1770 #define T(s, v) T3("lu", s, v)
1771
1772 #define R3(fmt, s, v) S3(fmt, s, rxq[qs].v)
1773 #define R(s, v) R3("lu", s, v)
1774
1775 if (r < eth_entries) {
1776 const struct sge_eth_rxq *rxq = &adapter->sge.ethrxq[r * QPL];
1777 const struct sge_eth_txq *txq = &adapter->sge.ethtxq[r * QPL];
1778 int n = min(QPL, adapter->sge.ethqsets - QPL * r);
1779
1780 S("QType:", "Ethernet");
1781 S("Interface:",
1782 (rxq[qs].rspq.netdev
1783 ? rxq[qs].rspq.netdev->name
1784 : "N/A"));
1785 R3("u", "RspQNullInts:", rspq.unhandled_irqs);
1786 R("RxPackets:", stats.pkts);
1787 R("RxCSO:", stats.rx_cso);
1788 R("VLANxtract:", stats.vlan_ex);
1789 R("LROmerged:", stats.lro_merged);
1790 R("LROpackets:", stats.lro_pkts);
1791 R("RxDrops:", stats.rx_drops);
1792 T("TSO:", tso);
1793 T("TxCSO:", tx_cso);
1794 T("VLANins:", vlan_ins);
1795 T("TxQFull:", q.stops);
1796 T("TxQRestarts:", q.restarts);
1797 T("TxMapErr:", mapping_err);
1798 R("FLAllocErr:", fl.alloc_failed);
1799 R("FLLrgAlcErr:", fl.large_alloc_failed);
1800 R("FLStarving:", fl.starving);
1801 return 0;
1802 }
1803
1804 r -= eth_entries;
1805 if (r == 0) {
1806 const struct sge_rspq *evtq = &adapter->sge.fw_evtq;
1807
1808 seq_printf(seq, "%-8s %16s\n", "QType:", "FW event queue");
1809 seq_printf(seq, "%-16s %8u\n", "RspQNullInts:",
1810 evtq->unhandled_irqs);
1811 seq_printf(seq, "%-16s %8u\n", "RspQ CIdx:", evtq->cidx);
1812 seq_printf(seq, "%-16s %8u\n", "RspQ Gen:", evtq->gen);
1813 } else if (r == 1) {
1814 const struct sge_rspq *intrq = &adapter->sge.intrq;
1815
1816 seq_printf(seq, "%-8s %16s\n", "QType:", "Interrupt Queue");
1817 seq_printf(seq, "%-16s %8u\n", "RspQNullInts:",
1818 intrq->unhandled_irqs);
1819 seq_printf(seq, "%-16s %8u\n", "RspQ CIdx:", intrq->cidx);
1820 seq_printf(seq, "%-16s %8u\n", "RspQ Gen:", intrq->gen);
1821 }
1822
1823 #undef R
1824 #undef T
1825 #undef S
1826 #undef R3
1827 #undef T3
1828 #undef S3
1829
1830 return 0;
1831}
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841static int sge_qstats_entries(const struct adapter *adapter)
1842{
1843 return DIV_ROUND_UP(adapter->sge.ethqsets, QPL) + 1 +
1844 ((adapter->flags & USING_MSI) != 0);
1845}
1846
1847static void *sge_qstats_start(struct seq_file *seq, loff_t *pos)
1848{
1849 int entries = sge_qstats_entries(seq->private);
1850
1851 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1852}
1853
1854static void sge_qstats_stop(struct seq_file *seq, void *v)
1855{
1856}
1857
1858static void *sge_qstats_next(struct seq_file *seq, void *v, loff_t *pos)
1859{
1860 int entries = sge_qstats_entries(seq->private);
1861
1862 (*pos)++;
1863 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1864}
1865
1866static const struct seq_operations sge_qstats_seq_ops = {
1867 .start = sge_qstats_start,
1868 .next = sge_qstats_next,
1869 .stop = sge_qstats_stop,
1870 .show = sge_qstats_show
1871};
1872
1873static int sge_qstats_open(struct inode *inode, struct file *file)
1874{
1875 int res = seq_open(file, &sge_qstats_seq_ops);
1876
1877 if (res == 0) {
1878 struct seq_file *seq = file->private_data;
1879 seq->private = inode->i_private;
1880 }
1881 return res;
1882}
1883
1884static const struct file_operations sge_qstats_proc_fops = {
1885 .owner = THIS_MODULE,
1886 .open = sge_qstats_open,
1887 .read = seq_read,
1888 .llseek = seq_lseek,
1889 .release = seq_release,
1890};
1891
1892
1893
1894
1895static int resources_show(struct seq_file *seq, void *v)
1896{
1897 struct adapter *adapter = seq->private;
1898 struct vf_resources *vfres = &adapter->params.vfres;
1899
1900 #define S(desc, fmt, var) \
1901 seq_printf(seq, "%-60s " fmt "\n", \
1902 desc " (" #var "):", vfres->var)
1903
1904 S("Virtual Interfaces", "%d", nvi);
1905 S("Egress Queues", "%d", neq);
1906 S("Ethernet Control", "%d", nethctrl);
1907 S("Ingress Queues/w Free Lists/Interrupts", "%d", niqflint);
1908 S("Ingress Queues", "%d", niq);
1909 S("Traffic Class", "%d", tc);
1910 S("Port Access Rights Mask", "%#x", pmask);
1911 S("MAC Address Filters", "%d", nexactf);
1912 S("Firmware Command Read Capabilities", "%#x", r_caps);
1913 S("Firmware Command Write/Execute Capabilities", "%#x", wx_caps);
1914
1915 #undef S
1916
1917 return 0;
1918}
1919
1920static int resources_open(struct inode *inode, struct file *file)
1921{
1922 return single_open(file, resources_show, inode->i_private);
1923}
1924
1925static const struct file_operations resources_proc_fops = {
1926 .owner = THIS_MODULE,
1927 .open = resources_open,
1928 .read = seq_read,
1929 .llseek = seq_lseek,
1930 .release = single_release,
1931};
1932
1933
1934
1935
1936static int interfaces_show(struct seq_file *seq, void *v)
1937{
1938 if (v == SEQ_START_TOKEN) {
1939 seq_puts(seq, "Interface Port VIID\n");
1940 } else {
1941 struct adapter *adapter = seq->private;
1942 int pidx = (uintptr_t)v - 2;
1943 struct net_device *dev = adapter->port[pidx];
1944 struct port_info *pi = netdev_priv(dev);
1945
1946 seq_printf(seq, "%9s %4d %#5x\n",
1947 dev->name, pi->port_id, pi->viid);
1948 }
1949 return 0;
1950}
1951
1952static inline void *interfaces_get_idx(struct adapter *adapter, loff_t pos)
1953{
1954 return pos <= adapter->params.nports
1955 ? (void *)(uintptr_t)(pos + 1)
1956 : NULL;
1957}
1958
1959static void *interfaces_start(struct seq_file *seq, loff_t *pos)
1960{
1961 return *pos
1962 ? interfaces_get_idx(seq->private, *pos)
1963 : SEQ_START_TOKEN;
1964}
1965
1966static void *interfaces_next(struct seq_file *seq, void *v, loff_t *pos)
1967{
1968 (*pos)++;
1969 return interfaces_get_idx(seq->private, *pos);
1970}
1971
1972static void interfaces_stop(struct seq_file *seq, void *v)
1973{
1974}
1975
1976static const struct seq_operations interfaces_seq_ops = {
1977 .start = interfaces_start,
1978 .next = interfaces_next,
1979 .stop = interfaces_stop,
1980 .show = interfaces_show
1981};
1982
1983static int interfaces_open(struct inode *inode, struct file *file)
1984{
1985 int res = seq_open(file, &interfaces_seq_ops);
1986
1987 if (res == 0) {
1988 struct seq_file *seq = file->private_data;
1989 seq->private = inode->i_private;
1990 }
1991 return res;
1992}
1993
1994static const struct file_operations interfaces_proc_fops = {
1995 .owner = THIS_MODULE,
1996 .open = interfaces_open,
1997 .read = seq_read,
1998 .llseek = seq_lseek,
1999 .release = seq_release,
2000};
2001
2002
2003
2004
2005struct cxgb4vf_debugfs_entry {
2006 const char *name;
2007 umode_t mode;
2008 const struct file_operations *fops;
2009};
2010
2011static struct cxgb4vf_debugfs_entry debugfs_files[] = {
2012 { "sge_qinfo", S_IRUGO, &sge_qinfo_debugfs_fops },
2013 { "sge_qstats", S_IRUGO, &sge_qstats_proc_fops },
2014 { "resources", S_IRUGO, &resources_proc_fops },
2015 { "interfaces", S_IRUGO, &interfaces_proc_fops },
2016};
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027static int setup_debugfs(struct adapter *adapter)
2028{
2029 int i;
2030
2031 BUG_ON(IS_ERR_OR_NULL(adapter->debugfs_root));
2032
2033
2034
2035
2036 for (i = 0; i < ARRAY_SIZE(debugfs_files); i++)
2037 (void)debugfs_create_file(debugfs_files[i].name,
2038 debugfs_files[i].mode,
2039 adapter->debugfs_root,
2040 (void *)adapter,
2041 debugfs_files[i].fops);
2042
2043 return 0;
2044}
2045
2046
2047
2048
2049
2050static void cleanup_debugfs(struct adapter *adapter)
2051{
2052 BUG_ON(IS_ERR_OR_NULL(adapter->debugfs_root));
2053
2054
2055
2056
2057
2058
2059
2060
2061}
2062
2063
2064
2065
2066
2067
2068static int adap_init0(struct adapter *adapter)
2069{
2070 struct vf_resources *vfres = &adapter->params.vfres;
2071 struct sge_params *sge_params = &adapter->params.sge;
2072 struct sge *s = &adapter->sge;
2073 unsigned int ethqsets;
2074 int err;
2075
2076
2077
2078
2079 err = t4vf_wait_dev_ready(adapter);
2080 if (err) {
2081 dev_err(adapter->pdev_dev, "device didn't become ready:"
2082 " err=%d\n", err);
2083 return err;
2084 }
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096 err = t4vf_fw_reset(adapter);
2097 if (err < 0) {
2098 dev_err(adapter->pdev_dev, "FW reset failed: err=%d\n", err);
2099 return err;
2100 }
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110 err = t4vf_get_dev_params(adapter);
2111 if (err) {
2112 dev_err(adapter->pdev_dev, "unable to retrieve adapter"
2113 " device parameters: err=%d\n", err);
2114 return err;
2115 }
2116 err = t4vf_get_vpd_params(adapter);
2117 if (err) {
2118 dev_err(adapter->pdev_dev, "unable to retrieve adapter"
2119 " VPD parameters: err=%d\n", err);
2120 return err;
2121 }
2122 err = t4vf_get_sge_params(adapter);
2123 if (err) {
2124 dev_err(adapter->pdev_dev, "unable to retrieve adapter"
2125 " SGE parameters: err=%d\n", err);
2126 return err;
2127 }
2128 err = t4vf_get_rss_glb_config(adapter);
2129 if (err) {
2130 dev_err(adapter->pdev_dev, "unable to retrieve adapter"
2131 " RSS parameters: err=%d\n", err);
2132 return err;
2133 }
2134 if (adapter->params.rss.mode !=
2135 FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL) {
2136 dev_err(adapter->pdev_dev, "unable to operate with global RSS"
2137 " mode %d\n", adapter->params.rss.mode);
2138 return -EINVAL;
2139 }
2140 err = t4vf_sge_init(adapter);
2141 if (err) {
2142 dev_err(adapter->pdev_dev, "unable to use adapter parameters:"
2143 " err=%d\n", err);
2144 return err;
2145 }
2146
2147
2148
2149
2150
2151 s->timer_val[0] = core_ticks_to_us(adapter,
2152 TIMERVALUE0_GET(sge_params->sge_timer_value_0_and_1));
2153 s->timer_val[1] = core_ticks_to_us(adapter,
2154 TIMERVALUE1_GET(sge_params->sge_timer_value_0_and_1));
2155 s->timer_val[2] = core_ticks_to_us(adapter,
2156 TIMERVALUE0_GET(sge_params->sge_timer_value_2_and_3));
2157 s->timer_val[3] = core_ticks_to_us(adapter,
2158 TIMERVALUE1_GET(sge_params->sge_timer_value_2_and_3));
2159 s->timer_val[4] = core_ticks_to_us(adapter,
2160 TIMERVALUE0_GET(sge_params->sge_timer_value_4_and_5));
2161 s->timer_val[5] = core_ticks_to_us(adapter,
2162 TIMERVALUE1_GET(sge_params->sge_timer_value_4_and_5));
2163
2164 s->counter_val[0] =
2165 THRESHOLD_0_GET(sge_params->sge_ingress_rx_threshold);
2166 s->counter_val[1] =
2167 THRESHOLD_1_GET(sge_params->sge_ingress_rx_threshold);
2168 s->counter_val[2] =
2169 THRESHOLD_2_GET(sge_params->sge_ingress_rx_threshold);
2170 s->counter_val[3] =
2171 THRESHOLD_3_GET(sge_params->sge_ingress_rx_threshold);
2172
2173
2174
2175
2176
2177
2178 err = t4vf_get_vfres(adapter);
2179 if (err) {
2180 dev_err(adapter->pdev_dev, "unable to get virtual interface"
2181 " resources: err=%d\n", err);
2182 return err;
2183 }
2184
2185
2186
2187
2188
2189 adapter->params.nports = vfres->nvi;
2190 if (adapter->params.nports > MAX_NPORTS) {
2191 dev_warn(adapter->pdev_dev, "only using %d of %d allowed"
2192 " virtual interfaces\n", MAX_NPORTS,
2193 adapter->params.nports);
2194 adapter->params.nports = MAX_NPORTS;
2195 }
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208 ethqsets = vfres->niqflint - INGQ_EXTRAS;
2209 if (vfres->nethctrl != ethqsets) {
2210 dev_warn(adapter->pdev_dev, "unequal number of [available]"
2211 " ingress/egress queues (%d/%d); using minimum for"
2212 " number of Queue Sets\n", ethqsets, vfres->nethctrl);
2213 ethqsets = min(vfres->nethctrl, ethqsets);
2214 }
2215 if (vfres->neq < ethqsets*2) {
2216 dev_warn(adapter->pdev_dev, "Not enough Egress Contexts (%d)"
2217 " to support Queue Sets (%d); reducing allowed Queue"
2218 " Sets\n", vfres->neq, ethqsets);
2219 ethqsets = vfres->neq/2;
2220 }
2221 if (ethqsets > MAX_ETH_QSETS) {
2222 dev_warn(adapter->pdev_dev, "only using %d of %d allowed Queue"
2223 " Sets\n", MAX_ETH_QSETS, adapter->sge.max_ethqsets);
2224 ethqsets = MAX_ETH_QSETS;
2225 }
2226 if (vfres->niq != 0 || vfres->neq > ethqsets*2) {
2227 dev_warn(adapter->pdev_dev, "unused resources niq/neq (%d/%d)"
2228 " ignored\n", vfres->niq, vfres->neq - ethqsets*2);
2229 }
2230 adapter->sge.max_ethqsets = ethqsets;
2231
2232
2233
2234
2235
2236
2237 if (adapter->sge.max_ethqsets < adapter->params.nports) {
2238 dev_warn(adapter->pdev_dev, "only using %d of %d available"
2239 " virtual interfaces (too few Queue Sets)\n",
2240 adapter->sge.max_ethqsets, adapter->params.nports);
2241 adapter->params.nports = adapter->sge.max_ethqsets;
2242 }
2243 if (adapter->params.nports == 0) {
2244 dev_err(adapter->pdev_dev, "no virtual interfaces configured/"
2245 "usable!\n");
2246 return -EINVAL;
2247 }
2248 return 0;
2249}
2250
2251static inline void init_rspq(struct sge_rspq *rspq, u8 timer_idx,
2252 u8 pkt_cnt_idx, unsigned int size,
2253 unsigned int iqe_size)
2254{
2255 rspq->intr_params = (QINTR_TIMER_IDX(timer_idx) |
2256 (pkt_cnt_idx < SGE_NCOUNTERS ? QINTR_CNT_EN : 0));
2257 rspq->pktcnt_idx = (pkt_cnt_idx < SGE_NCOUNTERS
2258 ? pkt_cnt_idx
2259 : 0);
2260 rspq->iqe_len = iqe_size;
2261 rspq->size = size;
2262}
2263
2264
2265
2266
2267
2268
2269
2270static void cfg_queues(struct adapter *adapter)
2271{
2272 struct sge *s = &adapter->sge;
2273 int q10g, n10g, qidx, pidx, qs;
2274 size_t iqe_size;
2275
2276
2277
2278
2279
2280
2281 BUG_ON((adapter->flags & (USING_MSIX|USING_MSI)) == 0);
2282
2283
2284
2285
2286 n10g = 0;
2287 for_each_port(adapter, pidx)
2288 n10g += is_10g_port(&adap2pinfo(adapter, pidx)->link_cfg);
2289
2290
2291
2292
2293
2294 if (n10g == 0)
2295 q10g = 0;
2296 else {
2297 int n1g = (adapter->params.nports - n10g);
2298 q10g = (adapter->sge.max_ethqsets - n1g) / n10g;
2299 if (q10g > num_online_cpus())
2300 q10g = num_online_cpus();
2301 }
2302
2303
2304
2305
2306
2307
2308 qidx = 0;
2309 for_each_port(adapter, pidx) {
2310 struct port_info *pi = adap2pinfo(adapter, pidx);
2311
2312 pi->first_qset = qidx;
2313 pi->nqsets = is_10g_port(&pi->link_cfg) ? q10g : 1;
2314 qidx += pi->nqsets;
2315 }
2316 s->ethqsets = qidx;
2317
2318
2319
2320
2321
2322
2323 iqe_size = 64;
2324
2325
2326
2327
2328
2329 for (qs = 0; qs < s->max_ethqsets; qs++) {
2330 struct sge_eth_rxq *rxq = &s->ethrxq[qs];
2331 struct sge_eth_txq *txq = &s->ethtxq[qs];
2332
2333 init_rspq(&rxq->rspq, 0, 0, 1024, iqe_size);
2334 rxq->fl.size = 72;
2335 txq->q.size = 1024;
2336 }
2337
2338
2339
2340
2341
2342 init_rspq(&s->fw_evtq, SGE_TIMER_RSTRT_CNTR, 0, 512, iqe_size);
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357 init_rspq(&s->intrq, SGE_TIMER_RSTRT_CNTR, 0, MSIX_ENTRIES + 1,
2358 iqe_size);
2359}
2360
2361
2362
2363
2364
2365static void reduce_ethqs(struct adapter *adapter, int n)
2366{
2367 int i;
2368 struct port_info *pi;
2369
2370
2371
2372
2373
2374 BUG_ON(n < adapter->params.nports);
2375 while (n < adapter->sge.ethqsets)
2376 for_each_port(adapter, i) {
2377 pi = adap2pinfo(adapter, i);
2378 if (pi->nqsets > 1) {
2379 pi->nqsets--;
2380 adapter->sge.ethqsets--;
2381 if (adapter->sge.ethqsets <= n)
2382 break;
2383 }
2384 }
2385
2386
2387
2388
2389 n = 0;
2390 for_each_port(adapter, i) {
2391 pi = adap2pinfo(adapter, i);
2392 pi->first_qset = n;
2393 n += pi->nqsets;
2394 }
2395}
2396
2397
2398
2399
2400
2401
2402
2403
2404static int enable_msix(struct adapter *adapter)
2405{
2406 int i, err, want, need;
2407 struct msix_entry entries[MSIX_ENTRIES];
2408 struct sge *s = &adapter->sge;
2409
2410 for (i = 0; i < MSIX_ENTRIES; ++i)
2411 entries[i].entry = i;
2412
2413
2414
2415
2416
2417
2418
2419
2420 want = s->max_ethqsets + MSIX_EXTRAS;
2421 need = adapter->params.nports + MSIX_EXTRAS;
2422 while ((err = pci_enable_msix(adapter->pdev, entries, want)) >= need)
2423 want = err;
2424
2425 if (err == 0) {
2426 int nqsets = want - MSIX_EXTRAS;
2427 if (nqsets < s->max_ethqsets) {
2428 dev_warn(adapter->pdev_dev, "only enough MSI-X vectors"
2429 " for %d Queue Sets\n", nqsets);
2430 s->max_ethqsets = nqsets;
2431 if (nqsets < s->ethqsets)
2432 reduce_ethqs(adapter, nqsets);
2433 }
2434 for (i = 0; i < want; ++i)
2435 adapter->msix_info[i].vec = entries[i].vector;
2436 } else if (err > 0) {
2437 pci_disable_msix(adapter->pdev);
2438 dev_info(adapter->pdev_dev, "only %d MSI-X vectors left,"
2439 " not using MSI-X\n", err);
2440 }
2441 return err;
2442}
2443
2444static const struct net_device_ops cxgb4vf_netdev_ops = {
2445 .ndo_open = cxgb4vf_open,
2446 .ndo_stop = cxgb4vf_stop,
2447 .ndo_start_xmit = t4vf_eth_xmit,
2448 .ndo_get_stats = cxgb4vf_get_stats,
2449 .ndo_set_rx_mode = cxgb4vf_set_rxmode,
2450 .ndo_set_mac_address = cxgb4vf_set_mac_addr,
2451 .ndo_validate_addr = eth_validate_addr,
2452 .ndo_do_ioctl = cxgb4vf_do_ioctl,
2453 .ndo_change_mtu = cxgb4vf_change_mtu,
2454 .ndo_fix_features = cxgb4vf_fix_features,
2455 .ndo_set_features = cxgb4vf_set_features,
2456#ifdef CONFIG_NET_POLL_CONTROLLER
2457 .ndo_poll_controller = cxgb4vf_poll_controller,
2458#endif
2459};
2460
2461
2462
2463
2464
2465
2466static int cxgb4vf_pci_probe(struct pci_dev *pdev,
2467 const struct pci_device_id *ent)
2468{
2469 int pci_using_dac;
2470 int err, pidx;
2471 unsigned int pmask;
2472 struct adapter *adapter;
2473 struct port_info *pi;
2474 struct net_device *netdev;
2475
2476
2477
2478
2479
2480 pr_info_once("%s - version %s\n", DRV_DESC, DRV_VERSION);
2481
2482
2483
2484
2485 err = pci_enable_device(pdev);
2486 if (err) {
2487 dev_err(&pdev->dev, "cannot enable PCI device\n");
2488 return err;
2489 }
2490
2491
2492
2493
2494
2495 err = pci_request_regions(pdev, KBUILD_MODNAME);
2496 if (err) {
2497 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2498 goto err_disable_device;
2499 }
2500
2501
2502
2503
2504
2505 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
2506 if (err == 0) {
2507 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
2508 if (err) {
2509 dev_err(&pdev->dev, "unable to obtain 64-bit DMA for"
2510 " coherent allocations\n");
2511 goto err_release_regions;
2512 }
2513 pci_using_dac = 1;
2514 } else {
2515 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2516 if (err != 0) {
2517 dev_err(&pdev->dev, "no usable DMA configuration\n");
2518 goto err_release_regions;
2519 }
2520 pci_using_dac = 0;
2521 }
2522
2523
2524
2525
2526 pci_set_master(pdev);
2527
2528
2529
2530
2531 adapter = kzalloc(sizeof(*adapter), GFP_KERNEL);
2532 if (!adapter) {
2533 err = -ENOMEM;
2534 goto err_release_regions;
2535 }
2536 pci_set_drvdata(pdev, adapter);
2537 adapter->pdev = pdev;
2538 adapter->pdev_dev = &pdev->dev;
2539
2540
2541
2542
2543 spin_lock_init(&adapter->stats_lock);
2544
2545
2546
2547
2548 adapter->regs = pci_ioremap_bar(pdev, 0);
2549 if (!adapter->regs) {
2550 dev_err(&pdev->dev, "cannot map device registers\n");
2551 err = -ENOMEM;
2552 goto err_free_adapter;
2553 }
2554
2555
2556
2557
2558 adapter->name = pci_name(pdev);
2559 adapter->msg_enable = dflt_msg_enable;
2560 err = adap_init0(adapter);
2561 if (err)
2562 goto err_unmap_bar;
2563
2564
2565
2566
2567 pmask = adapter->params.vfres.pmask;
2568 for_each_port(adapter, pidx) {
2569 int port_id, viid;
2570
2571
2572
2573
2574
2575
2576
2577 if (pmask == 0)
2578 break;
2579 port_id = ffs(pmask) - 1;
2580 pmask &= ~(1 << port_id);
2581 viid = t4vf_alloc_vi(adapter, port_id);
2582 if (viid < 0) {
2583 dev_err(&pdev->dev, "cannot allocate VI for port %d:"
2584 " err=%d\n", port_id, viid);
2585 err = viid;
2586 goto err_free_dev;
2587 }
2588
2589
2590
2591
2592 netdev = alloc_etherdev_mq(sizeof(struct port_info),
2593 MAX_PORT_QSETS);
2594 if (netdev == NULL) {
2595 t4vf_free_vi(adapter, viid);
2596 err = -ENOMEM;
2597 goto err_free_dev;
2598 }
2599 adapter->port[pidx] = netdev;
2600 SET_NETDEV_DEV(netdev, &pdev->dev);
2601 pi = netdev_priv(netdev);
2602 pi->adapter = adapter;
2603 pi->pidx = pidx;
2604 pi->port_id = port_id;
2605 pi->viid = viid;
2606
2607
2608
2609
2610
2611 pi->xact_addr_filt = -1;
2612 netif_carrier_off(netdev);
2613 netdev->irq = pdev->irq;
2614
2615 netdev->hw_features = NETIF_F_SG | TSO_FLAGS |
2616 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2617 NETIF_F_HW_VLAN_RX | NETIF_F_RXCSUM;
2618 netdev->vlan_features = NETIF_F_SG | TSO_FLAGS |
2619 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2620 NETIF_F_HIGHDMA;
2621 netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_TX;
2622 if (pci_using_dac)
2623 netdev->features |= NETIF_F_HIGHDMA;
2624
2625 netdev->priv_flags |= IFF_UNICAST_FLT;
2626
2627 netdev->netdev_ops = &cxgb4vf_netdev_ops;
2628 SET_ETHTOOL_OPS(netdev, &cxgb4vf_ethtool_ops);
2629
2630
2631
2632
2633 err = t4vf_port_init(adapter, pidx);
2634 if (err) {
2635 dev_err(&pdev->dev, "cannot initialize port %d\n",
2636 pidx);
2637 goto err_free_dev;
2638 }
2639 }
2640
2641
2642
2643
2644
2645
2646
2647 for_each_port(adapter, pidx) {
2648 netdev = adapter->port[pidx];
2649 if (netdev == NULL)
2650 continue;
2651
2652 err = register_netdev(netdev);
2653 if (err) {
2654 dev_warn(&pdev->dev, "cannot register net device %s,"
2655 " skipping\n", netdev->name);
2656 continue;
2657 }
2658
2659 set_bit(pidx, &adapter->registered_device_map);
2660 }
2661 if (adapter->registered_device_map == 0) {
2662 dev_err(&pdev->dev, "could not register any net devices\n");
2663 goto err_free_dev;
2664 }
2665
2666
2667
2668
2669 if (!IS_ERR_OR_NULL(cxgb4vf_debugfs_root)) {
2670 adapter->debugfs_root =
2671 debugfs_create_dir(pci_name(pdev),
2672 cxgb4vf_debugfs_root);
2673 if (IS_ERR_OR_NULL(adapter->debugfs_root))
2674 dev_warn(&pdev->dev, "could not create debugfs"
2675 " directory");
2676 else
2677 setup_debugfs(adapter);
2678 }
2679
2680
2681
2682
2683
2684
2685
2686 if (msi == MSI_MSIX && enable_msix(adapter) == 0)
2687 adapter->flags |= USING_MSIX;
2688 else {
2689 err = pci_enable_msi(pdev);
2690 if (err) {
2691 dev_err(&pdev->dev, "Unable to allocate %s interrupts;"
2692 " err=%d\n",
2693 msi == MSI_MSIX ? "MSI-X or MSI" : "MSI", err);
2694 goto err_free_debugfs;
2695 }
2696 adapter->flags |= USING_MSI;
2697 }
2698
2699
2700
2701
2702
2703
2704 cfg_queues(adapter);
2705
2706
2707
2708
2709
2710 for_each_port(adapter, pidx) {
2711 dev_info(adapter->pdev_dev, "%s: Chelsio VF NIC PCIe %s\n",
2712 adapter->port[pidx]->name,
2713 (adapter->flags & USING_MSIX) ? "MSI-X" :
2714 (adapter->flags & USING_MSI) ? "MSI" : "");
2715 }
2716
2717
2718
2719
2720 return 0;
2721
2722
2723
2724
2725
2726
2727err_free_debugfs:
2728 if (!IS_ERR_OR_NULL(adapter->debugfs_root)) {
2729 cleanup_debugfs(adapter);
2730 debugfs_remove_recursive(adapter->debugfs_root);
2731 }
2732
2733err_free_dev:
2734 for_each_port(adapter, pidx) {
2735 netdev = adapter->port[pidx];
2736 if (netdev == NULL)
2737 continue;
2738 pi = netdev_priv(netdev);
2739 t4vf_free_vi(adapter, pi->viid);
2740 if (test_bit(pidx, &adapter->registered_device_map))
2741 unregister_netdev(netdev);
2742 free_netdev(netdev);
2743 }
2744
2745err_unmap_bar:
2746 iounmap(adapter->regs);
2747
2748err_free_adapter:
2749 kfree(adapter);
2750 pci_set_drvdata(pdev, NULL);
2751
2752err_release_regions:
2753 pci_release_regions(pdev);
2754 pci_set_drvdata(pdev, NULL);
2755 pci_clear_master(pdev);
2756
2757err_disable_device:
2758 pci_disable_device(pdev);
2759
2760 return err;
2761}
2762
2763
2764
2765
2766
2767
2768static void cxgb4vf_pci_remove(struct pci_dev *pdev)
2769{
2770 struct adapter *adapter = pci_get_drvdata(pdev);
2771
2772
2773
2774
2775 if (adapter) {
2776 int pidx;
2777
2778
2779
2780
2781
2782 for_each_port(adapter, pidx)
2783 if (test_bit(pidx, &adapter->registered_device_map))
2784 unregister_netdev(adapter->port[pidx]);
2785 t4vf_sge_stop(adapter);
2786 if (adapter->flags & USING_MSIX) {
2787 pci_disable_msix(adapter->pdev);
2788 adapter->flags &= ~USING_MSIX;
2789 } else if (adapter->flags & USING_MSI) {
2790 pci_disable_msi(adapter->pdev);
2791 adapter->flags &= ~USING_MSI;
2792 }
2793
2794
2795
2796
2797 if (!IS_ERR_OR_NULL(adapter->debugfs_root)) {
2798 cleanup_debugfs(adapter);
2799 debugfs_remove_recursive(adapter->debugfs_root);
2800 }
2801
2802
2803
2804
2805 t4vf_free_sge_resources(adapter);
2806 for_each_port(adapter, pidx) {
2807 struct net_device *netdev = adapter->port[pidx];
2808 struct port_info *pi;
2809
2810 if (netdev == NULL)
2811 continue;
2812
2813 pi = netdev_priv(netdev);
2814 t4vf_free_vi(adapter, pi->viid);
2815 free_netdev(netdev);
2816 }
2817 iounmap(adapter->regs);
2818 kfree(adapter);
2819 pci_set_drvdata(pdev, NULL);
2820 }
2821
2822
2823
2824
2825 pci_disable_device(pdev);
2826 pci_clear_master(pdev);
2827 pci_release_regions(pdev);
2828}
2829
2830
2831
2832
2833
2834static void cxgb4vf_pci_shutdown(struct pci_dev *pdev)
2835{
2836 struct adapter *adapter;
2837 int pidx;
2838
2839 adapter = pci_get_drvdata(pdev);
2840 if (!adapter)
2841 return;
2842
2843
2844
2845
2846
2847
2848 for_each_port(adapter, pidx) {
2849 struct net_device *netdev;
2850 struct port_info *pi;
2851
2852 if (!test_bit(pidx, &adapter->registered_device_map))
2853 continue;
2854
2855 netdev = adapter->port[pidx];
2856 if (!netdev)
2857 continue;
2858
2859 pi = netdev_priv(netdev);
2860 t4vf_enable_vi(adapter, pi->viid, false, false);
2861 }
2862
2863
2864
2865
2866
2867 t4vf_free_sge_resources(adapter);
2868}
2869
2870
2871
2872
2873#define CH_DEVICE(devid, idx) \
2874 { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, PCI_ANY_ID, 0, 0, idx }
2875
2876static struct pci_device_id cxgb4vf_pci_tbl[] = {
2877 CH_DEVICE(0xb000, 0),
2878 CH_DEVICE(0x4800, 0),
2879 CH_DEVICE(0x4801, 0),
2880 CH_DEVICE(0x4802, 0),
2881 CH_DEVICE(0x4803, 0),
2882 CH_DEVICE(0x4804, 0),
2883 CH_DEVICE(0x4805, 0),
2884 CH_DEVICE(0x4806, 0),
2885 CH_DEVICE(0x4807, 0),
2886 CH_DEVICE(0x4808, 0),
2887 CH_DEVICE(0x4809, 0),
2888 CH_DEVICE(0x480a, 0),
2889 CH_DEVICE(0x480d, 0),
2890 CH_DEVICE(0x480e, 0),
2891 { 0, }
2892};
2893
2894MODULE_DESCRIPTION(DRV_DESC);
2895MODULE_AUTHOR("Chelsio Communications");
2896MODULE_LICENSE("Dual BSD/GPL");
2897MODULE_VERSION(DRV_VERSION);
2898MODULE_DEVICE_TABLE(pci, cxgb4vf_pci_tbl);
2899
2900static struct pci_driver cxgb4vf_driver = {
2901 .name = KBUILD_MODNAME,
2902 .id_table = cxgb4vf_pci_tbl,
2903 .probe = cxgb4vf_pci_probe,
2904 .remove = cxgb4vf_pci_remove,
2905 .shutdown = cxgb4vf_pci_shutdown,
2906};
2907
2908
2909
2910
2911static int __init cxgb4vf_module_init(void)
2912{
2913 int ret;
2914
2915
2916
2917
2918 if (msi != MSI_MSIX && msi != MSI_MSI) {
2919 pr_warn("bad module parameter msi=%d; must be %d (MSI-X or MSI) or %d (MSI)\n",
2920 msi, MSI_MSIX, MSI_MSI);
2921 return -EINVAL;
2922 }
2923
2924
2925 cxgb4vf_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL);
2926 if (IS_ERR_OR_NULL(cxgb4vf_debugfs_root))
2927 pr_warn("could not create debugfs entry, continuing\n");
2928
2929 ret = pci_register_driver(&cxgb4vf_driver);
2930 if (ret < 0 && !IS_ERR_OR_NULL(cxgb4vf_debugfs_root))
2931 debugfs_remove(cxgb4vf_debugfs_root);
2932 return ret;
2933}
2934
2935
2936
2937
2938static void __exit cxgb4vf_module_exit(void)
2939{
2940 pci_unregister_driver(&cxgb4vf_driver);
2941 debugfs_remove(cxgb4vf_debugfs_root);
2942}
2943
2944module_init(cxgb4vf_module_init);
2945module_exit(cxgb4vf_module_exit);
2946