linux/drivers/net/can/at91_can.c
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   1/*
   2 * at91_can.c - CAN network driver for AT91 SoC CAN controller
   3 *
   4 * (C) 2007 by Hans J. Koch <hjk@hansjkoch.de>
   5 * (C) 2008, 2009, 2010, 2011 by Marc Kleine-Budde <kernel@pengutronix.de>
   6 *
   7 * This software may be distributed under the terms of the GNU General
   8 * Public License ("GPL") version 2 as distributed in the 'COPYING'
   9 * file from the main directory of the linux kernel source.
  10 *
  11 */
  12
  13#include <linux/clk.h>
  14#include <linux/errno.h>
  15#include <linux/if_arp.h>
  16#include <linux/interrupt.h>
  17#include <linux/kernel.h>
  18#include <linux/module.h>
  19#include <linux/netdevice.h>
  20#include <linux/of.h>
  21#include <linux/platform_device.h>
  22#include <linux/rtnetlink.h>
  23#include <linux/skbuff.h>
  24#include <linux/spinlock.h>
  25#include <linux/string.h>
  26#include <linux/types.h>
  27
  28#include <linux/can/dev.h>
  29#include <linux/can/error.h>
  30#include <linux/can/led.h>
  31
  32#define AT91_MB_MASK(i)         ((1 << (i)) - 1)
  33
  34/* Common registers */
  35enum at91_reg {
  36        AT91_MR         = 0x000,
  37        AT91_IER        = 0x004,
  38        AT91_IDR        = 0x008,
  39        AT91_IMR        = 0x00C,
  40        AT91_SR         = 0x010,
  41        AT91_BR         = 0x014,
  42        AT91_TIM        = 0x018,
  43        AT91_TIMESTP    = 0x01C,
  44        AT91_ECR        = 0x020,
  45        AT91_TCR        = 0x024,
  46        AT91_ACR        = 0x028,
  47};
  48
  49/* Mailbox registers (0 <= i <= 15) */
  50#define AT91_MMR(i)             (enum at91_reg)(0x200 + ((i) * 0x20))
  51#define AT91_MAM(i)             (enum at91_reg)(0x204 + ((i) * 0x20))
  52#define AT91_MID(i)             (enum at91_reg)(0x208 + ((i) * 0x20))
  53#define AT91_MFID(i)            (enum at91_reg)(0x20C + ((i) * 0x20))
  54#define AT91_MSR(i)             (enum at91_reg)(0x210 + ((i) * 0x20))
  55#define AT91_MDL(i)             (enum at91_reg)(0x214 + ((i) * 0x20))
  56#define AT91_MDH(i)             (enum at91_reg)(0x218 + ((i) * 0x20))
  57#define AT91_MCR(i)             (enum at91_reg)(0x21C + ((i) * 0x20))
  58
  59/* Register bits */
  60#define AT91_MR_CANEN           BIT(0)
  61#define AT91_MR_LPM             BIT(1)
  62#define AT91_MR_ABM             BIT(2)
  63#define AT91_MR_OVL             BIT(3)
  64#define AT91_MR_TEOF            BIT(4)
  65#define AT91_MR_TTM             BIT(5)
  66#define AT91_MR_TIMFRZ          BIT(6)
  67#define AT91_MR_DRPT            BIT(7)
  68
  69#define AT91_SR_RBSY            BIT(29)
  70
  71#define AT91_MMR_PRIO_SHIFT     (16)
  72
  73#define AT91_MID_MIDE           BIT(29)
  74
  75#define AT91_MSR_MRTR           BIT(20)
  76#define AT91_MSR_MABT           BIT(22)
  77#define AT91_MSR_MRDY           BIT(23)
  78#define AT91_MSR_MMI            BIT(24)
  79
  80#define AT91_MCR_MRTR           BIT(20)
  81#define AT91_MCR_MTCR           BIT(23)
  82
  83/* Mailbox Modes */
  84enum at91_mb_mode {
  85        AT91_MB_MODE_DISABLED   = 0,
  86        AT91_MB_MODE_RX         = 1,
  87        AT91_MB_MODE_RX_OVRWR   = 2,
  88        AT91_MB_MODE_TX         = 3,
  89        AT91_MB_MODE_CONSUMER   = 4,
  90        AT91_MB_MODE_PRODUCER   = 5,
  91};
  92
  93/* Interrupt mask bits */
  94#define AT91_IRQ_ERRA           (1 << 16)
  95#define AT91_IRQ_WARN           (1 << 17)
  96#define AT91_IRQ_ERRP           (1 << 18)
  97#define AT91_IRQ_BOFF           (1 << 19)
  98#define AT91_IRQ_SLEEP          (1 << 20)
  99#define AT91_IRQ_WAKEUP         (1 << 21)
 100#define AT91_IRQ_TOVF           (1 << 22)
 101#define AT91_IRQ_TSTP           (1 << 23)
 102#define AT91_IRQ_CERR           (1 << 24)
 103#define AT91_IRQ_SERR           (1 << 25)
 104#define AT91_IRQ_AERR           (1 << 26)
 105#define AT91_IRQ_FERR           (1 << 27)
 106#define AT91_IRQ_BERR           (1 << 28)
 107
 108#define AT91_IRQ_ERR_ALL        (0x1fff0000)
 109#define AT91_IRQ_ERR_FRAME      (AT91_IRQ_CERR | AT91_IRQ_SERR | \
 110                                 AT91_IRQ_AERR | AT91_IRQ_FERR | AT91_IRQ_BERR)
 111#define AT91_IRQ_ERR_LINE       (AT91_IRQ_ERRA | AT91_IRQ_WARN | \
 112                                 AT91_IRQ_ERRP | AT91_IRQ_BOFF)
 113
 114#define AT91_IRQ_ALL            (0x1fffffff)
 115
 116enum at91_devtype {
 117        AT91_DEVTYPE_SAM9263,
 118        AT91_DEVTYPE_SAM9X5,
 119};
 120
 121struct at91_devtype_data {
 122        unsigned int rx_first;
 123        unsigned int rx_split;
 124        unsigned int rx_last;
 125        unsigned int tx_shift;
 126        enum at91_devtype type;
 127};
 128
 129struct at91_priv {
 130        struct can_priv can;            /* must be the first member! */
 131        struct napi_struct napi;
 132
 133        void __iomem *reg_base;
 134
 135        u32 reg_sr;
 136        unsigned int tx_next;
 137        unsigned int tx_echo;
 138        unsigned int rx_next;
 139        struct at91_devtype_data devtype_data;
 140
 141        struct clk *clk;
 142        struct at91_can_data *pdata;
 143
 144        canid_t mb0_id;
 145};
 146
 147static const struct at91_devtype_data at91_at91sam9263_data = {
 148        .rx_first = 1,
 149        .rx_split = 8,
 150        .rx_last = 11,
 151        .tx_shift = 2,
 152        .type = AT91_DEVTYPE_SAM9263,
 153};
 154
 155static const struct at91_devtype_data at91_at91sam9x5_data = {
 156        .rx_first = 0,
 157        .rx_split = 4,
 158        .rx_last = 5,
 159        .tx_shift = 1,
 160        .type = AT91_DEVTYPE_SAM9X5,
 161};
 162
 163static const struct can_bittiming_const at91_bittiming_const = {
 164        .name           = KBUILD_MODNAME,
 165        .tseg1_min      = 4,
 166        .tseg1_max      = 16,
 167        .tseg2_min      = 2,
 168        .tseg2_max      = 8,
 169        .sjw_max        = 4,
 170        .brp_min        = 2,
 171        .brp_max        = 128,
 172        .brp_inc        = 1,
 173};
 174
 175#define AT91_IS(_model) \
 176static inline int at91_is_sam##_model(const struct at91_priv *priv) \
 177{ \
 178        return priv->devtype_data.type == AT91_DEVTYPE_SAM##_model; \
 179}
 180
 181AT91_IS(9263);
 182AT91_IS(9X5);
 183
 184static inline unsigned int get_mb_rx_first(const struct at91_priv *priv)
 185{
 186        return priv->devtype_data.rx_first;
 187}
 188
 189static inline unsigned int get_mb_rx_last(const struct at91_priv *priv)
 190{
 191        return priv->devtype_data.rx_last;
 192}
 193
 194static inline unsigned int get_mb_rx_split(const struct at91_priv *priv)
 195{
 196        return priv->devtype_data.rx_split;
 197}
 198
 199static inline unsigned int get_mb_rx_num(const struct at91_priv *priv)
 200{
 201        return get_mb_rx_last(priv) - get_mb_rx_first(priv) + 1;
 202}
 203
 204static inline unsigned int get_mb_rx_low_last(const struct at91_priv *priv)
 205{
 206        return get_mb_rx_split(priv) - 1;
 207}
 208
 209static inline unsigned int get_mb_rx_low_mask(const struct at91_priv *priv)
 210{
 211        return AT91_MB_MASK(get_mb_rx_split(priv)) &
 212                ~AT91_MB_MASK(get_mb_rx_first(priv));
 213}
 214
 215static inline unsigned int get_mb_tx_shift(const struct at91_priv *priv)
 216{
 217        return priv->devtype_data.tx_shift;
 218}
 219
 220static inline unsigned int get_mb_tx_num(const struct at91_priv *priv)
 221{
 222        return 1 << get_mb_tx_shift(priv);
 223}
 224
 225static inline unsigned int get_mb_tx_first(const struct at91_priv *priv)
 226{
 227        return get_mb_rx_last(priv) + 1;
 228}
 229
 230static inline unsigned int get_mb_tx_last(const struct at91_priv *priv)
 231{
 232        return get_mb_tx_first(priv) + get_mb_tx_num(priv) - 1;
 233}
 234
 235static inline unsigned int get_next_prio_shift(const struct at91_priv *priv)
 236{
 237        return get_mb_tx_shift(priv);
 238}
 239
 240static inline unsigned int get_next_prio_mask(const struct at91_priv *priv)
 241{
 242        return 0xf << get_mb_tx_shift(priv);
 243}
 244
 245static inline unsigned int get_next_mb_mask(const struct at91_priv *priv)
 246{
 247        return AT91_MB_MASK(get_mb_tx_shift(priv));
 248}
 249
 250static inline unsigned int get_next_mask(const struct at91_priv *priv)
 251{
 252        return get_next_mb_mask(priv) | get_next_prio_mask(priv);
 253}
 254
 255static inline unsigned int get_irq_mb_rx(const struct at91_priv *priv)
 256{
 257        return AT91_MB_MASK(get_mb_rx_last(priv) + 1) &
 258                ~AT91_MB_MASK(get_mb_rx_first(priv));
 259}
 260
 261static inline unsigned int get_irq_mb_tx(const struct at91_priv *priv)
 262{
 263        return AT91_MB_MASK(get_mb_tx_last(priv) + 1) &
 264                ~AT91_MB_MASK(get_mb_tx_first(priv));
 265}
 266
 267static inline unsigned int get_tx_next_mb(const struct at91_priv *priv)
 268{
 269        return (priv->tx_next & get_next_mb_mask(priv)) + get_mb_tx_first(priv);
 270}
 271
 272static inline unsigned int get_tx_next_prio(const struct at91_priv *priv)
 273{
 274        return (priv->tx_next >> get_next_prio_shift(priv)) & 0xf;
 275}
 276
 277static inline unsigned int get_tx_echo_mb(const struct at91_priv *priv)
 278{
 279        return (priv->tx_echo & get_next_mb_mask(priv)) + get_mb_tx_first(priv);
 280}
 281
 282static inline u32 at91_read(const struct at91_priv *priv, enum at91_reg reg)
 283{
 284        return readl_relaxed(priv->reg_base + reg);
 285}
 286
 287static inline void at91_write(const struct at91_priv *priv, enum at91_reg reg,
 288                u32 value)
 289{
 290        writel_relaxed(value, priv->reg_base + reg);
 291}
 292
 293static inline void set_mb_mode_prio(const struct at91_priv *priv,
 294                unsigned int mb, enum at91_mb_mode mode, int prio)
 295{
 296        at91_write(priv, AT91_MMR(mb), (mode << 24) | (prio << 16));
 297}
 298
 299static inline void set_mb_mode(const struct at91_priv *priv, unsigned int mb,
 300                enum at91_mb_mode mode)
 301{
 302        set_mb_mode_prio(priv, mb, mode, 0);
 303}
 304
 305static inline u32 at91_can_id_to_reg_mid(canid_t can_id)
 306{
 307        u32 reg_mid;
 308
 309        if (can_id & CAN_EFF_FLAG)
 310                reg_mid = (can_id & CAN_EFF_MASK) | AT91_MID_MIDE;
 311        else
 312                reg_mid = (can_id & CAN_SFF_MASK) << 18;
 313
 314        return reg_mid;
 315}
 316
 317static void at91_setup_mailboxes(struct net_device *dev)
 318{
 319        struct at91_priv *priv = netdev_priv(dev);
 320        unsigned int i;
 321        u32 reg_mid;
 322
 323        /*
 324         * Due to a chip bug (errata 50.2.6.3 & 50.3.5.3) the first
 325         * mailbox is disabled. The next 11 mailboxes are used as a
 326         * reception FIFO. The last mailbox is configured with
 327         * overwrite option. The overwrite flag indicates a FIFO
 328         * overflow.
 329         */
 330        reg_mid = at91_can_id_to_reg_mid(priv->mb0_id);
 331        for (i = 0; i < get_mb_rx_first(priv); i++) {
 332                set_mb_mode(priv, i, AT91_MB_MODE_DISABLED);
 333                at91_write(priv, AT91_MID(i), reg_mid);
 334                at91_write(priv, AT91_MCR(i), 0x0);     /* clear dlc */
 335        }
 336
 337        for (i = get_mb_rx_first(priv); i < get_mb_rx_last(priv); i++)
 338                set_mb_mode(priv, i, AT91_MB_MODE_RX);
 339        set_mb_mode(priv, get_mb_rx_last(priv), AT91_MB_MODE_RX_OVRWR);
 340
 341        /* reset acceptance mask and id register */
 342        for (i = get_mb_rx_first(priv); i <= get_mb_rx_last(priv); i++) {
 343                at91_write(priv, AT91_MAM(i), 0x0);
 344                at91_write(priv, AT91_MID(i), AT91_MID_MIDE);
 345        }
 346
 347        /* The last 4 mailboxes are used for transmitting. */
 348        for (i = get_mb_tx_first(priv); i <= get_mb_tx_last(priv); i++)
 349                set_mb_mode_prio(priv, i, AT91_MB_MODE_TX, 0);
 350
 351        /* Reset tx and rx helper pointers */
 352        priv->tx_next = priv->tx_echo = 0;
 353        priv->rx_next = get_mb_rx_first(priv);
 354}
 355
 356static int at91_set_bittiming(struct net_device *dev)
 357{
 358        const struct at91_priv *priv = netdev_priv(dev);
 359        const struct can_bittiming *bt = &priv->can.bittiming;
 360        u32 reg_br;
 361
 362        reg_br = ((priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) ? 1 << 24 : 0) |
 363                ((bt->brp - 1) << 16) | ((bt->sjw - 1) << 12) |
 364                ((bt->prop_seg - 1) << 8) | ((bt->phase_seg1 - 1) << 4) |
 365                ((bt->phase_seg2 - 1) << 0);
 366
 367        netdev_info(dev, "writing AT91_BR: 0x%08x\n", reg_br);
 368
 369        at91_write(priv, AT91_BR, reg_br);
 370
 371        return 0;
 372}
 373
 374static int at91_get_berr_counter(const struct net_device *dev,
 375                struct can_berr_counter *bec)
 376{
 377        const struct at91_priv *priv = netdev_priv(dev);
 378        u32 reg_ecr = at91_read(priv, AT91_ECR);
 379
 380        bec->rxerr = reg_ecr & 0xff;
 381        bec->txerr = reg_ecr >> 16;
 382
 383        return 0;
 384}
 385
 386static void at91_chip_start(struct net_device *dev)
 387{
 388        struct at91_priv *priv = netdev_priv(dev);
 389        u32 reg_mr, reg_ier;
 390
 391        /* disable interrupts */
 392        at91_write(priv, AT91_IDR, AT91_IRQ_ALL);
 393
 394        /* disable chip */
 395        reg_mr = at91_read(priv, AT91_MR);
 396        at91_write(priv, AT91_MR, reg_mr & ~AT91_MR_CANEN);
 397
 398        at91_set_bittiming(dev);
 399        at91_setup_mailboxes(dev);
 400
 401        /* enable chip */
 402        if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
 403                reg_mr = AT91_MR_CANEN | AT91_MR_ABM;
 404        else
 405                reg_mr = AT91_MR_CANEN;
 406        at91_write(priv, AT91_MR, reg_mr);
 407
 408        priv->can.state = CAN_STATE_ERROR_ACTIVE;
 409
 410        /* Enable interrupts */
 411        reg_ier = get_irq_mb_rx(priv) | AT91_IRQ_ERRP | AT91_IRQ_ERR_FRAME;
 412        at91_write(priv, AT91_IDR, AT91_IRQ_ALL);
 413        at91_write(priv, AT91_IER, reg_ier);
 414}
 415
 416static void at91_chip_stop(struct net_device *dev, enum can_state state)
 417{
 418        struct at91_priv *priv = netdev_priv(dev);
 419        u32 reg_mr;
 420
 421        /* disable interrupts */
 422        at91_write(priv, AT91_IDR, AT91_IRQ_ALL);
 423
 424        reg_mr = at91_read(priv, AT91_MR);
 425        at91_write(priv, AT91_MR, reg_mr & ~AT91_MR_CANEN);
 426
 427        priv->can.state = state;
 428}
 429
 430/*
 431 * theory of operation:
 432 *
 433 * According to the datasheet priority 0 is the highest priority, 15
 434 * is the lowest. If two mailboxes have the same priority level the
 435 * message of the mailbox with the lowest number is sent first.
 436 *
 437 * We use the first TX mailbox (AT91_MB_TX_FIRST) with prio 0, then
 438 * the next mailbox with prio 0, and so on, until all mailboxes are
 439 * used. Then we start from the beginning with mailbox
 440 * AT91_MB_TX_FIRST, but with prio 1, mailbox AT91_MB_TX_FIRST + 1
 441 * prio 1. When we reach the last mailbox with prio 15, we have to
 442 * stop sending, waiting for all messages to be delivered, then start
 443 * again with mailbox AT91_MB_TX_FIRST prio 0.
 444 *
 445 * We use the priv->tx_next as counter for the next transmission
 446 * mailbox, but without the offset AT91_MB_TX_FIRST. The lower bits
 447 * encode the mailbox number, the upper 4 bits the mailbox priority:
 448 *
 449 * priv->tx_next = (prio << get_next_prio_shift(priv)) |
 450 *                 (mb - get_mb_tx_first(priv));
 451 *
 452 */
 453static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)
 454{
 455        struct at91_priv *priv = netdev_priv(dev);
 456        struct net_device_stats *stats = &dev->stats;
 457        struct can_frame *cf = (struct can_frame *)skb->data;
 458        unsigned int mb, prio;
 459        u32 reg_mid, reg_mcr;
 460
 461        if (can_dropped_invalid_skb(dev, skb))
 462                return NETDEV_TX_OK;
 463
 464        mb = get_tx_next_mb(priv);
 465        prio = get_tx_next_prio(priv);
 466
 467        if (unlikely(!(at91_read(priv, AT91_MSR(mb)) & AT91_MSR_MRDY))) {
 468                netif_stop_queue(dev);
 469
 470                netdev_err(dev, "BUG! TX buffer full when queue awake!\n");
 471                return NETDEV_TX_BUSY;
 472        }
 473        reg_mid = at91_can_id_to_reg_mid(cf->can_id);
 474        reg_mcr = ((cf->can_id & CAN_RTR_FLAG) ? AT91_MCR_MRTR : 0) |
 475                (cf->can_dlc << 16) | AT91_MCR_MTCR;
 476
 477        /* disable MB while writing ID (see datasheet) */
 478        set_mb_mode(priv, mb, AT91_MB_MODE_DISABLED);
 479        at91_write(priv, AT91_MID(mb), reg_mid);
 480        set_mb_mode_prio(priv, mb, AT91_MB_MODE_TX, prio);
 481
 482        at91_write(priv, AT91_MDL(mb), *(u32 *)(cf->data + 0));
 483        at91_write(priv, AT91_MDH(mb), *(u32 *)(cf->data + 4));
 484
 485        /* This triggers transmission */
 486        at91_write(priv, AT91_MCR(mb), reg_mcr);
 487
 488        stats->tx_bytes += cf->can_dlc;
 489
 490        /* _NOTE_: subtract AT91_MB_TX_FIRST offset from mb! */
 491        can_put_echo_skb(skb, dev, mb - get_mb_tx_first(priv));
 492
 493        /*
 494         * we have to stop the queue and deliver all messages in case
 495         * of a prio+mb counter wrap around. This is the case if
 496         * tx_next buffer prio and mailbox equals 0.
 497         *
 498         * also stop the queue if next buffer is still in use
 499         * (== not ready)
 500         */
 501        priv->tx_next++;
 502        if (!(at91_read(priv, AT91_MSR(get_tx_next_mb(priv))) &
 503              AT91_MSR_MRDY) ||
 504            (priv->tx_next & get_next_mask(priv)) == 0)
 505                netif_stop_queue(dev);
 506
 507        /* Enable interrupt for this mailbox */
 508        at91_write(priv, AT91_IER, 1 << mb);
 509
 510        return NETDEV_TX_OK;
 511}
 512
 513/**
 514 * at91_activate_rx_low - activate lower rx mailboxes
 515 * @priv: a91 context
 516 *
 517 * Reenables the lower mailboxes for reception of new CAN messages
 518 */
 519static inline void at91_activate_rx_low(const struct at91_priv *priv)
 520{
 521        u32 mask = get_mb_rx_low_mask(priv);
 522        at91_write(priv, AT91_TCR, mask);
 523}
 524
 525/**
 526 * at91_activate_rx_mb - reactive single rx mailbox
 527 * @priv: a91 context
 528 * @mb: mailbox to reactivate
 529 *
 530 * Reenables given mailbox for reception of new CAN messages
 531 */
 532static inline void at91_activate_rx_mb(const struct at91_priv *priv,
 533                unsigned int mb)
 534{
 535        u32 mask = 1 << mb;
 536        at91_write(priv, AT91_TCR, mask);
 537}
 538
 539/**
 540 * at91_rx_overflow_err - send error frame due to rx overflow
 541 * @dev: net device
 542 */
 543static void at91_rx_overflow_err(struct net_device *dev)
 544{
 545        struct net_device_stats *stats = &dev->stats;
 546        struct sk_buff *skb;
 547        struct can_frame *cf;
 548
 549        netdev_dbg(dev, "RX buffer overflow\n");
 550        stats->rx_over_errors++;
 551        stats->rx_errors++;
 552
 553        skb = alloc_can_err_skb(dev, &cf);
 554        if (unlikely(!skb))
 555                return;
 556
 557        cf->can_id |= CAN_ERR_CRTL;
 558        cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
 559
 560        stats->rx_packets++;
 561        stats->rx_bytes += cf->can_dlc;
 562        netif_receive_skb(skb);
 563}
 564
 565/**
 566 * at91_read_mb - read CAN msg from mailbox (lowlevel impl)
 567 * @dev: net device
 568 * @mb: mailbox number to read from
 569 * @cf: can frame where to store message
 570 *
 571 * Reads a CAN message from the given mailbox and stores data into
 572 * given can frame. "mb" and "cf" must be valid.
 573 */
 574static void at91_read_mb(struct net_device *dev, unsigned int mb,
 575                struct can_frame *cf)
 576{
 577        const struct at91_priv *priv = netdev_priv(dev);
 578        u32 reg_msr, reg_mid;
 579
 580        reg_mid = at91_read(priv, AT91_MID(mb));
 581        if (reg_mid & AT91_MID_MIDE)
 582                cf->can_id = ((reg_mid >> 0) & CAN_EFF_MASK) | CAN_EFF_FLAG;
 583        else
 584                cf->can_id = (reg_mid >> 18) & CAN_SFF_MASK;
 585
 586        reg_msr = at91_read(priv, AT91_MSR(mb));
 587        cf->can_dlc = get_can_dlc((reg_msr >> 16) & 0xf);
 588
 589        if (reg_msr & AT91_MSR_MRTR)
 590                cf->can_id |= CAN_RTR_FLAG;
 591        else {
 592                *(u32 *)(cf->data + 0) = at91_read(priv, AT91_MDL(mb));
 593                *(u32 *)(cf->data + 4) = at91_read(priv, AT91_MDH(mb));
 594        }
 595
 596        /* allow RX of extended frames */
 597        at91_write(priv, AT91_MID(mb), AT91_MID_MIDE);
 598
 599        if (unlikely(mb == get_mb_rx_last(priv) && reg_msr & AT91_MSR_MMI))
 600                at91_rx_overflow_err(dev);
 601}
 602
 603/**
 604 * at91_read_msg - read CAN message from mailbox
 605 * @dev: net device
 606 * @mb: mail box to read from
 607 *
 608 * Reads a CAN message from given mailbox, and put into linux network
 609 * RX queue, does all housekeeping chores (stats, ...)
 610 */
 611static void at91_read_msg(struct net_device *dev, unsigned int mb)
 612{
 613        struct net_device_stats *stats = &dev->stats;
 614        struct can_frame *cf;
 615        struct sk_buff *skb;
 616
 617        skb = alloc_can_skb(dev, &cf);
 618        if (unlikely(!skb)) {
 619                stats->rx_dropped++;
 620                return;
 621        }
 622
 623        at91_read_mb(dev, mb, cf);
 624
 625        stats->rx_packets++;
 626        stats->rx_bytes += cf->can_dlc;
 627        netif_receive_skb(skb);
 628
 629        can_led_event(dev, CAN_LED_EVENT_RX);
 630}
 631
 632/**
 633 * at91_poll_rx - read multiple CAN messages from mailboxes
 634 * @dev: net device
 635 * @quota: max number of pkgs we're allowed to receive
 636 *
 637 * Theory of Operation:
 638 *
 639 * About 3/4 of the mailboxes (get_mb_rx_first()...get_mb_rx_last())
 640 * on the chip are reserved for RX. We split them into 2 groups. The
 641 * lower group ranges from get_mb_rx_first() to get_mb_rx_low_last().
 642 *
 643 * Like it or not, but the chip always saves a received CAN message
 644 * into the first free mailbox it finds (starting with the
 645 * lowest). This makes it very difficult to read the messages in the
 646 * right order from the chip. This is how we work around that problem:
 647 *
 648 * The first message goes into mb nr. 1 and issues an interrupt. All
 649 * rx ints are disabled in the interrupt handler and a napi poll is
 650 * scheduled. We read the mailbox, but do _not_ reenable the mb (to
 651 * receive another message).
 652 *
 653 *    lower mbxs      upper
 654 *     ____^______    __^__
 655 *    /           \  /     \
 656 * +-+-+-+-+-+-+-+-++-+-+-+-+
 657 * | |x|x|x|x|x|x|x|| | | | |
 658 * +-+-+-+-+-+-+-+-++-+-+-+-+
 659 *  0 0 0 0 0 0  0 0 0 0 1 1  \ mail
 660 *  0 1 2 3 4 5  6 7 8 9 0 1  / box
 661 *  ^
 662 *  |
 663 *   \
 664 *     unused, due to chip bug
 665 *
 666 * The variable priv->rx_next points to the next mailbox to read a
 667 * message from. As long we're in the lower mailboxes we just read the
 668 * mailbox but not reenable it.
 669 *
 670 * With completion of the last of the lower mailboxes, we reenable the
 671 * whole first group, but continue to look for filled mailboxes in the
 672 * upper mailboxes. Imagine the second group like overflow mailboxes,
 673 * which takes CAN messages if the lower goup is full. While in the
 674 * upper group we reenable the mailbox right after reading it. Giving
 675 * the chip more room to store messages.
 676 *
 677 * After finishing we look again in the lower group if we've still
 678 * quota.
 679 *
 680 */
 681static int at91_poll_rx(struct net_device *dev, int quota)
 682{
 683        struct at91_priv *priv = netdev_priv(dev);
 684        u32 reg_sr = at91_read(priv, AT91_SR);
 685        const unsigned long *addr = (unsigned long *)&reg_sr;
 686        unsigned int mb;
 687        int received = 0;
 688
 689        if (priv->rx_next > get_mb_rx_low_last(priv) &&
 690            reg_sr & get_mb_rx_low_mask(priv))
 691                netdev_info(dev,
 692                        "order of incoming frames cannot be guaranteed\n");
 693
 694 again:
 695        for (mb = find_next_bit(addr, get_mb_tx_first(priv), priv->rx_next);
 696             mb < get_mb_tx_first(priv) && quota > 0;
 697             reg_sr = at91_read(priv, AT91_SR),
 698             mb = find_next_bit(addr, get_mb_tx_first(priv), ++priv->rx_next)) {
 699                at91_read_msg(dev, mb);
 700
 701                /* reactivate mailboxes */
 702                if (mb == get_mb_rx_low_last(priv))
 703                        /* all lower mailboxed, if just finished it */
 704                        at91_activate_rx_low(priv);
 705                else if (mb > get_mb_rx_low_last(priv))
 706                        /* only the mailbox we read */
 707                        at91_activate_rx_mb(priv, mb);
 708
 709                received++;
 710                quota--;
 711        }
 712
 713        /* upper group completed, look again in lower */
 714        if (priv->rx_next > get_mb_rx_low_last(priv) &&
 715            mb > get_mb_rx_last(priv)) {
 716                priv->rx_next = get_mb_rx_first(priv);
 717                if (quota > 0)
 718                        goto again;
 719        }
 720
 721        return received;
 722}
 723
 724static void at91_poll_err_frame(struct net_device *dev,
 725                struct can_frame *cf, u32 reg_sr)
 726{
 727        struct at91_priv *priv = netdev_priv(dev);
 728
 729        /* CRC error */
 730        if (reg_sr & AT91_IRQ_CERR) {
 731                netdev_dbg(dev, "CERR irq\n");
 732                dev->stats.rx_errors++;
 733                priv->can.can_stats.bus_error++;
 734                cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
 735        }
 736
 737        /* Stuffing Error */
 738        if (reg_sr & AT91_IRQ_SERR) {
 739                netdev_dbg(dev, "SERR irq\n");
 740                dev->stats.rx_errors++;
 741                priv->can.can_stats.bus_error++;
 742                cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
 743                cf->data[2] |= CAN_ERR_PROT_STUFF;
 744        }
 745
 746        /* Acknowledgement Error */
 747        if (reg_sr & AT91_IRQ_AERR) {
 748                netdev_dbg(dev, "AERR irq\n");
 749                dev->stats.tx_errors++;
 750                cf->can_id |= CAN_ERR_ACK;
 751        }
 752
 753        /* Form error */
 754        if (reg_sr & AT91_IRQ_FERR) {
 755                netdev_dbg(dev, "FERR irq\n");
 756                dev->stats.rx_errors++;
 757                priv->can.can_stats.bus_error++;
 758                cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
 759                cf->data[2] |= CAN_ERR_PROT_FORM;
 760        }
 761
 762        /* Bit Error */
 763        if (reg_sr & AT91_IRQ_BERR) {
 764                netdev_dbg(dev, "BERR irq\n");
 765                dev->stats.tx_errors++;
 766                priv->can.can_stats.bus_error++;
 767                cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
 768                cf->data[2] |= CAN_ERR_PROT_BIT;
 769        }
 770}
 771
 772static int at91_poll_err(struct net_device *dev, int quota, u32 reg_sr)
 773{
 774        struct sk_buff *skb;
 775        struct can_frame *cf;
 776
 777        if (quota == 0)
 778                return 0;
 779
 780        skb = alloc_can_err_skb(dev, &cf);
 781        if (unlikely(!skb))
 782                return 0;
 783
 784        at91_poll_err_frame(dev, cf, reg_sr);
 785
 786        dev->stats.rx_packets++;
 787        dev->stats.rx_bytes += cf->can_dlc;
 788        netif_receive_skb(skb);
 789
 790        return 1;
 791}
 792
 793static int at91_poll(struct napi_struct *napi, int quota)
 794{
 795        struct net_device *dev = napi->dev;
 796        const struct at91_priv *priv = netdev_priv(dev);
 797        u32 reg_sr = at91_read(priv, AT91_SR);
 798        int work_done = 0;
 799
 800        if (reg_sr & get_irq_mb_rx(priv))
 801                work_done += at91_poll_rx(dev, quota - work_done);
 802
 803        /*
 804         * The error bits are clear on read,
 805         * so use saved value from irq handler.
 806         */
 807        reg_sr |= priv->reg_sr;
 808        if (reg_sr & AT91_IRQ_ERR_FRAME)
 809                work_done += at91_poll_err(dev, quota - work_done, reg_sr);
 810
 811        if (work_done < quota) {
 812                /* enable IRQs for frame errors and all mailboxes >= rx_next */
 813                u32 reg_ier = AT91_IRQ_ERR_FRAME;
 814                reg_ier |= get_irq_mb_rx(priv) & ~AT91_MB_MASK(priv->rx_next);
 815
 816                napi_complete(napi);
 817                at91_write(priv, AT91_IER, reg_ier);
 818        }
 819
 820        return work_done;
 821}
 822
 823/*
 824 * theory of operation:
 825 *
 826 * priv->tx_echo holds the number of the oldest can_frame put for
 827 * transmission into the hardware, but not yet ACKed by the CAN tx
 828 * complete IRQ.
 829 *
 830 * We iterate from priv->tx_echo to priv->tx_next and check if the
 831 * packet has been transmitted, echo it back to the CAN framework. If
 832 * we discover a not yet transmitted package, stop looking for more.
 833 *
 834 */
 835static void at91_irq_tx(struct net_device *dev, u32 reg_sr)
 836{
 837        struct at91_priv *priv = netdev_priv(dev);
 838        u32 reg_msr;
 839        unsigned int mb;
 840
 841        /* masking of reg_sr not needed, already done by at91_irq */
 842
 843        for (/* nix */; (priv->tx_next - priv->tx_echo) > 0; priv->tx_echo++) {
 844                mb = get_tx_echo_mb(priv);
 845
 846                /* no event in mailbox? */
 847                if (!(reg_sr & (1 << mb)))
 848                        break;
 849
 850                /* Disable irq for this TX mailbox */
 851                at91_write(priv, AT91_IDR, 1 << mb);
 852
 853                /*
 854                 * only echo if mailbox signals us a transfer
 855                 * complete (MSR_MRDY). Otherwise it's a tansfer
 856                 * abort. "can_bus_off()" takes care about the skbs
 857                 * parked in the echo queue.
 858                 */
 859                reg_msr = at91_read(priv, AT91_MSR(mb));
 860                if (likely(reg_msr & AT91_MSR_MRDY &&
 861                           ~reg_msr & AT91_MSR_MABT)) {
 862                        /* _NOTE_: subtract AT91_MB_TX_FIRST offset from mb! */
 863                        can_get_echo_skb(dev, mb - get_mb_tx_first(priv));
 864                        dev->stats.tx_packets++;
 865                        can_led_event(dev, CAN_LED_EVENT_TX);
 866                }
 867        }
 868
 869        /*
 870         * restart queue if we don't have a wrap around but restart if
 871         * we get a TX int for the last can frame directly before a
 872         * wrap around.
 873         */
 874        if ((priv->tx_next & get_next_mask(priv)) != 0 ||
 875            (priv->tx_echo & get_next_mask(priv)) == 0)
 876                netif_wake_queue(dev);
 877}
 878
 879static void at91_irq_err_state(struct net_device *dev,
 880                struct can_frame *cf, enum can_state new_state)
 881{
 882        struct at91_priv *priv = netdev_priv(dev);
 883        u32 reg_idr = 0, reg_ier = 0;
 884        struct can_berr_counter bec;
 885
 886        at91_get_berr_counter(dev, &bec);
 887
 888        switch (priv->can.state) {
 889        case CAN_STATE_ERROR_ACTIVE:
 890                /*
 891                 * from: ERROR_ACTIVE
 892                 * to  : ERROR_WARNING, ERROR_PASSIVE, BUS_OFF
 893                 * =>  : there was a warning int
 894                 */
 895                if (new_state >= CAN_STATE_ERROR_WARNING &&
 896                    new_state <= CAN_STATE_BUS_OFF) {
 897                        netdev_dbg(dev, "Error Warning IRQ\n");
 898                        priv->can.can_stats.error_warning++;
 899
 900                        cf->can_id |= CAN_ERR_CRTL;
 901                        cf->data[1] = (bec.txerr > bec.rxerr) ?
 902                                CAN_ERR_CRTL_TX_WARNING :
 903                                CAN_ERR_CRTL_RX_WARNING;
 904                }
 905        case CAN_STATE_ERROR_WARNING:   /* fallthrough */
 906                /*
 907                 * from: ERROR_ACTIVE, ERROR_WARNING
 908                 * to  : ERROR_PASSIVE, BUS_OFF
 909                 * =>  : error passive int
 910                 */
 911                if (new_state >= CAN_STATE_ERROR_PASSIVE &&
 912                    new_state <= CAN_STATE_BUS_OFF) {
 913                        netdev_dbg(dev, "Error Passive IRQ\n");
 914                        priv->can.can_stats.error_passive++;
 915
 916                        cf->can_id |= CAN_ERR_CRTL;
 917                        cf->data[1] = (bec.txerr > bec.rxerr) ?
 918                                CAN_ERR_CRTL_TX_PASSIVE :
 919                                CAN_ERR_CRTL_RX_PASSIVE;
 920                }
 921                break;
 922        case CAN_STATE_BUS_OFF:
 923                /*
 924                 * from: BUS_OFF
 925                 * to  : ERROR_ACTIVE, ERROR_WARNING, ERROR_PASSIVE
 926                 */
 927                if (new_state <= CAN_STATE_ERROR_PASSIVE) {
 928                        cf->can_id |= CAN_ERR_RESTARTED;
 929
 930                        netdev_dbg(dev, "restarted\n");
 931                        priv->can.can_stats.restarts++;
 932
 933                        netif_carrier_on(dev);
 934                        netif_wake_queue(dev);
 935                }
 936                break;
 937        default:
 938                break;
 939        }
 940
 941
 942        /* process state changes depending on the new state */
 943        switch (new_state) {
 944        case CAN_STATE_ERROR_ACTIVE:
 945                /*
 946                 * actually we want to enable AT91_IRQ_WARN here, but
 947                 * it screws up the system under certain
 948                 * circumstances. so just enable AT91_IRQ_ERRP, thus
 949                 * the "fallthrough"
 950                 */
 951                netdev_dbg(dev, "Error Active\n");
 952                cf->can_id |= CAN_ERR_PROT;
 953                cf->data[2] = CAN_ERR_PROT_ACTIVE;
 954        case CAN_STATE_ERROR_WARNING:   /* fallthrough */
 955                reg_idr = AT91_IRQ_ERRA | AT91_IRQ_WARN | AT91_IRQ_BOFF;
 956                reg_ier = AT91_IRQ_ERRP;
 957                break;
 958        case CAN_STATE_ERROR_PASSIVE:
 959                reg_idr = AT91_IRQ_ERRA | AT91_IRQ_WARN | AT91_IRQ_ERRP;
 960                reg_ier = AT91_IRQ_BOFF;
 961                break;
 962        case CAN_STATE_BUS_OFF:
 963                reg_idr = AT91_IRQ_ERRA | AT91_IRQ_ERRP |
 964                        AT91_IRQ_WARN | AT91_IRQ_BOFF;
 965                reg_ier = 0;
 966
 967                cf->can_id |= CAN_ERR_BUSOFF;
 968
 969                netdev_dbg(dev, "bus-off\n");
 970                netif_carrier_off(dev);
 971                priv->can.can_stats.bus_off++;
 972
 973                /* turn off chip, if restart is disabled */
 974                if (!priv->can.restart_ms) {
 975                        at91_chip_stop(dev, CAN_STATE_BUS_OFF);
 976                        return;
 977                }
 978                break;
 979        default:
 980                break;
 981        }
 982
 983        at91_write(priv, AT91_IDR, reg_idr);
 984        at91_write(priv, AT91_IER, reg_ier);
 985}
 986
 987static int at91_get_state_by_bec(const struct net_device *dev,
 988                enum can_state *state)
 989{
 990        struct can_berr_counter bec;
 991        int err;
 992
 993        err = at91_get_berr_counter(dev, &bec);
 994        if (err)
 995                return err;
 996
 997        if (bec.txerr < 96 && bec.rxerr < 96)
 998                *state = CAN_STATE_ERROR_ACTIVE;
 999        else if (bec.txerr < 128 && bec.rxerr < 128)
1000                *state = CAN_STATE_ERROR_WARNING;
1001        else if (bec.txerr < 256 && bec.rxerr < 256)
1002                *state = CAN_STATE_ERROR_PASSIVE;
1003        else
1004                *state = CAN_STATE_BUS_OFF;
1005
1006        return 0;
1007}
1008
1009
1010static void at91_irq_err(struct net_device *dev)
1011{
1012        struct at91_priv *priv = netdev_priv(dev);
1013        struct sk_buff *skb;
1014        struct can_frame *cf;
1015        enum can_state new_state;
1016        u32 reg_sr;
1017        int err;
1018
1019        if (at91_is_sam9263(priv)) {
1020                reg_sr = at91_read(priv, AT91_SR);
1021
1022                /* we need to look at the unmasked reg_sr */
1023                if (unlikely(reg_sr & AT91_IRQ_BOFF))
1024                        new_state = CAN_STATE_BUS_OFF;
1025                else if (unlikely(reg_sr & AT91_IRQ_ERRP))
1026                        new_state = CAN_STATE_ERROR_PASSIVE;
1027                else if (unlikely(reg_sr & AT91_IRQ_WARN))
1028                        new_state = CAN_STATE_ERROR_WARNING;
1029                else if (likely(reg_sr & AT91_IRQ_ERRA))
1030                        new_state = CAN_STATE_ERROR_ACTIVE;
1031                else {
1032                        netdev_err(dev, "BUG! hardware in undefined state\n");
1033                        return;
1034                }
1035        } else {
1036                err = at91_get_state_by_bec(dev, &new_state);
1037                if (err)
1038                        return;
1039        }
1040
1041        /* state hasn't changed */
1042        if (likely(new_state == priv->can.state))
1043                return;
1044
1045        skb = alloc_can_err_skb(dev, &cf);
1046        if (unlikely(!skb))
1047                return;
1048
1049        at91_irq_err_state(dev, cf, new_state);
1050
1051        dev->stats.rx_packets++;
1052        dev->stats.rx_bytes += cf->can_dlc;
1053        netif_rx(skb);
1054
1055        priv->can.state = new_state;
1056}
1057
1058/*
1059 * interrupt handler
1060 */
1061static irqreturn_t at91_irq(int irq, void *dev_id)
1062{
1063        struct net_device *dev = dev_id;
1064        struct at91_priv *priv = netdev_priv(dev);
1065        irqreturn_t handled = IRQ_NONE;
1066        u32 reg_sr, reg_imr;
1067
1068        reg_sr = at91_read(priv, AT91_SR);
1069        reg_imr = at91_read(priv, AT91_IMR);
1070
1071        /* Ignore masked interrupts */
1072        reg_sr &= reg_imr;
1073        if (!reg_sr)
1074                goto exit;
1075
1076        handled = IRQ_HANDLED;
1077
1078        /* Receive or error interrupt? -> napi */
1079        if (reg_sr & (get_irq_mb_rx(priv) | AT91_IRQ_ERR_FRAME)) {
1080                /*
1081                 * The error bits are clear on read,
1082                 * save for later use.
1083                 */
1084                priv->reg_sr = reg_sr;
1085                at91_write(priv, AT91_IDR,
1086                           get_irq_mb_rx(priv) | AT91_IRQ_ERR_FRAME);
1087                napi_schedule(&priv->napi);
1088        }
1089
1090        /* Transmission complete interrupt */
1091        if (reg_sr & get_irq_mb_tx(priv))
1092                at91_irq_tx(dev, reg_sr);
1093
1094        at91_irq_err(dev);
1095
1096 exit:
1097        return handled;
1098}
1099
1100static int at91_open(struct net_device *dev)
1101{
1102        struct at91_priv *priv = netdev_priv(dev);
1103        int err;
1104
1105        err = clk_prepare_enable(priv->clk);
1106        if (err)
1107                return err;
1108
1109        /* check or determine and set bittime */
1110        err = open_candev(dev);
1111        if (err)
1112                goto out;
1113
1114        /* register interrupt handler */
1115        if (request_irq(dev->irq, at91_irq, IRQF_SHARED,
1116                        dev->name, dev)) {
1117                err = -EAGAIN;
1118                goto out_close;
1119        }
1120
1121        can_led_event(dev, CAN_LED_EVENT_OPEN);
1122
1123        /* start chip and queuing */
1124        at91_chip_start(dev);
1125        napi_enable(&priv->napi);
1126        netif_start_queue(dev);
1127
1128        return 0;
1129
1130 out_close:
1131        close_candev(dev);
1132 out:
1133        clk_disable_unprepare(priv->clk);
1134
1135        return err;
1136}
1137
1138/*
1139 * stop CAN bus activity
1140 */
1141static int at91_close(struct net_device *dev)
1142{
1143        struct at91_priv *priv = netdev_priv(dev);
1144
1145        netif_stop_queue(dev);
1146        napi_disable(&priv->napi);
1147        at91_chip_stop(dev, CAN_STATE_STOPPED);
1148
1149        free_irq(dev->irq, dev);
1150        clk_disable_unprepare(priv->clk);
1151
1152        close_candev(dev);
1153
1154        can_led_event(dev, CAN_LED_EVENT_STOP);
1155
1156        return 0;
1157}
1158
1159static int at91_set_mode(struct net_device *dev, enum can_mode mode)
1160{
1161        switch (mode) {
1162        case CAN_MODE_START:
1163                at91_chip_start(dev);
1164                netif_wake_queue(dev);
1165                break;
1166
1167        default:
1168                return -EOPNOTSUPP;
1169        }
1170
1171        return 0;
1172}
1173
1174static const struct net_device_ops at91_netdev_ops = {
1175        .ndo_open       = at91_open,
1176        .ndo_stop       = at91_close,
1177        .ndo_start_xmit = at91_start_xmit,
1178        .ndo_change_mtu = can_change_mtu,
1179};
1180
1181static ssize_t at91_sysfs_show_mb0_id(struct device *dev,
1182                struct device_attribute *attr, char *buf)
1183{
1184        struct at91_priv *priv = netdev_priv(to_net_dev(dev));
1185
1186        if (priv->mb0_id & CAN_EFF_FLAG)
1187                return snprintf(buf, PAGE_SIZE, "0x%08x\n", priv->mb0_id);
1188        else
1189                return snprintf(buf, PAGE_SIZE, "0x%03x\n", priv->mb0_id);
1190}
1191
1192static ssize_t at91_sysfs_set_mb0_id(struct device *dev,
1193                struct device_attribute *attr, const char *buf, size_t count)
1194{
1195        struct net_device *ndev = to_net_dev(dev);
1196        struct at91_priv *priv = netdev_priv(ndev);
1197        unsigned long can_id;
1198        ssize_t ret;
1199        int err;
1200
1201        rtnl_lock();
1202
1203        if (ndev->flags & IFF_UP) {
1204                ret = -EBUSY;
1205                goto out;
1206        }
1207
1208        err = kstrtoul(buf, 0, &can_id);
1209        if (err) {
1210                ret = err;
1211                goto out;
1212        }
1213
1214        if (can_id & CAN_EFF_FLAG)
1215                can_id &= CAN_EFF_MASK | CAN_EFF_FLAG;
1216        else
1217                can_id &= CAN_SFF_MASK;
1218
1219        priv->mb0_id = can_id;
1220        ret = count;
1221
1222 out:
1223        rtnl_unlock();
1224        return ret;
1225}
1226
1227static DEVICE_ATTR(mb0_id, S_IWUSR | S_IRUGO,
1228        at91_sysfs_show_mb0_id, at91_sysfs_set_mb0_id);
1229
1230static struct attribute *at91_sysfs_attrs[] = {
1231        &dev_attr_mb0_id.attr,
1232        NULL,
1233};
1234
1235static struct attribute_group at91_sysfs_attr_group = {
1236        .attrs = at91_sysfs_attrs,
1237};
1238
1239#if defined(CONFIG_OF)
1240static const struct of_device_id at91_can_dt_ids[] = {
1241        {
1242                .compatible = "atmel,at91sam9x5-can",
1243                .data = &at91_at91sam9x5_data,
1244        }, {
1245                .compatible = "atmel,at91sam9263-can",
1246                .data = &at91_at91sam9263_data,
1247        }, {
1248                /* sentinel */
1249        }
1250};
1251MODULE_DEVICE_TABLE(of, at91_can_dt_ids);
1252#endif
1253
1254static const struct at91_devtype_data *at91_can_get_driver_data(struct platform_device *pdev)
1255{
1256        if (pdev->dev.of_node) {
1257                const struct of_device_id *match;
1258
1259                match = of_match_node(at91_can_dt_ids, pdev->dev.of_node);
1260                if (!match) {
1261                        dev_err(&pdev->dev, "no matching node found in dtb\n");
1262                        return NULL;
1263                }
1264                return (const struct at91_devtype_data *)match->data;
1265        }
1266        return (const struct at91_devtype_data *)
1267                platform_get_device_id(pdev)->driver_data;
1268}
1269
1270static int at91_can_probe(struct platform_device *pdev)
1271{
1272        const struct at91_devtype_data *devtype_data;
1273        struct net_device *dev;
1274        struct at91_priv *priv;
1275        struct resource *res;
1276        struct clk *clk;
1277        void __iomem *addr;
1278        int err, irq;
1279
1280        devtype_data = at91_can_get_driver_data(pdev);
1281        if (!devtype_data) {
1282                dev_err(&pdev->dev, "no driver data\n");
1283                err = -ENODEV;
1284                goto exit;
1285        }
1286
1287        clk = clk_get(&pdev->dev, "can_clk");
1288        if (IS_ERR(clk)) {
1289                dev_err(&pdev->dev, "no clock defined\n");
1290                err = -ENODEV;
1291                goto exit;
1292        }
1293
1294        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1295        irq = platform_get_irq(pdev, 0);
1296        if (!res || irq <= 0) {
1297                err = -ENODEV;
1298                goto exit_put;
1299        }
1300
1301        if (!request_mem_region(res->start,
1302                                resource_size(res),
1303                                pdev->name)) {
1304                err = -EBUSY;
1305                goto exit_put;
1306        }
1307
1308        addr = ioremap_nocache(res->start, resource_size(res));
1309        if (!addr) {
1310                err = -ENOMEM;
1311                goto exit_release;
1312        }
1313
1314        dev = alloc_candev(sizeof(struct at91_priv),
1315                           1 << devtype_data->tx_shift);
1316        if (!dev) {
1317                err = -ENOMEM;
1318                goto exit_iounmap;
1319        }
1320
1321        dev->netdev_ops = &at91_netdev_ops;
1322        dev->irq = irq;
1323        dev->flags |= IFF_ECHO;
1324
1325        priv = netdev_priv(dev);
1326        priv->can.clock.freq = clk_get_rate(clk);
1327        priv->can.bittiming_const = &at91_bittiming_const;
1328        priv->can.do_set_mode = at91_set_mode;
1329        priv->can.do_get_berr_counter = at91_get_berr_counter;
1330        priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES |
1331                CAN_CTRLMODE_LISTENONLY;
1332        priv->reg_base = addr;
1333        priv->devtype_data = *devtype_data;
1334        priv->clk = clk;
1335        priv->pdata = dev_get_platdata(&pdev->dev);
1336        priv->mb0_id = 0x7ff;
1337
1338        netif_napi_add(dev, &priv->napi, at91_poll, get_mb_rx_num(priv));
1339
1340        if (at91_is_sam9263(priv))
1341                dev->sysfs_groups[0] = &at91_sysfs_attr_group;
1342
1343        platform_set_drvdata(pdev, dev);
1344        SET_NETDEV_DEV(dev, &pdev->dev);
1345
1346        err = register_candev(dev);
1347        if (err) {
1348                dev_err(&pdev->dev, "registering netdev failed\n");
1349                goto exit_free;
1350        }
1351
1352        devm_can_led_init(dev);
1353
1354        dev_info(&pdev->dev, "device registered (reg_base=%p, irq=%d)\n",
1355                 priv->reg_base, dev->irq);
1356
1357        return 0;
1358
1359 exit_free:
1360        free_candev(dev);
1361 exit_iounmap:
1362        iounmap(addr);
1363 exit_release:
1364        release_mem_region(res->start, resource_size(res));
1365 exit_put:
1366        clk_put(clk);
1367 exit:
1368        return err;
1369}
1370
1371static int at91_can_remove(struct platform_device *pdev)
1372{
1373        struct net_device *dev = platform_get_drvdata(pdev);
1374        struct at91_priv *priv = netdev_priv(dev);
1375        struct resource *res;
1376
1377        unregister_netdev(dev);
1378
1379        iounmap(priv->reg_base);
1380
1381        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1382        release_mem_region(res->start, resource_size(res));
1383
1384        clk_put(priv->clk);
1385
1386        free_candev(dev);
1387
1388        return 0;
1389}
1390
1391static const struct platform_device_id at91_can_id_table[] = {
1392        {
1393                .name = "at91sam9x5_can",
1394                .driver_data = (kernel_ulong_t)&at91_at91sam9x5_data,
1395        }, {
1396                .name = "at91_can",
1397                .driver_data = (kernel_ulong_t)&at91_at91sam9263_data,
1398        }, {
1399                /* sentinel */
1400        }
1401};
1402MODULE_DEVICE_TABLE(platform, at91_can_id_table);
1403
1404static struct platform_driver at91_can_driver = {
1405        .probe = at91_can_probe,
1406        .remove = at91_can_remove,
1407        .driver = {
1408                .name = KBUILD_MODNAME,
1409                .of_match_table = of_match_ptr(at91_can_dt_ids),
1410        },
1411        .id_table = at91_can_id_table,
1412};
1413
1414module_platform_driver(at91_can_driver);
1415
1416MODULE_AUTHOR("Marc Kleine-Budde <mkl@pengutronix.de>");
1417MODULE_LICENSE("GPL v2");
1418MODULE_DESCRIPTION(KBUILD_MODNAME " CAN netdevice driver");
1419
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