LXR linux/drivers/mtd/nand/ams-delta.c

   1/*
   2 *  drivers/mtd/nand/ams-delta.c
   3 *
   4 *  Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
   5 *
   6 *  Derived from drivers/mtd/toto.c
   7 *  Converted to platform driver by Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
   8 *  Partially stolen from drivers/mtd/nand/plat_nand.c
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License version 2 as
  12 * published by the Free Software Foundation.
  13 *
  14 *  Overview:
  15 *   This is a device driver for the NAND flash device found on the
  16 *   Amstrad E3 (Delta).
  17 */
  18
  19#include <linux/slab.h>
  20#include <linux/init.h>
  21#include <linux/module.h>
  22#include <linux/delay.h>
  23#include <linux/mtd/mtd.h>
  24#include <linux/mtd/nand.h>
  25#include <linux/mtd/partitions.h>
  26#include <linux/gpio.h>
  27#include <linux/platform_data/gpio-omap.h>
  28
  29#include <asm/io.h>
  30#include <asm/sizes.h>
  31
  32#include <mach/board-ams-delta.h>
  33
  34#include <mach/hardware.h>
  35
  36/*
  37 * MTD structure for E3 (Delta)
  38 */
  39static struct mtd_info *ams_delta_mtd = NULL;
  40
  41/*
  42 * Define partitions for flash devices
  43 */
  44
  45static struct mtd_partition partition_info[] = {
  46        { .name         = "Kernel",
  47          .offset       = 0,
  48          .size         = 3 * SZ_1M + SZ_512K },
  49        { .name         = "u-boot",
  50          .offset       = 3 * SZ_1M + SZ_512K,
  51          .size         = SZ_256K },
  52        { .name         = "u-boot params",
  53          .offset       = 3 * SZ_1M + SZ_512K + SZ_256K,
  54          .size         = SZ_256K },
  55        { .name         = "Amstrad LDR",
  56          .offset       = 4 * SZ_1M,
  57          .size         = SZ_256K },
  58        { .name         = "File system",
  59          .offset       = 4 * SZ_1M + 1 * SZ_256K,
  60          .size         = 27 * SZ_1M },
  61        { .name         = "PBL reserved",
  62          .offset       = 32 * SZ_1M - 3 * SZ_256K,
  63          .size         =  3 * SZ_256K },
  64};
  65
  66static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
  67{
  68        struct nand_chip *this = mtd->priv;
  69        void __iomem *io_base = this->priv;
  70
  71        writew(0, io_base + OMAP_MPUIO_IO_CNTL);
  72        writew(byte, this->IO_ADDR_W);
  73        gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 0);
  74        ndelay(40);
  75        gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 1);
  76}
  77
  78static u_char ams_delta_read_byte(struct mtd_info *mtd)
  79{
  80        u_char res;
  81        struct nand_chip *this = mtd->priv;
  82        void __iomem *io_base = this->priv;
  83
  84        gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 0);
  85        ndelay(40);
  86        writew(~0, io_base + OMAP_MPUIO_IO_CNTL);
  87        res = readw(this->IO_ADDR_R);
  88        gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 1);
  89
  90        return res;
  91}
  92
  93static void ams_delta_write_buf(struct mtd_info *mtd, const u_char *buf,
  94                                int len)
  95{
  96        int i;
  97
  98        for (i=0; i<len; i++)
  99                ams_delta_write_byte(mtd, buf[i]);
 100}
 101
 102static void ams_delta_read_buf(struct mtd_info *mtd, u_char *buf, int len)
 103{
 104        int i;
 105
 106        for (i=0; i<len; i++)
 107                buf[i] = ams_delta_read_byte(mtd);
 108}
 109
 110/*
 111 * Command control function
 112 *
 113 * ctrl:
 114 * NAND_NCE: bit 0 -> bit 2
 115 * NAND_CLE: bit 1 -> bit 7
 116 * NAND_ALE: bit 2 -> bit 6
 117 */
 118static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd,
 119                                unsigned int ctrl)
 120{
 121
 122        if (ctrl & NAND_CTRL_CHANGE) {
 123                gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NCE,
 124                                (ctrl & NAND_NCE) == 0);
 125                gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_CLE,
 126                                (ctrl & NAND_CLE) != 0);
 127                gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_ALE,
 128                                (ctrl & NAND_ALE) != 0);
 129        }
 130
 131        if (cmd != NAND_CMD_NONE)
 132                ams_delta_write_byte(mtd, cmd);
 133}
 134
 135static int ams_delta_nand_ready(struct mtd_info *mtd)
 136{
 137        return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB);
 138}
 139
 140static const struct gpio _mandatory_gpio[] = {
 141        {
 142                .gpio   = AMS_DELTA_GPIO_PIN_NAND_NCE,
 143                .flags  = GPIOF_OUT_INIT_HIGH,
 144                .label  = "nand_nce",
 145        },
 146        {
 147                .gpio   = AMS_DELTA_GPIO_PIN_NAND_NRE,
 148                .flags  = GPIOF_OUT_INIT_HIGH,
 149                .label  = "nand_nre",
 150        },
 151        {
 152                .gpio   = AMS_DELTA_GPIO_PIN_NAND_NWP,
 153                .flags  = GPIOF_OUT_INIT_HIGH,
 154                .label  = "nand_nwp",
 155        },
 156        {
 157                .gpio   = AMS_DELTA_GPIO_PIN_NAND_NWE,
 158                .flags  = GPIOF_OUT_INIT_HIGH,
 159                .label  = "nand_nwe",
 160        },
 161        {
 162                .gpio   = AMS_DELTA_GPIO_PIN_NAND_ALE,
 163                .flags  = GPIOF_OUT_INIT_LOW,
 164                .label  = "nand_ale",
 165        },
 166        {
 167                .gpio   = AMS_DELTA_GPIO_PIN_NAND_CLE,
 168                .flags  = GPIOF_OUT_INIT_LOW,
 169                .label  = "nand_cle",
 170        },
 171};
 172
 173/*
 174 * Main initialization routine
 175 */
 176static int ams_delta_init(struct platform_device *pdev)
 177{
 178        struct nand_chip *this;
 179        struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 180        void __iomem *io_base;
 181        int err = 0;
 182
 183        if (!res)
 184                return -ENXIO;
 185
 186        /* Allocate memory for MTD device structure and private data */
 187        ams_delta_mtd = kmalloc(sizeof(struct mtd_info) +
 188                                sizeof(struct nand_chip), GFP_KERNEL);
 189        if (!ams_delta_mtd) {
 190                printk (KERN_WARNING "Unable to allocate E3 NAND MTD device structure.\n");
 191                err = -ENOMEM;
 192                goto out;
 193        }
 194
 195        ams_delta_mtd->owner = THIS_MODULE;
 196
 197        /* Get pointer to private data */
 198        this = (struct nand_chip *) (&ams_delta_mtd[1]);
 199
 200        /* Initialize structures */
 201        memset(ams_delta_mtd, 0, sizeof(struct mtd_info));
 202        memset(this, 0, sizeof(struct nand_chip));
 203
 204        /* Link the private data with the MTD structure */
 205        ams_delta_mtd->priv = this;
 206
 207        /*
 208         * Don't try to request the memory region from here,
 209         * it should have been already requested from the
 210         * gpio-omap driver and requesting it again would fail.
 211         */
 212
 213        io_base = ioremap(res->start, resource_size(res));
 214        if (io_base == NULL) {
 215                dev_err(&pdev->dev, "ioremap failed\n");
 216                err = -EIO;
 217                goto out_free;
 218        }
 219
 220        this->priv = io_base;
 221
 222        /* Set address of NAND IO lines */
 223        this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH;
 224        this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT;
 225        this->read_byte = ams_delta_read_byte;
 226        this->write_buf = ams_delta_write_buf;
 227        this->read_buf = ams_delta_read_buf;
 228        this->cmd_ctrl = ams_delta_hwcontrol;
 229        if (gpio_request(AMS_DELTA_GPIO_PIN_NAND_RB, "nand_rdy") == 0) {
 230                this->dev_ready = ams_delta_nand_ready;
 231        } else {
 232                this->dev_ready = NULL;
 233                printk(KERN_NOTICE "Couldn't request gpio for Delta NAND ready.\n");
 234        }
 235        /* 25 us command delay time */
 236        this->chip_delay = 30;
 237        this->ecc.mode = NAND_ECC_SOFT;
 238
 239        platform_set_drvdata(pdev, io_base);
 240
 241        /* Set chip enabled, but  */
 242        err = gpio_request_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
 243        if (err)
 244                goto out_gpio;
 245
 246        /* Scan to find existence of the device */
 247        if (nand_scan(ams_delta_mtd, 1)) {
 248                err = -ENXIO;
 249                goto out_mtd;
 250        }
 251
 252        /* Register the partitions */
 253        mtd_device_register(ams_delta_mtd, partition_info,
 254                            ARRAY_SIZE(partition_info));
 255
 256        goto out;
 257
 258 out_mtd:
 259        gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
 260out_gpio:
 261        platform_set_drvdata(pdev, NULL);
 262        gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
 263        iounmap(io_base);
 264out_free:
 265        kfree(ams_delta_mtd);
 266 out:
 267        return err;
 268}
 269
 270/*
 271 * Clean up routine
 272 */
 273static int ams_delta_cleanup(struct platform_device *pdev)
 274{
 275        void __iomem *io_base = platform_get_drvdata(pdev);
 276
 277        /* Release resources, unregister device */
 278        nand_release(ams_delta_mtd);
 279
 280        gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
 281        gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
 282        iounmap(io_base);
 283
 284        /* Free the MTD device structure */
 285        kfree(ams_delta_mtd);
 286
 287        return 0;
 288}
 289
 290static struct platform_driver ams_delta_nand_driver = {
 291        .probe          = ams_delta_init,
 292        .remove         = ams_delta_cleanup,
 293        .driver         = {
 294                .name   = "ams-delta-nand",
 295                .owner  = THIS_MODULE,
 296        },
 297};
 298
 299module_platform_driver(ams_delta_nand_driver);
 300
 301MODULE_LICENSE("GPL");
 302MODULE_AUTHOR("Jonathan McDowell <noodles@earth.li>");
 303MODULE_DESCRIPTION("Glue layer for NAND flash on Amstrad E3 (Delta)");
 304