linux/drivers/i2c/busses/i2c-designware-pcidrv.c
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   1/*
   2 * Synopsys DesignWare I2C adapter driver (master only).
   3 *
   4 * Based on the TI DAVINCI I2C adapter driver.
   5 *
   6 * Copyright (C) 2006 Texas Instruments.
   7 * Copyright (C) 2007 MontaVista Software Inc.
   8 * Copyright (C) 2009 Provigent Ltd.
   9 * Copyright (C) 2011, 2015, 2016 Intel Corporation.
  10 *
  11 * ----------------------------------------------------------------------------
  12 *
  13 * This program is free software; you can redistribute it and/or modify
  14 * it under the terms of the GNU General Public License as published by
  15 * the Free Software Foundation; either version 2 of the License, or
  16 * (at your option) any later version.
  17 *
  18 * This program is distributed in the hope that it will be useful,
  19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21 * GNU General Public License for more details.
  22 * ----------------------------------------------------------------------------
  23 *
  24 */
  25
  26#include <linux/acpi.h>
  27#include <linux/delay.h>
  28#include <linux/err.h>
  29#include <linux/errno.h>
  30#include <linux/i2c.h>
  31#include <linux/interrupt.h>
  32#include <linux/io.h>
  33#include <linux/kernel.h>
  34#include <linux/module.h>
  35#include <linux/pci.h>
  36#include <linux/pm_runtime.h>
  37#include <linux/sched.h>
  38#include <linux/slab.h>
  39
  40#include "i2c-designware-core.h"
  41
  42#define DRIVER_NAME "i2c-designware-pci"
  43
  44enum dw_pci_ctl_id_t {
  45        medfield,
  46        merrifield,
  47        baytrail,
  48        haswell,
  49};
  50
  51struct dw_scl_sda_cfg {
  52        u32 ss_hcnt;
  53        u32 fs_hcnt;
  54        u32 ss_lcnt;
  55        u32 fs_lcnt;
  56        u32 sda_hold;
  57};
  58
  59struct dw_pci_controller {
  60        u32 bus_num;
  61        u32 bus_cfg;
  62        u32 tx_fifo_depth;
  63        u32 rx_fifo_depth;
  64        u32 clk_khz;
  65        u32 functionality;
  66        struct dw_scl_sda_cfg *scl_sda_cfg;
  67        int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c);
  68};
  69
  70#define INTEL_MID_STD_CFG  (DW_IC_CON_MASTER |                  \
  71                                DW_IC_CON_SLAVE_DISABLE |       \
  72                                DW_IC_CON_RESTART_EN)
  73
  74#define DW_DEFAULT_FUNCTIONALITY (I2C_FUNC_I2C |                        \
  75                                        I2C_FUNC_SMBUS_BYTE |           \
  76                                        I2C_FUNC_SMBUS_BYTE_DATA |      \
  77                                        I2C_FUNC_SMBUS_WORD_DATA |      \
  78                                        I2C_FUNC_SMBUS_I2C_BLOCK)
  79
  80/* Merrifield HCNT/LCNT/SDA hold time */
  81static struct dw_scl_sda_cfg mrfld_config = {
  82        .ss_hcnt = 0x2f8,
  83        .fs_hcnt = 0x87,
  84        .ss_lcnt = 0x37b,
  85        .fs_lcnt = 0x10a,
  86};
  87
  88/* BayTrail HCNT/LCNT/SDA hold time */
  89static struct dw_scl_sda_cfg byt_config = {
  90        .ss_hcnt = 0x200,
  91        .fs_hcnt = 0x55,
  92        .ss_lcnt = 0x200,
  93        .fs_lcnt = 0x99,
  94        .sda_hold = 0x6,
  95};
  96
  97/* Haswell HCNT/LCNT/SDA hold time */
  98static struct dw_scl_sda_cfg hsw_config = {
  99        .ss_hcnt = 0x01b0,
 100        .fs_hcnt = 0x48,
 101        .ss_lcnt = 0x01fb,
 102        .fs_lcnt = 0xa0,
 103        .sda_hold = 0x9,
 104};
 105
 106static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
 107{
 108        switch (pdev->device) {
 109        case 0x0817:
 110                c->bus_cfg &= ~DW_IC_CON_SPEED_MASK;
 111                c->bus_cfg |= DW_IC_CON_SPEED_STD;
 112        case 0x0818:
 113        case 0x0819:
 114                c->bus_num = pdev->device - 0x817 + 3;
 115                return 0;
 116        case 0x082C:
 117        case 0x082D:
 118        case 0x082E:
 119                c->bus_num = pdev->device - 0x82C + 0;
 120                return 0;
 121        }
 122        return -ENODEV;
 123}
 124
 125static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
 126{
 127        /*
 128         * On Intel Merrifield the user visible i2c busses are enumerated
 129         * [1..7]. So, we add 1 to shift the default range. Besides that the
 130         * first PCI slot provides 4 functions, that's why we have to add 0 to
 131         * the first slot and 4 to the next one.
 132         */
 133        switch (PCI_SLOT(pdev->devfn)) {
 134        case 8:
 135                c->bus_num = PCI_FUNC(pdev->devfn) + 0 + 1;
 136                return 0;
 137        case 9:
 138                c->bus_num = PCI_FUNC(pdev->devfn) + 4 + 1;
 139                return 0;
 140        }
 141        return -ENODEV;
 142}
 143
 144static struct dw_pci_controller dw_pci_controllers[] = {
 145        [medfield] = {
 146                .bus_num = -1,
 147                .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 148                .tx_fifo_depth = 32,
 149                .rx_fifo_depth = 32,
 150                .clk_khz      = 25000,
 151                .setup = mfld_setup,
 152        },
 153        [merrifield] = {
 154                .bus_num = -1,
 155                .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 156                .tx_fifo_depth = 64,
 157                .rx_fifo_depth = 64,
 158                .scl_sda_cfg = &mrfld_config,
 159                .setup = mrfld_setup,
 160        },
 161        [baytrail] = {
 162                .bus_num = -1,
 163                .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 164                .tx_fifo_depth = 32,
 165                .rx_fifo_depth = 32,
 166                .functionality = I2C_FUNC_10BIT_ADDR,
 167                .scl_sda_cfg = &byt_config,
 168        },
 169        [haswell] = {
 170                .bus_num = -1,
 171                .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 172                .tx_fifo_depth = 32,
 173                .rx_fifo_depth = 32,
 174                .functionality = I2C_FUNC_10BIT_ADDR,
 175                .scl_sda_cfg = &hsw_config,
 176        },
 177};
 178
 179#ifdef CONFIG_PM
 180static int i2c_dw_pci_suspend(struct device *dev)
 181{
 182        struct pci_dev *pdev = to_pci_dev(dev);
 183
 184        i2c_dw_disable(pci_get_drvdata(pdev));
 185        return 0;
 186}
 187
 188static int i2c_dw_pci_resume(struct device *dev)
 189{
 190        struct pci_dev *pdev = to_pci_dev(dev);
 191
 192        return i2c_dw_init(pci_get_drvdata(pdev));
 193}
 194#endif
 195
 196static UNIVERSAL_DEV_PM_OPS(i2c_dw_pm_ops, i2c_dw_pci_suspend,
 197                            i2c_dw_pci_resume, NULL);
 198
 199static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
 200{
 201        return dev->controller->clk_khz;
 202}
 203
 204static int i2c_dw_pci_probe(struct pci_dev *pdev,
 205                            const struct pci_device_id *id)
 206{
 207        struct dw_i2c_dev *dev;
 208        struct i2c_adapter *adap;
 209        int r;
 210        struct dw_pci_controller *controller;
 211        struct dw_scl_sda_cfg *cfg;
 212
 213        if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) {
 214                dev_err(&pdev->dev, "%s: invalid driver data %ld\n", __func__,
 215                        id->driver_data);
 216                return -EINVAL;
 217        }
 218
 219        controller = &dw_pci_controllers[id->driver_data];
 220
 221        r = pcim_enable_device(pdev);
 222        if (r) {
 223                dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n",
 224                        r);
 225                return r;
 226        }
 227
 228        r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
 229        if (r) {
 230                dev_err(&pdev->dev, "I/O memory remapping failed\n");
 231                return r;
 232        }
 233
 234        dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
 235        if (!dev)
 236                return -ENOMEM;
 237
 238        dev->clk = NULL;
 239        dev->controller = controller;
 240        dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
 241        dev->base = pcim_iomap_table(pdev)[0];
 242        dev->dev = &pdev->dev;
 243        dev->irq = pdev->irq;
 244
 245        if (controller->setup) {
 246                r = controller->setup(pdev, controller);
 247                if (r)
 248                        return r;
 249        }
 250
 251        dev->functionality = controller->functionality |
 252                                DW_DEFAULT_FUNCTIONALITY;
 253
 254        dev->master_cfg = controller->bus_cfg;
 255        if (controller->scl_sda_cfg) {
 256                cfg = controller->scl_sda_cfg;
 257                dev->ss_hcnt = cfg->ss_hcnt;
 258                dev->fs_hcnt = cfg->fs_hcnt;
 259                dev->ss_lcnt = cfg->ss_lcnt;
 260                dev->fs_lcnt = cfg->fs_lcnt;
 261                dev->sda_hold_time = cfg->sda_hold;
 262        }
 263
 264        pci_set_drvdata(pdev, dev);
 265
 266        dev->tx_fifo_depth = controller->tx_fifo_depth;
 267        dev->rx_fifo_depth = controller->rx_fifo_depth;
 268
 269        adap = &dev->adapter;
 270        adap->owner = THIS_MODULE;
 271        adap->class = 0;
 272        ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
 273        adap->nr = controller->bus_num;
 274
 275        r = i2c_dw_probe(dev);
 276        if (r)
 277                return r;
 278
 279        pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
 280        pm_runtime_use_autosuspend(&pdev->dev);
 281        pm_runtime_put_autosuspend(&pdev->dev);
 282        pm_runtime_allow(&pdev->dev);
 283
 284        return 0;
 285}
 286
 287static void i2c_dw_pci_remove(struct pci_dev *pdev)
 288{
 289        struct dw_i2c_dev *dev = pci_get_drvdata(pdev);
 290
 291        i2c_dw_disable(dev);
 292        pm_runtime_forbid(&pdev->dev);
 293        pm_runtime_get_noresume(&pdev->dev);
 294
 295        i2c_del_adapter(&dev->adapter);
 296}
 297
 298/* work with hotplug and coldplug */
 299MODULE_ALIAS("i2c_designware-pci");
 300
 301static const struct pci_device_id i2_designware_pci_ids[] = {
 302        /* Medfield */
 303        { PCI_VDEVICE(INTEL, 0x0817), medfield },
 304        { PCI_VDEVICE(INTEL, 0x0818), medfield },
 305        { PCI_VDEVICE(INTEL, 0x0819), medfield },
 306        { PCI_VDEVICE(INTEL, 0x082C), medfield },
 307        { PCI_VDEVICE(INTEL, 0x082D), medfield },
 308        { PCI_VDEVICE(INTEL, 0x082E), medfield },
 309        /* Merrifield */
 310        { PCI_VDEVICE(INTEL, 0x1195), merrifield },
 311        { PCI_VDEVICE(INTEL, 0x1196), merrifield },
 312        /* Baytrail */
 313        { PCI_VDEVICE(INTEL, 0x0F41), baytrail },
 314        { PCI_VDEVICE(INTEL, 0x0F42), baytrail },
 315        { PCI_VDEVICE(INTEL, 0x0F43), baytrail },
 316        { PCI_VDEVICE(INTEL, 0x0F44), baytrail },
 317        { PCI_VDEVICE(INTEL, 0x0F45), baytrail },
 318        { PCI_VDEVICE(INTEL, 0x0F46), baytrail },
 319        { PCI_VDEVICE(INTEL, 0x0F47), baytrail },
 320        /* Haswell */
 321        { PCI_VDEVICE(INTEL, 0x9c61), haswell },
 322        { PCI_VDEVICE(INTEL, 0x9c62), haswell },
 323        /* Braswell / Cherrytrail */
 324        { PCI_VDEVICE(INTEL, 0x22C1), baytrail },
 325        { PCI_VDEVICE(INTEL, 0x22C2), baytrail },
 326        { PCI_VDEVICE(INTEL, 0x22C3), baytrail },
 327        { PCI_VDEVICE(INTEL, 0x22C4), baytrail },
 328        { PCI_VDEVICE(INTEL, 0x22C5), baytrail },
 329        { PCI_VDEVICE(INTEL, 0x22C6), baytrail },
 330        { PCI_VDEVICE(INTEL, 0x22C7), baytrail },
 331        { 0,}
 332};
 333MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
 334
 335static struct pci_driver dw_i2c_driver = {
 336        .name           = DRIVER_NAME,
 337        .id_table       = i2_designware_pci_ids,
 338        .probe          = i2c_dw_pci_probe,
 339        .remove         = i2c_dw_pci_remove,
 340        .driver         = {
 341                .pm     = &i2c_dw_pm_ops,
 342        },
 343};
 344
 345module_pci_driver(dw_i2c_driver);
 346
 347MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
 348MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
 349MODULE_LICENSE("GPL");
 350
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