linux/drivers/gpu/drm/gma500/psb_drv.c
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   1/**************************************************************************
   2 * Copyright (c) 2007-2011, Intel Corporation.
   3 * All Rights Reserved.
   4 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
   5 * All Rights Reserved.
   6 *
   7 * This program is free software; you can redistribute it and/or modify it
   8 * under the terms and conditions of the GNU General Public License,
   9 * version 2, as published by the Free Software Foundation.
  10 *
  11 * This program is distributed in the hope it will be useful, but WITHOUT
  12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14 * more details.
  15 *
  16 * You should have received a copy of the GNU General Public License along with
  17 * this program; if not, write to the Free Software Foundation, Inc.,
  18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19 *
  20 **************************************************************************/
  21
  22#include <drm/drmP.h>
  23#include <drm/drm.h>
  24#include "psb_drv.h"
  25#include "framebuffer.h"
  26#include "psb_reg.h"
  27#include "psb_intel_reg.h"
  28#include "intel_bios.h"
  29#include "mid_bios.h"
  30#include <drm/drm_pciids.h>
  31#include "power.h"
  32#include <linux/cpu.h>
  33#include <linux/notifier.h>
  34#include <linux/spinlock.h>
  35#include <linux/pm_runtime.h>
  36#include <acpi/video.h>
  37#include <linux/module.h>
  38
  39static struct drm_driver driver;
  40static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  41
  42/*
  43 * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
  44 * to the different groups of PowerVR 5-series chip designs
  45 *
  46 * 0x8086 = Intel Corporation
  47 *
  48 * PowerVR SGX535    - Poulsbo    - Intel GMA 500, Intel Atom Z5xx
  49 * PowerVR SGX535    - Moorestown - Intel GMA 600
  50 * PowerVR SGX535    - Oaktrail   - Intel GMA 600, Intel Atom Z6xx, E6xx
  51 * PowerVR SGX540    - Medfield   - Intel Atom Z2460
  52 * PowerVR SGX544MP2 - Medfield   -
  53 * PowerVR SGX545    - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
  54 * PowerVR SGX545    - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
  55 *                                  N2800
  56 */
  57static const struct pci_device_id pciidlist[] = {
  58        { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  59        { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  60#if defined(CONFIG_DRM_GMA600)
  61        { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  62        { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  63        { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  64        { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  65        { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  66        { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  67        { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  68        { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  69        { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  70#endif
  71#if defined(CONFIG_DRM_MEDFIELD)
  72        { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  73        { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  74        { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  75        { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  76        { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  77        { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  78        { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  79        { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  80#endif
  81#if defined(CONFIG_DRM_GMA3600)
  82        { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  83        { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  84        { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  85        { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  86        { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  87        { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  88        { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  89        { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  90        { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  91        { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  92        { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  93        { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  94        { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  95        { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  96        { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  97        { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  98#endif
  99        { 0, }
 100};
 101MODULE_DEVICE_TABLE(pci, pciidlist);
 102
 103/*
 104 * Standard IOCTLs.
 105 */
 106static const struct drm_ioctl_desc psb_ioctls[] = {
 107};
 108
 109static void psb_driver_lastclose(struct drm_device *dev)
 110{
 111        int ret;
 112        struct drm_psb_private *dev_priv = dev->dev_private;
 113        struct psb_fbdev *fbdev = dev_priv->fbdev;
 114
 115        ret = drm_fb_helper_restore_fbdev_mode_unlocked(&fbdev->psb_fb_helper);
 116        if (ret)
 117                DRM_DEBUG("failed to restore crtc mode\n");
 118
 119        return;
 120}
 121
 122static int psb_do_init(struct drm_device *dev)
 123{
 124        struct drm_psb_private *dev_priv = dev->dev_private;
 125        struct psb_gtt *pg = &dev_priv->gtt;
 126
 127        uint32_t stolen_gtt;
 128
 129        if (pg->mmu_gatt_start & 0x0FFFFFFF) {
 130                dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
 131                return -EINVAL;
 132        }
 133
 134        stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
 135        stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
 136        stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
 137
 138        dev_priv->gatt_free_offset = pg->mmu_gatt_start +
 139            (stolen_gtt << PAGE_SHIFT) * 1024;
 140
 141        spin_lock_init(&dev_priv->irqmask_lock);
 142        spin_lock_init(&dev_priv->lock_2d);
 143
 144        PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
 145        PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
 146        PSB_RSGX32(PSB_CR_BIF_BANK1);
 147
 148        /* Do not bypass any MMU access, let them pagefault instead */
 149        PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
 150                   PSB_CR_BIF_CTRL);
 151        PSB_RSGX32(PSB_CR_BIF_CTRL);
 152
 153        psb_spank(dev_priv);
 154
 155        /* mmu_gatt ?? */
 156        PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
 157        PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
 158
 159        return 0;
 160}
 161
 162static int psb_driver_unload(struct drm_device *dev)
 163{
 164        struct drm_psb_private *dev_priv = dev->dev_private;
 165
 166        /* TODO: Kill vblank etc here */
 167
 168        if (dev_priv) {
 169                if (dev_priv->backlight_device)
 170                        gma_backlight_exit(dev);
 171                psb_modeset_cleanup(dev);
 172
 173                if (dev_priv->ops->chip_teardown)
 174                        dev_priv->ops->chip_teardown(dev);
 175
 176                psb_intel_opregion_fini(dev);
 177
 178                if (dev_priv->pf_pd) {
 179                        psb_mmu_free_pagedir(dev_priv->pf_pd);
 180                        dev_priv->pf_pd = NULL;
 181                }
 182                if (dev_priv->mmu) {
 183                        struct psb_gtt *pg = &dev_priv->gtt;
 184
 185                        down_read(&pg->sem);
 186                        psb_mmu_remove_pfn_sequence(
 187                                psb_mmu_get_default_pd
 188                                (dev_priv->mmu),
 189                                pg->mmu_gatt_start,
 190                                dev_priv->vram_stolen_size >> PAGE_SHIFT);
 191                        up_read(&pg->sem);
 192                        psb_mmu_driver_takedown(dev_priv->mmu);
 193                        dev_priv->mmu = NULL;
 194                }
 195                psb_gtt_takedown(dev);
 196                if (dev_priv->scratch_page) {
 197                        set_pages_wb(dev_priv->scratch_page, 1);
 198                        __free_page(dev_priv->scratch_page);
 199                        dev_priv->scratch_page = NULL;
 200                }
 201                if (dev_priv->vdc_reg) {
 202                        iounmap(dev_priv->vdc_reg);
 203                        dev_priv->vdc_reg = NULL;
 204                }
 205                if (dev_priv->sgx_reg) {
 206                        iounmap(dev_priv->sgx_reg);
 207                        dev_priv->sgx_reg = NULL;
 208                }
 209                if (dev_priv->aux_reg) {
 210                        iounmap(dev_priv->aux_reg);
 211                        dev_priv->aux_reg = NULL;
 212                }
 213                if (dev_priv->aux_pdev)
 214                        pci_dev_put(dev_priv->aux_pdev);
 215                if (dev_priv->lpc_pdev)
 216                        pci_dev_put(dev_priv->lpc_pdev);
 217
 218                /* Destroy VBT data */
 219                psb_intel_destroy_bios(dev);
 220
 221                kfree(dev_priv);
 222                dev->dev_private = NULL;
 223        }
 224        gma_power_uninit(dev);
 225        return 0;
 226}
 227
 228static int psb_driver_load(struct drm_device *dev, unsigned long flags)
 229{
 230        struct drm_psb_private *dev_priv;
 231        unsigned long resource_start, resource_len;
 232        unsigned long irqflags;
 233        int ret = -ENOMEM;
 234        struct drm_connector *connector;
 235        struct gma_encoder *gma_encoder;
 236        struct psb_gtt *pg;
 237
 238        /* allocating and initializing driver private data */
 239        dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
 240        if (dev_priv == NULL)
 241                return -ENOMEM;
 242
 243        dev_priv->ops = (struct psb_ops *)flags;
 244        dev_priv->dev = dev;
 245        dev->dev_private = (void *) dev_priv;
 246
 247        pg = &dev_priv->gtt;
 248
 249        pci_set_master(dev->pdev);
 250
 251        dev_priv->num_pipe = dev_priv->ops->pipes;
 252
 253        resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
 254
 255        dev_priv->vdc_reg =
 256            ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
 257        if (!dev_priv->vdc_reg)
 258                goto out_err;
 259
 260        dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
 261                                                        PSB_SGX_SIZE);
 262        if (!dev_priv->sgx_reg)
 263                goto out_err;
 264
 265        if (IS_MRST(dev)) {
 266                dev_priv->aux_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(3, 0));
 267
 268                if (dev_priv->aux_pdev) {
 269                        resource_start = pci_resource_start(dev_priv->aux_pdev,
 270                                                            PSB_AUX_RESOURCE);
 271                        resource_len = pci_resource_len(dev_priv->aux_pdev,
 272                                                        PSB_AUX_RESOURCE);
 273                        dev_priv->aux_reg = ioremap_nocache(resource_start,
 274                                                            resource_len);
 275                        if (!dev_priv->aux_reg)
 276                                goto out_err;
 277
 278                        DRM_DEBUG_KMS("Found aux vdc");
 279                } else {
 280                        /* Couldn't find the aux vdc so map to primary vdc */
 281                        dev_priv->aux_reg = dev_priv->vdc_reg;
 282                        DRM_DEBUG_KMS("Couldn't find aux pci device");
 283                }
 284                dev_priv->gmbus_reg = dev_priv->aux_reg;
 285
 286                dev_priv->lpc_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(31, 0));
 287                if (dev_priv->lpc_pdev) {
 288                        pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
 289                                &dev_priv->lpc_gpio_base);
 290                        pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
 291                                (u32)dev_priv->lpc_gpio_base | (1L<<31));
 292                        pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
 293                                &dev_priv->lpc_gpio_base);
 294                        dev_priv->lpc_gpio_base &= 0xffc0;
 295                        if (dev_priv->lpc_gpio_base)
 296                                DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
 297                                                dev_priv->lpc_gpio_base);
 298                        else {
 299                                pci_dev_put(dev_priv->lpc_pdev);
 300                                dev_priv->lpc_pdev = NULL;
 301                        }
 302                }
 303        } else {
 304                dev_priv->gmbus_reg = dev_priv->vdc_reg;
 305        }
 306
 307        psb_intel_opregion_setup(dev);
 308
 309        ret = dev_priv->ops->chip_setup(dev);
 310        if (ret)
 311                goto out_err;
 312
 313        /* Init OSPM support */
 314        gma_power_init(dev);
 315
 316        ret = -ENOMEM;
 317
 318        dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
 319        if (!dev_priv->scratch_page)
 320                goto out_err;
 321
 322        set_pages_uc(dev_priv->scratch_page, 1);
 323
 324        ret = psb_gtt_init(dev, 0);
 325        if (ret)
 326                goto out_err;
 327
 328        dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, 0);
 329        if (!dev_priv->mmu)
 330                goto out_err;
 331
 332        dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
 333        if (!dev_priv->pf_pd)
 334                goto out_err;
 335
 336        ret = psb_do_init(dev);
 337        if (ret)
 338                return ret;
 339
 340        /* Add stolen memory to SGX MMU */
 341        down_read(&pg->sem);
 342        ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
 343                                          dev_priv->stolen_base >> PAGE_SHIFT,
 344                                          pg->gatt_start,
 345                                          pg->stolen_size >> PAGE_SHIFT, 0);
 346        up_read(&pg->sem);
 347
 348        psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
 349        psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
 350
 351        PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
 352        PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
 353
 354        acpi_video_register();
 355
 356        /* Setup vertical blanking handling */
 357        ret = drm_vblank_init(dev, dev_priv->num_pipe);
 358        if (ret)
 359                goto out_err;
 360
 361        /*
 362         * Install interrupt handlers prior to powering off SGX or else we will
 363         * crash.
 364         */
 365        dev_priv->vdc_irq_mask = 0;
 366        dev_priv->pipestat[0] = 0;
 367        dev_priv->pipestat[1] = 0;
 368        dev_priv->pipestat[2] = 0;
 369        spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
 370        PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
 371        PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
 372        PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
 373        spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
 374
 375        drm_irq_install(dev, dev->pdev->irq);
 376
 377        dev->vblank_disable_allowed = true;
 378        dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
 379        dev->driver->get_vblank_counter = psb_get_vblank_counter;
 380
 381        psb_modeset_init(dev);
 382        psb_fbdev_init(dev);
 383        drm_kms_helper_poll_init(dev);
 384
 385        /* Only add backlight support if we have LVDS output */
 386        list_for_each_entry(connector, &dev->mode_config.connector_list,
 387                            head) {
 388                gma_encoder = gma_attached_encoder(connector);
 389
 390                switch (gma_encoder->type) {
 391                case INTEL_OUTPUT_LVDS:
 392                case INTEL_OUTPUT_MIPI:
 393                        ret = gma_backlight_init(dev);
 394                        break;
 395                }
 396        }
 397
 398        if (ret)
 399                return ret;
 400        psb_intel_opregion_enable_asle(dev);
 401#if 0
 402        /* Enable runtime pm at last */
 403        pm_runtime_enable(&dev->pdev->dev);
 404        pm_runtime_set_active(&dev->pdev->dev);
 405#endif
 406        /* Intel drm driver load is done, continue doing pvr load */
 407        return 0;
 408out_err:
 409        psb_driver_unload(dev);
 410        return ret;
 411}
 412
 413static int psb_driver_device_is_agp(struct drm_device *dev)
 414{
 415        return 0;
 416}
 417
 418static inline void get_brightness(struct backlight_device *bd)
 419{
 420#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
 421        if (bd) {
 422                bd->props.brightness = bd->ops->get_brightness(bd);
 423                backlight_update_status(bd);
 424        }
 425#endif
 426}
 427
 428static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
 429                               unsigned long arg)
 430{
 431        struct drm_file *file_priv = filp->private_data;
 432        struct drm_device *dev = file_priv->minor->dev;
 433        struct drm_psb_private *dev_priv = dev->dev_private;
 434        static unsigned int runtime_allowed;
 435
 436        if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
 437                runtime_allowed++;
 438                pm_runtime_allow(&dev->pdev->dev);
 439                dev_priv->rpm_enabled = 1;
 440        }
 441        return drm_ioctl(filp, cmd, arg);
 442        /* FIXME: do we need to wrap the other side of this */
 443}
 444
 445/*
 446 * When a client dies:
 447 *    - Check for and clean up flipped page state
 448 */
 449static void psb_driver_preclose(struct drm_device *dev, struct drm_file *priv)
 450{
 451}
 452
 453static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 454{
 455        return drm_get_pci_dev(pdev, ent, &driver);
 456}
 457
 458
 459static void psb_pci_remove(struct pci_dev *pdev)
 460{
 461        struct drm_device *dev = pci_get_drvdata(pdev);
 462        drm_put_dev(dev);
 463}
 464
 465static const struct dev_pm_ops psb_pm_ops = {
 466        .resume = gma_power_resume,
 467        .suspend = gma_power_suspend,
 468        .thaw = gma_power_thaw,
 469        .freeze = gma_power_freeze,
 470        .restore = gma_power_restore,
 471        .runtime_suspend = psb_runtime_suspend,
 472        .runtime_resume = psb_runtime_resume,
 473        .runtime_idle = psb_runtime_idle,
 474};
 475
 476static const struct vm_operations_struct psb_gem_vm_ops = {
 477        .fault = psb_gem_fault,
 478        .open = drm_gem_vm_open,
 479        .close = drm_gem_vm_close,
 480};
 481
 482static const struct file_operations psb_gem_fops = {
 483        .owner = THIS_MODULE,
 484        .open = drm_open,
 485        .release = drm_release,
 486        .unlocked_ioctl = psb_unlocked_ioctl,
 487        .mmap = drm_gem_mmap,
 488        .poll = drm_poll,
 489        .read = drm_read,
 490};
 491
 492static struct drm_driver driver = {
 493        .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \
 494                           DRIVER_MODESET | DRIVER_GEM,
 495        .load = psb_driver_load,
 496        .unload = psb_driver_unload,
 497        .lastclose = psb_driver_lastclose,
 498        .preclose = psb_driver_preclose,
 499        .set_busid = drm_pci_set_busid,
 500
 501        .num_ioctls = ARRAY_SIZE(psb_ioctls),
 502        .device_is_agp = psb_driver_device_is_agp,
 503        .irq_preinstall = psb_irq_preinstall,
 504        .irq_postinstall = psb_irq_postinstall,
 505        .irq_uninstall = psb_irq_uninstall,
 506        .irq_handler = psb_irq_handler,
 507        .enable_vblank = psb_enable_vblank,
 508        .disable_vblank = psb_disable_vblank,
 509        .get_vblank_counter = psb_get_vblank_counter,
 510
 511        .gem_free_object = psb_gem_free_object,
 512        .gem_vm_ops = &psb_gem_vm_ops,
 513
 514        .dumb_create = psb_gem_dumb_create,
 515        .dumb_map_offset = psb_gem_dumb_map_gtt,
 516        .dumb_destroy = drm_gem_dumb_destroy,
 517        .ioctls = psb_ioctls,
 518        .fops = &psb_gem_fops,
 519        .name = DRIVER_NAME,
 520        .desc = DRIVER_DESC,
 521        .date = DRIVER_DATE,
 522        .major = DRIVER_MAJOR,
 523        .minor = DRIVER_MINOR,
 524        .patchlevel = DRIVER_PATCHLEVEL
 525};
 526
 527static struct pci_driver psb_pci_driver = {
 528        .name = DRIVER_NAME,
 529        .id_table = pciidlist,
 530        .probe = psb_pci_probe,
 531        .remove = psb_pci_remove,
 532        .driver.pm = &psb_pm_ops,
 533};
 534
 535static int __init psb_init(void)
 536{
 537        return drm_pci_init(&driver, &psb_pci_driver);
 538}
 539
 540static void __exit psb_exit(void)
 541{
 542        drm_pci_exit(&driver, &psb_pci_driver);
 543}
 544
 545late_initcall(psb_init);
 546module_exit(psb_exit);
 547
 548MODULE_AUTHOR(DRIVER_AUTHOR);
 549MODULE_DESCRIPTION(DRIVER_DESC);
 550MODULE_LICENSE(DRIVER_LICENSE);
 551
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