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26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/slab.h>
29#include <linux/init.h>
30#include <linux/fs.h>
31#include <linux/delay.h>
32#include <linux/bitrev.h>
33#include <linux/smp_lock.h>
34#include <linux/uaccess.h>
35#include <linux/io.h>
36
37#include <pcmcia/cs_types.h>
38#include <pcmcia/cs.h>
39#include <pcmcia/cistpl.h>
40#include <pcmcia/cisreg.h>
41#include <pcmcia/ciscode.h>
42#include <pcmcia/ds.h>
43
44#include <linux/cm4000_cs.h>
45
46
47
48#define reader_to_dev(x) (&x->p_dev->dev)
49
50
51
52
53
54#define DEBUGP(n, rdr, x, args...) do { \
55 dev_dbg(reader_to_dev(rdr), "%s:" x, \
56 __func__ , ## args); \
57 } while (0)
58
59static char *version = "cm4000_cs.c v2.4.0gm6 - All bugs added by Harald Welte";
60
61#define T_1SEC (HZ)
62#define T_10MSEC msecs_to_jiffies(10)
63#define T_20MSEC msecs_to_jiffies(20)
64#define T_40MSEC msecs_to_jiffies(40)
65#define T_50MSEC msecs_to_jiffies(50)
66#define T_100MSEC msecs_to_jiffies(100)
67#define T_500MSEC msecs_to_jiffies(500)
68
69static void cm4000_release(struct pcmcia_device *link);
70
71static int major;
72
73
74
75#define M_FETCH_ATR 0
76#define M_TIMEOUT_WAIT 1
77#define M_READ_ATR_LEN 2
78#define M_READ_ATR 3
79#define M_ATR_PRESENT 4
80#define M_BAD_CARD 5
81#define M_CARDOFF 6
82
83#define LOCK_IO 0
84#define LOCK_MONITOR 1
85
86#define IS_AUTOPPS_ACT 6
87#define IS_PROCBYTE_PRESENT 7
88#define IS_INVREV 8
89#define IS_ANY_T0 9
90#define IS_ANY_T1 10
91#define IS_ATR_PRESENT 11
92#define IS_ATR_VALID 12
93#define IS_CMM_ABSENT 13
94#define IS_BAD_LENGTH 14
95#define IS_BAD_CSUM 15
96#define IS_BAD_CARD 16
97
98#define REG_FLAGS0(x) (x + 0)
99#define REG_FLAGS1(x) (x + 1)
100#define REG_NUM_BYTES(x) (x + 2)
101#define REG_BUF_ADDR(x) (x + 3)
102#define REG_BUF_DATA(x) (x + 4)
103#define REG_NUM_SEND(x) (x + 5)
104#define REG_BAUDRATE(x) (x + 6)
105#define REG_STOPBITS(x) (x + 7)
106
107struct cm4000_dev {
108 struct pcmcia_device *p_dev;
109 dev_node_t node;
110
111 unsigned char atr[MAX_ATR];
112 unsigned char rbuf[512];
113 unsigned char sbuf[512];
114
115 wait_queue_head_t devq;
116
117
118 wait_queue_head_t ioq;
119 wait_queue_head_t atrq;
120 wait_queue_head_t readq;
121
122
123
124 unsigned char atr_csum;
125 unsigned char atr_len_retry;
126 unsigned short atr_len;
127 unsigned short rlen;
128 unsigned short rpos;
129 unsigned char procbyte;
130 unsigned char mstate;
131 unsigned char cwarn;
132 unsigned char flags0;
133 unsigned char flags1;
134 unsigned int mdelay;
135
136 unsigned int baudv;
137 unsigned char ta1;
138 unsigned char proto;
139 unsigned long flags;
140
141
142 unsigned char pts[4];
143
144 struct timer_list timer;
145 int monitor_running;
146};
147
148#define ZERO_DEV(dev) \
149 memset(&dev->atr_csum,0, \
150 sizeof(struct cm4000_dev) - \
151 offsetof(struct cm4000_dev, atr_csum))
152
153static struct pcmcia_device *dev_table[CM4000_MAX_DEV];
154static struct class *cmm_class;
155
156
157
158
159static unsigned char fi_di_table[10][14] = {
160
161
162 {0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11},
163 {0x01,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x91,0x11,0x11,0x11,0x11},
164 {0x02,0x12,0x22,0x32,0x11,0x11,0x11,0x11,0x11,0x92,0xA2,0xB2,0x11,0x11},
165 {0x03,0x13,0x23,0x33,0x43,0x53,0x63,0x11,0x11,0x93,0xA3,0xB3,0xC3,0xD3},
166 {0x04,0x14,0x24,0x34,0x44,0x54,0x64,0x11,0x11,0x94,0xA4,0xB4,0xC4,0xD4},
167 {0x00,0x15,0x25,0x35,0x45,0x55,0x65,0x11,0x11,0x95,0xA5,0xB5,0xC5,0xD5},
168 {0x06,0x16,0x26,0x36,0x46,0x56,0x66,0x11,0x11,0x96,0xA6,0xB6,0xC6,0xD6},
169 {0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11},
170 {0x08,0x11,0x28,0x38,0x48,0x58,0x68,0x11,0x11,0x98,0xA8,0xB8,0xC8,0xD8},
171 {0x09,0x19,0x29,0x39,0x49,0x59,0x69,0x11,0x11,0x99,0xA9,0xB9,0xC9,0xD9}
172};
173
174#ifndef CM4000_DEBUG
175#define xoutb outb
176#define xinb inb
177#else
178static inline void xoutb(unsigned char val, unsigned short port)
179{
180 pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
181 outb(val, port);
182}
183static inline unsigned char xinb(unsigned short port)
184{
185 unsigned char val;
186
187 val = inb(port);
188 pr_debug("%.2x=inb(%.4x)\n", val, port);
189
190 return val;
191}
192#endif
193
194static inline unsigned char invert_revert(unsigned char ch)
195{
196 return bitrev8(~ch);
197}
198
199static void str_invert_revert(unsigned char *b, int len)
200{
201 int i;
202
203 for (i = 0; i < len; i++)
204 b[i] = invert_revert(b[i]);
205}
206
207#define ATRLENCK(dev,pos) \
208 if (pos>=dev->atr_len || pos>=MAX_ATR) \
209 goto return_0;
210
211static unsigned int calc_baudv(unsigned char fidi)
212{
213 unsigned int wcrcf, wbrcf, fi_rfu, di_rfu;
214
215 fi_rfu = 372;
216 di_rfu = 1;
217
218
219 switch ((fidi >> 4) & 0x0F) {
220 case 0x00:
221 wcrcf = 372;
222 break;
223 case 0x01:
224 wcrcf = 372;
225 break;
226 case 0x02:
227 wcrcf = 558;
228 break;
229 case 0x03:
230 wcrcf = 744;
231 break;
232 case 0x04:
233 wcrcf = 1116;
234 break;
235 case 0x05:
236 wcrcf = 1488;
237 break;
238 case 0x06:
239 wcrcf = 1860;
240 break;
241 case 0x07:
242 wcrcf = fi_rfu;
243 break;
244 case 0x08:
245 wcrcf = fi_rfu;
246 break;
247 case 0x09:
248 wcrcf = 512;
249 break;
250 case 0x0A:
251 wcrcf = 768;
252 break;
253 case 0x0B:
254 wcrcf = 1024;
255 break;
256 case 0x0C:
257 wcrcf = 1536;
258 break;
259 case 0x0D:
260 wcrcf = 2048;
261 break;
262 default:
263 wcrcf = fi_rfu;
264 break;
265 }
266
267
268 switch (fidi & 0x0F) {
269 case 0x00:
270 wbrcf = di_rfu;
271 break;
272 case 0x01:
273 wbrcf = 1;
274 break;
275 case 0x02:
276 wbrcf = 2;
277 break;
278 case 0x03:
279 wbrcf = 4;
280 break;
281 case 0x04:
282 wbrcf = 8;
283 break;
284 case 0x05:
285 wbrcf = 16;
286 break;
287 case 0x06:
288 wbrcf = 32;
289 break;
290 case 0x07:
291 wbrcf = di_rfu;
292 break;
293 case 0x08:
294 wbrcf = 12;
295 break;
296 case 0x09:
297 wbrcf = 20;
298 break;
299 default:
300 wbrcf = di_rfu;
301 break;
302 }
303
304 return (wcrcf / wbrcf);
305}
306
307static unsigned short io_read_num_rec_bytes(unsigned int iobase,
308 unsigned short *s)
309{
310 unsigned short tmp;
311
312 tmp = *s = 0;
313 do {
314 *s = tmp;
315 tmp = inb(REG_NUM_BYTES(iobase)) |
316 (inb(REG_FLAGS0(iobase)) & 4 ? 0x100 : 0);
317 } while (tmp != *s);
318
319 return *s;
320}
321
322static int parse_atr(struct cm4000_dev *dev)
323{
324 unsigned char any_t1, any_t0;
325 unsigned char ch, ifno;
326 int ix, done;
327
328 DEBUGP(3, dev, "-> parse_atr: dev->atr_len = %i\n", dev->atr_len);
329
330 if (dev->atr_len < 3) {
331 DEBUGP(5, dev, "parse_atr: atr_len < 3\n");
332 return 0;
333 }
334
335 if (dev->atr[0] == 0x3f)
336 set_bit(IS_INVREV, &dev->flags);
337 else
338 clear_bit(IS_INVREV, &dev->flags);
339 ix = 1;
340 ifno = 1;
341 ch = dev->atr[1];
342 dev->proto = 0;
343 any_t1 = any_t0 = done = 0;
344 dev->ta1 = 0x11;
345 do {
346 if (ifno == 1 && (ch & 0x10)) {
347
348 dev->ta1 = dev->atr[2];
349 DEBUGP(5, dev, "Card says FiDi is 0x%.2x\n", dev->ta1);
350 ifno++;
351 } else if ((ifno == 2) && (ch & 0x10)) {
352 dev->ta1 = 0x11;
353 ifno++;
354 }
355
356 DEBUGP(5, dev, "Yi=%.2x\n", ch & 0xf0);
357 ix += ((ch & 0x10) >> 4)
358 +((ch & 0x20) >> 5)
359 + ((ch & 0x40) >> 6)
360 + ((ch & 0x80) >> 7);
361
362 if (ch & 0x80) {
363 ch = dev->atr[ix];
364 if ((ch & 0x0f)) {
365 any_t1 = 1;
366 DEBUGP(5, dev, "card is capable of T=1\n");
367 } else {
368 any_t0 = 1;
369 DEBUGP(5, dev, "card is capable of T=0\n");
370 }
371 } else
372 done = 1;
373 } while (!done);
374
375 DEBUGP(5, dev, "ix=%d noHist=%d any_t1=%d\n",
376 ix, dev->atr[1] & 15, any_t1);
377 if (ix + 1 + (dev->atr[1] & 0x0f) + any_t1 != dev->atr_len) {
378 DEBUGP(5, dev, "length error\n");
379 return 0;
380 }
381 if (any_t0)
382 set_bit(IS_ANY_T0, &dev->flags);
383
384 if (any_t1) {
385 dev->atr_csum = 0;
386#ifdef ATR_CSUM
387 for (i = 1; i < dev->atr_len; i++)
388 dev->atr_csum ^= dev->atr[i];
389 if (dev->atr_csum) {
390 set_bit(IS_BAD_CSUM, &dev->flags);
391 DEBUGP(5, dev, "bad checksum\n");
392 goto return_0;
393 }
394#endif
395 if (any_t0 == 0)
396 dev->proto = 1;
397 set_bit(IS_ANY_T1, &dev->flags);
398 }
399
400 return 1;
401}
402
403struct card_fixup {
404 char atr[12];
405 u_int8_t atr_len;
406 u_int8_t stopbits;
407};
408
409static struct card_fixup card_fixups[] = {
410 {
411 .atr = { 0x3b, 0xb3, 0x11, 0x00, 0x00, 0x41, 0x01 },
412 .atr_len = 7,
413 .stopbits = 0x03,
414 },
415 {
416 .atr = {0x3b, 0x76, 0x13, 0x00, 0x00, 0x80, 0x62, 0x07,
417 0x41, 0x81, 0x81 },
418 .atr_len = 11,
419 .stopbits = 0x04,
420 },
421};
422
423static void set_cardparameter(struct cm4000_dev *dev)
424{
425 int i;
426 unsigned int iobase = dev->p_dev->io.BasePort1;
427 u_int8_t stopbits = 0x02;
428
429 DEBUGP(3, dev, "-> set_cardparameter\n");
430
431 dev->flags1 = dev->flags1 | (((dev->baudv - 1) & 0x0100) >> 8);
432 xoutb(dev->flags1, REG_FLAGS1(iobase));
433 DEBUGP(5, dev, "flags1 = 0x%02x\n", dev->flags1);
434
435
436 xoutb((unsigned char)((dev->baudv - 1) & 0xFF), REG_BAUDRATE(iobase));
437
438 DEBUGP(5, dev, "baudv = %i -> write 0x%02x\n", dev->baudv,
439 ((dev->baudv - 1) & 0xFF));
440
441
442 for (i = 0; i < ARRAY_SIZE(card_fixups); i++) {
443 if (!memcmp(dev->atr, card_fixups[i].atr,
444 card_fixups[i].atr_len))
445 stopbits = card_fixups[i].stopbits;
446 }
447 xoutb(stopbits, REG_STOPBITS(iobase));
448
449 DEBUGP(3, dev, "<- set_cardparameter\n");
450}
451
452static int set_protocol(struct cm4000_dev *dev, struct ptsreq *ptsreq)
453{
454
455 unsigned long tmp, i;
456 unsigned short num_bytes_read;
457 unsigned char pts_reply[4];
458 ssize_t rc;
459 unsigned int iobase = dev->p_dev->io.BasePort1;
460
461 rc = 0;
462
463 DEBUGP(3, dev, "-> set_protocol\n");
464 DEBUGP(5, dev, "ptsreq->Protocol = 0x%.8x, ptsreq->Flags=0x%.8x, "
465 "ptsreq->pts1=0x%.2x, ptsreq->pts2=0x%.2x, "
466 "ptsreq->pts3=0x%.2x\n", (unsigned int)ptsreq->protocol,
467 (unsigned int)ptsreq->flags, ptsreq->pts1, ptsreq->pts2,
468 ptsreq->pts3);
469
470
471 dev->pts[0] = 0xff;
472 dev->pts[1] = 0x00;
473 tmp = ptsreq->protocol;
474 while ((tmp = (tmp >> 1)) > 0)
475 dev->pts[1]++;
476 dev->proto = dev->pts[1];
477 dev->pts[1] = (0x01 << 4) | (dev->pts[1]);
478
479
480 DEBUGP(5, dev, "Ta(1) from ATR is 0x%.2x\n", dev->ta1);
481
482 dev->pts[2] = fi_di_table[dev->ta1 & 0x0F][(dev->ta1 >> 4) & 0x0F];
483
484
485 dev->pts[3] = dev->pts[0] ^ dev->pts[1] ^ dev->pts[2];
486
487 DEBUGP(5, dev, "pts0=%.2x, pts1=%.2x, pts2=%.2x, pts3=%.2x\n",
488 dev->pts[0], dev->pts[1], dev->pts[2], dev->pts[3]);
489
490
491 if (test_bit(IS_INVREV, &dev->flags))
492 str_invert_revert(dev->pts, 4);
493
494
495 xoutb(0x80, REG_FLAGS0(iobase));
496
497
498 DEBUGP(5, dev, "Enable access to the messages buffer\n");
499 dev->flags1 = 0x20
500 | (test_bit(IS_INVREV, &dev->flags) ? 0x02 : 0x00)
501 | ((dev->baudv >> 8) & 0x01);
502 xoutb(dev->flags1, REG_FLAGS1(iobase));
503
504 DEBUGP(5, dev, "Enable message buffer -> flags1 = 0x%.2x\n",
505 dev->flags1);
506
507
508 DEBUGP(5, dev, "Write challenge to buffer: ");
509 for (i = 0; i < 4; i++) {
510 xoutb(i, REG_BUF_ADDR(iobase));
511 xoutb(dev->pts[i], REG_BUF_DATA(iobase));
512#ifdef CM4000_DEBUG
513 pr_debug("0x%.2x ", dev->pts[i]);
514 }
515 pr_debug("\n");
516#else
517 }
518#endif
519
520
521 DEBUGP(5, dev, "Set number of bytes to write\n");
522 xoutb(0x04, REG_NUM_SEND(iobase));
523
524
525 xoutb(0x50, REG_FLAGS0(iobase));
526
527
528
529 DEBUGP(5, dev, "Waiting for NumRecBytes getting valid\n");
530
531 for (i = 0; i < 100; i++) {
532 if (inb(REG_FLAGS0(iobase)) & 0x08) {
533 DEBUGP(5, dev, "NumRecBytes is valid\n");
534 break;
535 }
536 mdelay(10);
537 }
538 if (i == 100) {
539 DEBUGP(5, dev, "Timeout waiting for NumRecBytes getting "
540 "valid\n");
541 rc = -EIO;
542 goto exit_setprotocol;
543 }
544
545 DEBUGP(5, dev, "Reading NumRecBytes\n");
546 for (i = 0; i < 100; i++) {
547 io_read_num_rec_bytes(iobase, &num_bytes_read);
548 if (num_bytes_read >= 4) {
549 DEBUGP(2, dev, "NumRecBytes = %i\n", num_bytes_read);
550 break;
551 }
552 mdelay(10);
553 }
554
555
556 if (num_bytes_read == 3)
557 i = 0;
558
559 if (i == 100) {
560 DEBUGP(5, dev, "Timeout reading num_bytes_read\n");
561 rc = -EIO;
562 goto exit_setprotocol;
563 }
564
565 DEBUGP(5, dev, "Reset the CARDMAN CONTROLLER\n");
566 xoutb(0x80, REG_FLAGS0(iobase));
567
568
569 DEBUGP(5, dev, "Read PPS reply\n");
570 for (i = 0; i < num_bytes_read; i++) {
571 xoutb(i, REG_BUF_ADDR(iobase));
572 pts_reply[i] = inb(REG_BUF_DATA(iobase));
573 }
574
575#ifdef CM4000_DEBUG
576 DEBUGP(2, dev, "PTSreply: ");
577 for (i = 0; i < num_bytes_read; i++) {
578 pr_debug("0x%.2x ", pts_reply[i]);
579 }
580 pr_debug("\n");
581#endif
582
583 DEBUGP(5, dev, "Clear Tactive in Flags1\n");
584 xoutb(0x20, REG_FLAGS1(iobase));
585
586
587 if ((dev->pts[0] == pts_reply[0]) &&
588 (dev->pts[1] == pts_reply[1]) &&
589 (dev->pts[2] == pts_reply[2]) && (dev->pts[3] == pts_reply[3])) {
590
591 dev->baudv = calc_baudv(dev->pts[2]);
592 set_cardparameter(dev);
593 } else if ((dev->pts[0] == pts_reply[0]) &&
594 ((dev->pts[1] & 0xef) == pts_reply[1]) &&
595 ((pts_reply[0] ^ pts_reply[1]) == pts_reply[2])) {
596
597 dev->baudv = calc_baudv(0x11);
598 set_cardparameter(dev);
599 } else
600 rc = -EIO;
601
602exit_setprotocol:
603 DEBUGP(3, dev, "<- set_protocol\n");
604 return rc;
605}
606
607static int io_detect_cm4000(unsigned int iobase, struct cm4000_dev *dev)
608{
609
610
611 if (inb(REG_FLAGS0(iobase)) & 8) {
612 clear_bit(IS_ATR_VALID, &dev->flags);
613 set_bit(IS_CMM_ABSENT, &dev->flags);
614 return 0;
615 }
616
617 xoutb(dev->flags1 | 0x40, REG_FLAGS1(iobase));
618 if ((inb(REG_FLAGS0(iobase)) & 8) == 0) {
619 clear_bit(IS_ATR_VALID, &dev->flags);
620 set_bit(IS_CMM_ABSENT, &dev->flags);
621 return 0;
622 }
623
624 xoutb(dev->flags1, REG_FLAGS1(iobase));
625 return 1;
626}
627
628static void terminate_monitor(struct cm4000_dev *dev)
629{
630
631
632
633
634 DEBUGP(3, dev, "-> terminate_monitor\n");
635 wait_event_interruptible(dev->devq,
636 test_and_set_bit(LOCK_MONITOR,
637 (void *)&dev->flags));
638
639
640
641
642
643
644 DEBUGP(5, dev, "Now allow last cycle of monitor!\n");
645 while (test_bit(LOCK_MONITOR, (void *)&dev->flags))
646 msleep(25);
647
648 DEBUGP(5, dev, "Delete timer\n");
649 del_timer_sync(&dev->timer);
650#ifdef CM4000_DEBUG
651 dev->monitor_running = 0;
652#endif
653
654 DEBUGP(3, dev, "<- terminate_monitor\n");
655}
656
657
658
659
660
661
662
663
664
665static void monitor_card(unsigned long p)
666{
667 struct cm4000_dev *dev = (struct cm4000_dev *) p;
668 unsigned int iobase = dev->p_dev->io.BasePort1;
669 unsigned short s;
670 struct ptsreq ptsreq;
671 int i, atrc;
672
673 DEBUGP(7, dev, "-> monitor_card\n");
674
675
676 if (test_and_set_bit(LOCK_MONITOR, &dev->flags)) {
677 DEBUGP(4, dev, "About to stop monitor\n");
678
679 dev->rlen =
680 dev->rpos =
681 dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0;
682 dev->mstate = M_FETCH_ATR;
683 clear_bit(LOCK_MONITOR, &dev->flags);
684
685 wake_up_interruptible(&dev->devq);
686 DEBUGP(2, dev, "<- monitor_card (we are done now)\n");
687 return;
688 }
689
690
691 if (test_and_set_bit(LOCK_IO, (void *)&dev->flags)) {
692 DEBUGP(4, dev, "Couldn't get IO lock\n");
693 goto return_with_timer;
694 }
695
696
697 dev->flags0 = xinb(REG_FLAGS0(iobase));
698 DEBUGP(7, dev, "dev->flags0 = 0x%2x\n", dev->flags0);
699 DEBUGP(7, dev, "smartcard present: %s\n",
700 dev->flags0 & 1 ? "yes" : "no");
701 DEBUGP(7, dev, "cardman present: %s\n",
702 dev->flags0 == 0xff ? "no" : "yes");
703
704 if ((dev->flags0 & 1) == 0
705 || dev->flags0 == 0xff) {
706
707 dev->rlen =
708 dev->rpos =
709 dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0;
710 dev->mstate = M_FETCH_ATR;
711
712 dev->flags &= 0x000000ff;
713
714 if (dev->flags0 == 0xff) {
715 DEBUGP(4, dev, "set IS_CMM_ABSENT bit\n");
716 set_bit(IS_CMM_ABSENT, &dev->flags);
717 } else if (test_bit(IS_CMM_ABSENT, &dev->flags)) {
718 DEBUGP(4, dev, "clear IS_CMM_ABSENT bit "
719 "(card is removed)\n");
720 clear_bit(IS_CMM_ABSENT, &dev->flags);
721 }
722
723 goto release_io;
724 } else if ((dev->flags0 & 1) && test_bit(IS_CMM_ABSENT, &dev->flags)) {
725
726
727 DEBUGP(4, dev, "clear IS_CMM_ABSENT bit (card is inserted)\n");
728 clear_bit(IS_CMM_ABSENT, &dev->flags);
729 }
730
731 if (test_bit(IS_ATR_VALID, &dev->flags) == 1) {
732 DEBUGP(7, dev, "believe ATR is already valid (do nothing)\n");
733 goto release_io;
734 }
735
736 switch (dev->mstate) {
737 unsigned char flags0;
738 case M_CARDOFF:
739 DEBUGP(4, dev, "M_CARDOFF\n");
740 flags0 = inb(REG_FLAGS0(iobase));
741 if (flags0 & 0x02) {
742
743 dev->mdelay = T_10MSEC;
744 } else {
745
746
747 xoutb(0x80, REG_FLAGS0(iobase));
748
749
750
751 dev->rlen =
752 dev->rpos =
753 dev->atr_csum =
754 dev->atr_len_retry = dev->cwarn = 0;
755 dev->mstate = M_FETCH_ATR;
756
757
758 dev->mdelay = T_50MSEC;
759 }
760 break;
761 case M_FETCH_ATR:
762 DEBUGP(4, dev, "M_FETCH_ATR\n");
763 xoutb(0x80, REG_FLAGS0(iobase));
764 DEBUGP(4, dev, "Reset BAUDV to 9600\n");
765 dev->baudv = 0x173;
766 xoutb(0x02, REG_STOPBITS(iobase));
767 xoutb(0x73, REG_BAUDRATE(iobase));
768 xoutb(0x21, REG_FLAGS1(iobase));
769
770
771 xoutb(dev->flags0 & 2 ? 0x46 : 0x44, REG_FLAGS0(iobase));
772 dev->mdelay = T_40MSEC;
773 dev->mstate = M_TIMEOUT_WAIT;
774 break;
775 case M_TIMEOUT_WAIT:
776 DEBUGP(4, dev, "M_TIMEOUT_WAIT\n");
777
778 io_read_num_rec_bytes(iobase, &dev->atr_len);
779 dev->mdelay = T_10MSEC;
780 dev->mstate = M_READ_ATR_LEN;
781 break;
782 case M_READ_ATR_LEN:
783 DEBUGP(4, dev, "M_READ_ATR_LEN\n");
784
785
786#define MAX_ATR_LEN_RETRY 100
787
788 if (dev->atr_len == io_read_num_rec_bytes(iobase, &s)) {
789 if (dev->atr_len_retry++ >= MAX_ATR_LEN_RETRY) {
790 dev->mdelay = T_10MSEC;
791 dev->mstate = M_READ_ATR;
792 }
793 } else {
794 dev->atr_len = s;
795 dev->atr_len_retry = 0;
796 }
797
798 DEBUGP(4, dev, "Current ATR_LEN = %i\n", dev->atr_len);
799 break;
800 case M_READ_ATR:
801 DEBUGP(4, dev, "M_READ_ATR\n");
802 xoutb(0x80, REG_FLAGS0(iobase));
803 for (i = 0; i < dev->atr_len; i++) {
804 xoutb(i, REG_BUF_ADDR(iobase));
805 dev->atr[i] = inb(REG_BUF_DATA(iobase));
806 }
807
808 DEBUGP(4, dev, "Deactivate T_Active flags\n");
809 dev->flags1 = 0x01;
810 xoutb(dev->flags1, REG_FLAGS1(iobase));
811
812
813 set_bit(IS_ATR_PRESENT, &dev->flags);
814 if (dev->atr[0] == 0x03)
815 str_invert_revert(dev->atr, dev->atr_len);
816 atrc = parse_atr(dev);
817 if (atrc == 0) {
818 dev->mdelay = 0;
819 dev->mstate = M_BAD_CARD;
820 } else {
821 dev->mdelay = T_50MSEC;
822 dev->mstate = M_ATR_PRESENT;
823 set_bit(IS_ATR_VALID, &dev->flags);
824 }
825
826 if (test_bit(IS_ATR_VALID, &dev->flags) == 1) {
827 DEBUGP(4, dev, "monitor_card: ATR valid\n");
828
829
830 if ((test_bit(IS_AUTOPPS_ACT, &dev->flags) == 0) &&
831 (dev->ta1 != 0x11) &&
832 !(test_bit(IS_ANY_T0, &dev->flags) &&
833 test_bit(IS_ANY_T1, &dev->flags))) {
834 DEBUGP(4, dev, "Perform AUTOPPS\n");
835 set_bit(IS_AUTOPPS_ACT, &dev->flags);
836 ptsreq.protocol = ptsreq.protocol =
837 (0x01 << dev->proto);
838 ptsreq.flags = 0x01;
839 ptsreq.pts1 = 0x00;
840 ptsreq.pts2 = 0x00;
841 ptsreq.pts3 = 0x00;
842 if (set_protocol(dev, &ptsreq) == 0) {
843 DEBUGP(4, dev, "AUTOPPS ret SUCC\n");
844 clear_bit(IS_AUTOPPS_ACT, &dev->flags);
845 wake_up_interruptible(&dev->atrq);
846 } else {
847 DEBUGP(4, dev, "AUTOPPS failed: "
848 "repower using defaults\n");
849
850 clear_bit(IS_ATR_PRESENT, &dev->flags);
851 clear_bit(IS_ATR_VALID, &dev->flags);
852 dev->rlen =
853 dev->rpos =
854 dev->atr_csum =
855 dev->atr_len_retry = dev->cwarn = 0;
856 dev->mstate = M_FETCH_ATR;
857
858 dev->mdelay = T_50MSEC;
859 }
860 } else {
861
862
863 set_cardparameter(dev);
864 if (test_bit(IS_AUTOPPS_ACT, &dev->flags) == 1)
865 DEBUGP(4, dev, "AUTOPPS already active "
866 "2nd try:use default values\n");
867 if (dev->ta1 == 0x11)
868 DEBUGP(4, dev, "No AUTOPPS necessary "
869 "TA(1)==0x11\n");
870 if (test_bit(IS_ANY_T0, &dev->flags)
871 && test_bit(IS_ANY_T1, &dev->flags))
872 DEBUGP(4, dev, "Do NOT perform AUTOPPS "
873 "with multiprotocol cards\n");
874 clear_bit(IS_AUTOPPS_ACT, &dev->flags);
875 wake_up_interruptible(&dev->atrq);
876 }
877 } else {
878 DEBUGP(4, dev, "ATR invalid\n");
879 wake_up_interruptible(&dev->atrq);
880 }
881 break;
882 case M_BAD_CARD:
883 DEBUGP(4, dev, "M_BAD_CARD\n");
884
885 if (dev->cwarn == 0 || dev->cwarn == 10) {
886 set_bit(IS_BAD_CARD, &dev->flags);
887 printk(KERN_WARNING MODULE_NAME ": device %s: ",
888 dev->node.dev_name);
889 if (test_bit(IS_BAD_CSUM, &dev->flags)) {
890 DEBUGP(4, dev, "ATR checksum (0x%.2x, should "
891 "be zero) failed\n", dev->atr_csum);
892 }
893#ifdef CM4000_DEBUG
894 else if (test_bit(IS_BAD_LENGTH, &dev->flags)) {
895 DEBUGP(4, dev, "ATR length error\n");
896 } else {
897 DEBUGP(4, dev, "card damaged or wrong way "
898 "inserted\n");
899 }
900#endif
901 dev->cwarn = 0;
902 wake_up_interruptible(&dev->atrq);
903 }
904 dev->cwarn++;
905 dev->mdelay = T_100MSEC;
906 dev->mstate = M_FETCH_ATR;
907 break;
908 default:
909 DEBUGP(7, dev, "Unknown action\n");
910 break;
911 }
912
913release_io:
914 DEBUGP(7, dev, "release_io\n");
915 clear_bit(LOCK_IO, &dev->flags);
916 wake_up_interruptible(&dev->ioq);
917
918return_with_timer:
919 DEBUGP(7, dev, "<- monitor_card (returns with timer)\n");
920 mod_timer(&dev->timer, jiffies + dev->mdelay);
921 clear_bit(LOCK_MONITOR, &dev->flags);
922}
923
924
925
926static ssize_t cmm_read(struct file *filp, __user char *buf, size_t count,
927 loff_t *ppos)
928{
929 struct cm4000_dev *dev = filp->private_data;
930 unsigned int iobase = dev->p_dev->io.BasePort1;
931 ssize_t rc;
932 int i, j, k;
933
934 DEBUGP(2, dev, "-> cmm_read(%s,%d)\n", current->comm, current->pid);
935
936 if (count == 0)
937 return 0;
938
939 if (!pcmcia_dev_present(dev->p_dev) ||
940 test_bit(IS_CMM_ABSENT, &dev->flags))
941 return -ENODEV;
942
943 if (test_bit(IS_BAD_CSUM, &dev->flags))
944 return -EIO;
945
946
947 if (wait_event_interruptible
948 (dev->atrq,
949 ((filp->f_flags & O_NONBLOCK)
950 || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) != 0)))) {
951 if (filp->f_flags & O_NONBLOCK)
952 return -EAGAIN;
953 return -ERESTARTSYS;
954 }
955
956 if (test_bit(IS_ATR_VALID, &dev->flags) == 0)
957 return -EIO;
958
959
960 if (wait_event_interruptible
961 (dev->readq,
962 ((filp->f_flags & O_NONBLOCK) || (dev->rpos < dev->rlen)))) {
963 if (filp->f_flags & O_NONBLOCK)
964 return -EAGAIN;
965 return -ERESTARTSYS;
966 }
967
968
969 if (wait_event_interruptible
970 (dev->ioq,
971 ((filp->f_flags & O_NONBLOCK)
972 || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) == 0)))) {
973 if (filp->f_flags & O_NONBLOCK)
974 return -EAGAIN;
975 return -ERESTARTSYS;
976 }
977
978 rc = 0;
979 dev->flags0 = inb(REG_FLAGS0(iobase));
980 if ((dev->flags0 & 1) == 0
981 || dev->flags0 == 0xff) {
982 clear_bit(IS_ATR_VALID, &dev->flags);
983 if (dev->flags0 & 1) {
984 set_bit(IS_CMM_ABSENT, &dev->flags);
985 rc = -ENODEV;
986 }
987 rc = -EIO;
988 goto release_io;
989 }
990
991 DEBUGP(4, dev, "begin read answer\n");
992 j = min(count, (size_t)(dev->rlen - dev->rpos));
993 k = dev->rpos;
994 if (k + j > 255)
995 j = 256 - k;
996 DEBUGP(4, dev, "read1 j=%d\n", j);
997 for (i = 0; i < j; i++) {
998 xoutb(k++, REG_BUF_ADDR(iobase));
999 dev->rbuf[i] = xinb(REG_BUF_DATA(iobase));
1000 }
1001 j = min(count, (size_t)(dev->rlen - dev->rpos));
1002 if (k + j > 255) {
1003 DEBUGP(4, dev, "read2 j=%d\n", j);
1004 dev->flags1 |= 0x10;
1005 xoutb(dev->flags1, REG_FLAGS1(iobase));
1006 for (; i < j; i++) {
1007 xoutb(k++, REG_BUF_ADDR(iobase));
1008 dev->rbuf[i] = xinb(REG_BUF_DATA(iobase));
1009 }
1010 }
1011
1012 if (dev->proto == 0 && count > dev->rlen - dev->rpos && i) {
1013 DEBUGP(4, dev, "T=0 and count > buffer\n");
1014 dev->rbuf[i] = dev->rbuf[i - 1];
1015 dev->rbuf[i - 1] = dev->procbyte;
1016 j++;
1017 }
1018 count = j;
1019
1020 dev->rpos = dev->rlen + 1;
1021
1022
1023 DEBUGP(4, dev, "Clear T1Active\n");
1024 dev->flags1 &= 0xdf;
1025 xoutb(dev->flags1, REG_FLAGS1(iobase));
1026
1027 xoutb(0, REG_FLAGS1(iobase));
1028
1029 if (!io_detect_cm4000(iobase, dev))
1030 count = -ENODEV;
1031
1032 if (test_bit(IS_INVREV, &dev->flags) && count > 0)
1033 str_invert_revert(dev->rbuf, count);
1034
1035 if (copy_to_user(buf, dev->rbuf, count))
1036 return -EFAULT;
1037
1038release_io:
1039 clear_bit(LOCK_IO, &dev->flags);
1040 wake_up_interruptible(&dev->ioq);
1041
1042 DEBUGP(2, dev, "<- cmm_read returns: rc = %Zi\n",
1043 (rc < 0 ? rc : count));
1044 return rc < 0 ? rc : count;
1045}
1046
1047static ssize_t cmm_write(struct file *filp, const char __user *buf,
1048 size_t count, loff_t *ppos)
1049{
1050 struct cm4000_dev *dev = (struct cm4000_dev *) filp->private_data;
1051 unsigned int iobase = dev->p_dev->io.BasePort1;
1052 unsigned short s;
1053 unsigned char tmp;
1054 unsigned char infolen;
1055 unsigned char sendT0;
1056 unsigned short nsend;
1057 unsigned short nr;
1058 ssize_t rc;
1059 int i;
1060
1061 DEBUGP(2, dev, "-> cmm_write(%s,%d)\n", current->comm, current->pid);
1062
1063 if (count == 0)
1064 return 0;
1065
1066 if (dev->proto == 0 && count < 4) {
1067
1068 DEBUGP(4, dev, "T0 short write\n");
1069 return -EIO;
1070 }
1071
1072 nr = count & 0x1ff;
1073
1074 sendT0 = dev->proto ? 0 : nr > 5 ? 0x08 : 0;
1075
1076 if (!pcmcia_dev_present(dev->p_dev) ||
1077 test_bit(IS_CMM_ABSENT, &dev->flags))
1078 return -ENODEV;
1079
1080 if (test_bit(IS_BAD_CSUM, &dev->flags)) {
1081 DEBUGP(4, dev, "bad csum\n");
1082 return -EIO;
1083 }
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096 if (wait_event_interruptible
1097 (dev->atrq,
1098 ((filp->f_flags & O_NONBLOCK)
1099 || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) != 0)))) {
1100 if (filp->f_flags & O_NONBLOCK)
1101 return -EAGAIN;
1102 return -ERESTARTSYS;
1103 }
1104
1105 if (test_bit(IS_ATR_VALID, &dev->flags) == 0) {
1106 DEBUGP(4, dev, "invalid ATR\n");
1107 return -EIO;
1108 }
1109
1110
1111 if (wait_event_interruptible
1112 (dev->ioq,
1113 ((filp->f_flags & O_NONBLOCK)
1114 || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) == 0)))) {
1115 if (filp->f_flags & O_NONBLOCK)
1116 return -EAGAIN;
1117 return -ERESTARTSYS;
1118 }
1119
1120 if (copy_from_user(dev->sbuf, buf, ((count > 512) ? 512 : count)))
1121 return -EFAULT;
1122
1123 rc = 0;
1124 dev->flags0 = inb(REG_FLAGS0(iobase));
1125 if ((dev->flags0 & 1) == 0
1126 || dev->flags0 == 0xff) {
1127 clear_bit(IS_ATR_VALID, &dev->flags);
1128 if (dev->flags0 & 1) {
1129 set_bit(IS_CMM_ABSENT, &dev->flags);
1130 rc = -ENODEV;
1131 } else {
1132 DEBUGP(4, dev, "IO error\n");
1133 rc = -EIO;
1134 }
1135 goto release_io;
1136 }
1137
1138 xoutb(0x80, REG_FLAGS0(iobase));
1139
1140 if (!io_detect_cm4000(iobase, dev)) {
1141 rc = -ENODEV;
1142 goto release_io;
1143 }
1144
1145
1146 dev->flags1 |= (sendT0);
1147
1148 set_cardparameter(dev);
1149
1150
1151 tmp = inb(REG_FLAGS1(iobase));
1152
1153 dev->flags1 = 0x20
1154 | (sendT0)
1155 | (test_bit(IS_INVREV, &dev->flags) ? 2 : 0)
1156 | (((dev->baudv - 1) & 0x0100) >> 8);
1157 DEBUGP(1, dev, "set dev->flags1 = 0x%.2x\n", dev->flags1);
1158 xoutb(dev->flags1, REG_FLAGS1(iobase));
1159
1160
1161 DEBUGP(4, dev, "Xmit data\n");
1162 for (i = 0; i < nr; i++) {
1163 if (i >= 256) {
1164 dev->flags1 = 0x20
1165 | (sendT0)
1166
1167 | (test_bit(IS_INVREV, &dev->flags) ? 2 : 0)
1168 | (((dev->baudv - 1) & 0x0100) >> 8)
1169 | 0x10;
1170 DEBUGP(4, dev, "dev->flags = 0x%.2x - set address "
1171 "high\n", dev->flags1);
1172 xoutb(dev->flags1, REG_FLAGS1(iobase));
1173 }
1174 if (test_bit(IS_INVREV, &dev->flags)) {
1175 DEBUGP(4, dev, "Apply inverse convention for 0x%.2x "
1176 "-> 0x%.2x\n", (unsigned char)dev->sbuf[i],
1177 invert_revert(dev->sbuf[i]));
1178 xoutb(i, REG_BUF_ADDR(iobase));
1179 xoutb(invert_revert(dev->sbuf[i]),
1180 REG_BUF_DATA(iobase));
1181 } else {
1182 xoutb(i, REG_BUF_ADDR(iobase));
1183 xoutb(dev->sbuf[i], REG_BUF_DATA(iobase));
1184 }
1185 }
1186 DEBUGP(4, dev, "Xmit done\n");
1187
1188 if (dev->proto == 0) {
1189
1190 if (nr == 4) {
1191 DEBUGP(4, dev, "T=0 assumes 0 byte reply\n");
1192 xoutb(i, REG_BUF_ADDR(iobase));
1193 if (test_bit(IS_INVREV, &dev->flags))
1194 xoutb(0xff, REG_BUF_DATA(iobase));
1195 else
1196 xoutb(0x00, REG_BUF_DATA(iobase));
1197 }
1198
1199
1200 if (sendT0)
1201 nsend = nr;
1202 else {
1203 if (nr == 4)
1204 nsend = 5;
1205 else {
1206 nsend = 5 + (unsigned char)dev->sbuf[4];
1207 if (dev->sbuf[4] == 0)
1208 nsend += 0x100;
1209 }
1210 }
1211 } else
1212 nsend = nr;
1213
1214
1215 if (test_bit(IS_INVREV, &dev->flags)) {
1216 DEBUGP(4, dev, "T=0 set Procedure byte (inverse-reverse) "
1217 "0x%.2x\n", invert_revert(dev->sbuf[1]));
1218 xoutb(invert_revert(dev->sbuf[1]), REG_NUM_BYTES(iobase));
1219 } else {
1220 DEBUGP(4, dev, "T=0 set Procedure byte 0x%.2x\n", dev->sbuf[1]);
1221 xoutb(dev->sbuf[1], REG_NUM_BYTES(iobase));
1222 }
1223
1224 DEBUGP(1, dev, "set NumSendBytes = 0x%.2x\n",
1225 (unsigned char)(nsend & 0xff));
1226 xoutb((unsigned char)(nsend & 0xff), REG_NUM_SEND(iobase));
1227
1228 DEBUGP(1, dev, "Trigger CARDMAN CONTROLLER (0x%.2x)\n",
1229 0x40
1230 | (dev->flags0 & 2 ? 0 : 4)
1231 |(dev->proto ? 0x10 : 0x08)
1232 |(nsend & 0x100) >> 8 );
1233 xoutb(0x40
1234 | (dev->flags0 & 2 ? 0 : 4)
1235 |(dev->proto ? 0x10 : 0x08)
1236 |(nsend & 0x100) >> 8,
1237 REG_FLAGS0(iobase));
1238
1239
1240 if (dev->proto == 1) {
1241 DEBUGP(4, dev, "Wait for xmit done\n");
1242 for (i = 0; i < 1000; i++) {
1243 if (inb(REG_FLAGS0(iobase)) & 0x08)
1244 break;
1245 msleep_interruptible(10);
1246 }
1247 if (i == 1000) {
1248 DEBUGP(4, dev, "timeout waiting for xmit done\n");
1249 rc = -EIO;
1250 goto release_io;
1251 }
1252 }
1253
1254
1255
1256 infolen = 0;
1257 if (dev->proto) {
1258
1259 for (i = 0; i < 6000; i++) {
1260 io_read_num_rec_bytes(iobase, &s);
1261 if (s >= 3) {
1262 infolen = inb(REG_FLAGS1(iobase));
1263 DEBUGP(4, dev, "infolen=%d\n", infolen);
1264 break;
1265 }
1266 msleep_interruptible(10);
1267 }
1268 if (i == 6000) {
1269 DEBUGP(4, dev, "timeout waiting for infoLen\n");
1270 rc = -EIO;
1271 goto release_io;
1272 }
1273 } else
1274 clear_bit(IS_PROCBYTE_PRESENT, &dev->flags);
1275
1276
1277 io_read_num_rec_bytes(iobase, &dev->rlen);
1278 for (i = 0; i < 600; i++) {
1279 if (dev->proto) {
1280 if (dev->rlen >= infolen + 4)
1281 break;
1282 }
1283 msleep_interruptible(10);
1284
1285 io_read_num_rec_bytes(iobase, &s);
1286 if (s > dev->rlen) {
1287 DEBUGP(1, dev, "NumRecBytes inc (reset timeout)\n");
1288 i = 0;
1289 dev->rlen = s;
1290 }
1291
1292
1293
1294
1295
1296
1297
1298 else if (dev->proto == 0) {
1299 if ((inb(REG_BUF_ADDR(iobase)) & 0x80)) {
1300
1301 DEBUGP(1, dev, "NoProcedure byte set\n");
1302
1303 } else {
1304
1305 DEBUGP(1, dev, "NoProcedure byte unset "
1306 "(reset timeout)\n");
1307 dev->procbyte = inb(REG_FLAGS1(iobase));
1308 DEBUGP(1, dev, "Read procedure byte 0x%.2x\n",
1309 dev->procbyte);
1310 i = 0;
1311 }
1312 if (inb(REG_FLAGS0(iobase)) & 0x08) {
1313 DEBUGP(1, dev, "T0Done flag (read reply)\n");
1314 break;
1315 }
1316 }
1317 if (dev->proto)
1318 infolen = inb(REG_FLAGS1(iobase));
1319 }
1320 if (i == 600) {
1321 DEBUGP(1, dev, "timeout waiting for numRecBytes\n");
1322 rc = -EIO;
1323 goto release_io;
1324 } else {
1325 if (dev->proto == 0) {
1326 DEBUGP(1, dev, "Wait for T0Done bit to be set\n");
1327 for (i = 0; i < 1000; i++) {
1328 if (inb(REG_FLAGS0(iobase)) & 0x08)
1329 break;
1330 msleep_interruptible(10);
1331 }
1332 if (i == 1000) {
1333 DEBUGP(1, dev, "timeout waiting for T0Done\n");
1334 rc = -EIO;
1335 goto release_io;
1336 }
1337
1338 dev->procbyte = inb(REG_FLAGS1(iobase));
1339 DEBUGP(4, dev, "Read procedure byte 0x%.2x\n",
1340 dev->procbyte);
1341
1342 io_read_num_rec_bytes(iobase, &dev->rlen);
1343 DEBUGP(4, dev, "Read NumRecBytes = %i\n", dev->rlen);
1344
1345 }
1346 }
1347
1348 dev->rpos = dev->proto ? 0 : nr == 4 ? 5 : nr > dev->rlen ? 5 : nr;
1349 DEBUGP(4, dev, "dev->rlen = %i, dev->rpos = %i, nr = %i\n",
1350 dev->rlen, dev->rpos, nr);
1351
1352release_io:
1353 DEBUGP(4, dev, "Reset SM\n");
1354 xoutb(0x80, REG_FLAGS0(iobase));
1355
1356 if (rc < 0) {
1357 DEBUGP(4, dev, "Write failed but clear T_Active\n");
1358 dev->flags1 &= 0xdf;
1359 xoutb(dev->flags1, REG_FLAGS1(iobase));
1360 }
1361
1362 clear_bit(LOCK_IO, &dev->flags);
1363 wake_up_interruptible(&dev->ioq);
1364 wake_up_interruptible(&dev->readq);
1365
1366
1367 memset((char *)dev->sbuf, 0, 512);
1368
1369
1370 DEBUGP(2, dev, "<- cmm_write\n");
1371 return rc < 0 ? rc : nr;
1372}
1373
1374static void start_monitor(struct cm4000_dev *dev)
1375{
1376 DEBUGP(3, dev, "-> start_monitor\n");
1377 if (!dev->monitor_running) {
1378 DEBUGP(5, dev, "create, init and add timer\n");
1379 setup_timer(&dev->timer, monitor_card, (unsigned long)dev);
1380 dev->monitor_running = 1;
1381 mod_timer(&dev->timer, jiffies);
1382 } else
1383 DEBUGP(5, dev, "monitor already running\n");
1384 DEBUGP(3, dev, "<- start_monitor\n");
1385}
1386
1387static void stop_monitor(struct cm4000_dev *dev)
1388{
1389 DEBUGP(3, dev, "-> stop_monitor\n");
1390 if (dev->monitor_running) {
1391 DEBUGP(5, dev, "stopping monitor\n");
1392 terminate_monitor(dev);
1393
1394 clear_bit(IS_ATR_VALID, &dev->flags);
1395 clear_bit(IS_ATR_PRESENT, &dev->flags);
1396 } else
1397 DEBUGP(5, dev, "monitor already stopped\n");
1398 DEBUGP(3, dev, "<- stop_monitor\n");
1399}
1400
1401static long cmm_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1402{
1403 struct cm4000_dev *dev = filp->private_data;
1404 unsigned int iobase = dev->p_dev->io.BasePort1;
1405 struct inode *inode = filp->f_path.dentry->d_inode;
1406 struct pcmcia_device *link;
1407 int size;
1408 int rc;
1409 void __user *argp = (void __user *)arg;
1410#ifdef CM4000_DEBUG
1411 char *ioctl_names[CM_IOC_MAXNR + 1] = {
1412 [_IOC_NR(CM_IOCGSTATUS)] "CM_IOCGSTATUS",
1413 [_IOC_NR(CM_IOCGATR)] "CM_IOCGATR",
1414 [_IOC_NR(CM_IOCARDOFF)] "CM_IOCARDOFF",
1415 [_IOC_NR(CM_IOCSPTS)] "CM_IOCSPTS",
1416 [_IOC_NR(CM_IOSDBGLVL)] "CM4000_DBGLVL",
1417 };
1418 DEBUGP(3, dev, "cmm_ioctl(device=%d.%d) %s\n", imajor(inode),
1419 iminor(inode), ioctl_names[_IOC_NR(cmd)]);
1420#endif
1421
1422 lock_kernel();
1423 rc = -ENODEV;
1424 link = dev_table[iminor(inode)];
1425 if (!pcmcia_dev_present(link)) {
1426 DEBUGP(4, dev, "DEV_OK false\n");
1427 goto out;
1428 }
1429
1430 if (test_bit(IS_CMM_ABSENT, &dev->flags)) {
1431 DEBUGP(4, dev, "CMM_ABSENT flag set\n");
1432 goto out;
1433 }
1434 rc = -EINVAL;
1435
1436 if (_IOC_TYPE(cmd) != CM_IOC_MAGIC) {
1437 DEBUGP(4, dev, "ioctype mismatch\n");
1438 goto out;
1439 }
1440 if (_IOC_NR(cmd) > CM_IOC_MAXNR) {
1441 DEBUGP(4, dev, "iocnr mismatch\n");
1442 goto out;
1443 }
1444 size = _IOC_SIZE(cmd);
1445 rc = -EFAULT;
1446 DEBUGP(4, dev, "iocdir=%.4x iocr=%.4x iocw=%.4x iocsize=%d cmd=%.4x\n",
1447 _IOC_DIR(cmd), _IOC_READ, _IOC_WRITE, size, cmd);
1448
1449 if (_IOC_DIR(cmd) & _IOC_READ) {
1450 if (!access_ok(VERIFY_WRITE, argp, size))
1451 goto out;
1452 }
1453 if (_IOC_DIR(cmd) & _IOC_WRITE) {
1454 if (!access_ok(VERIFY_READ, argp, size))
1455 goto out;
1456 }
1457 rc = 0;
1458
1459 switch (cmd) {
1460 case CM_IOCGSTATUS:
1461 DEBUGP(4, dev, " ... in CM_IOCGSTATUS\n");
1462 {
1463 int status;
1464
1465
1466
1467 status = dev->flags0 & 3;
1468 if (test_bit(IS_ATR_PRESENT, &dev->flags))
1469 status |= CM_ATR_PRESENT;
1470 if (test_bit(IS_ATR_VALID, &dev->flags))
1471 status |= CM_ATR_VALID;
1472 if (test_bit(IS_CMM_ABSENT, &dev->flags))
1473 status |= CM_NO_READER;
1474 if (test_bit(IS_BAD_CARD, &dev->flags))
1475 status |= CM_BAD_CARD;
1476 if (copy_to_user(argp, &status, sizeof(int)))
1477 rc = -EFAULT;
1478 }
1479 break;
1480 case CM_IOCGATR:
1481 DEBUGP(4, dev, "... in CM_IOCGATR\n");
1482 {
1483 struct atreq __user *atreq = argp;
1484 int tmp;
1485
1486 if (wait_event_interruptible
1487 (dev->atrq,
1488 ((filp->f_flags & O_NONBLOCK)
1489 || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags)
1490 != 0)))) {
1491 if (filp->f_flags & O_NONBLOCK)
1492 rc = -EAGAIN;
1493 else
1494 rc = -ERESTARTSYS;
1495 break;
1496 }
1497
1498 rc = -EFAULT;
1499 if (test_bit(IS_ATR_VALID, &dev->flags) == 0) {
1500 tmp = -1;
1501 if (copy_to_user(&(atreq->atr_len), &tmp,
1502 sizeof(int)))
1503 break;
1504 } else {
1505 if (copy_to_user(atreq->atr, dev->atr,
1506 dev->atr_len))
1507 break;
1508
1509 tmp = dev->atr_len;
1510 if (copy_to_user(&(atreq->atr_len), &tmp, sizeof(int)))
1511 break;
1512 }
1513 rc = 0;
1514 break;
1515 }
1516 case CM_IOCARDOFF:
1517
1518#ifdef CM4000_DEBUG
1519 DEBUGP(4, dev, "... in CM_IOCARDOFF\n");
1520 if (dev->flags0 & 0x01) {
1521 DEBUGP(4, dev, " Card inserted\n");
1522 } else {
1523 DEBUGP(2, dev, " No card inserted\n");
1524 }
1525 if (dev->flags0 & 0x02) {
1526 DEBUGP(4, dev, " Card powered\n");
1527 } else {
1528 DEBUGP(2, dev, " Card not powered\n");
1529 }
1530#endif
1531
1532
1533 if ((dev->flags0 & 0x01) && (dev->flags0 & 0x02)) {
1534
1535
1536 if (wait_event_interruptible
1537 (dev->ioq,
1538 ((filp->f_flags & O_NONBLOCK)
1539 || (test_and_set_bit(LOCK_IO, (void *)&dev->flags)
1540 == 0)))) {
1541 if (filp->f_flags & O_NONBLOCK)
1542 rc = -EAGAIN;
1543 else
1544 rc = -ERESTARTSYS;
1545 break;
1546 }
1547
1548 DEBUGP(4, dev, "Set Flags0=0x42 \n");
1549 xoutb(0x42, REG_FLAGS0(iobase));
1550 clear_bit(IS_ATR_PRESENT, &dev->flags);
1551 clear_bit(IS_ATR_VALID, &dev->flags);
1552 dev->mstate = M_CARDOFF;
1553 clear_bit(LOCK_IO, &dev->flags);
1554 if (wait_event_interruptible
1555 (dev->atrq,
1556 ((filp->f_flags & O_NONBLOCK)
1557 || (test_bit(IS_ATR_VALID, (void *)&dev->flags) !=
1558 0)))) {
1559 if (filp->f_flags & O_NONBLOCK)
1560 rc = -EAGAIN;
1561 else
1562 rc = -ERESTARTSYS;
1563 break;
1564 }
1565 }
1566
1567 clear_bit(LOCK_IO, &dev->flags);
1568 wake_up_interruptible(&dev->ioq);
1569
1570 rc = 0;
1571 break;
1572 case CM_IOCSPTS:
1573 {
1574 struct ptsreq krnptsreq;
1575
1576 if (copy_from_user(&krnptsreq, argp,
1577 sizeof(struct ptsreq))) {
1578 rc = -EFAULT;
1579 break;
1580 }
1581
1582 rc = 0;
1583 DEBUGP(4, dev, "... in CM_IOCSPTS\n");
1584
1585 if (wait_event_interruptible
1586 (dev->atrq,
1587 ((filp->f_flags & O_NONBLOCK)
1588 || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags)
1589 != 0)))) {
1590 if (filp->f_flags & O_NONBLOCK)
1591 rc = -EAGAIN;
1592 else
1593 rc = -ERESTARTSYS;
1594 break;
1595 }
1596
1597 if (wait_event_interruptible
1598 (dev->ioq,
1599 ((filp->f_flags & O_NONBLOCK)
1600 || (test_and_set_bit(LOCK_IO, (void *)&dev->flags)
1601 == 0)))) {
1602 if (filp->f_flags & O_NONBLOCK)
1603 rc = -EAGAIN;
1604 else
1605 rc = -ERESTARTSYS;
1606 break;
1607 }
1608
1609 if ((rc = set_protocol(dev, &krnptsreq)) != 0) {
1610
1611 dev->mstate = M_FETCH_ATR;
1612 clear_bit(IS_ATR_VALID, &dev->flags);
1613 }
1614
1615 clear_bit(LOCK_IO, &dev->flags);
1616 wake_up_interruptible(&dev->ioq);
1617
1618 }
1619 break;
1620#ifdef CM4000_DEBUG
1621 case CM_IOSDBGLVL:
1622 rc = -ENOTTY;
1623 break;
1624#endif
1625 default:
1626 DEBUGP(4, dev, "... in default (unknown IOCTL code)\n");
1627 rc = -ENOTTY;
1628 }
1629out:
1630 unlock_kernel();
1631 return rc;
1632}
1633
1634static int cmm_open(struct inode *inode, struct file *filp)
1635{
1636 struct cm4000_dev *dev;
1637 struct pcmcia_device *link;
1638 int minor = iminor(inode);
1639 int ret;
1640
1641 if (minor >= CM4000_MAX_DEV)
1642 return -ENODEV;
1643
1644 lock_kernel();
1645 link = dev_table[minor];
1646 if (link == NULL || !pcmcia_dev_present(link)) {
1647 ret = -ENODEV;
1648 goto out;
1649 }
1650
1651 if (link->open) {
1652 ret = -EBUSY;
1653 goto out;
1654 }
1655
1656 dev = link->priv;
1657 filp->private_data = dev;
1658
1659 DEBUGP(2, dev, "-> cmm_open(device=%d.%d process=%s,%d)\n",
1660 imajor(inode), minor, current->comm, current->pid);
1661
1662
1663
1664
1665
1666 ZERO_DEV(dev);
1667
1668
1669
1670
1671
1672
1673
1674 if (filp->f_flags & O_NONBLOCK) {
1675 ret = -EAGAIN;
1676 goto out;
1677 }
1678
1679 dev->mdelay = T_50MSEC;
1680
1681
1682 start_monitor(dev);
1683
1684 link->open = 1;
1685
1686 DEBUGP(2, dev, "<- cmm_open\n");
1687 ret = nonseekable_open(inode, filp);
1688out:
1689 unlock_kernel();
1690 return ret;
1691}
1692
1693static int cmm_close(struct inode *inode, struct file *filp)
1694{
1695 struct cm4000_dev *dev;
1696 struct pcmcia_device *link;
1697 int minor = iminor(inode);
1698
1699 if (minor >= CM4000_MAX_DEV)
1700 return -ENODEV;
1701
1702 link = dev_table[minor];
1703 if (link == NULL)
1704 return -ENODEV;
1705
1706 dev = link->priv;
1707
1708 DEBUGP(2, dev, "-> cmm_close(maj/min=%d.%d)\n",
1709 imajor(inode), minor);
1710
1711 stop_monitor(dev);
1712
1713 ZERO_DEV(dev);
1714
1715 link->open = 0;
1716 wake_up(&dev->devq);
1717
1718 DEBUGP(2, dev, "cmm_close\n");
1719 return 0;
1720}
1721
1722static void cmm_cm4000_release(struct pcmcia_device * link)
1723{
1724 struct cm4000_dev *dev = link->priv;
1725
1726
1727
1728
1729 DEBUGP(3, dev, "-> cmm_cm4000_release\n");
1730 while (link->open) {
1731 printk(KERN_INFO MODULE_NAME ": delaying release until "
1732 "process has terminated\n");
1733
1734
1735
1736
1737 wait_event(dev->devq, (link->open == 0));
1738 }
1739
1740 DEBUGP(3, dev, "<- cmm_cm4000_release\n");
1741 return;
1742}
1743
1744
1745
1746static int cm4000_config_check(struct pcmcia_device *p_dev,
1747 cistpl_cftable_entry_t *cfg,
1748 cistpl_cftable_entry_t *dflt,
1749 unsigned int vcc,
1750 void *priv_data)
1751{
1752 if (!cfg->io.nwin)
1753 return -ENODEV;
1754
1755
1756 p_dev->io.BasePort1 = cfg->io.win[0].base;
1757 p_dev->io.NumPorts1 = cfg->io.win[0].len;
1758 p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
1759 if (!(cfg->io.flags & CISTPL_IO_8BIT))
1760 p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
1761 if (!(cfg->io.flags & CISTPL_IO_16BIT))
1762 p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
1763 p_dev->io.IOAddrLines = cfg->io.flags & CISTPL_IO_LINES_MASK;
1764
1765 return pcmcia_request_io(p_dev, &p_dev->io);
1766}
1767
1768static int cm4000_config(struct pcmcia_device * link, int devno)
1769{
1770 struct cm4000_dev *dev;
1771
1772
1773 if (pcmcia_loop_config(link, cm4000_config_check, NULL))
1774 goto cs_release;
1775
1776 link->conf.IntType = 00000002;
1777
1778 if (pcmcia_request_configuration(link, &link->conf))
1779 goto cs_release;
1780
1781 dev = link->priv;
1782 sprintf(dev->node.dev_name, DEVICE_NAME "%d", devno);
1783 dev->node.major = major;
1784 dev->node.minor = devno;
1785 dev->node.next = NULL;
1786 link->dev_node = &dev->node;
1787
1788 return 0;
1789
1790cs_release:
1791 cm4000_release(link);
1792 return -ENODEV;
1793}
1794
1795static int cm4000_suspend(struct pcmcia_device *link)
1796{
1797 struct cm4000_dev *dev;
1798
1799 dev = link->priv;
1800 stop_monitor(dev);
1801
1802 return 0;
1803}
1804
1805static int cm4000_resume(struct pcmcia_device *link)
1806{
1807 struct cm4000_dev *dev;
1808
1809 dev = link->priv;
1810 if (link->open)
1811 start_monitor(dev);
1812
1813 return 0;
1814}
1815
1816static void cm4000_release(struct pcmcia_device *link)
1817{
1818 cmm_cm4000_release(link);
1819 pcmcia_disable_device(link);
1820}
1821
1822static int cm4000_probe(struct pcmcia_device *link)
1823{
1824 struct cm4000_dev *dev;
1825 int i, ret;
1826
1827 for (i = 0; i < CM4000_MAX_DEV; i++)
1828 if (dev_table[i] == NULL)
1829 break;
1830
1831 if (i == CM4000_MAX_DEV) {
1832 printk(KERN_NOTICE MODULE_NAME ": all devices in use\n");
1833 return -ENODEV;
1834 }
1835
1836
1837 dev = kzalloc(sizeof(struct cm4000_dev), GFP_KERNEL);
1838 if (dev == NULL)
1839 return -ENOMEM;
1840
1841 dev->p_dev = link;
1842 link->priv = dev;
1843 link->conf.IntType = INT_MEMORY_AND_IO;
1844 dev_table[i] = link;
1845
1846 init_waitqueue_head(&dev->devq);
1847 init_waitqueue_head(&dev->ioq);
1848 init_waitqueue_head(&dev->atrq);
1849 init_waitqueue_head(&dev->readq);
1850
1851 ret = cm4000_config(link, i);
1852 if (ret) {
1853 dev_table[i] = NULL;
1854 kfree(dev);
1855 return ret;
1856 }
1857
1858 device_create(cmm_class, NULL, MKDEV(major, i), NULL, "cmm%d", i);
1859
1860 return 0;
1861}
1862
1863static void cm4000_detach(struct pcmcia_device *link)
1864{
1865 struct cm4000_dev *dev = link->priv;
1866 int devno;
1867
1868
1869 for (devno = 0; devno < CM4000_MAX_DEV; devno++)
1870 if (dev_table[devno] == link)
1871 break;
1872 if (devno == CM4000_MAX_DEV)
1873 return;
1874
1875 stop_monitor(dev);
1876
1877 cm4000_release(link);
1878
1879 dev_table[devno] = NULL;
1880 kfree(dev);
1881
1882 device_destroy(cmm_class, MKDEV(major, devno));
1883
1884 return;
1885}
1886
1887static const struct file_operations cm4000_fops = {
1888 .owner = THIS_MODULE,
1889 .read = cmm_read,
1890 .write = cmm_write,
1891 .unlocked_ioctl = cmm_ioctl,
1892 .open = cmm_open,
1893 .release= cmm_close,
1894};
1895
1896static struct pcmcia_device_id cm4000_ids[] = {
1897 PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0002),
1898 PCMCIA_DEVICE_PROD_ID12("CardMan", "4000", 0x2FB368CA, 0xA2BD8C39),
1899 PCMCIA_DEVICE_NULL,
1900};
1901MODULE_DEVICE_TABLE(pcmcia, cm4000_ids);
1902
1903static struct pcmcia_driver cm4000_driver = {
1904 .owner = THIS_MODULE,
1905 .drv = {
1906 .name = "cm4000_cs",
1907 },
1908 .probe = cm4000_probe,
1909 .remove = cm4000_detach,
1910 .suspend = cm4000_suspend,
1911 .resume = cm4000_resume,
1912 .id_table = cm4000_ids,
1913};
1914
1915static int __init cmm_init(void)
1916{
1917 int rc;
1918
1919 printk(KERN_INFO "%s\n", version);
1920
1921 cmm_class = class_create(THIS_MODULE, "cardman_4000");
1922 if (IS_ERR(cmm_class))
1923 return PTR_ERR(cmm_class);
1924
1925 major = register_chrdev(0, DEVICE_NAME, &cm4000_fops);
1926 if (major < 0) {
1927 printk(KERN_WARNING MODULE_NAME
1928 ": could not get major number\n");
1929 class_destroy(cmm_class);
1930 return major;
1931 }
1932
1933 rc = pcmcia_register_driver(&cm4000_driver);
1934 if (rc < 0) {
1935 unregister_chrdev(major, DEVICE_NAME);
1936 class_destroy(cmm_class);
1937 return rc;
1938 }
1939
1940 return 0;
1941}
1942
1943static void __exit cmm_exit(void)
1944{
1945 printk(KERN_INFO MODULE_NAME ": unloading\n");
1946 pcmcia_unregister_driver(&cm4000_driver);
1947 unregister_chrdev(major, DEVICE_NAME);
1948 class_destroy(cmm_class);
1949};
1950
1951module_init(cmm_init);
1952module_exit(cmm_exit);
1953MODULE_LICENSE("Dual BSD/GPL");
1954
