1config PPC64 2 bool "64-bit kernel" 3 default n 4 help 5 This option selects whether a 32-bit or a 64-bit kernel 6 will be built. 7 8menu "Processor support" 9choice 10 prompt "Processor Type" 11 depends on PPC32 12 help 13 There are five families of 32 bit PowerPC chips supported. 14 The most common ones are the desktop and server CPUs (601, 603, 15 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their 16 embedded 512x/52xx/82xx/83xx/86xx counterparts. 17 The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500 18 (85xx) each form a family of their own that is not compatible 19 with the others. 20 21 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. 22 23config PPC_BOOK3S_32 24 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" 25 select PPC_FPU 26 27config PPC_85xx 28 bool "Freescale 85xx" 29 select E500 30 31config PPC_8xx 32 bool "Freescale 8xx" 33 select FSL_SOC 34 select 8xx 35 select PPC_LIB_RHEAP 36 37config 40x 38 bool "AMCC 40x" 39 select PPC_DCR_NATIVE 40 select PPC_UDBG_16550 41 select 4xx_SOC 42 select PPC_PCI_CHOICE 43 44config 44x 45 bool "AMCC 44x, 46x or 47x" 46 select PPC_DCR_NATIVE 47 select PPC_UDBG_16550 48 select 4xx_SOC 49 select PPC_PCI_CHOICE 50 select PHYS_64BIT 51 52config E200 53 bool "Freescale e200" 54 55endchoice 56 57choice 58 prompt "Processor Type" 59 depends on PPC64 60 help 61 There are two families of 64 bit PowerPC chips supported. 62 The most common ones are the desktop and server CPUs 63 (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...) 64 65 The other are the "embedded" processors compliant with the 66 "Book 3E" variant of the architecture 67 68config PPC_BOOK3S_64 69 bool "Server processors" 70 select PPC_FPU 71 select PPC_HAVE_PMU_SUPPORT 72 select SYS_SUPPORTS_HUGETLBFS 73 74config PPC_BOOK3E_64 75 bool "Embedded processors" 76 select PPC_FPU # Make it a choice ? 77 select PPC_SMP_MUXED_IPI 78 79endchoice 80 81config PPC_BOOK3S 82 def_bool y 83 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 84 85config PPC_BOOK3E 86 def_bool y 87 depends on PPC_BOOK3E_64 88 89config POWER4_ONLY 90 bool "Optimize for POWER4" 91 depends on PPC64 && PPC_BOOK3S 92 default n 93 ---help--- 94 Cause the compiler to optimize for POWER4/POWER5/PPC970 processors. 95 The resulting binary will not work on POWER3 or RS64 processors 96 when compiled with binutils 2.15 or later. 97 98config 6xx 99 def_bool y 100 depends on PPC32 && PPC_BOOK3S 101 select PPC_HAVE_PMU_SUPPORT 102 103config POWER3 104 bool 105 depends on PPC64 && PPC_BOOK3S 106 default y if !POWER4_ONLY 107 108config POWER4 109 depends on PPC64 && PPC_BOOK3S 110 def_bool y 111 112config PPC_A2 113 bool 114 depends on PPC_BOOK3E_64 115 116config TUNE_CELL 117 bool "Optimize for Cell Broadband Engine" 118 depends on PPC64 && PPC_BOOK3S 119 help 120 Cause the compiler to optimize for the PPE of the Cell Broadband 121 Engine. This will make the code run considerably faster on Cell 122 but somewhat slower on other machines. This option only changes 123 the scheduling of instructions, not the selection of instructions 124 itself, so the resulting kernel will keep running on all other 125 machines. When building a kernel that is supposed to run only 126 on Cell, you should also select the POWER4_ONLY option. 127 128# this is temp to handle compat with arch=ppc 129config 8xx 130 bool 131 132config E500 133 select FSL_EMB_PERFMON 134 select PPC_FSL_BOOK3E 135 bool 136 137config PPC_E500MC 138 bool "e500mc Support" 139 select PPC_FPU 140 depends on E500 141 142config PPC_FPU 143 bool 144 default y if PPC64 145 146config FSL_EMB_PERFMON 147 bool "Freescale Embedded Perfmon" 148 depends on E500 || PPC_83xx 149 help 150 This is the Performance Monitor support found on the e500 core 151 and some e300 cores (c3 and c4). Select this only if your 152 core supports the Embedded Performance Monitor APU 153 154config FSL_EMB_PERF_EVENT 155 bool 156 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS 157 default y 158 159config FSL_EMB_PERF_EVENT_E500 160 bool 161 depends on FSL_EMB_PERF_EVENT && E500 162 default y 163 164config 4xx 165 bool 166 depends on 40x || 44x 167 default y 168 169config BOOKE 170 bool 171 depends on E200 || E500 || 44x || PPC_BOOK3E 172 default y 173 174config FSL_BOOKE 175 bool 176 depends on (E200 || E500) && PPC32 177 select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT 178 default y 179 180# this is for common code between PPC32 & PPC64 FSL BOOKE 181config PPC_FSL_BOOK3E 182 bool 183 select FSL_EMB_PERFMON 184 select PPC_SMP_MUXED_IPI 185 default y if FSL_BOOKE 186 187config PTE_64BIT 188 bool 189 depends on 44x || E500 || PPC_86xx 190 default y if PHYS_64BIT 191 192config PHYS_64BIT 193 bool 'Large physical address support' if E500 || PPC_86xx 194 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx 195 ---help--- 196 This option enables kernel support for larger than 32-bit physical 197 addresses. This feature may not be available on all cores. 198 199 If you have more than 3.5GB of RAM or so, you also need to enable 200 SWIOTLB under Kernel Options for this to work. The actual number 201 is platform-dependent. 202 203 If in doubt, say N here. 204 205config ALTIVEC 206 bool "AltiVec Support" 207 depends on 6xx || POWER4 208 ---help--- 209 This option enables kernel support for the Altivec extensions to the 210 PowerPC processor. The kernel currently supports saving and restoring 211 altivec registers, and turning on the 'altivec enable' bit so user 212 processes can execute altivec instructions. 213 214 This option is only usefully if you have a processor that supports 215 altivec (G4, otherwise known as 74xx series), but does not have 216 any affect on a non-altivec cpu (it does, however add code to the 217 kernel). 218 219 If in doubt, say Y here. 220 221config VSX 222 bool "VSX Support" 223 depends on POWER4 && ALTIVEC && PPC_FPU 224 ---help--- 225 226 This option enables kernel support for the Vector Scaler extensions 227 to the PowerPC processor. The kernel currently supports saving and 228 restoring VSX registers, and turning on the 'VSX enable' bit so user 229 processes can execute VSX instructions. 230 231 This option is only useful if you have a processor that supports 232 VSX (P7 and above), but does not have any affect on a non-VSX 233 CPUs (it does, however add code to the kernel). 234 235 If in doubt, say Y here. 236 237config PPC_ICSWX 238 bool "Support for PowerPC icswx coprocessor instruction" 239 depends on POWER4 240 default n 241 ---help--- 242 243 This option enables kernel support for the PowerPC Initiate 244 Coprocessor Store Word (icswx) coprocessor instruction on POWER7 245 or newer processors. 246 247 This option is only useful if you have a processor that supports 248 the icswx coprocessor instruction. It does not have any effect 249 on processors without the icswx coprocessor instruction. 250 251 This option slightly increases kernel memory usage. 252 253 If in doubt, say N here. 254 255config SPE 256 bool "SPE Support" 257 depends on E200 || (E500 && !PPC_E500MC) 258 default y 259 ---help--- 260 This option enables kernel support for the Signal Processing 261 Extensions (SPE) to the PowerPC processor. The kernel currently 262 supports saving and restoring SPE registers, and turning on the 263 'spe enable' bit so user processes can execute SPE instructions. 264 265 This option is only useful if you have a processor that supports 266 SPE (e500, otherwise known as 85xx series), but does not have any 267 effect on a non-spe cpu (it does, however add code to the kernel). 268 269 If in doubt, say Y here. 270 271config PPC_STD_MMU 272 def_bool y 273 depends on PPC_BOOK3S 274 275config PPC_STD_MMU_32 276 def_bool y 277 depends on PPC_STD_MMU && PPC32 278 279config PPC_STD_MMU_64 280 def_bool y 281 depends on PPC_STD_MMU && PPC64 282 283config PPC_MMU_NOHASH 284 def_bool y 285 depends on !PPC_STD_MMU 286 287config PPC_BOOK3E_MMU 288 def_bool y 289 depends on FSL_BOOKE || PPC_BOOK3E 290 291config PPC_MM_SLICES 292 bool 293 default y if (PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES) 294 default n 295 296config VIRT_CPU_ACCOUNTING 297 bool "Deterministic task and CPU time accounting" 298 depends on PPC64 299 default y 300 help 301 Select this option to enable more accurate task and CPU time 302 accounting. This is done by reading a CPU counter on each 303 kernel entry and exit and on transitions within the kernel 304 between system, softirq and hardirq state, so there is a 305 small performance impact. This also enables accounting of 306 stolen time on logically-partitioned systems running on 307 IBM POWER5-based machines. 308 309 If in doubt, say Y here. 310 311config PPC_HAVE_PMU_SUPPORT 312 bool 313 314config PPC_PERF_CTRS 315 def_bool y 316 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT 317 help 318 This enables the powerpc-specific perf_event back-end. 319 320config SMP 321 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x 322 bool "Symmetric multi-processing support" 323 ---help--- 324 This enables support for systems with more than one CPU. If you have 325 a system with only one CPU, say N. If you have a system with more 326 than one CPU, say Y. Note that the kernel does not currently 327 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors 328 since they have inadequate hardware support for multiprocessor 329 operation. 330 331 If you say N here, the kernel will run on single and multiprocessor 332 machines, but will use only one CPU of a multiprocessor machine. If 333 you say Y here, the kernel will run on single-processor machines. 334 On a single-processor machine, the kernel will run faster if you say 335 N here. 336 337 If you don't know what to do here, say N. 338 339config NR_CPUS 340 int "Maximum number of CPUs (2-8192)" 341 range 2 8192 342 depends on SMP 343 default "32" if PPC64 344 default "4" 345 346config NOT_COHERENT_CACHE 347 bool 348 depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON 349 default n if PPC_47x 350 default y 351 352config CHECK_CACHE_COHERENCY 353 bool 354 355endmenu 356