linux/arch/mips/txx9/rbtx4939/setup.c
<<
"v2.6.204ioption> 8right.png" alt=">>"> ac.c">="+se="v2o method="post" onsubmit="r33.rn do_se="v2(this);option> nput typ/arhidden" nam/arnavtarget" 4.10/aroption> nput typ/artext" nam/arse="v2o idarse="v2option> buttx+vtyp/arsubmit">Se="v2 "v2"v2.6.23ti"2.6. class="lxr_p> s""v2.6.20n> +p> s?r33.rn=="v2.6.33.5" > v2.6.33.5 s();option> P> s3.1" apti"v2.6.23optio" div23optio" > ac.c">="ajax+*o method="post" onsubmit="r33.rn false;opti nput typ/arhidden" nam/arajax_lookupo idarajax_lookupo 4.10/aroptoptio" > "vtoptio" div class="headingbottxm">3 div idarfile_contents""

class="doneo idar5a/b4/7910c67ed72448423f5d61b64ef35055c436_3/0""<20n> ="v2.6.33.5" > v2.6.33.5io"1 ap"2.6. class="comment">/*"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io"2 ap"2.6. class="comment"> * Toshiba RBTX v2. .33.5 routines."v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io"3 ap"2.6. class="comment"> * Based on optioe="v2.6.33.5" > v286.33.5 ="v2.6.33.5" > v2.6.33.5io"4 ap"2.6. class="comment"> * and RBTX vxx patch from CELF patch ="v2ive."v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io"5 ap"2.6. class="comment"> *"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io"6 ap"2.6. class="comment"> * Copyright (C) 2000-2001,2005-2007 Toshiba Corpora.c">"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io"7 ap"2.6. class="comment"> * 2003-2005 (c) MontaVi/op Software, Inc. This file is licensed under the"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io"8 ap"2.6. class="comment"> * terms of the GNU General Public License versux+v2. This program is"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io"9 ap"2.6. class="comment"> * licensed "as is" without any warranty of any kind, whether exp> ss"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5iov2.6ap"2.6. class="comment"> * or implied."v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io11 ap"2.6. class="comment"> */"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io12 ap#include <<20n> includeoptio/init.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io13 ap#include <<20n> includeoptio/kernel.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io14 ap#include <<20n> includeoptio/typ/s.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io15 ap#include <<20n> includeoptio/slab.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io16 ap#include <<20n> includeoptio/export.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io17 ap#include <<20n> include _device.ho class="f> ">optio/plat > _device.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io18 ap#include <<20n> includeoptio/leds.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io19 ap#include <<20n> includeoptio/interrupt.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io20 ap#include <<20n> includeoptio/smc91x.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io21 ap#include <<20n> includeoptio/mtd/mtd.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io22 ap#include <<20n> includes.ho class="f> ">optio/mtd/parti.c">s.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io23 ap#include <<20n> includeoptio/mtd/map.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io24 ap#include <<20n> includeasm.reboot.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io25 ap#include <<20n> includeasm.5" generic.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io26 ap#include <<20n> includeasm.5" pci.h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io27 ap#include <<20n> include v2..ho class="f> ">asm.5" > v2..h ap>3<20n> ="v2.6.33.5" > v2.6.33.5io28 ap3<20n> ="v2.6.33.5" > v2.6.33.5io29 ap/optio void6.20n> +code= > v2._mav2ine_restart" class="s> "> > v2._mav2ine_restart ap(char *"20n> +code=command" class="s> ">command ap)3<20n> ="v2.6.33.5" > v2.6.33.5io30 ap{3<20n> ="v2.6.33.5" > v2.6.33.5io31 ap "20n> +code=local_irq_disable" class="s> ">local_irq_disable ap();3<20n> ="v2.6.33.5" > v2.6.33.5io32 ap "20n> +code=writeb" class="s> ">writeb ap(1,6.20n> +code= > v2._reseten_addr" class="s> "> > v2._reseten_addr ap);3<20n> ="v2.6.33.5" > v2.6.33.5io33 ap "20n> +code=writeb" class="s> ">writeb ap(1,6.20n> +code= > v2._softreset_addr" class="s> "> > v2._softreset_addr ap);3<20n> ="v2.6.33.5" > v2.6.33.5io34 ap while (1)3<20n> ="v2.6.33.5" > v2.6.33.5io35 ap ;3<20n> ="v2.6.33.5" > v2.6.33.5io36 ap}3<20n> ="v2.6.33.5" > v2.6.33.5io37 ap3<20n> ="v2.6.33.5" > v2.6.33.5io38 ap/optio void6.20n> +code=__init" class="s> ">__init ap .20n> +code= > v2._time_init" class="s> "> > v2._time_init ap(void)3<20n> ="v2.6.33.5" > v2.6.33.5io39 ap{3<20n> ="v2.6.33.5" > v2.6.33.5io40 ap "20n> +code= v2._time_init" class="s> "> v2._time_init ap(0);3<20n> ="v2.6.33.5" > v2.6.33.5io41 ap}3<20n> ="v2.6.33.5" > v2.6.33.5io42 ap3<20n> ="v2.6.33.5" > v2.6.33.5io43 ap#if "20n> +code=defined" class="s> ">defined ap(.20n> +code=__BIG_ENDIAN" class="s> ">__BIG_ENDIAN ap) && "20n> +code=IS_ENABLED" class="s> ">IS_ENABLED ap(.20n> +code=CONFIG_SMC91X" class="s> ">CONFIG_SMC91X ap)3<20n> ="v2.6.33.5" > v2.6.33.5io44 ap#define "20n> +code=HAVE_RBTX v2._IOSWAB" class="s> ">HAVE_RBTX v2._IOSWAB ap3<20n> ="v2.6.33.5" > v2.6.33.5io45 ap#define "20n> +code=IS_CE1_ADDR" class="s> ">IS_CE1_ADDR ap(.20n> +code=addr" class="s> ">addr ap) \3<20n> ="v2.6.33.5" > v2.6.33.5io46 ap ((((unsigned long)(.20n> +code=addr" class="s> ">addr ap) - "20n> +code=IO_BASE" class="s> ">IO_BASE ap) & 0xfff00000) == "20n> +code=TXX9_CE" class="s> ">TXX9_CE ap(1))3<20n> ="v2.6.33.5" > v2.6.33.5io47 ap/optio "20n> +code=u16o class="s> ">u16 ap .20n> +code= > v2._ioswabw" class="s> "> > v2._ioswabw ap(volptile "20n> +code=u16o class="s> ">u16 ap *"20n> +code=a" class="s> ">a ap,6.20n> +code=u16o class="s> ">u16 ap .20n> +code=xo class="s> ">x ap)3<20n> ="v2.6.33.5" > v2.6.33.5io48 ap{3<20n> ="v2.6.33.5" > v2.6.33.5io49 ap r33.rn "20n> +code=IS_CE1_ADDR" class="s> ">IS_CE1_ADDR ap(.20n> +code=a" class="s> ">a ap) ? .20n> +code=xo class="s> ">x ap : "20n> +code=le16_to_cpu" class="s> ">le16_to_cpu ap(.20n> +code=xo class="s> ">x ap);3<20n> ="v2.6.33.5" > v2.6.33.5io50 ap}3<20n> ="v2.6.33.5" > v2.6.33.5io51 ap/optio "20n> +code=u16o class="s> ">u16 ap .20n> +code= > v2._mem_ioswabw" class="s> "> > v2._mem_ioswabw ap(volptile "20n> +code=u16o class="s> ">u16 ap *"20n> +code=a" class="s> ">a ap,6.20n> +code=u16o class="s> ">u16 ap .20n> +code=xo class="s> ">x ap)3<20n> ="v2.6.33.5" > v2.6.33.5io52 ap{3<20n> ="v2.6.33.5" > v2.6.33.5io53 ap r33.rn !"20n> +code=IS_CE1_ADDR" class="s> ">IS_CE1_ADDR ap(.20n> +code=a" class="s> ">a ap) ? .20n> +code=xo class="s> ">x ap : "20n> +code=le16_to_cpu" class="s> ">le16_to_cpu ap(.20n> +code=xo class="s> ">x ap);3<20n> ="v2.6.33.5" > v2.6.33.5io54 ap}3<20n> ="v2.6.33.5" > v2.6.33.5io55 ap#endif "2.6. class="comment">/* __BIG_ENDIAN && CONFIG_SMC91X */"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io56 ap3<20n> ="v2.6.33.5" > v2.6.33.5io57 ap/optio void6.20n> +code=__init" class="s> ">__init ap .20n> +code= > v2._pci_.33.5" class="s> "> > v2._pci_.33.5 ap(void)3<20n> ="v2.6.33.5" > v2.6.33.5io58 ap{3<20n> ="v2.6.33.5" > v2.6.33.5io59 ap#ifdef .20n> +code=CONFIG_PCI" class="s> ">CONFIG_PCI ap3<20n> ="v2.6.33.5" > v2.6.33.5io60 ap int .20n> +code=extarb" class="s> ">extarb ap = !(.20n> +code=__raw_readq" class="s> ">__raw_readq ap(&"20n> +code= v2._ccfgptr" class="s> "> v2._ccfgptr ap->"20n> +code=ccfg" class="s> ">ccfg ap) & "20n> +code=TX v2._CCFG_PCIARB" class="s> ">TX v2._CCFG_PCIARB ap);3<20n> ="v2.6.33.5" > v2.6.33.5io61 ap struct .20n> +code=pci_controller" class="s> ">pci_controller ap *"20n> +code=c" class="s> ">c ap = &"20n> +code= x._primary_pcic" class="s> "> x._primary_pcic ap;3<20n> ="v2.6.33.5" > v2.6.33.5io62 ap3<20n> ="v2.6.33.5" > v2.6.33.5io63 ap "20n> +code=register_pci_controller" class="s> ">register_pci_controller ap(.20n> +code=c" class="s> ">c ap);3<20n> ="v2.6.33.5" > v2.6.33.5io64 ap3<20n> ="v2.6.33.5" > v2.6.33.5io65 ap "20n> +code= v2._report_pciclk" class="s> "> v2._report_pciclk ap();3<20n> ="v2.6.33.5" > v2.6.33.5io66 ap "20n> +code= v27_pcic_.33.5" class="s> "> v27_pcic_.33.5 ap(.20n> +code= v2._pcicptr" class="s> "> v2._pcicptr ap,6.20n> +code=c" class="s> ">c ap,6.20n> +code=extarb" class="s> ">extarb ap);3<20n> ="v2.6.33.5" > v2.6.33.5io67 ap if (!(.20n> +code=__raw_readq" class="s> ">__raw_readq ap(&"20n> +code= v2._ccfgptr" class="s> "> v2._ccfgptr ap->"20n> +code=pcfg" class="s> ">pcfg ap) & "20n> +code=TX v2._PCFG_ATA1MODE" class="s> ">TX v2._PCFG_ATA1MODE ap) &&3<20n> ="v2.6.33.5" > v2.6.33.5io68 ap (.20n> +code=__raw_readq" class="s> ">__raw_readq ap(&"20n> +code= v2._ccfgptr" class="s> "> v2._ccfgptr ap->"20n> +code=pcfg" class="s> ">pcfg ap) &3<20n> ="v2.6.33.5" > v2.6.33.5io69 ap (.20n> +code=TX v2._PCFG_ET0MODE" class="s> ">TX v2._PCFG_ET0MODE ap | "20n> +code=TX v2._PCFG_ET1MODE" class="s> ">TX v2._PCFG_ET1MODE ap))) {3<20n> ="v2.6.33.5" > v2.6.33.5io70 ap "20n> +code= v2._report_pci1clk" class="s> "> v2._report_pci1clk ap();3<20n> ="v2.6.33.5" > v2.6.33.5io71 ap3<20n> ="v2.6.33.5" > v2.6.33.5io72 ap "2.6. class="comment">/* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io73 ap "20n> +code=c" class="s> ">c ap = "20n> +code= x._alloc_pci_controller" class="s> "> x._alloc_pci_controller ap(.20n> +code=NULL" class="s> ">NULL ap,60,60x10000,60,60x10000);3<20n> ="v2.6.33.5" > v2.6.33.5io74 ap "20n> +code=register_pci_controller" class="s> ">register_pci_controller ap(.20n> +code=c" class="s> ">c ap);3<20n> ="v2.6.33.5" > v2.6.33.5io75 ap "20n> +code= v27_pcic_.33.5" class="s> "> v27_pcic_.33.5 ap(.20n> +code= v2._pcic1ptr" class="s> "> v2._pcic1ptr ap,6.20n> +code=c" class="s> ">c ap,60);3<20n> ="v2.6.33.5" > v2.6.33.5io76 ap }3<20n> ="v2.6.33.5" > v2.6.33.5io77 ap3<20n> ="v2.6.33.5" > v2.6.33.5io78 ap .20n> +code= v2._.33.5_pcierr_irq" class="s> "> v2._.33.5_pcierr_irq ap();3<20n> ="v2.6.33.5" > v2.6.33.5io79 ap#endif "2.6. class="comment">/* CONFIG_PCI */"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io80 ap}3<20n> ="v2.6.33.5" > v2.6.33.5io81 ap3<20n> ="v2.6.33.5" > v2.6.33.5io82 ap/optio unsigned long long "20n> +code=default_ebccr" class="s> ">default_ebccr ap[]6.20n> +code=__initdata" class="s> ">__initdata ap = {3<20n> ="v2.6.33.5" > v2.6.33.5io83 ap 0x01c0000000007608ULL, "2.6. class="comment">/* 64M ROM */"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io84 ap 0x017f000000007049ULL, "2.6. class="comment">/* 1M IOC */"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io85 ap 0x0180000000408608ULL, "2.6. class="comment">/* ISA */"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io86 ap 0,3<20n> ="v2.6.33.5" > v2.6.33.5io87 ap};3<20n> ="v2.6.33.5" > v2.6.33.5io88 ap3<20n> ="v2.6.33.5" > v2.6.33.5io89 ap/optio void6.20n> +code=__init" class="s> ">__init ap .20n> +code= > v2._ebusc_.33.5" class="s> "> > v2._ebusc_.33.5 ap(void)3<20n> ="v2.6.33.5" > v2.6.33.5io90 ap{3<20n> ="v2.6.33.5" > v2.6.33.5io91 ap int .20n> +code=i" class="s> ">i ap;3<20n> ="v2.6.33.5" > v2.6.33.5io92 ap unsigned int .20n> +code=s5" class="s> ">sp ap;3<20n> ="v2.6.33.5" > v2.6.33.5io93 ap3<20n> ="v2.6.33.5" > v2.6.33.5io94 ap "2.6. class="comment">/* use user-configured speed */"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5io95 ap "20n> +code=s5" class="s> ">sp ap = "20n> +code=TX v2._EBUSC_CR" class="s> ">TX v2._EBUSC_CR ap(0) & 0x30;3<20n> ="v2.6.33.5" > v2.6.33.5io96 ap "20n> +code=default_ebccr" class="s> ">default_ebccr ap[0] |= "20n> +code=s5" class="s> ">sp ap;3<20n> ="v2.6.33.5" > v2.6.33.5io97 ap "20n> +code=default_ebccr" class="s> ">default_ebccr ap[1] |= "20n> +code=s5" class="s> ">sp ap;3<20n> ="v2.6.33.5" > v2.6.33.5io98 ap .20n> +code=default_ebccr" class="s> ">default_ebccr ap[2] |= "20n> +code=s5" class="s> ">sp ap;3<20n> ="v2.6.33.5" > v2.6.33.5io99 ap "2.6. class="comment">/* initialise by myself */"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5i100 ap for (.20n> +code=i" class="s> ">i ap = 0; "20n> +code=i" class="s> ">i ap < "20n> +code=ARRAY_SIZE" class="s> ">ARRAY_SIZE ap(.20n> +code=default_ebccr" class="s> ">default_ebccr ap); "20n> +code=i" class="s> ">i ap++) {3<20n> ="v2.6.33.5" > v2.6.33.5i101 ap if (.20n> +code=default_ebccr" class="s> ">default_ebccr ap["20n> +code=i" class="s> ">i ap])3<20n> ="v2.6.33.5" > v2.6.33.5i102 ap .20n> +code=____raw_writeq" class="s> ">____raw_writeq ap(.20n> +code=default_ebccr" class="s> ">default_ebccr ap["20n> +code=i" class="s> ">i ap],3<20n> ="v2.6.33.5" > v2.6.33.5i103 ap &"20n> +code= v2._ebuscptr" class="s> "> v2._ebuscptr ap->"20n> +code=cr" class="s> ">cr ap["20n> +code=i" class="s> ">i ap]);3<20n> ="v2.6.33.5" > v2.6.33.5i104 ap else3<20n> ="v2.6.33.5" > v2.6.33.5i105 ap .20n> +code=____raw_writeq" class="s> ">____raw_writeq ap(.20n> +code=____raw_readq" class="s> ">____raw_readq ap(&"20n> +code= v2._ebuscptr" class="s> "> v2._ebuscptr ap->"20n> +code=cr" class="s> ">cr ap["20n> +code=i" class="s> ">i ap])3<20n> ="v2.6.33.5" > v2.6.33.5i106 ap & ~8,3<20n> ="v2.6.33.5" > v2.6.33.5i107 ap &"20n> +code= v2._ebuscptr" class="s> "> v2._ebuscptr ap->"20n> +code=cr" class="s> ">cr ap["20n> +code=i" class="s> ">i ap]);3<20n> ="v2.6.33.5" > v2.6.33.5i108 ap }3<20n> ="v2.6.33.5" > v2.6.33.5i109 ap}3<20n> ="v2.6.33.5" > v2.6.33.5i1v2.6ap3<20n> ="v2.6.33.5" > v2.6.33.5i111 ap/optio void6.20n> +code=__init" class="s> ">__init ap .20n> +code= > v2._update_ioc_pen" class="s> "> > v2._update_ioc_pen ap(void)3<20n> ="v2.6.33.5" > v2.6.33.5i112 ap{3<20n> ="v2.6.33.5" > v2.6.33.5i113 ap "20n> +code=__u64o class="s> ">__u64 ap .20n> +code=pcfg" class="s> ">pcfg ap = "20n> +code=____raw_readq" class="s> ">____raw_readq ap(&"20n> +code= v2._ccfgptr" class="s> "> v2._ccfgptr ap->"20n> +code=pcfg" class="s> ">pcfg ap);3<20n> ="v2.6.33.5" > v2.6.33.5i114 ap "20n> +code=__u64o class="s> ">__u64 ap .20n> +code=ccfg" class="s> ">ccfg ap = "20n> +code=____raw_readq" class="s> ">____raw_readq ap(&"20n> +code= v2._ccfgptr" class="s> "> v2._ccfgptr ap->"20n> +code=ccfg" class="s> ">ccfg ap);3<20n> ="v2.6.33.5" > v2.6.33.5i115 ap "20n> +code=__u8o class="s> ">__u8 ap .20n> +code=pe1" class="s> ">pe1 ap = "20n> +code=readb" class="s> ">readb ap(.20n> +code= > v2._pe1_addr" class="s> "> > v2._pe1_addr ap);3<20n> ="v2.6.33.5" > v2.6.33.5i116 ap "20n> +code=__u8o class="s> ">__u8 ap .20n> +code=pe2" class="s> ">pe2 ap = "20n> +code=readb" class="s> ">readb ap(.20n> +code= > v2._pe2_addr" class="s> "> > v2._pe2_addr ap);3<20n> ="v2.6.33.5" > v2.6.33.5i117 ap "20n> +code=__u8o class="s> ">__u8 ap .20n> +code=pe3" class="s> ">pe3 ap = "20n> +code=readb" class="s> ">readb ap(.20n> +code= > v2._pe3_addr" class="s> "> > v2._pe3_addr ap);3<20n> ="v2.6.33.5" > v2.6.33.5i118 ap if (.20n> +code=pcfg" class="s> ">pcfg ap & "20n> +code=TX v2._PCFG_ATA0MODE" class="s> ">TX v2._PCFG_ATA0MODE ap)3<20n> ="v2.6.33.5" > v2.6.33.5i119 ap "20n> +code=pe1" class="s> ">pe1 ap |= "20n> +code=RBTX v2._PE1_ATA" class="s> ">RBTX v2._PE1_ATA ap(0);3<20n> ="v2.6.33.5" > v2.6.33.5i120 ap else3<20n> ="v2.6.33.5" > v2.6.33.5i121 ap "20n> +code=pe1" class="s> ">pe1 ap &= ~"20n> +code=RBTX v2._PE1_ATA" class="s> ">RBTX v2._PE1_ATA ap(0);3<20n> ="v2.6.33.5" > v2.6.33.5i122 ap if (.20n> +code=pcfg" class="s> ">pcfg ap & "20n> +code=TX v2._PCFG_ATA1MODE" class="s> ">TX v2._PCFG_ATA1MODE ap) {3<20n> ="v2.6.33.5" > v2.6.33.5i123 ap "20n> +code=pe1" class="s> ">pe1 ap |= "20n> +code=RBTX v2._PE1_ATA" class="s> ">RBTX v2._PE1_ATA ap(1);3<20n> ="v2.6.33.5" > v2.6.33.5i124 ap "20n> +code=pe1" class="s> ">pe1 ap &= ~(.20n> +code=RBTX v2._PE1_RMII" class="s> ">RBTX v2._PE1_RMII ap(0) | "20n> +code=RBTX v2._PE1_RMII" class="s> ">RBTX v2._PE1_RMII ap(1));3<20n> ="v2.6.33.5" > v2.6.33.5i125 ap } else {3<20n> ="v2.6.33.5" > v2.6.33.5i126 ap "20n> +code=pe1" class="s> ">pe1 ap &= ~"20n> +code=RBTX v2._PE1_ATA" class="s> ">RBTX v2._PE1_ATA ap(1);3<20n> ="v2.6.33.5" > v2.6.33.5i127 ap if (.20n> +code=pcfg" class="s> ">pcfg ap & "20n> +code=TX v2._PCFG_ET0MODE" class="s> ">TX v2._PCFG_ET0MODE ap)3<20n> ="v2.6.33.5" > v2.6.33.5i128 ap "20n> +code=pe1" class="s> ">pe1 ap |= "20n> +code=RBTX v2._PE1_RMII" class="s> ">RBTX v2._PE1_RMII ap(0);3<20n> ="v2.6.33.5" > v2.6.33.5i129 ap else3<20n> ="v2.6.33.5" > v2.6.33.5i130 ap "20n> +code=pe1" class="s> ">pe1 ap &= ~"20n> +code=RBTX v2._PE1_RMII" class="s> ">RBTX v2._PE1_RMII ap(0);3<20n> ="v2.6.33.5" > v2.6.33.5i131 ap if (.20n> +code=pcfg" class="s> ">pcfg ap & "20n> +code=TX v2._PCFG_ET1MODE" class="s> ">TX v2._PCFG_ET1MODE ap)3<20n> ="v2.6.33.5" > v2.6.33.5i132 ap .20n> +code=pe1" class="s> ">pe1 ap |= "20n> +code=RBTX v2._PE1_RMII" class="s> ">RBTX v2._PE1_RMII ap(1);3<20n> ="v2.6.33.5" > v2.6.33.5i133 ap else3<20n> ="v2.6.33.5" > v2.6.33.5i134 ap "20n> +code=pe1" class="s> ">pe1 ap &= ~"20n> +code=RBTX v2._PE1_RMII" class="s> ">RBTX v2._PE1_RMII ap(1);3<20n> ="v2.6.33.5" > v2.6.33.5i135 ap }3<20n> ="v2.6.33.5" > v2.6.33.5i136 ap if (.20n> +code=ccfg" class="s> ">ccfg ap & "20n> +code=TX v2._CCFG_PTSEL" class="s> ">TX v2._CCFG_PTSEL ap)3<20n> ="v2.6.33.5" > v2.6.33.5i137 ap .20n> +code=pe3" class="s> ">pe3 ap &= ~(.20n> +code=RBTX v2._PE3_VP" class="s> ">RBTX v2._PE3_VP ap | "20n> +code=RBTX v2._PE3_VP_P" class="s> ">RBTX v2._PE3_VP_P ap |3<20n> ="v2.6.33.5" > v2.6.33.5i138 ap "20n> +code=RBTX v2._PE3_VP_S" class="s> ">RBTX v2._PE3_VP_S ap);3<20n> ="v2.6.33.5" > v2.6.33.5i139 ap else {3<20n> ="v2.6.33.5" > v2.6.33.5i140 ap "20n> +code=__u64o class="s> ">__u64 ap .20n> +code=vmodeo class="s> ">vmode ap = "20n> +code=pcfg" class="s> ">pcfg ap &3<20n> ="v2.6.33.5" > v2.6.33.5i141 ap (.20n> +code=TX v2._PCFG_VSSMODE" class="s> ">TX v2._PCFG_VSSMODE ap | "20n> +code=TX v2._PCFG_VPSMODE" class="s> ">TX v2._PCFG_VPSMODE ap);3<20n> ="v2.6.33.5" > v2.6.33.5i142 ap if (.20n> +code=vmodeo class="s> ">vmode ap == 0)3<20n> ="v2.6.33.5" > v2.6.33.5i143 ap .20n> +code=pe3" class="s> ">pe3 ap &= ~(.20n> +code=RBTX v2._PE3_VP" class="s> ">RBTX v2._PE3_VP ap | "20n> +code=RBTX v2._PE3_VP_P" class="s> ">RBTX v2._PE3_VP_P ap |3<20n> ="v2.6.33.5" > v2.6.33.5i144 ap "20n> +code=RBTX v2._PE3_VP_S" class="s> ">RBTX v2._PE3_VP_S ap);3<20n> ="v2.6.33.5" > v2.6.33.5i145 ap else if (.20n> +code=vmodeo class="s> ">vmode ap == "20n> +code=TX v2._PCFG_VPSMODE" class="s> ">TX v2._PCFG_VPSMODE ap) {3<20n> ="v2.6.33.5" > v2.6.33.5i146 ap .20n> +code=pe3" class="s> ">pe3 ap |= "20n> +code=RBTX v2._PE3_VP_P" class="s> ">RBTX v2._PE3_VP_P ap;3<20n> ="v2.6.33.5" > v2.6.33.5i147 ap .20n> +code=pe3" class="s> ">pe3 ap &= ~(.20n> +code=RBTX v2._PE3_VP" class="s> ">RBTX v2._PE3_VP ap | "20n> +code=RBTX v2._PE3_VP_S" class="s> ">RBTX v2._PE3_VP_S ap);3<20n> ="v2.6.33.5" > v2.6.33.5i148 ap } else if (.20n> +code=vmodeo class="s> ">vmode ap == "20n> +code=TX v2._PCFG_VSSMODE" class="s> ">TX v2._PCFG_VSSMODE ap) {3<20n> ="v2.6.33.5" > v2.6.33.5i149 ap .20n> +code=pe3" class="s> ">pe3 ap |= "20n> +code=RBTX v2._PE3_VP" class="s> ">RBTX v2._PE3_VP ap | "20n> +code=RBTX v2._PE3_VP_S" class="s> ">RBTX v2._PE3_VP_S ap;3<20n> ="v2.6.33.5" > v2.6.33.5i150 ap "20n> +code=pe3" class="s> ">pe3 ap &= ~"20n> +code=RBTX v2._PE3_VP_P" class="s> ">RBTX v2._PE3_VP_P ap;3<20n> ="v2.6.33.5" > v2.6.33.5i151 ap } else {3<20n> ="v2.6.33.5" > v2.6.33.5i152 ap .20n> +code=pe3" class="s> ">pe3 ap |= "20n> +code=RBTX v2._PE3_VP" class="s> ">RBTX v2._PE3_VP ap | "20n> +code=RBTX v2._PE3_VP_P" class="s> ">RBTX v2._PE3_VP_P ap;3<20n> ="v2.6.33.5" > v2.6.33.5i153 ap .20n> +code=pe3" class="s> ">pe3 ap &= ~"20n> +code=RBTX v2._PE3_VP_S" class="s> ">RBTX v2._PE3_VP_S ap;3<20n> ="v2.6.33.5" > v2.6.33.5i154 ap }3<20n> ="v2.6.33.5" > v2.6.33.5i155 ap }3<20n> ="v2.6.33.5" > v2.6.33.5i156 ap if (.20n> +code=pcfg" class="s> ">pcfg ap & "20n> +code=TX v2._PCFG_SPIMODE" class="s> ">TX v2._PCFG_SPIMODE ap) {3<20n> ="v2.6.33.5" > v2.6.33.5i157 ap if (.20n> +code=pcfg" class="s> ">pcfg ap & "20n> +code=TX v2._PCFG_SIO2MODE_GPIO" class="s> ">TX v2._PCFG_SIO2MODE_GPIO ap)3<20n> ="v2.6.33.5" > v2.6.33.5i158 ap "20n> +code=pe2" class="s> ">pe2 ap &= ~(.20n> +code=RBTX v2._PE2_SIO2" class="s> ">RBTX v2._PE2_SIO2 ap | "20n> +code=RBTX v2._PE2_SIO0" class="s> ">RBTX v2._PE2_SIO0 ap);3<20n> ="v2.6.33.5" > v2.6.33.5i159 ap else {3<20n> ="v2.6.33.5" > v2.6.33.5i160 ap if (.20n> +code=pcfg" class="s> ">pcfg ap & "20n> +code=TX v2._PCFG_SIO2MODE_SIO2" class="s> ">TX v2._PCFG_SIO2MODE_SIO2 ap) {3<20n> ="v2.6.33.5" > v2.6.33.5i161 ap "20n> +code=pe2" class="s> ">pe2 ap |= "20n> +code=RBTX v2._PE2_SIO2" class="s> ">RBTX v2._PE2_SIO2 ap;3<20n> ="v2.6.33.5" > v2.6.33.5i162 ap "20n> +code=pe2" class="s> ">pe2 ap &= ~"20n> +code=RBTX v2._PE2_SIO0" class="s> ">RBTX v2._PE2_SIO0 ap;3<20n> ="v2.6.33.5" > v2.6.33.5i163 ap } else {3<20n> ="v2.6.33.5" > v2.6.33.5i164 ap "20n> +code=pe2" class="s> ">pe2 ap |= "20n> +code=RBTX v2._PE2_SIO0" class="s> ">RBTX v2._PE2_SIO0 ap;3<20n> ="v2.6.33.5" > v2.6.33.5i165 ap "20n> +code=pe2" class="s> ">pe2 ap &= ~"20n> +code=RBTX v2._PE2_SIO2" class="s> ">RBTX v2._PE2_SIO2 ap;3<20n> ="v2.6.33.5" > v2.6.33.5i166 ap }3<20n> ="v2.6.33.5" > v2.6.33.5i167 ap }3<20n> ="v2.6.33.5" > v2.6.33.5i168 ap if (.20n> +code=pcfg" class="s> ">pcfg ap & "20n> +code=TX v2._PCFG_SIO3MODE" class="s> ">TX v2._PCFG_SIO3MODE ap)3<20n> ="v2.6.33.5" > v2.6.33.5i169 ap "20n> +code=pe2" class="s> ">pe2 ap |= "20n> +code=RBTX v2._PE2_SIO3" class="s> ">RBTX v2._PE2_SIO3 ap;3<20n> ="v2.6.33.5" > v2.6.33.5i170 ap else3<20n> ="v2.6.33.5" > v2.6.33.5i171 ap "20n> +code=pe2" class="s> ">pe2 ap &= ~"20n> +code=RBTX v2._PE2_SIO3" class="s> ">RBTX v2._PE2_SIO3 ap;3<20n> ="v2.6.33.5" > v2.6.33.5i172 ap "20n> +code=pe2" class="s> ">pe2 ap &= ~"20n> +code=RBTX v2._PE2_SPI" class="s> ">RBTX v2._PE2_SPI ap;3<20n> ="v2.6.33.5" > v2.6.33.5i173 ap } else {3<20n> ="v2.6.33.5" > v2.6.33.5i174 ap "20n> +code=pe2" class="s> ">pe2 ap |= "20n> +code=RBTX v2._PE2_SPI" class="s> ">RBTX v2._PE2_SPI ap;3<20n> ="v2.6.33.5" > v2.6.33.5i175 ap "20n> +code=pe2" class="s> ">pe2 ap &= ~(.20n> +code=RBTX v2._PE2_SIO3" class="s> ">RBTX v2._PE2_SIO3 ap | "20n> +code=RBTX v2._PE2_SIO2" class="s> ">RBTX v2._PE2_SIO2 ap |3<20n> ="v2.6.33.5" > v2.6.33.5i176 ap "20n> +code=RBTX v2._PE2_SIO0" class="s> ">RBTX v2._PE2_SIO0 ap);3<20n> ="v2.6.33.5" > v2.6.33.5i177 ap }3<20n> ="v2.6.33.5" > v2.6.33.5i178 ap if ((.20n> +code=pcfg" class="s> ">pcfg ap & "20n> +code=TX v2._PCFG_I2SMODE_MASK" class="s> ">TX v2._PCFG_I2SMODE_MASK ap) == "20n> +code=TX v2._PCFG_I2SMODE_GPIO" class="s> ">TX v2._PCFG_I2SMODE_GPIO ap)3<20n> ="v2.6.33.5" > v2.6.33.5i179 ap "20n> +code=pe2" class="s> ">pe2 ap |= "20n> +code=RBTX v2._PE2_GPIO" class="s> ">RBTX v2._PE2_GPIO ap;3<20n> ="v2.6.33.5" > v2.6.33.5i180 ap else3<20n> ="v2.6.33.5" > v2.6.33.5i181 ap "20n> +code=pe2" class="s> ">pe2 ap &= ~"20n> +code=RBTX v2._PE2_GPIO" class="s> ">RBTX v2._PE2_GPIO ap;3<20n> ="v2.6.33.5" > v2.6.33.5i182 ap "20n> +code=writeb" class="s> ">writeb ap("20n> +code=pe1" class="s> ">pe1 ap,6.20n> +code= > v2._pe1_addr" class="s> "> > v2._pe1_addr ap);3<20n> ="v2.6.33.5" > v2.6.33.5i183 ap "20n> +code=writeb" class="s> ">writeb ap("20n> +code=pe2" class="s> ">pe2 ap,6.20n> +code= > v2._pe2_addr" class="s> "> > v2._pe2_addr ap);3<20n> ="v2.6.33.5" > v2.6.33.5i184 ap "20n> +code=writeb" class="s> ">writeb ap("20n> +code=pe3" class="s> ">pe3 ap,6.20n> +code= > v2._pe3_addr" class="s> "> > v2._pe3_addr ap);3<20n> ="v2.6.33.5" > v2.6.33.5i185 ap}3<20n> ="v2.6.33.5" > v2.6.33.5i186 ap3<20n> ="v2.6.33.5" > v2.6.33.5i187 ap#define "20n> +code=RBTX v2._MAX_7SEGLEDS" class="s> ">RBTX v2._MAX_7SEGLEDS ap 83<20n> ="v2.6.33.5" > v2.6.33.5i188 ap3<20n> ="v2.6.33.5" > v2.6.33.5i189 ap#if "20n> +code=IS_ENABLED" class="s> ">IS_ENABLED ap(.20n> +code=CONFIG_LEDS_CLASS" class="s> ">CONFIG_LEDS_CLASS ap)3<20n> ="v2.6.33.5" > v2.6.33.5i190 ap/optio "20n> +code=u8o class="s> ">u8 ap .20n> +code=led_valo class="s> ">led_val ap["20n> +code=RBTX v2._MAX_7SEGLEDS" class="s> ">RBTX v2._MAX_7SEGLEDS ap];3<20n> ="v2.6.33.5" > v2.6.33.5i191 ap/oruct .20n> +code= > v2._led_data" class="s> "> > v2._led_data ap {3<20n> ="v2.6.33.5" > v2.6.33.5i192 ap /oruct .20n> +code=led_classdevo class="s> ">led_classdev ap .20n> +code=cdevo class="s> ">cdev ap;3<20n> ="v2.6.33.5" > v2.6.33.5i193 ap char .20n> +code=nam/o class="s> ">nam/ ap[32];3<20n> ="v2.6.33.5" > v2.6.33.5i194 ap unsigned int .20n> +code=numo class="s> ">num ap;3<20n> ="v2.6.33.5" > v2.6.33.5i195 ap};3<20n> ="v2.6.33.5" > v2.6.33.5i196 ap3<20n> ="v2.6.33.5" > v2.6.33.5i197 ap"2.6. class="comment">/* Use "dot" in 7seg LEDs */"v2.6.23<20n> ="v2.6.33.5" > v2.6.33.5i198 ap/optio void6.20n> +code= > v2._led_brightness_.33" class="s> "> > v2._led_brightness_.33 ap(/oruct .20n> +code=led_classdevo class="s> ">led_classdev ap *.20n> +code=led_cdevo class="s> ">led_cdev ap,3<20n> ="v2.6.33.5" > v2.6.33.5i199 ap enum .20n> +code=led_brightnesso class="s> ">led_brightness ap .20n> +code=valueo class="s> ">value ap)3<20n> ="v2.6.33.5" > v2.6.33.5i200 ap{3<20n> ="v2.6.33.5" > v2.6.33.5i201 ap /oruct .20n> +code= > v2._led_data" class="s> "> > v2._led_data ap *.20n> +code=led_dato class="s> ">led_dat ap =3<20n> ="v2.6.33.5" > v2.6.33.5i202 ap .20n> +code=container_ofo class="s> ">container_of ap(.20n> +code=led_cdevo class="s> ">led_cdev ap, /oruct .20n> +code= > v2._led_data" class="s> "> > v2._led_data ap,6.20n> +code=cdevo class="s> ">cdev ap);3<20n> ="v2.6.33.5" > v2.6.33.5i203 ap unsigned int .20n> +code=numo class="s> ">num ap = "20n> +code=led_dato class="s> ">led_dat ap->"20n> +code=numo class="s> ">num ap;3<20n> ="v2.6.33.5" > v2.6.33.5i204 ap unsigned long "20n> +code=flagso class="s> ">flags ap;3<20n> ="v2.6.33.5" > v2.6.33.5i205 ap3<20n> ="v2.6.33.5" > v2.6.33.5i206 ap "20n> +code=local_irq_saveo class="s> ">local_irq_save ap(.20n> +code=flagso class="s> ">flags ap);3<20n> ="v2.6.33.5" > v2.6.33.5i207 ap "20n> +code=led_valo class="s> ">led_val ap["20n> +code=numo class="s> ">num ap] = (.20n> +code=led_valo class="s> ">led_val ap["20n> +code=numo class="s> ">num ap] & 0x7f) | (.20n> +code=valueo class="s> ">value ap ? 0x80 :60);3<20n> ="v2.6.33.5" > v2.6.33.5i208 ap .20n> +code=writeb" class="s> ">writeb ap("20n> +code=led_valo class="s> ">led_val ap["20n> +code=numo class="s> ">num ap],6.20n> +code= > v2._7seg_addr" class="s> "> > v2._7seg_addr ap("20n> +code=numo class="s> ">num ap / 4,6.20n> +code=numo class="s> ">num ap % 4));3<20n> ="v2.6.33.5" > v2.6.33.5i209 ap "20n> +code=local_irq_restoreo class="s> ">local_irq_restore ap(.20n> +code=flagso class="s> ">flags ap);3<20n> ="v2.6.33.5" > v2.6.33.5i210 ap}3<20n> ="v2.6.33.5" > v2.6.33.5i211 ap3<20n> ="v2.6.33.5" > v2.6.33.5i212 ap/optio int .20n> +code=__init" class="s> ">__init ap .20n> +code= > v2._led_probeo class="s> "> > v2._led_probe ap(/oruct .20n> +code=platform_deviceo class="s> ">platform_device ap *.20n> +code=pdevo class="s> ">pdev ap)3<20n> ="v2.6.33.5" > v2.6.33.5i213 ap{3<20n> ="v2.6.33.5" > v2.6.33.5i214 ap /oruct .20n> +code= > v2._led_data" class="s> "> > v2._led_data ap *.20n> +code=leds_data" class="s> ">leds_data ap;3<20n> ="v2.6.33.5" > v2.6.33.5i215 ap int .20n> +code=i" class="s> ">i ap;3<20n> ="v2.6.33.5" > v2.6.33.5i216 ap /optio char *.20n> +code=default_triggerso class="s> ">default_triggers ap[]6.20n> +code=__initdata" class="s> ">__initdata ap = {3<20n> ="v2.6.33.5" > v2.6.33.5i217 ap .2.6. class="/oring">"heartbeat""v2.6.2,3<20n> ="v2.6.33.5" > v2.6.33.5i218 ap .2.6. class="/oring">"disk-activity""v2.6.2,3<20n> ="v2.6.33.5" > v2.6.33.5i219 ap "2.6. class="/oring">"nand-disk""v2.6.2,3<20n> ="v2.6.33.5" > v2.6.33.5i220 ap };3<20n> ="v2.6.33.5" > v2.6.33.5i221 ap3<20n> ="v2.6.33.5" > v2.6.33.5i222 ap "20n> +code=leds_data" class="s> ">leds_data ap = "20n> +code=kzalloc" class="s> ">kzalloc ap(/izeof(*.20n> +code=leds_data" class="s> ">leds_data ap) * "20n> +code=RBTX v2._MAX_7SEGLEDS" class="s> ">RBTX v2._MAX_7SEGLEDS ap,3<20n> ="v2.6.33.5" > v2.6.33.52ineo nam/arL123o>2ineo ."20n> +code=pe1" cls="/oring">&q_MAX_7SEGLEDS"GFP_KERN._CCFG_PTSEL ap)GFP_KERN._.33.5" > v2.6.33.5i124 ap 2 2"20n> +code_raw_ta" class="s> ">leds_data ap) * "20n> +code=RBTX > v2.6.33.5i125 ap }2else 2220n> +code=pe2" clr clrn -ta" class="s> ENOMEMta ap) * "20n>ENOMEM33.5" > v2.6.33.5i126 ap 2 2"20n> +code class="s> ">i ap = 0; "20n> +code=i" class="s> ">i ap < "20n> +code=ARRAY_SIZE" class="s> class="s> ">RBTX v2._MAX_7SEGLEDS ap,3<20n> ="v2.6.33.5ass="s> ">i ap++) {3<20n> ="v2.6.33.5" > v2.6.33.5i127 ap 2 2if (.20n> +code=pcfglass="s> ">i ap;rc ap(/izeof(*.2rc33.5" > v2.6.33.5i128 ap 2 2 "20n> +code > v2._led_data" class="s> "> > v2._led_data ap *.20n> +code=led_dato class="s> ">led_dat ap =3<20n> ="v2.6.33.5" v2._ebuscptr" class">leds_data ap) * "20n> +code=RBTss="s> ">i ap]);3<20n> ="v2.6.33." > v2.6.33.5i129 ap 2 2else3< > v2.6.33.5i130 ap 2 2 "20n> +codeo class="s> ">led_dat ap->"20n> +code=numo class="s> ">num ap;3<20n> ="v2.6.33.5loc" class="s> ">3<20n> ="v2.6.33.5" > v2.6.33.5i131 ap 2 2if (.20n> +code=pcfo class="s> ">led_dat ap->"20n> +code=numo class="s> ">num v ap);3<20n> ="v2.6.33..ass="s> ">num "s> "> > v2._led_brightnesuct .20n> +codeb" class="s> ">rea_.33" class="s> "> > v2._led_brightness_.33 ap(/oruct .20n> +code" > v2.6.33.5i132 ap 2 2 .20n> +codeclass="s> ">respquotner_of ap(.20n>spquotnd_valo class="s> ">led_dat ap->"20n> +code=numo class="s> ">num ap[32];3<20n> ="v2.6.,"nand-disk""v2.6.2 idarL21:amber:v2.6.u ="v2.6.33.5"c" class="s> ">3<20n> ="v2.6.33.55" > v2.6.33.5i133 ap 2 2else3<20n> ="v2.6.3o class="s> ">led_dat ap->"20n> +code=numo class="s> ">num v ap);3<20n> ="v2.6.33..ass="s> ">num ap[32];3<20n> ="v2.6.dato class="s> ">led_dat ap->"20n> +code=numo class="s> ">num ap[32];3<20n> ="v2.6." > v2.6.33.5i134 ap 2 2 "20n> +codeg" class="s> ">pcf< "20n> +code=ARRAY_SIZE" class="s> ">ARRAY_SIZE ap(.20n> +code=default_ebccr" class="s> ">de>default_triggers ap[]6.20n> +code=__in)X > v2.6.33.5i135 ap }2<20n>23 "20n> +codeo class="s> ">led_dat ap->"20n> +code=numo class="s> ">num v ap);3<20n> ="v2.6.33..ass="s> ">num 6.20n> +code_triggers ap[]6.20n> +code2.6.dato class="s> ">s="s> ">default_triggers ap[]6.20n> +code=__inis="s> ">i ap]);3<20n> ="v2.6.33." > v2.6.33.5i136 ap i2 (.202320n> +code=pe1" class="s> ">pe1 rc ap(/izeof(*.2rc33.5dato class="s> ">led_ +code=l_registde_triggers ap[]led_ +code=l_registdefault v2._ebuscptr" classv ap)3<20n> ="v2.6.33.5mo class="s> ">num ap)3<20n> ="v +code= v2._ebuscptr" class">l_dat ap->"20n> +code=numo class="s> ">num v ap);3<20n> ="v2.6.33.5" > v2.6.33.5i137 ap 2 2.20n> +code=pe3" clg" class="s> ">pcfrc ap(/izeof(*.2rc33.5dRAY_S5" > v2.6.33.5i138 ap 2 2 "20n> +code=RBTX vr clrn s="s> ">i ap;rc ap(/izeof(*.2rc33.5" > v2.6.33.5i139 ap e2se {32320n> +code=pe2" class="s> ">pe2 led_dat ap->"20n> +code=numo class="s> ">num v ap);3<20n> ="v2.6.33..ass="s> ">num "s> "> > v2._led_brightnesuct .20n> +codet v2._ebuscptr" classled_dat ap->"20n> +code=numo class="s> ">num v ap);3<20n> ="v2.6.33.,3.5" > v2.6.33.5i140 ap 2 2"20n> +code" > v2.6.33.5i141 ap 2 2 (.20n>r clrn 5" > v2.6.33.5i142 ap 2 2if (.2 > v2.6.33.5i143 ap 2 2 " > v2.6.33.5i144 ap 2 2 > v2.6.33.5i145 ap 2 2else i+code=dplatform_deviceo class="s> ">plrivde_triggers ap[]="s> ">plrivde v2._led_probeo class="s> "> >lrivde_triggers ap[]ass="s> "> >lrivde.6.33.5" > v2.6.33.5i146 ap 2 2 .20n> .ass="s> ">num 6rivde_triggers ap[]lrivde.6.333.5" > v2.6.33.5i147 ap 2 2 .20n> +code.ass="s> ">num ap[32];3<20n> ="v2.6.datouot;nand-disk""v2.6.2 idarL21-"> ="v2.6.33.5" > v2.6.33.5i148 ap 2 2} else if (.20}" > v2.6.33.5i149 ap 2 2 5" > v2.6.33.5i150 ap 2 2533.5" > v2.6.33.5i151 ap 2 25 +code=__init" class="s> ">__init ap .20n> +code= > v2._update_ioc_pen" class="> >o cla_triggers ap[]ass="s> "> >o clacodet33.5" > v2.6.33.5i152 ap 2 25.33.5" > v2.6.33.5i153 ap 2 25+code=writeb" class="s> ">w20n> +code=p_registde_simplrm_device ap *.20n> +code=p_registde_simplrfault_uot;nand-disk""v2.6.2 idarL21-"> ="v2.6.33.5" -1"c" class="s> ">NUL_CCFG_PTSEL ap)NUL_.33.,3.5" > v2.6.33.5i154 ap 2 25+code=writeb" class="s> ">w="s> ">plrivde> v2._led_probe ap="s> ">plrivde> v2codet v2._ebuscptr" classass="s> "> >lrivde_triggers ap[]ass="s> "> >lrivde.6.3v2._7seg_addr" class="s> "> > v2._led_probe ap(/oruct .20n> +code5" > v2.6.33.5i155 ap }2<20n>25.33.5" > v2.6.33.5i156 ap i2 (.202> +#3.5" > v2.6.33.5i157 ap 2 2if (.2u8o class="s> ">u8 ain ap <20n> ="v2.n apcode= v2._led_brightness_.33" class=o cla_triggers ap[]ass="s> "> >o clacodet33.5" > v2.6.33.5i158 ap 2 2 " > v2.6.33.5i159 ap 2 25.33.5" > v2.6.33.5i160 ap 2 2 #endif > v2.6.33.5i161 ap 2 2633.5" > v2.6.33.5i162 ap 2 262 +code=__init" class="s> ">__i("20n> +co20n> utc ap(/izeof(*.2_i("20n> +co20n> utccodet+code=numo class="s> ">num pot_triggers ap[]pot.6.3v2+code=numm/o class="s> ">namval ap["20n> +=numo c" > v2.6.33.5i163 ap 2 26.33.5" > v2.6.33.5i164 ap 2 2 ENABLED" class="s> ">IS_ENABLED ap(.20n> +code=CONFIG_LEDS_CLASS" class="s> ">CONFIG_LEDS_CLASS ap)3<20n> ="v2.6.33.5" > v2.6.33.5i165 ap 2 2 +code=flagso class="s> ">flags ap;3<20n> ="v2.6.33.5" > v2.6.33.5i166 ap 2 26+code=local_irq_saveo class="s> ">local_irq_save ap(.20n> +code=flagso class="s> ">flags ap);3<20n> ="v2.6.33.5" > v2.6.33.5i167 ap 2 2}3<20n> ="v/* Use "dot" inbit7:>r serv=fl cla e &quov2.6.33.5" > v2.6.33.5i168 ap 2 26+code=writeb" class="s> ">wled_val ap["20n> +code=numo class="s> ">num pot_triggers ap[]pot.6.3d_valo class="s> ">led_val ap["20n> +code=numo class="s> ">num pot_triggers ap[]pot.6.3d_ +code=80lueo class="s> ">value ap["20n> +=numo c +code=val" > v2.6.33.5i169 ap 2 26+code=local_irq_restoreo clalue ap["20n> +=numo c ato class="s> ">led_val ap["20n> +code=numo class="s> ">num pot_triggers ap[]pot.6.3d" > v2.6.33.5i170 ap 2 2else3<20n> rq_saveo class="s> ">loclocal_irq_restore ap(.20n> +code=flagso class="s> ">flags ap);3<20n> ="v2.6.33.5" > v2.6.33.5i171 ap 2 2 #endif > v2.6.33.5i172 ap 2 27+code=writeb" class="s> ">writeb ap("20n> +code=pe1" class="s> ">pe1 lue ap["20n> +=numo cv2._7seg_addr" class="s> "> > v2._7seg_addr ap("20n> +code=numo class="s> ">num pot_triggers ap[]pot.6.3umo class="s> ">num pot_triggers ap[]pot.6.3uv2.6.33.5" > v2.6.33.5i173 ap }2else 27 " > v2.6.33.5i174 ap 2 27 > v2.6.33.5i175 ap 2 27lse i+code=d v2._led_brightness_.33" cl +co20n> utc ap(/izeof(*.2("20n> +co20n> utccodet+code=numo class="s> ">num pot_triggers ap[]pot.6.3v2+code=numm/o class="s> ">namval ap["20n> +=numo c" > v2.6.33.5i176 ap 2 2 " > v2.6.33.5i177 ap }2<20n>273<20n> ="v/* Use "dot" inconvdet from map_to>o g7() nocodeonv2.6.33.5" > v2.6.33.5i178 ap i2 ((.227+code=writeb" class="s> ">wlue ap["20n> +=numo c at class="s> ">value ap["20n> +=numo c +code=88)5" > v2.6.33.5i179 ap 2 2"20n> +code=pe2" cl class="s> ">pcflue ap["20n> +=numo c +code=40luo clo cl 6)5" > v2.6.33.5i180 ap e2se3<228 "20n> +code class="s> ">pcflue ap["20n> +=numo c +code=20luo clo cl 4)5" > v2.6.33.5i181 ap 2 2"20n> +code=pe2" cl class="s> ">pcflue ap["20n> +=numo c +code=10luo clo cl 2)5" > v2.6.33.5i182 ap "20n> 28 .20n> +code class="s> ">pcflue ap["20n> +=numo c +code=04)5RAY_RAY_S2)5" > v2.6.33.5i183 ap "20n> 28lse3<20n> ="v2.6.3 class="s> ">pcflue ap["20n> +=numo c +code=02)5RAY_RAY_S4)5" > v2.6.33.5i184 ap "20n> 28 "20n> +code class="s> ">pcflue ap["20n> +=numo c +code=01)5RAY_RAY_S65" > v2.6.33.5i185 ap}3<20n> 2 ="v2285code=writeb" class="s> ">w_i("20n> +co20n> utc ap(/izeof(*.2_i("20n> +co20n> utccodetass="s> ">num pot_triggers ap[]pot.6.3v2lass="s> ">namval ap["20n> +=numo c"" > v2.6.33.5i186 ap3<20n> 2="v2.2.33.5"" > v2.6.33.5i187 ap#define "20n> 2 +code > v2.6.33.5i188 ap3<20n> 2="v2.2.33.5"ENABLED" class="s> ">IS_ENABLED ap(.20n> +code=CONFIG_LEDS_CLASS" class="s> MTD_ ap,3<20LEDS_CLASS ap)3<20n> MTD_ ap,3<20mo c" > v2.6.33.5i189 ap#if "20n>2 +c2de=IS_/* Use "dot" inspecial mappingl claboot rom 2.6.33.5" > v2.6.33.5i190 ap/optio "22n> 2+code=u8o cla +code=flagso class="s> ">fl("20n> "v2sh_fixup_oft_triggers ap[]("20n> "v2sh_fixup_oftcodet+code=numagso class="s> ">floft_triggers ap[]oftcode" > v2.6.33.5i191 ap/oruct .22n> 2+code=" > v2.6.33.5i192 ap /2ruct 29+code=writeb" class="s> ">wp .20n> +code=led_valo class="s> ">bd5read ap("20n> +cread NFIG_LEDS_CLASS" cla("20n> ud5 ud5 v2.6.33.5i193 ap c2ar .22n> +code=na+code=numm/o class="s> ">namshif ap .20n> +cshif 33.5" > v2.6.33.5i194 ap u2signe29 > v2.6.33.5i195 ap};3<20n> 2 ="v29 +code=i" c" class="s> ">pcfbd5 v2.6.33.5i196 ap3<20n> 2="v2.2920n> +code=pe1" cla* Use "dot" inBOOT M>pc: USER ROM1umoUSER ROM2 2.6.33.5" > v2.6.33.5i197 ap"2.6. cla2s="co2920n> +code=pe3" class="s> ">pe3 shif ap .20n> +cshif 33.5 ato class="s> ">bd5 v2.6.33.5i198 ap/optio vo2d6.20292.6. class="/oring">"disk-actdot" inrocode A[23:22] 2.6.33.5" > v2.6.33.5i199 ap 2 2 r clrn class="s> ">pcfoft_triggers ap[]oftcode +cod~0xc00000lueo ( class="s> ">pcfoft_triggers ap[]oftcode clo cl 22)5+lass="s> ">pe3 shif ap .20n> +cshif 33.5" +cod3)5RAY_RAY_S22"" > v2.6.33.5i200 ap{3<20n> 3 ="v23020n> +code" > v2.6.33.5i201 ap /3ruct 320n> ENAdeABLED" class="s> __Bn> ENDIAN ap(/izeof(*.2_iBn> ENDIAN > v2.6.33.5i202 ap 3 3.20n> +codec" class="s> ">pcfbd5 v2.6.33.5i203 ap u3signe30lse3<20n> ="v2.6.3o* Use "dot" inBOOT M>pc: MonitclaROM 2.6.33.5" > v2.6.33.5i204 ap u3signe30 "20n> +codelass="s> ">pcfoft_triggers ap[]oftcode ^=de=400000;="v2.6.3o* Use "dot" inswap A[22] 2.6.33.5" > v2.6.33.5i205 ap3<20n> 3="v2.3.33.5"#endif > v2.6.33.5i206 ap "30n> 3 +code=local_ir clrn s="s> ">i ap;oft_triggers ap[]oftcode" > v2.6.33.5i197 ap"2.6. cla30n> 3 +code" > v2.6.33.5i198 ap/optio vo30n> 3033.5" > v2.6.33.5i209 ap "30n> 3 +codeu8o class="s> ">u8 amap_word_triggers ap[]map_word v2._update_ioc_pen" class="v2sh_readrL216o>i216 ap[]("20n> "v2sh_readrLNFIG_platform_deviceo classmap_info_triggers ap[]map_info v2to class="s> ">map_triggers ap[]map.6.3v2+code=numagso class="s> ">floft_triggers ap[]oftcode" > v2.6.33.5i210 ap}3<20n> 3 ="v231.33.5" > v2.6.33.5i211 ap3<20n> 3="v2.3120n> +codess="s> ">u8 amap_word_triggers ap[]map_word v2._update_ioc_pen216o>i216 ap[](code" > v2.6.33.5i212 ap/optio in3 .20n31f (.2 > v2.6.33.5i213 ap{3<20n> 3 ="v231+code=writeb" class="s> ">woft_triggers ap[]oftcode " class="s> ">rea_.33" cl"v2sh_fixup_oft_triggers ap[]("20n> "v2sh_fixup_oftcodetclass="s> ">floft_triggers ap[]oftcode"" > v2.6.33.5i214 ap /3ruct 31+code=writeb" class="s> ">wn216o>i216 ap[](code.ass="s> ">num x216o>i216 ap[]xmo cl0] " class="s> ">re__raw_readw._led_brightnes__raw_readwcodetclass="s> ">flmap_triggers ap[]map.6.3mo class="s> ">num vir ap .20n> +cvir code=+lass="s> ">pe3 oft_triggers ap[]oftcode"" > v2.6.33.5i215 ap i3t .203> +code=i" r clrn s="s> ">i ap;r216o>i216 ap[](code" > v2.6.33.5i216 ap /3ptio 3133.5"" > v2.6.33.5i217 ap 3 31+code > v2.6.33.5i218 ap 3 31 +code= > v2._led_brightness_.33" cl"v2sh_ode=prL216o>i216 ap[]("20n> "v2sh_ode=prLNFIG_platform_deviceo classmap_info_triggers ap[]map_info v2to class="s> ">map_triggers ap[]map.6.3v2consorm_deviceo classmap_word_triggers ap[]map_word v2._update_ioc_pedatap;3<20n> ="v2datap.6.3v > v2.6.33.5i219 ap 3 3"2.6. class="/oring">&&&&&&&&&&&&&&&&&&&&+code=numagso class="s> ">floft_triggers ap[]oftcode" > v2.6.33.5i220 ap }33<20n32.33.5" > v2.6.33.5i221 ap3<20n> 3="v2.3220n> +codess="s> ">u8 aoft_triggers ap[]oftcode " class="s> ">rea_.33" cl"v2sh_fixup_oft_triggers ap[]("20n> "v2sh_fixup_oftcodetclass="s> ">floft_triggers ap[]oftcode"" > v2.6.33.5i222 ap "30n> 3 +code=leds_data" class="s> __raw_ode=pw._led_brightnes__raw_ode=pwcodetclass="s> ">fldatap;3<20n> ="v2datap.6.3.ass="s> ">num x216o>i216 ap[]xmo cl0]v2lass="s> ">nammap_triggers ap[]map.6.3mo class="s> ">num vir ap .20n> +cvir code=+lass="s> ">pe3 oft_triggers ap[]oftcode"" > v2.6.33.52ineo nam/arL123o>3ineo 32+code=writeb" class="s> ">wm ap("20n> +cm NFIG_);6.3o* Use "dot" insee .n ap_map_wde=p()23<2mtd/map.h 2.6.33.5" > v2.6.33.5i124 ap 3 3"20n> " > v2.6.33.5i125 ap }3else 3233.5" > v2.6.33.5i126 ap 3 3"20n> code= > v2._led_brightness_.33" cl"v2sh_copy_from_triggers ap[]("20n> "v2sh_copy_fromNFIG_platform_deviceo classmap_info_triggers ap[]map_info v2to class="s> ">map_triggers ap[]map.6.3v2 v2to class="s> ">to_triggers ap[]to.6.3v > v2.6.33.5i127 ap 3 3if (.20n> +code=pcf>&&&&&&&&&&&&&&&&&&&&+code=numagso class="s> ">flfrom_triggers ap[]fromNFIGv2lass="s> ">nams=led_ ap .20n> +cs=led_ v2._update_ioc_pelen ap .20n> +clencode" > v2.6.33.5i128 ap 3 32 " > v2.6.33.5i129 ap 3 32+code=local_irq_restoreo clap .20n> +code=led_valo class="s> ">bd5read ap("20n> +cread NFIG_LEDS_CLASS" cla("20n> ud5 ud5 v2.6.33.5i130 ap 3 3 "20n> +code=numm/o class="s> ">namshif ap .20n> +cshif 33.5" > v2.6.33.5i131 ap 3 3320n> +codess="s> ">u8 as=led_ ap .20n> +cs=led_ v2._update_ioc_pecurlen ap .20n> +ccurlen33.5" > v2.6.33.5i132 ap 3 33f (.2 > v2.6.33.5i133 ap 3 33+code=writeb" class="s> ">wfrom_triggers ap[]fromNFIG += t+code=numagso)lass="s> ">nammap_triggers ap[]map.6.3mo class="s> ">num vir ap .20n> +cvir code" > v2.6.33.5i134 ap 3 3 "20n> c" class="s> ">pcfbd5 v2.6.33.5i135 ap }3<20n>33 "20n> a* Use "dot" inBOOT M>pc: USER ROM1umoUSER ROM2 2.6.33.5" > v2.6.33.5i136 ap i3 (.203320n> +code=pe1" class="s> ">pe1 shif ap .20n> +cshif 33.5 ato class="s> ">bd5 v2.6.33.5i137 ap 3 3.20n> +code=pe3" clwhilealo class="s> ">len ap .20n> +clencode"5" > v2.6.33.5i138 ap 3 3 "20n> +code=RBTX v._update_ioc_pecurlen ap .20n> +ccurlen33.5 ato class="s> ">min_ ap .20n> +cmin_ codet+code=numagsov2lass="s> ">namlen ap .20n> +clencodev > v2.6.33.5i139 ap e3se {33320n> +code=pe2" clllllllllllllllllllllle=400000 -alo class="s> ">from_triggers ap[]fromNFIG +cod(e=400000 -a1).5" > v2.6.33.5i140 ap 3 34 "20n> +codee=RBTX v._update_ioc_pememcpy ap .20n> +cmemcpyNFIG_LEDS_CLASS" clato_triggers ap[]to.6.3v > v2.6.33.5i141 ap 3 34 "20n> +code=pe2" cllllllll( v2t) class="s> ">pcffrom_triggers ap[]fromNFIG +cod~0xc00000lue > v2.6.33.5i142 ap 3 34 .20n> +code +code=pe2" cllllllll(( class="s> ">pcffrom_triggers ap[]fromNFIG clo cl 22)5+lass="s> ">pe3 shif ap .20n> +cshif 33.5" +cod3)5RAY_RAY_S22")v > v2.6.33.5i143 ap 3 3420n> +code=pe1" cls="/oring">&X v._update_ioc_pecurlen ap .20n> +ccurlen33.55" > v2.6.33.5i144 ap 3 34 "20n> +codeng">&X v._update_ioc_pelen ap .20n> +clencode -ato class="s> ">curlen ap .20n> +ccurlen33.5" > v2.6.33.5i145 ap 3 34 "20n> +codeo class="s> ">from_triggers ap[]fromNFIG += o class="s> ">curlen ap .20n> +ccurlen33.5" > v2.6.33.5i146 ap 3 3420n> +code=pe1" cl +codeo class="s> ">to_triggers ap[]to.6.3 += o class="s> ">curlen ap .20n> +ccurlen33.5" > v2.6.33.5i147 ap 3 3 .20n> +code" > v2.6.33.5i148 ap 3 34 "20n> +codr clrn" > v2.6.33.5i149 ap 3 3420n> +code" > v2.6.33.5i150 ap 3 3533.5"ENAdeABLED" class="s> __Bn> ENDIAN ap(/izeof(*.2_iBn> ENDIAN > v2.6.33.5i151 ap 3 35 "20n> c" class="s> ">pcfbd5 v2.6.33.5i152 ap 3 35 .20n> +codec* Use "dot" inBOOT M>pc: MonitclaROM 2.6.33.5" > v2.6.33.5i153 ap 3 3520n> +code=pe1" clwhilealo class="s> ">len ap .20n> +clencode"5" > v2.6.33.5i154 ap 3 35 "20n> +codeng">&X v._update_ioc_pecurlen ap .20n> +ccurlen33.5 ato class="s> ">min_ ap .20n> +cmin_ codet+code=numagsov2lass="s> ">namlen ap .20n> +clencodev > v2.6.33.5i155 ap }3<20n>35 "20n> +codeeeeeeeeeeeeeee=400000 -alo class="s> ">from_triggers ap[]fromNFIG +cod(e=400000 -a1).5" > v2.6.33.5i156 ap i3 (.203520n> +code=pe1" cl +codeo class="s> ">memcpy ap .20n> +cmemcpyNFIG_LEDS_CLASS" clato_triggers ap[]to.6.3vl( v2t) o class="s> ">from_triggers ap[]fromNFIG ^ee=400000) class="s> ">cdevurlen ap .20n> +ccurlen33.55" > v2.6.33.5i157 ap 3 35f (.20n> +code=pcf>&&&&&&&._update_ioc_pelen ap .20n> +clencode -ato class="s> ">curlen ap .20n> +ccurlen33.5" > v2.6.33.5i158 ap 3 35 "20n> +code=RBTX v._update_ioc_pefrom_triggers ap[]fromNFIG += o class="s> ">curlen ap .20n> +ccurlen33.5" > v2.6.33.5i159 ap 3 3520n> +code=pe2" clllllllllo class="s> ">to_triggers ap[]to.6.3 += o class="s> ">curlen ap .20n> +ccurlen33.5" > v2.6.33.5i160 ap 3 36 "20n> +code" > v2.6.33.5i161 ap 3 36 "20n> +coder clrn" > v2.6.33.5i162 ap 3 3620n> +code" > v2.6.33.5i163 ap 3 36.33.5#endif > v2.6.33.5i164 ap 3 36+code=writeb" class="s> ">wmemcpy ap .20n> +cmemcpyNFIG_LEDS_CLASS" clato_triggers ap[]to.6.3vl( v2t)class="s> ">flfrom_triggers ap[]fromNFIGv2lass="s> ">namlen ap .20n> +clencode"" > v2.6.33.5i165 ap 3 36.33.5" > v2.6.33.5i166 ap 3 3633.5" > v2.6.33.5i167 ap 3 36f (.2u8o cla v2._led_brightness_.33" cl"v2sh_map_int ap .20n> +cs_.33" cl"v2sh_map_int NFIG_platform_deviceo classmap_info_triggers ap[]map_info v2to class="s> ">map_triggers ap[]map.6.3" > v2.6.33.5i168 ap 3 36 " > v2.6.33.5i169 ap 3 36+code=local_irq_restoreo clamap_triggers ap[]map.6.3mo class="s> ">num read ap("20n> +creadcode " class="s> ">rea_.33" cl"v2sh_readrL216o>i216 ap[]("20n> "v2sh_readrLNFIG" > v2.6.33.5i170 ap 3 3else3<20n> rq_saveo class=map_triggers ap[]map.6.3mo class="s> ">num wde=p_triggers ap[]wde=pcode " class="s> ">rea_.33" cl"v2sh_ode=prL216o>i216 ap[]("20n> "v2sh_ode=prLNFIG" > v2.6.33.5i171 ap 3 3720n> +codess="s> ">u8 amap_triggers ap[]map.6.3mo class="s> ">num copy_from_triggers ap[]copy_fromNFIG " class="s> ">rea_.33" cl"v2sh_copy_from_triggers ap[]("20n> "v2sh_copy_fromNFIG" > v2.6.33.5i172 ap 3 37+code" > v2.6.33.5i173 ap }3else 37 > v2.6.33.5i174 ap 3 37 code=__init" class="s> ">__init ap .20n> +code= > v2._update_ioc_pen" class=mtd_int ap .20n> +cs_.33" clmtd_int NFIG_33.5" > v2.6.33.5i175 ap 3 37lse i" > v2.6.33.5i176 ap 3 37ar *.20n> +code=dplatfor" > v2.6.33.5i177 ap }3<20n>37f (.20n> +code=pcfplatform_deviceo class="s> ">platform_device ap *.20n> +code=pdevo m_deviceo class ap)3<20n> ="v +cod" > v2.6.33.5i178 ap i3 ((.237 "20n> +code > v2._led_data" clasesourorm_device ap *.sesouror v2._update_ioc_penet_triggers ap[](etcode" > v2.6.33.5i179 ap 3 3"20n> +code=pe2" cl > v2._led_data" class="s> ""v2sh_ v2._led_data ap *.20n> "v2sh_ v2devo m_deviceo class v2._led_data ap 2.6.33.5" > v2.6.33.5i180 ap e3se3<238 "20n> }rm_deviceo class= t_triggers ap[]p t [4d" > v2.6.33.5i181 ap 3 3"20n> +codeclass="s> ">i ap;3<20n> ="v2.6.33.5" > v2.6.33.5i182 ap "30n> 38 .20n> +code=defauls="s> ">i ap; t_triggers ap[] t [4d[8d" > v2.6.33.5i183 ap "30n> 38lse3<20n> +code=dplatform_deviceo classmtd_partideon_triggers ap[]mtd_partideondevo m_deviceo classpartt_triggers ap[]partt [4d" > v2.6.33.5i184 ap "30n> 38 "20n> > v2._led_data" class="s> ""v2sh_ v2._led_data ap *.20n> "v2sh_ v2devo to class="s> ">boot_p v2._led_data ap boot_p v2NFIG " v2._ebuscptr" classv at_triggers ap[]p t [0].ass="s> ">num 6 v2._led_data ap 2.6.33.5" > v2.6.33.5i185 ap}3<20n> 3 ="v2385code=writeb" class="s> ">wp .20n> +code=led_valo class="s> ">bd5read ap("20n> +cread NFIG_LEDS_CLASS" cla("20n> ud5 ud5 v2.6.33.5i186 ap3<20n> 3="v2.3833.5" > v2.6.33.5i187 ap#define "30n> 38f (.20n> +c" class="s> ">pcfbd5 v2.6.33.5i188 ap3<20n> 3="v2.382.6. class="/oring">"disk-actdot" inBOOT M>pc: USER ROM1umoUSER ROM2 2.6.33.5" > v2.6.33.5i189 ap#if "20n>3 +c3820n> +code=pe2" class="s> ">pe2 boot_p v2._led_data ap boot_p v2NFIGmo class="s> ">num r_partt_triggers ap[] r_parttmo c at4" > v2.6.33.5i190 ap/optio "23n> 39 "20n> +code class="s> ">i ap = 0; "20n> +code=i" class="s> ">i ap < "20n> +code=ARRAY_SIZE" class="s> boot_p v2._led_data ap boot_p v2NFIGmo class="s> ">num r_partt_triggers ap[] r_parttmo cass="s> ">i ap++) {3<20n> ="v2.6.33.5" > v2.6.33.5i191 ap/oruct .23n> 39 "20n> +code=pe2" class="s> ">pe3 spquotner_of ap(.20n>spquotnd_valo class="s> "> t_triggers ap[] t [s="s> ">i ap++) {3<20n> ="v2.6.],"nand-disk""v2.6.2imgv2.6. ="v2.6.33.5" 4 -ss="s> ">i ap++) {3<20n> ="v2.6."" > v2.6.33.5i192 ap /3ruct 39 .20n> +code +codm_deviceo classpartt_triggers ap[]partt [s="s> ">i ap++) {3<20n> ="v2.6.].ass="s> ">num ap[32];3<20n> ="v2.6.dato class="s> "> t_triggers ap[] t [s="s> ">i ap++) {3<20n> ="v2.6.]" > v2.6.33.5i193 ap c3ar .23920n> +code=pe1" cls="/orinm_deviceo classpartt_triggers ap[]partt [s="s> ">i ap++) {3<20n> ="v2.6.].ass="s> ">num =leder_of ap(.20n>sledde=i" cl=400000; > v2.6.33.5i194 ap u3signe39 "20n> +codeng">&X v._update_ioc_pepartt_triggers ap[]partt [s="s> ">i ap++) {3<20n> ="v2.6.].ass="s> ">num offsv2._led_brightnesoffsv22.6.dato class="s> ">MTDPART_OFS_NXTBLK._led_brightnesMTDPART_OFS_NXTBLK33.5" > v2.6.33.5i195 ap};3<20n> 3 ="v39 "20n> " > v2.6.33.5i196 ap3<20n> 3="v2.3920n> +code} 3.5" c" class="s> ">pcfbd5 v2.6.33.5i197 ap"2.6. cla3s="co3920n> +code=pe3" cla* Use "dot" inBOOT M>pc: MonitclaROM 2.6.33.5" > v2.6.33.5i198 ap/optio vo3d6.20392.6. class="/oring">&qss="s> ">pe2 boot_p v2._led_data ap boot_p v2NFIGmo class="s> ">num r_partt_triggers ap[] r_parttmo c at2" > v2.6.33.5i199 ap 3 3 ass="s> ">num =trcpy ap .20n> +c=trcpyd_valo class="s> "> t_triggers ap[] t [0],"nand-disk""v2.6.2big ="v2.6.33.5"" > v2.6.33.5i200 ap{3<20n> 4 ="v240 "20n> +codeo class="s> ">=trcpy ap .20n> +c=trcpyd_valo class="s> "> t_triggers ap[] t [1],"nand-disk""v2.6.2little ="v2.6.33.5"" > v2.6.33.5i191 ap/oruct .24ruct 40 "20n> +code class="s> ">i ap = 0; "20n> +code=i" class="s> ">i ap < "20n> +code=ARRAY_SIZE" class="s> boot_p v2._led_data ap boot_p v2NFIGmo class="s> ">num r_partt_triggers ap[] r_parttmo cass="s> ">i ap++) {3<20n> ="v2.6.33.5" > v2.6.33.5i192 ap /4 40 .20n> +code +codm_deviceo classpartt_triggers ap[]partt [s="s> ">i ap++) {3<20n> ="v2.6.].ass="s> ">num ap[32];3<20n> ="v2.6.dato class="s> "> t_triggers ap[] t [s="s> ">i ap++) {3<20n> ="v2.6.]" > v2.6.33.5i193 ap c4signe40lse3<20n> ="v2.6.3 +codm_deviceo classpartt_triggers ap[]partt [s="s> ">i ap++) {3<20n> ="v2.6.].ass="s> ">num =leder_of ap(.20n>sledde=i" cl=400000; > v2.6.33.5i204 ap u4signe40 "20n> +code +codm_deviceo classpartt_triggers ap[]partt [s="s> ">i ap++) {3<20n> ="v2.6.].ass="s> ">num offsv2._led_brightnesoffsv22.6.dato class="s> ">MTDPART_OFS_NXTBLK._led_brightnesMTDPART_OFS_NXTBLK33.5" > v2.6.33.5i205 ap3<20n> 4="v2.40 "20n> " > v2.6.33.5i206 ap "40n> 4020n> +code} 3.5" " > v2.6.33.5i197 ap"2.6. cla40n> 4020n> +code=pe3" cla* Use "dot" inBOOT M>pc: ROM Emulatcla2.6.33.5" > v2.6.33.5i198 ap/optio vo40n> 402.6. class="/oring">&qss="s> ">pe2 boot_p v2._led_data ap boot_p v2NFIGmo class="s> ">num r_partt_triggers ap[] r_parttmo c at2" > v2.6.33.5i209 ap "40n> 40 ass="s> ">num partt_triggers ap[]partt [0].ass="s> ">num ap[32];3<20n> ="v2.6.datouot;nand-disk""v2.6.2boot ="v2.6.33.5" > v2.6.33.5i210 ap}3<20n> 4 ="v241 "20n> +codeo class="s> ">partt_triggers ap[]partt [0].ass="s> ">num offsv2._led_brightnesoffsv22.6.dat0xc00000" > v2.6.33.5i211 ap3<20n> 4="v2.41 "20n> +codeo class="s> ">partt_triggers ap[]partt [0].ass="s> ">num =leder_of ap(.20n>sledde=i" cl=400000; > v2.6.33.5i212 ap/optio in4 .20n41 .20n> +codec class="s> ">partt_triggers ap[]partt [1].ass="s> ">num ap[32];3<20n> ="v2.6.datouot;nand-disk""v2.6.2user ="v2.6.33.5" > v2.6.33.5i213 ap{3<20n> 4 ="v241lse3<20n> ="v2.6.3c class="s> ">partt_triggers ap[]partt [1].ass="s> ">num offsv2._led_brightnesoffsv22.6.dat0" > v2.6.33.5i214 ap /4ruct 41 "20n> +codelass="s> ">pcfpartt_triggers ap[]partt [1].ass="s> ">num =leder_of ap(.20n>sledde=i" cl=c00000" > v2.6.33.5i215 ap i4t .204> +code=i" " > v2.6.33.5i216 ap /4ptio 41+code=local_irq_saveo class=boot_p v2._led_data ap boot_p v2NFIGmo class="s> ">num partt_triggers ap[]partt dato class="s> ">partt_triggers ap[]partt " > v2.6.33.5i217 ap 4 417code=local_irq_saveo class=boot_p v2._led_data ap boot_p v2NFIGmo class="s> ">num map_int ap .20n> +cmap_int NFIG " class="s> ">rea_.33" cl"v2sh_map_int ap .20n> +cs_.33" cl"v2sh_map_int NFIG" > v2.6.33.5i218 ap 4 4133.5" > v2.6.33.5i219 ap 4 4"2.6. class="/ class="s> ">i ap = 0; "20n> +code=i" class="s> ">i ap < "20n> +code=ARRAY_SIZE" class="s> ARRAY_SIZElt; "20n> +cARRAY_SIZEd_valo class="s> ">v at_triggers ap[]p t )ass="s> ">i ap++) {3<20n> ="v2.6.33.5" > v2.6.33.5i220 ap }43<20n42 "20n> +code > v2._led_data" clasesourorm_device ap *.sesouror v2to class="s> ">r216o>i216 ap[](code " v2._ebuscptr" classv at_triggers ap[]p t [s="s> ">i ap++) {3<20n> ="v2.6.].ass="s> ">num net_triggers ap[](etcode" > v2.6.33.5i221 ap3<20n> 4="v2.42 "20n> +codeplatform_deviceo class="s> ">platform_device ap *.20n> +code=pdevo to class="s> "> ap)3<20n> ="v +cod " v2._ebuscptr" classv at_triggers ap[]p t [s="s> ">i ap++) {3<20n> ="v2.6.].ass="s> ">num ap)3<20n> ="v +cod" > v2.6.33.5i222 ap "40n> 42f (.2 > v2.6.33.52ineo nam/arL123o>4ineo 42lse3<20n> ="v2.6.3c class="s> ">r216o>i216 ap[](codemo class="s> ">num star ap .20n> +cstar de=i" cl=1f000000 -as="s> ">i ap < "20n> +code=AR*de=1000000" > v2.6.33.5i124 ap 4 42 "20n> +codelass="s> ">pcfr216o>i216 ap[](codemo class="s> ">num end ap("20n> +cendNFIG " class="s> ">rea216o>i216 ap[](codemo class="s> ">num star ap .20n> +cstar de=i"+de=1000000 -a1" > v2.6.33.5i125 ap }4else 42 "20n> alass="s> ">rea216o>i216 ap[](codemo class="s> ">num ags ap);3<20n> ="v2.6.33. " class="s> ">reIORESOURCE_MEMap);3<20n> =IORESOURCE_MEM+cod" > v2.6.33.5i126 ap 4 4220n> +code=pe1" class="s> ">pe1 v at_triggers ap[]p t [s="s> ">i ap++) {3<20n> ="v2.6.].ass="s> ">num v2._led_data ap 2.6.33.5.ass="s> ">num width._led_data ap widthmo c at2" > v2.6.33.5i127 ap 4 4if (.20n> +code=pcfass="s> ">num ap)3<20n> ="v +codmo class="s> ">num um_sesourort_triggers ap[] um_sesourortmo c at1" > v2.6.33.5i128 ap 4 422.6. class="/oring">&qss="s> ">pe2 ap)3<20n> ="v +codmo class="s> ">num sesourorm_device ap *.sesouror v2" class="s> ">rea216o>i216 ap[](code" > v2.6.33.5i129 ap 4 42 ass="s> ">num ap)3<20n> ="v +codmo class="s> ">num id ap("20n> +cidNFIG " class="s> ">re3<20n> ="v2.6.33.5" > v2.6.33.5i130 ap 4 43 "20n> +codeo class="s> "> ap)3<20n> ="v +codmo class="s> ">num ap[32];3<20n> ="v2.6.datouot;nand-disk""v2.6.2 idarL21-"v2sh ="v2.6.33.5" > v2.6.33.5i131 ap 4 43 "20n> +codeo class="s> "> ap)3<20n> ="v +codmo class="s> ">num ap)3<20n> ="v +cod.ass="s> ">num 20n> +c v2._led_data ap 20n> +c v2+cod " v2._ebuscptr" classv at_triggers ap[]p t [s="s> ">i ap++) {3<20n> ="v2.6.].ass="s> ">num v2._led_data ap 2.6.33.5" > v2.6.33.5i132 ap 4 43 .20n> +codec class="s> ">p0n> +code=p_segistea216o>i216 ap[]p0n> +code=p_segistead_valo class="s> "> ap)3<20n> ="v +cod"" > v2.6.33.5i133 ap 4 43+code=writeb"" > v2.6.33.5i134 ap 4 4320n> " > v2.6.33.5i135 ap }4<20n>4333.5"#else > v2.6.33.5i136 ap i4 (.204320n> code= > v2._led_brightnes_init ap .20n> +code= > v2._update_ioc_pen" class=mtd_int ap .20n> +cs_.33" clmtd_int NFIG_33.5" > v2.6.33.5i137 ap 4 4.20n> " > v2.6.33.5i138 ap 4 4 " > v2.6.33.5i139 ap e4se {34320n> #endif > v2.6.33.5i140 ap 4 44 > v2.6.33.5i141 ap 4 44 code= > v2._led_brightnes_init ap .20n> +code= > v2._update_ioc_pen" class=.6.3_int ap .20n> +cs_.33" cl.6.3_int NFIG_33.5" > v2.6.33.5i142 ap 4 44 " > v2.6.33.5i143 ap 4 4420n> +code._update_ioc_pen" class=pci_o cla ap .20n> +cs_.33" clpci_o claNFIG_"" > v2.6.33.5i144 ap 4 4420n> " > v2.6.33.5i145 ap 4 4433.5" > v2.6.33.5i146 ap 4 4420n> code= > v2._led_brightnes_init ap .20n> +code= > v2._update_ioc_pen" class=code=p_int ap .20n> +cs_.33" clcode=p_int NFIG_33.5" > v2.6.33.5i147 ap 4 4420n> " > v2.6.33.5i148 ap 4 44 "20n>+code=numagso class="s> ">flsmc v2._7seg_addr apsmc v2NFIG " class="s> ">re ap,3<20_ETHER_ADDR._7seg_addr ap ap,3<20_ETHER_ADDRNFIG -as="s> ">i ap IO_BASElt; "20n> +cIO_BASE33.5" > v2.6.33.5i149 ap 4 4420n> +code > v2._led_data" clasesourorm_device ap *.sesouror v2._update_ioc_pesmc net_triggers ap[]smc net [] " " > v2.6.33.5i150 ap 4 45 "20n> +code" > v2.6.33.5i151 ap 4 45 "20n> +code=pe2" cl.ass="s> ">num =tar ap .20n> +cstar de=i" " class="s> ">resmc v2._7seg_addr apsmc v2NFIGv > v2.6.33.5i152 ap 4 45 .20n> +code=pe2" cl.ass="s> ">num end ap("20n> +cendNFIG " " class="s> ">resmc v2._7seg_addr apsmc v2NFIG"+de=10 -a1v > v2.6.33.5i153 ap 4 4520n> +code=pe1" cl=pe2" cl.ass="s> ">num ags ap);3<20n> ="v2.6.33. " class="s> ">reIORESOURCE_MEMap);3<20n> =IORESOURCE_MEM+codv > v2.6.33.5i154 ap 4 45 "20n> +code},e" > v2.6.33.5i155 ap }4<20n>45 "20n> +code.ass="s> ">num =tar ap .20n> +cstar de=i" " class="s> ">re ap,3<20_IRQ_ETHER._7seg_addr ap ap,3<20_IRQ_ETHER+codv > v2.6.33.5i156 ap i4 (.204520n> +code=pe1" cl +codeo* Use "dot" inoverride default irq "v2. defi=numin smc91x.h 2.6.33.5" > v2.6.33.5i157 ap 4 45f (.20n> +code=pcf>&&&&&&&.ass="s> ">num ags ap);3<20n> ="v2.6.33. " class="s> ">reIORESOURCE_IRQap);3<20n> =IORESOURCE_IRQ.33. | class="s> ">reIRQF_TRIGGER_LOWap);3<20n> =IRQF_TRIGGER_LOW+codv > v2.6.33.5i158 ap 4 45 "20n> +cod}v > v2.6.33.5i159 ap 4 4520n> +code}" > v2.6.33.5i160 ap 4 46 "20n> > v2._led_data" clasmc91x_p0n> v2._led_data ap smc91x_p0n> v2 v2._update_ioc_pesmc p v2._led_data ap smc p v2NFIG " " > v2.6.33.5i161 ap 4 46 "20n> +code.ass="s> ">num ags ap);3<20n> ="v2.6.33. " class="s> ">reSMC91X_USE_16BITap);3<20n> =SMC91X_USE_16BIT+codv > v2.6.33.5i162 ap 4 4620n> +code"" > v2.6.33.5i163 ap 4 463 "20n> > v2._led_data" cla="s> ">platform_device ap *.20n> +code=pdevo to class="s> ">p ap)3<20n> ="vp +cod" > v2.6.33.5i164 ap 4 46+code#iABLED" class="s> IS_ENABLEDap);3<20n> =IS_ENABLEDd_valo class="s> ">CONFIG_TC358rL215o>i215> =CONFIG_TC358rL+cod" > v2.6.33.5i165 ap 4 46 class="s> ">i ap;3<20n> ="v2.6.33.5v2lass="s> ">namj<20n> ="v2.6j+cod" > v2.6.33.5i166 ap 4 4620n> +code+code=numm/o class="s> ">nameth v2._7seg_addr apeth v2 [2][6]" > v2.6.33.5i167 ap 4 467code=local_irq_saveo class=p .20n> +code=led_valo class="s> ">bd5read ap("20n> +cread NFIG_LEDS_CLASS" cla("20n> ud5 ud5 v2.6.33.5i168 ap 4 4633.5" > v2.6.33.5i169 ap 4 462.6. class="/ class="s> ">i ap = 0; "20n> +code=i" class="s> ">i ap < "20n> +code=ARRAY_S2ass="s> ">i ap++) {3<20n> ="v2.6.33.5" > v2.6.33.5i170 ap 4 47 "20n> +code+code=numagso class="s> ">flarea) {3<20n> ="areamo c ato class="s> ">CKSEG1215o>i215> =CKSEG1NFIG"+de=1fff0000"+dss="s> ">i ap = 0; "20n> +code=i"*de=10"" > v2.6.33.5i171 ap 4 47 "20n> +codec" class="s> ">pcfbd5 v2.6.33.5i172 ap 4 47 .20n> +code +codm_deviceo classmemcpy ap .20n> +cmemcpyNFIG_LEDS_CLASS" claeth v2._7seg_addr apeth v2 [s="s> ">i ap++) {3<20n> ="v2.6.]vl( v2t)class="s> ">flarea) {3<20n> ="areamo c, 6"" > v2.6.33.5i173 ap }4else 4720n> +code=pe1" cl3.5" " > v2.6.33.5i174 ap 4 47 "20n> +code +codm_deviceo classurL216o>i216 ap[]u1+code=lass="s> ">pcfbuner_of ap(.20n>bun [3]" > v2.6.33.5i175 ap 4 47 "20n> +codec" class="s> ">pcfbd5 v2.6.33.5i176 ap 4 4720n> +code=pe1" cl +code +codm_deviceo classarea) {3<20n> ="areamo c - cl=03000000" > v2.6.33.5i177 ap }4<20n>47f (.20n> +code=pcf=pe1" cl3.5" > v2.6.33.5i178 ap i4 ((.247 "20n> +code +code +codm_deviceo classarea) {3<20n> ="areamo c - cl=01000000" > v2.6.33.5i179 ap 4 4"20n> +code=pe2" clllllllll class="s> ">i ap j<20n> ="v2.6j+cod" class="s> ">i ap j<20n> ="v2.6j+cod"RAY_S3ass="s> ">i ap j<20n> ="v2.6j+cod33. > v2.6.33.5i180 ap e4se3<248 "20n> +codee=RBTX v +codm_deviceo classbuner_of ap(.20n>bun [s="s> ">i ap j<20n> ="v2.6j+cod] ato class="s> ">le16_to_cpla ap .20n> +cle16_to_cplaNFIG_ss="s> ">i ap urL216o>i216 ap[]u1+code=t) o class="s> ">area) {3<20n> ="areamo c +lass="s> ">pe3 j<20n> ="v2.6j+cod"* 2.5" > v2.6.33.5i181 ap 4 48 "20n> +code=pe2" class="s> ">pe3 memcpy ap .20n> +cmemcpyNFIG_LEDS_CLASS" claeth v2._7seg_addr apeth v2 [s="s> ">i ap++) {3<20n> ="v2.6.]vlm_deviceo classbuner_of ap(.20n>bun , 6"" > v2.6.33.5i182 ap "40n> 48 .20n> +code" > v2.6.33.5i183 ap "40n> 48+code=writeb"" > v2.6.33.5i184 ap "40n> 48 "20n> m_deviceo class20n> eth v2_int ap .20n> +c20n> eth v2_int NFIG_LEDS_CLASS" claeth v2._7seg_addr apeth v2 [0]v2lass="s> ">nameth v2._7seg_addr apeth v2 [1]"" > v2.6.33.5i185 ap}3<20n> 4 ="v24850n> #endif > v2.6.33.5i186 ap3<20n> 4="v2.48+code=local_irq_saveo class=p ap)3<20n> ="vp +coddato class="s> ">p0n> +code=p_alloc216o>i216 ap[]p0n> +code=p_allocNFIG_Luot;nand-disk""v2.6.2smc91x ="v2.6.33.5" -1"" > v2.6.33.5i187 ap#define "40n> 48f (.20n> +c" c!rq_saveo class=p ap)3<20n> ="vp +codd|e > v2.6.33.5i188 ap3<20n> 4="v2.482.6. class="/orino class="s> ">p0n> +code=p_add_sesourort_triggers ap[]p0n> +code=p_add_sesourortNFIG_LEDS_CLASS" clap ap)3<20n> ="vp +codv2lass="s> ">namsmc net_triggers ap[]smc net v2lass="s> ">namARRAY_SIZElt; "20n> +cARRAY_SIZEd_valo class="s> ">smc net_triggers ap[]smc net ))d|e > v2.6.33.5i189 ap#if "20n>4 +c4820n> +code=pe2o class="s> ">p0n> +code=p_add_c v2._led_data ap 20n> +code=p_add_c v2NFIG_LEDS_CLASS" clap ap)3<20n> ="vp +codv2 v2._ebuscptr" classsmc p v2._led_data ap smc p v2NFIG, sledoflo class="s> ">smc p v2._led_data ap smc p v2NFIG))d|e > v2.6.33.5i190 ap/optio "24n> 49 "20n> +o class="s> ">p0n> +code=p_add._led_data ap 20n> +code=p_addNFIG_LEDS_CLASS" clap ap)3<20n> ="vp +cod). > v2.6.33.5i191 ap/oruct .24n> 49 "20n> +codeo class="s> ">p0n> +code=p_pu ap .20n> +cp0n> +code=p_pu NFIG_LEDS_CLASS" clap ap)3<20n> ="vp +cod)" > v2.6.33.5i192 ap /4ruct 49 .20n> LEDS_CLASS" cla("20n> mtd_int ap .20n> +cs_.33" clmtd_int NFIG_)" > v2.6.33.5i193 ap c4ar .24920n> +codeo* Use "dot" inTC58DVM82A1FT: tDH=10ns, tWP=tRP=tREADID=35ns 2.6.33.5" > v2.6.33.5i194 ap u4signe49 "20n> m_deviceo class20n> ndfmc int ap .20n> +c20n> ndfmc int NFIG_10, 35v > v2.6.33.5i195 ap};3<20n> 4 ="v49 "20n> (15RAY_RAY_S1)d| (15RAY_RAY_S2)v > v2.6.33.5i196 ap3<20n> 4="v2.4920n> +code=pe1" cl +code (15RAY_RAY_S2))ass* Use "dot" inch1:8bit,nch2:16bit 2.6.33.5" > v2.6.33.5i197 ap"2.6. cla4s="co497code=local_irq_saveo class=s_.33" clled_o cla ap .20n> +cs_.33" clled_o claNFIG_)" > v2.6.33.5i198 ap/optio vo4d6.20492.6. class="/m_deviceo class20n> wdt int ap .20n> +c20n> wdt int NFIG_)" > v2.6.33.5i199 ap 4 4 m_deviceo class20n> v2 int ap .20n> +c20n> v2 int NFIG_)" > v2.6.33.5i200 ap{3<20n> 5 ="v250lse3<20n> rq_saveo class=20n> rtc int ap .20n> +c20n> rtc int NFIG_)" > v2.6.33.5i191 ap/oruct .25ruct 50 "20n> rq_saveo class=20n> dmac int ap .20n> +c20n> dmac int NFIG_0, 2)" > v2.6.33.5i192 ap /5 50 .20n> LEDS_CLASS" cla20n> clc int ap .20n> +c20n> clc int NFIG_)" > v2.6.33.5i193 ap c5signe5020n> +code._update_ioc_pep0n> +code=p_segistea_simplrm_device ap *.20n> +code=p_segistea_simplrNFIG_Luot;nand-disk""v2.6.2L205 clc-generic ="v2.6.33.5" -1v2lass="s> ">namNULLm_device ap *.NULLNFIG, 0"" > v2.6.33.5i204 ap u5signe50 "20n> m_deviceo class20n> sramc int ap .20n> +c20n> sramc int NFIG_)" > v2.6.33.5i195 ap};3<20n> 5="v2.50 rq_saveo class=20n> rng int ap .20n> +c20n> rng int NFIG_)" > v2.6.33.5i196 ap3<20n> 50n> 5020n> " > v2.6.33.5i197 ap"2.6. cla50n> 5020n> > v2.6.33.5i198 ap/optio vo50n> 502.6. code= > v2._led_brightnes_init ap .20n> +code= > v2._update_ioc_pen" class=o cla ap .20n> +cs_.33" clo claNFIG_33.5" > v2.6.33.5i209 ap "50n> 50 " > v2.6.33.5i210 ap}3<20n> 5 ="v251 "20n> class="s> ">i ap;3<20n> ="v2.6.33.5" > v2.6.33.5i211 ap3<20n> 5="v2.51 > v2.6.33.5i212 ap/optio in5 .20n51 .20n> LEDS_CLASS" cla("20n> ebusc=o cla ap .20n> +cs_.33" clebusc=o claNFIG_)" > v2.6.33.5i213 ap{3<20n> 5 ="v25120n> +codeo* Use "dot" inalways enable ATA0 2.6.33.5" > v2.6.33.5i214 ap /5ruct 51 "20n> m_deviceo class20xclo crL164o>i164 +c20xclo crLNFIG_ v2._ebuscptr" class.33" clccfgpt2._7seg_addr ap.33" clccfgpt2NFIGmo class="s> ">num pcfgm_device ap *.2cfg v2lass="s> ">namp,3<20_PCFG_ATA0MODElt; "20n> +cp,3<20_PCFG_ATA0MODE+cod)" > v2.6.33.5i215 ap i5t .205> +code=i" c" class="s> ">pcf20xclmastea_clock164o>i164 +c20xclmastea_clockmo c 33.5" > v2.6.33.5i216 ap /5ptio 5120n> +code=pe1" class="s> ">pe1 20xclmastea_clock164o>i164 +c20xclmastea_clockmo c 3 20000000" > v2.6.33.5i217 ap 5 517code=local_irq_saveo class= class=o cla ap .20n> +c.33" clo claNFIG_)" > v2.6.33.5i218 ap 5 512.6. class="/m_deviceo classs_.33" clup ve_ioc_pen ap .20n> +cs_.33" clup ve_ioc_penNFIG_)" > v2.6.33.5i219 ap 5 5"2.6. #ifdeABLED" class="s> HAVE_ ap,3<20_IOSWAB ap .20n> +cHAVE_ ap,3<20_IOSWAB > v2.6.33.5i220 ap }53<20n52lse3<20n> rq_saveo class=ioswabw._led_brightnesioswabw+coddato class="s> ">s_.33" clioswabw._led_brightness_.33" clioswabw33.5" > v2.6.33.5i221 ap3<20n> 5="v2.52 "20n> rq_saveo class=__memlioswabw._led_brightnes__memlioswabw+coddato class="s> ">s_.33" clmemlioswabw._led_brightness_.33" clmemlioswabw33.5" > v2.6.33.5i222 ap "50n> 52f (.2#endif > v2.6.33.52ineo nam/arL123o>5ineo 52 > v2.6.33.5i124 ap 5 52 "20n> m_deviceo classlmach ap nettar ap .20n> +clmach ap nettar +coddato class="s> ">s_.33" clmach ap nettar ap .20n> +cs_.33" clmach ap nettar 33.5" > v2.6.33.5i125 ap }5else 5233.5" > v2.6.33.5i126 ap 5 52+code=local_irq_saveo class=20xcl7segled_int ap .20n> +c20xcl7segled_int NFIG_LEDS_CLASS" cla ap,3<20_MAX_7SEGLEDS ap .20n> +c ap,3<20_MAX_7SEGLEDS v2lass="s> ">nams_.33" cl7segled_putc216o>i216 ap[]s_.33" cl7segled_putc+cod)" > v2.6.33.5i127 ap 5 5if (.20n> + class="s> ">i ap = 0; "20n> +code=i" class="s> ">i ap < "20n> +code=ARRAY_SIZE" class="s> ap,3<20_MAX_7SEGLEDS ap .20n> +c ap,3<20_MAX_7SEGLEDS ass="s> ">i ap++) {3<20n> ="v2.6.33. > v2.6.33.5i128 ap 5 522.6. class="/oring">&qss="s> ">pe2 20xcl7segled_putc216o>i216 ap[]20xcl7segled_putcNFIG_LEDS_CLASS" cla3<20n> ="v2.6.33.5v2luot;nand-disk""v#39;-v#39;.6.33.5"" > v2.6.33.5i129 ap 5 52 m_deviceo classpr_info_triggers ap[]pr_infoNFIG_Luot;nand-disk""v2.6.2 ap,3<20 (Rev v2.6.02x) --- FPGA(Rev v2.6.02x) DIPSW:v2.6.02x,v2.6.02x\n ="v2.6.33.5" > v2.6.33.5i130 ap 5 53 "20n> +codeo class="s> ">read ap("20n> +cread NFIG_LEDS_CLASS" cla("20n> uoard_sev v2._7seg_addr ap("20n> uoard_sev v2+cod)v2lass="s> ">namsead ap("20n> +cread NFIG_LEDS_CLASS" cla("20n> ioc_sev v2._7seg_addr ap("20n> ioc_sev v2+cod)v > v2.6.33.5i131 ap 5 53 "20n> +codeo class="s> ">sead ap("20n> +cread NFIG_LEDS_CLASS" cla("20n> ud5 ud5namsead ap("20n> +cread NFIG_LEDS_CLASS" cla("20n> ud5 ud5 v2.6.33.5i132 ap 5 53f (.2 > v2.6.33.5i133 ap 5 53+code#ifdeABLED" class="s> CONFIG_PCI._7seg_addr apCONFIG_PCI (.2 > v2.6.33.5i134 ap 5 53 "20n> m_deviceo class20xclalloclpci_controllea216o>i216 ap[]20xclalloclpci_controlleaNFIG_ v2._ebuscptr" class.3xclprimarylpcic216o>i216 ap[]20xclprimarylpcicNFIG, 0, 0, 0, 0"" > v2.6.33.5i135 ap }5<20n>53 rq_saveo class=20x uoard_pcibios=o cla ap .20n> +c.3x uoard_pcibios=o cla+coddato class="s> ">darL27_pcibios=o cla ap .20n> +c.3rL27_pcibios=o cla33.5" > v2.6.33.5i136 ap i5 (.205320n> #else > v2.6.33.5i137 ap 5 537code=local_irq_saveo class=o c io_port_basrm_device ap *.o c io_port_basrNFIG_LEDS_CLASS" cla ap,3<20_ETHER_BASElt; "20n> +c ap,3<20_ETHER_BASE+cod)" > v2.6.33.5i138 ap 5 5 #endif > v2.6.33.5i139 ap e5se {35320n> > v2.6.33.5i140 ap 5 54lse3<20n> rq_saveo class=20n> sio_int ap .20n> +c20n> sio_int NFIG_LEDS_CLASS" clap,3<20_SCLK0 ap .20n> +cp,3<20_SCLK0NFIG_LEDS_CLASS" cla20xclmastea_clock164o>i164 +c20xclmastea_clockmo c), 0"" > v2.6.33.5i141 ap 5 54 " > v2.6.33.5i142 ap 5 54f (.2 > v2.6.33.5i143 ap 5 5420n> > v2._led_data" cla.3x uoard_vec216o>i216 ap[]20xcluoard_vec v2._update_ioc_pen" class=vec216o>i216 ap[]n" class=vec v2._update_ioc_peode= > v2._led_data ap ode= > v2+coddat" > v2.6.33.5i144 ap 5 54 "20n> .ass="s> ">num =ystemm_device ap *.oystem+coddatouot;nand-disk""v2.6.2Toshiba ap,3<20 ="v2.6.33.5" > v2.6.33.5i145 ap 5 545 "20n> .ass="s> ">num prom_int ap .20n> +cprom_int +coddato class="s> ">s_.33" clprom_int ap .20n> +cs_.33" clprom_int NFIG, > v2.6.33.5i146 ap 5 546 "20n> .ass="s> ">num memlo cla ap .20n> +cmemlo cla+coddato class="s> ">s_.33" clo cla ap .20n> +cs_.33" clo claNFIG, > v2.6.33.5i147 ap 5 547 "20n> .ass="s> ">num irqlo cla ap .20n> +cirqlo cla+coddato class="s> ">s_.33" clirqlo cla ap .20n> +cs_.33" clirqlo claNFIG, > v2.6.33.5i148 ap 5 54 "20n>.ass="s> ">num timp_int ap .20n> +ctimp_int +coddato class="s> ">s_.33" cltimp_int ap .20n> +cs_.33" cltimp_int NFIG, > v2.6.33.5i149 ap 5 5420n> +code.ass="s> ">num ae=p_int ap .20n> +ccode=p_int NFIGdato class="s> ">s_.33" clcode=p_int ap .20n> +cs_.33" clcode=p_int NFIG, > v2.6.33.5i150 ap 5 55 "20n> .ass="s> ">num .6.3_int ap .20n> +c.6.3_int NFIGdato class="s> ">s_.33" cl.6.3_int ap .20n> +cs_.33" cl.6.3_int NFIG, > v2.6.33.5i151 ap 5 55 #ifdeABLED" class="s> CONFIG_PCI._7seg_addr apCONFIG_PCI (.2 > v2.6.33.5i152 ap 5 55 .20n> .ass="s> ">num pci_map_irqm_device ap *.2ci_map_irq+coddato class="s> ">darL clpci_map_irqm_device ap *.darL clpci_map_irqNFIG, > v2.6.33.5i153 ap 5 5520n> #endif > v2.6.33.5i154 ap 5 55 "" > v2.6.33.5i155 ap }5<20n>55

i155footea2> The original LXR software by the > v2http://sourorforge.net/projects/lxa2>LXR dot&unt yNFIG, this experimental version by > v2mailto:lxa@ aux.no">lxa@ aux.noNFIG.
i155subfootea2> lxa. aux.no kindly hosted by > v2http://www.redpill- apro.no">Redpill L apro AS v2provider of L aux donsultuot and operations serde=ps since 1995.