1config FRV 2 bool 3 default y 4 select HAVE_IDE 5 select HAVE_ARCH_TRACEHOOK 6 select HAVE_IRQ_WORK 7 select HAVE_PERF_EVENTS 8 select HAVE_GENERIC_HARDIRQS 9 select GENERIC_IRQ_SHOW 10 select ARCH_HAVE_NMI_SAFE_CMPXCHG 11 12config ZONE_DMA 13 bool 14 default y 15 16config RWSEM_GENERIC_SPINLOCK 17 bool 18 default y 19 20config RWSEM_XCHGADD_ALGORITHM 21 bool 22 23config GENERIC_HWEIGHT 24 bool 25 default y 26 27config GENERIC_CALIBRATE_DELAY 28 bool 29 default n 30 31config TIME_LOW_RES 32 bool 33 default y 34 35config QUICKLIST 36 bool 37 default y 38 39config ARCH_HAS_ILOG2_U32 40 bool 41 default y 42 43config ARCH_HAS_ILOG2_U64 44 bool 45 default y 46 47config HZ 48 int 49 default 1000 50 51source "init/Kconfig" 52 53source "kernel/Kconfig.freezer" 54 55 56menu "Fujitsu FR-V system setup" 57 58config MMU 59 bool "MMU support" 60 help 61 This options switches on and off support for the FR-V MMU 62 (effectively switching between vmlinux and uClinux). Not all FR-V 63 CPUs support this. Currently only the FR451 has a sufficiently 64 featured MMU. 65 66config FRV_OUTOFLINE_ATOMIC_OPS 67 bool "Out-of-line the FRV atomic operations" 68 default n 69 help 70 Setting this option causes the FR-V atomic operations to be mostly 71 implemented out-of-line. 72 73 See Documentation/frv/atomic-ops.txt for more information. 74 75config HIGHMEM 76 bool "High memory support" 77 depends on MMU 78 default y 79 help 80 If you wish to use more than 256MB of memory with your MMU based 81 system, you will need to select this option. The kernel can only see 82 the memory between 0xC0000000 and 0xD0000000 directly... everything 83 else must be kmapped. 84 85 The arch is, however, capable of supporting up to 3GB of SDRAM. 86 87config HIGHPTE 88 bool "Allocate page tables in highmem" 89 depends on HIGHMEM 90 default y 91 help 92 The VM uses one page of memory for each page table. For systems 93 with a lot of RAM, this can be wasteful of precious low memory. 94 Setting this option will put user-space page tables in high memory. 95 96source "mm/Kconfig" 97 98choice 99 prompt "uClinux kernel load address" 100 depends on !MMU 101 default UCPAGE_OFFSET_C0000000 102 help 103 This option sets the base address for the uClinux kernel. The kernel 104 will rearrange the SDRAM layout to start at this address, and move 105 itself to start there. It must be greater than 0, and it must be 106 sufficiently less than 0xE0000000 that the SDRAM does not intersect 107 the I/O region. 108 109 The base address must also be aligned such that the SDRAM controller 110 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned. 111 112config UCPAGE_OFFSET_20000000 113 bool "0x20000000" 114 115config UCPAGE_OFFSET_40000000 116 bool "0x40000000" 117 118config UCPAGE_OFFSET_60000000 119 bool "0x60000000" 120 121config UCPAGE_OFFSET_80000000 122 bool "0x80000000" 123 124config UCPAGE_OFFSET_A0000000 125 bool "0xA0000000" 126 127config UCPAGE_OFFSET_C0000000 128 bool "0xC0000000 (Recommended)" 129 130endchoice 131 132config PAGE_OFFSET 133 hex 134 default 0x20000000 if UCPAGE_OFFSET_20000000 135 default 0x40000000 if UCPAGE_OFFSET_40000000 136 default 0x60000000 if UCPAGE_OFFSET_60000000 137 default 0x80000000 if UCPAGE_OFFSET_80000000 138 default 0xA0000000 if UCPAGE_OFFSET_A0000000 139 default 0xC0000000 140 141config PROTECT_KERNEL 142 bool "Protect core kernel against userspace" 143 depends on !MMU 144 default y 145 help 146 Selecting this option causes the uClinux kernel to change the 147 permittivity of DAMPR register covering the core kernel image to 148 prevent userspace accessing the underlying memory directly. 149 150choice 151 prompt "CPU Caching mode" 152 default FRV_DEFL_CACHE_WBACK 153 help 154 This option determines the default caching mode for the kernel. 155 156 Write-Back caching mode involves the all reads and writes causing 157 the affected cacheline to be read into the cache first before being 158 operated upon. Memory is not then updated by a write until the cache 159 is filled and a cacheline needs to be displaced from the cache to 160 make room. Only at that point is it written back. 161 162 Write-Behind caching is similar to Write-Back caching, except that a 163 write won't fetch a cacheline into the cache if there isn't already 164 one there; it will write directly to memory instead. 165 166 Write-Through caching only fetches cachelines from memory on a 167 read. Writes always get written directly to memory. If the affected 168 cacheline is also in cache, it will be updated too. 169 170 The final option is to turn of caching entirely. 171 172 Note that not all CPUs support Write-Behind caching. If the CPU on 173 which the kernel is running doesn't, it'll fall back to Write-Back 174 caching. 175 176config FRV_DEFL_CACHE_WBACK 177 bool "Write-Back" 178 179config FRV_DEFL_CACHE_WBEHIND 180 bool "Write-Behind" 181 182config FRV_DEFL_CACHE_WTHRU 183 bool "Write-Through" 184 185config FRV_DEFL_CACHE_DISABLED 186 bool "Disabled" 187 188endchoice 189 190menu "CPU core support" 191 192config CPU_FR401 193 bool "Include FR401 core support" 194 depends on !MMU 195 default y 196 help 197 This enables support for the FR401, FR401A and FR403 CPUs 198 199config CPU_FR405 200 bool "Include FR405 core support" 201 depends on !MMU 202 default y 203 help 204 This enables support for the FR405 CPU 205 206config CPU_FR451 207 bool "Include FR451 core support" 208 default y 209 help 210 This enables support for the FR451 CPU 211 212config CPU_FR451_COMPILE 213 bool "Specifically compile for FR451 core" 214 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551 215 default y 216 help 217 This causes appropriate flags to be passed to the compiler to 218 optimise for the FR451 CPU 219 220config CPU_FR551 221 bool "Include FR551 core support" 222 depends on !MMU 223 default y 224 help 225 This enables support for the FR555 CPU 226 227config CPU_FR551_COMPILE 228 bool "Specifically compile for FR551 core" 229 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451 230 default y 231 help 232 This causes appropriate flags to be passed to the compiler to 233 optimise for the FR555 CPU 234 235config FRV_L1_CACHE_SHIFT 236 int 237 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451 238 default "6" if CPU_FR551 239 240endmenu 241 242choice 243 prompt "System support" 244 default MB93091_VDK 245 246config MB93091_VDK 247 bool "MB93091 CPU board with or without motherboard" 248 249config MB93093_PDK 250 bool "MB93093 PDK unit" 251 252endchoice 253 254if MB93091_VDK 255choice 256 prompt "Motherboard support" 257 default MB93090_MB00 258 259config MB93090_MB00 260 bool "Use the MB93090-MB00 motherboard" 261 help 262 Select this option if the MB93091 CPU board is going to be used with 263 a MB93090-MB00 VDK motherboard 264 265config MB93091_NO_MB 266 bool "Use standalone" 267 help 268 Select this option if the MB93091 CPU board is going to be used 269 without a motherboard 270 271endchoice 272endif 273 274config FUJITSU_MB93493 275 bool "MB93493 Multimedia chip" 276 help 277 Select this option if the MB93493 multimedia chip is going to be 278 used. 279 280choice 281 prompt "GP-Relative data support" 282 default GPREL_DATA_8 283 help 284 This option controls what data, if any, should be placed in the GP 285 relative data sections. Using this means that the compiler can 286 generate accesses to the data using GR16-relative addressing which 287 is faster than absolute instructions and saves space (2 instructions 288 per access). 289 290 However, the GPREL region is limited in size because the immediate 291 value used in the load and store instructions is limited to a 12-bit 292 signed number. 293 294 So if the linker starts complaining that accesses to GPREL data are 295 out of range, try changing this option from the default. 296 297 Note that modules will always be compiled with this feature disabled 298 as the module data will not be in range of the GP base address. 299 300config GPREL_DATA_8 301 bool "Put data objects of up to 8 bytes into GP-REL" 302 303config GPREL_DATA_4 304 bool "Put data objects of up to 4 bytes into GP-REL" 305 306config GPREL_DATA_NONE 307 bool "Don't use GP-REL" 308 309endchoice 310 311config FRV_ONCPU_SERIAL 312 bool "Use on-CPU serial ports" 313 select SERIAL_8250 314 default y 315 316config PCI 317 bool "Use PCI" 318 depends on MB93090_MB00 319 default y 320 help 321 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI 322 onboard. If you have one of these boards and you wish to use the PCI 323 facilities, say Y here. 324 325config RESERVE_DMA_COHERENT 326 bool "Reserve DMA coherent memory" 327 depends on PCI && !MMU 328 default y 329 help 330 Many PCI drivers require access to uncached memory for DMA device 331 communications (such as is done with some Ethernet buffer rings). If 332 a fully featured MMU is available, this can be done through page 333 table settings, but if not, a region has to be set aside and marked 334 with a special DAMPR register. 335 336 Setting this option causes uClinux to set aside a portion of the 337 available memory for use in this manner. The memory will then be 338 unavailable for normal kernel use. 339 340source "drivers/pci/Kconfig" 341 342source "drivers/pcmcia/Kconfig" 343 344#config MATH_EMULATION 345# bool "Math emulation support (EXPERIMENTAL)" 346# depends on EXPERIMENTAL 347# help 348# At some point in the future, this will cause floating-point math 349# instructions to be emulated by the kernel on machines that lack a 350# floating-point math coprocessor. Thrill-seekers and chronically 351# sleep-deprived psychotic hacker types can say Y now, everyone else 352# should probably wait a while. 353 354menu "Power management options" 355 356config ARCH_SUSPEND_POSSIBLE 357 def_bool y 358 359source kernel/power/Kconfig 360endmenu 361 362endmenu 363 364 365menu "Executable formats" 366 367source "fs/Kconfig.binfmt" 368 369endmenu 370 371source "net/Kconfig" 372 373source "drivers/Kconfig" 374 375source "fs/Kconfig" 376 377source "arch/frv/Kconfig.debug" 378 379source "security/Kconfig" 380 381source "crypto/Kconfig" 382 383source "lib/Kconfig" 384