linux/Documentation/x86/x86_64/boot-options.txt
<<
>>
Prefs
   1AMD64 specific boot options
   2
   3There are many others (usually documented in driver documentation), but
   4only the AMD64 specific ones are listed here.
   5
   6Machine check
   7
   8   Please see Documentation/x86/x86_64/machinecheck for sysfs runtime tunables.
   9
  10   mce=off
  11                Disable machine check
  12   mce=no_cmci
  13                Disable CMCI(Corrected Machine Check Interrupt) that
  14                Intel processor supports.  Usually this disablement is
  15                not recommended, but it might be handy if your hardware
  16                is misbehaving.
  17                Note that you'll get more problems without CMCI than with
  18                due to the shared banks, i.e. you might get duplicated
  19                error logs.
  20   mce=dont_log_ce
  21                Don't make logs for corrected errors.  All events reported
  22                as corrected are silently cleared by OS.
  23                This option will be useful if you have no interest in any
  24                of corrected errors.
  25   mce=ignore_ce
  26                Disable features for corrected errors, e.g. polling timer
  27                and CMCI.  All events reported as corrected are not cleared
  28                by OS and remained in its error banks.
  29                Usually this disablement is not recommended, however if
  30                there is an agent checking/clearing corrected errors
  31                (e.g. BIOS or hardware monitoring applications), conflicting
  32                with OS's error handling, and you cannot deactivate the agent,
  33                then this option will be a help.
  34   mce=no_lmce
  35                Do not opt-in to Local MCE delivery. Use legacy method
  36                to broadcast MCEs.
  37   mce=bootlog
  38                Enable logging of machine checks left over from booting.
  39                Disabled by default on AMD because some BIOS leave bogus ones.
  40                If your BIOS doesn't do that it's a good idea to enable though
  41                to make sure you log even machine check events that result
  42                in a reboot. On Intel systems it is enabled by default.
  43   mce=nobootlog
  44                Disable boot machine check logging.
  45   mce=tolerancelevel[,monarchtimeout] (number,number)
  46                tolerance levels:
  47                0: always panic on uncorrected errors, log corrected errors
  48                1: panic or SIGBUS on uncorrected errors, log corrected errors
  49                2: SIGBUS or log uncorrected errors, log corrected errors
  50                3: never panic or SIGBUS, log all errors (for testing only)
  51                Default is 1
  52                Can be also set using sysfs which is preferable.
  53                monarchtimeout:
  54                Sets the time in us to wait for other CPUs on machine checks. 0
  55                to disable.
  56   mce=bios_cmci_threshold
  57                Don't overwrite the bios-set CMCI threshold. This boot option
  58                prevents Linux from overwriting the CMCI threshold set by the
  59                bios. Without this option, Linux always sets the CMCI
  60                threshold to 1. Enabling this may make memory predictive failure
  61                analysis less effective if the bios sets thresholds for memory
  62                errors since we will not see details for all errors.
  63   mce=recovery
  64                Force-enable recoverable machine check code paths
  65
  66   nomce (for compatibility with i386): same as mce=off
  67
  68   Everything else is in sysfs now.
  69
  70APICs
  71
  72   apic          Use IO-APIC. Default
  73
  74   noapic        Don't use the IO-APIC.
  75
  76   disableapic   Don't use the local APIC
  77
  78   nolapic       Don't use the local APIC (alias for i386 compatibility)
  79
  80   pirq=...      See Documentation/x86/i386/IO-APIC.txt
  81
  82   noapictimer   Don't set up the APIC timer
  83
  84   no_timer_check Don't check the IO-APIC timer. This can work around
  85                 problems with incorrect timer initialization on some boards.
  86   apicpmtimer
  87                 Do APIC timer calibration using the pmtimer. Implies
  88                 apicmaintimer. Useful when your PIT timer is totally
  89                 broken.
  90
  91Timing
  92
  93  notsc
  94  Don't use the CPU time stamp counter to read the wall time.
  95  This can be used to work around timing problems on multiprocessor systems
  96  with not properly synchronized CPUs.
  97
  98  nohpet
  99  Don't use the HPET timer.
 100
 101Idle loop
 102
 103  idle=poll
 104  Don't do power saving in the idle loop using HLT, but poll for rescheduling
 105  event. This will make the CPUs eat a lot more power, but may be useful
 106  to get slightly better performance in multiprocessor benchmarks. It also
 107  makes some profiling using performance counters more accurate.
 108  Please note that on systems with MONITOR/MWAIT support (like Intel EM64T
 109  CPUs) this option has no performance advantage over the normal idle loop.
 110  It may also interact badly with hyperthreading.
 111
 112Rebooting
 113
 114   reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] [, [w]arm | [c]old]
 115   bios   Use the CPU reboot vector for warm reset
 116   warm   Don't set the cold reboot flag
 117   cold   Set the cold reboot flag
 118   triple Force a triple fault (init)
 119   kbd    Use the keyboard controller. cold reset (default)
 120   acpi   Use the ACPI RESET_REG in the FADT. If ACPI is not configured or the
 121          ACPI reset does not work, the reboot path attempts the reset using
 122          the keyboard controller.
 123   efi    Use efi reset_system runtime service. If EFI is not configured or the
 124          EFI reset does not work, the reboot path attempts the reset using
 125          the keyboard controller.
 126
 127   Using warm reset will be much faster especially on big memory
 128   systems because the BIOS will not go through the memory check.
 129   Disadvantage is that not all hardware will be completely reinitialized
 130   on reboot so there may be boot problems on some systems.
 131
 132   reboot=force
 133
 134   Don't stop other CPUs on reboot. This can make reboot more reliable
 135   in some cases.
 136
 137Non Executable Mappings
 138
 139  noexec=on|off
 140
 141  on      Enable(default)
 142  off     Disable
 143
 144NUMA
 145
 146  numa=off      Only set up a single NUMA node spanning all memory.
 147
 148  numa=noacpi   Don't parse the SRAT table for NUMA setup
 149
 150  numa=fake=<size>[MG]
 151                If given as a memory unit, fills all system RAM with nodes of
 152                size interleaved over physical nodes.
 153
 154  numa=fake=<N>
 155                If given as an integer, fills all system RAM with N fake nodes
 156                interleaved over physical nodes.
 157
 158ACPI
 159
 160  acpi=off      Don't enable ACPI
 161  acpi=ht       Use ACPI boot table parsing, but don't enable ACPI
 162                interpreter
 163  acpi=force    Force ACPI on (currently not needed)
 164
 165  acpi=strict   Disable out of spec ACPI workarounds.
 166
 167  acpi_sci={edge,level,high,low}  Set up ACPI SCI interrupt.
 168
 169  acpi=noirq    Don't route interrupts
 170
 171  acpi=nocmcff  Disable firmware first mode for corrected errors. This
 172                disables parsing the HEST CMC error source to check if
 173                firmware has set the FF flag. This may result in
 174                duplicate corrected error reports.
 175
 176PCI
 177
 178  pci=off               Don't use PCI
 179  pci=conf1             Use conf1 access.
 180  pci=conf2             Use conf2 access.
 181  pci=rom               Assign ROMs.
 182  pci=assign-busses     Assign busses
 183  pci=irqmask=MASK      Set PCI interrupt mask to MASK
 184  pci=lastbus=NUMBER    Scan up to NUMBER busses, no matter what the mptable says.
 185  pci=noacpi            Don't use ACPI to set up PCI interrupt routing.
 186
 187IOMMU (input/output memory management unit)
 188
 189 Currently four x86-64 PCI-DMA mapping implementations exist:
 190
 191   1. <arch/x86_64/kernel/pci-nommu.c>: use no hardware/software IOMMU at all
 192      (e.g. because you have < 3 GB memory).
 193      Kernel boot message: "PCI-DMA: Disabling IOMMU"
 194
 195   2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU.
 196      Kernel boot message: "PCI-DMA: using GART IOMMU"
 197
 198   3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
 199      e.g. if there is no hardware IOMMU in the system and it is need because
 200      you have >3GB memory or told the kernel to us it (iommu=soft))
 201      Kernel boot message: "PCI-DMA: Using software bounce buffering
 202      for IO (SWIOTLB)"
 203
 204   4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM
 205      pSeries and xSeries servers. This hardware IOMMU supports DMA address
 206      mapping with memory protection, etc.
 207      Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
 208
 209 iommu=[<size>][,noagp][,off][,force][,noforce][,leak[=<nr_of_leak_pages>]
 210        [,memaper[=<order>]][,merge][,forcesac][,fullflush][,nomerge]
 211        [,noaperture][,calgary]
 212
 213  General iommu options:
 214    off                Don't initialize and use any kind of IOMMU.
 215    noforce            Don't force hardware IOMMU usage when it is not needed.
 216                       (default).
 217    force              Force the use of the hardware IOMMU even when it is
 218                       not actually needed (e.g. because < 3 GB memory).
 219    soft               Use software bounce buffering (SWIOTLB) (default for
 220                       Intel machines). This can be used to prevent the usage
 221                       of an available hardware IOMMU.
 222
 223  iommu options only relevant to the AMD GART hardware IOMMU:
 224    <size>             Set the size of the remapping area in bytes.
 225    allowed            Overwrite iommu off workarounds for specific chipsets.
 226    fullflush          Flush IOMMU on each allocation (default).
 227    nofullflush        Don't use IOMMU fullflush.
 228    leak               Turn on simple iommu leak tracing (only when
 229                       CONFIG_IOMMU_LEAK is on). Default number of leak pages
 230                       is 20.
 231    memaper[=<order>]  Allocate an own aperture over RAM with size 32MB<<order.
 232                       (default: order=1, i.e. 64MB)
 233    merge              Do scatter-gather (SG) merging. Implies "force"
 234                       (experimental).
 235    nomerge            Don't do scatter-gather (SG) merging.
 236    noaperture         Ask the IOMMU not to touch the aperture for AGP.
 237    forcesac           Force single-address cycle (SAC) mode for masks <40bits
 238                       (experimental).
 239    noagp              Don't initialize the AGP driver and use full aperture.
 240    allowdac           Allow double-address cycle (DAC) mode, i.e. DMA >4GB.
 241                       DAC is used with 32-bit PCI to push a 64-bit address in
 242                       two cycles. When off all DMA over >4GB is forced through
 243                       an IOMMU or software bounce buffering.
 244    nodac              Forbid DAC mode, i.e. DMA >4GB.
 245    panic              Always panic when IOMMU overflows.
 246    calgary            Use the Calgary IOMMU if it is available
 247
 248  iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
 249  implementation:
 250    swiotlb=<pages>[,force]
 251    <pages>            Prereserve that many 128K pages for the software IO
 252                       bounce buffering.
 253    force              Force all IO through the software TLB.
 254
 255  Settings for the IBM Calgary hardware IOMMU currently found in IBM
 256  pSeries and xSeries machines:
 257
 258    calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
 259    calgary=[translate_empty_slots]
 260    calgary=[disable=<PCI bus number>]
 261    panic              Always panic when IOMMU overflows
 262
 263    64k,...,8M - Set the size of each PCI slot's translation table
 264    when using the Calgary IOMMU. This is the size of the translation
 265    table itself in main memory. The smallest table, 64k, covers an IO
 266    space of 32MB; the largest, 8MB table, can cover an IO space of
 267    4GB. Normally the kernel will make the right choice by itself.
 268
 269    translate_empty_slots - Enable translation even on slots that have
 270    no devices attached to them, in case a device will be hotplugged
 271    in the future.
 272
 273    disable=<PCI bus number> - Disable translation on a given PHB. For
 274    example, the built-in graphics adapter resides on the first bridge
 275    (PCI bus number 0); if translation (isolation) is enabled on this
 276    bridge, X servers that access the hardware directly from user
 277    space might stop working. Use this option if you have devices that
 278    are accessed from userspace directly on some PCI host bridge.
 279
 280Miscellaneous
 281
 282        nogbpages
 283                Do not use GB pages for kernel direct mappings.
 284        gbpages
 285                Use GB pages for kernel direct mappings.
 286
lxr.linux.no kindly hosted by Redpill Linpro AS, provider of Linux consulting and operations services since 1995.