1/* 2 * linux/include/asm-sh/irq_microdev.h 3 * 4 * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) 5 * 6 * IRQ functions for the SuperH SH4-202 MicroDev board. 7 * 8 * May be copied or modified under the terms of the GNU General Public 9 * License. See linux/COPYING for more information. 10 * 11 */ 12 13 14#ifndef _ASM_SH_IRQ_MICRODEV_H 15#define _ASM_SH_IRQ_MICRODEV_H 16 17extern void __init init_microdev_irq(void); 18 19 20 /* 21 * The following are useful macros for manipulating the 22 * interrupt controller (INTC) on the CPU-board FPGA. 23 * It should be noted that there is an INTC on the FPGA, 24 * and a seperate INTC on the SH4-202 core - these are 25 * two different things, both of which need to be prorammed 26 * to correctly route - unfortunately, they have the 27 * same name and abbreviations! 28 */ 29#define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */ 30#define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */ 31#define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */ 32#define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interupt mask to enable/disable INTC in CPU-board FPGA */ 33#define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */ 34#define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */ 35#define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */ 36 37 38#endif /* _ASM_SH_IRQ_MICRODEV_H */ 39