LXR linux-old/include/asm-parisc/system.h

   1#ifndef __PARISC_SYSTEM_H
   2#define __PARISC_SYSTEM_H
   3
   4#include <linux/config.h>
   5#include <asm/psw.h>
   6#include <asm/system_irqsave.h>
   7
   8#ifdef CONFIG_SMP
   9#include <asm/spinlock_t.h>
  10#endif
  11
  12/* The program status word as bitfields.  */
  13struct pa_psw {
  14        unsigned int y:1;
  15        unsigned int z:1;
  16        unsigned int rv:2;
  17        unsigned int w:1;
  18        unsigned int e:1;
  19        unsigned int s:1;
  20        unsigned int t:1;
  21
  22        unsigned int h:1;
  23        unsigned int l:1;
  24        unsigned int n:1;
  25        unsigned int x:1;
  26        unsigned int b:1;
  27        unsigned int c:1;
  28        unsigned int v:1;
  29        unsigned int m:1;
  30
  31        unsigned int cb:8;
  32
  33        unsigned int o:1;
  34        unsigned int g:1;
  35        unsigned int f:1;
  36        unsigned int r:1;
  37        unsigned int q:1;
  38        unsigned int p:1;
  39        unsigned int d:1;
  40        unsigned int i:1;
  41};
  42
  43#ifdef __LP64__
  44#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW + 4))
  45#else
  46#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW))
  47#endif
  48
  49struct task_struct;
  50
  51extern struct task_struct *_switch_to(struct task_struct *, struct task_struct *);
  52
  53#define prepare_to_switch()     do { } while(0)
  54#define switch_to(prev, next, last) do {                        \
  55        (last) = _switch_to(prev, next);                        \
  56} while(0)
  57
  58
  59#ifdef CONFIG_SMP
  60extern void __global_cli(void);
  61extern void __global_sti(void);
  62extern unsigned long __global_save_flags(void);
  63extern void __global_restore_flags(unsigned long);
  64
  65#define cli() __global_cli()
  66#define sti() __global_sti()
  67#define save_flags(x) ((x)=__global_save_flags())
  68#define restore_flags(x) __global_restore_flags(x)
  69#define save_and_cli(x) do { save_flags(x); cli(); } while(0);
  70#define save_and_sti(x) do { save_flags(x); sti(); } while(0);
  71
  72#else
  73
  74#define cli() __cli()
  75#define sti() __sti()
  76#define save_flags(x) __save_flags(x)
  77#define restore_flags(x) __restore_flags(x)
  78#define save_and_cli(x) __save_and_cli(x)
  79#define save_and_sti(x) __save_and_sti(x)
  80
  81#endif
  82
  83
  84#define mfctl(reg)      ({              \
  85        unsigned long cr;               \
  86        __asm__ __volatile__(           \
  87                "mfctl " #reg ",%0" :   \
  88                 "=r" (cr)              \
  89        );                              \
  90        cr;                             \
  91})
  92
  93#define mtctl(gr, cr) \
  94        __asm__ __volatile__("mtctl %0,%1" \
  95                : /* no outputs */ \
  96                : "r" (gr), "i" (cr))
  97
  98/* these are here to de-mystefy the calling code, and to provide hooks */
  99/* which I needed for debugging EIEM problems -PB */
 100#define get_eiem() mfctl(15)
 101static inline void set_eiem(unsigned long val)
 102{
 103        mtctl(val, 15);
 104}
 105
 106#define mfsp(reg)       ({              \
 107        unsigned long cr;               \
 108        __asm__ __volatile__(           \
 109                "mfsp " #reg ",%0" :    \
 110                 "=r" (cr)              \
 111        );                              \
 112        cr;                             \
 113})
 114
 115#define mtsp(gr, cr) \
 116        __asm__ __volatile__("mtsp %0,%1" \
 117                : /* no outputs */ \
 118                : "r" (gr), "i" (cr))
 119
 120
 121/*
 122** This is simply the barrier() macro from linux/kernel.h but when serial.c
 123** uses tqueue.h uses smp_mb() defined using barrier(), linux/kernel.h
 124** hasn't yet been included yet so it fails, thus repeating the macro here.
 125**
 126** PA-RISC architecture allows for weakly ordered memory accesses although
 127** none of the processors use it. There is a strong ordered bit that is
 128** set in the O-bit of the page directory entry. Operating systems that
 129** can not tolerate out of order accesses should set this bit when mapping
 130** pages. The O-bit of the PSW should also be set to 1 (I don't believe any
 131** of the processor implemented the PSW O-bit). The PCX-W ERS states that
 132** the TLB O-bit is not implemented so the page directory does not need to
 133** have the O-bit set when mapping pages (section 3.1). This section also
 134** states that the PSW Y, Z, G, and O bits are not implemented.
 135** So it looks like nothing needs to be done for parisc-linux (yet).
 136** (thanks to chada for the above comment -ggg)
 137**
 138** The __asm__ op below simple prevents gcc/ld from reordering
 139** instructions across the mb() "call".
 140*/
 141#define mb()            __asm__ __volatile__("":::"memory");    /* barrier() */
 142#define rmb()           mb()
 143#define wmb()           mb()
 144#define smp_mb()        mb()
 145#define smp_wmb()       mb()
 146
 147#define set_mb(var, value) do { var = value; mb(); } while (0)
 148
 149#endif
 150