LXR linux-old/drivers/scsi/3w-xxxx.h

   1/* 
   2   3w-xxxx.h -- 3ware Storage Controller device driver for Linux.
   3   
   4   Written By: Adam Radford <linux@3ware.com>
   5   Modifications By: Joel Jacobson <linux@3ware.com>
   6                     Arnaldo Carvalho de Melo <acme@conectiva.com.br>
   7                     Brad Strand <linux@3ware.com>
   8
   9   Copyright (C) 1999-2003 3ware Inc.
  10
  11   Kernel compatablity By:      Andre Hedrick <andre@suse.com>
  12   Non-Copyright (C) 2000       Andre Hedrick <andre@suse.com>
  13
  14   This program is free software; you can redistribute it and/or modify
  15   it under the terms of the GNU General Public License as published by
  16   the Free Software Foundation; version 2 of the License.
  17
  18   This program is distributed in the hope that it will be useful,           
  19   but WITHOUT ANY WARRANTY; without even the implied warranty of            
  20   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the             
  21   GNU General Public License for more details.                              
  22
  23   NO WARRANTY                                                               
  24   THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR        
  25   CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT      
  26   LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,      
  27   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is    
  28   solely responsible for determining the appropriateness of using and       
  29   distributing the Program and assumes all risks associated with its        
  30   exercise of rights under this Agreement, including but not limited to     
  31   the risks and costs of program errors, damage to or loss of data,         
  32   programs or equipment, and unavailability or interruption of operations.  
  33
  34   DISCLAIMER OF LIABILITY                                                   
  35   NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY   
  36   DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL        
  37   DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND   
  38   ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR     
  39   TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE    
  40   USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED  
  41   HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES             
  42
  43   You should have received a copy of the GNU General Public License         
  44   along with this program; if not, write to the Free Software               
  45   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
  46
  47   Bugs/Comments/Suggestions should be mailed to:                            
  48   linux@3ware.com
  49   
  50   For more information, goto:
  51   http://www.3ware.com
  52*/
  53
  54#ifndef _3W_XXXX_H
  55#define _3W_XXXX_H
  56
  57#include <linux/version.h>
  58#include <linux/types.h>
  59#include <linux/kdev_t.h>
  60
  61/* AEN strings */
  62static char *tw_aen_string[] = {
  63        "INFO: AEN queue empty",                       // 0x000
  64        "INFO: Soft reset occurred",                   // 0x001
  65        "ERROR: Unit degraded: Unit #",                // 0x002
  66        "ERROR: Controller error",                     // 0x003 
  67        "ERROR: Rebuild failed: Unit #",               // 0x004
  68        "INFO: Rebuild complete: Unit #",              // 0x005
  69        "ERROR: Incomplete unit detected: Unit #",     // 0x006
  70        "INFO: Initialization complete: Unit #",       // 0x007
  71        "WARNING: Unclean shutdown detected: Unit #",  // 0x008
  72        "WARNING: ATA port timeout: Port #",           // 0x009
  73        "ERROR: Drive error: Port #",                  // 0x00A
  74        "INFO: Rebuild started: Unit #",               // 0x00B 
  75        "INFO: Initialization started: Unit #",        // 0x00C
  76        "ERROR: Logical unit deleted: Unit #",         // 0x00D
  77        NULL,                                          // 0x00E unused
  78        "WARNING: SMART threshold exceeded: Port #",   // 0x00F
  79        NULL, NULL, NULL, NULL, NULL,
  80        NULL, NULL, NULL, NULL, NULL,
  81        NULL, NULL, NULL, NULL, NULL,
  82        NULL, NULL,                                    // 0x010-0x020 unused
  83        "WARNING: ATA UDMA downgrade: Port #",         // 0x021
  84        "WARNING: ATA UDMA upgrade: Port #",           // 0x022
  85        "WARNING: Sector repair occurred: Port #",     // 0x023
  86        "ERROR: SBUF integrity check failure",         // 0x024
  87        "ERROR: Lost cached write: Port #",            // 0x025
  88        "ERROR: Drive ECC error detected: Port #",     // 0x026
  89        "ERROR: DCB checksum error: Port #",           // 0x027
  90        "ERROR: DCB unsupported version: Port #",      // 0x028
  91        "INFO: Verify started: Unit #",                // 0x029
  92        "ERROR: Verify failed: Port #",                // 0x02A
  93        "INFO: Verify complete: Unit #",               // 0x02B
  94        "WARNING: Overwrote bad sector during rebuild: Port #",  //0x02C
  95        "ERROR: Encountered bad sector during rebuild: Port #",  //0x02D
  96        "ERROR: Replacement drive is too small: Port #",         //0x02E
  97        "WARNING: Verify error: Unit not previously initialized: Unit #", //0x02F
  98        "ERROR: Drive not supported: Port #"           // 0x030
  99};
 100
 101/* 
 102   Sense key lookup table 
 103   Format: ESDC/flags,SenseKey,AdditionalSenseCode,AdditionalSenseCodeQualifier
 104*/
 105static unsigned char tw_sense_table[][4] =
 106{
 107  /* Codes for newer firmware */
 108                            // ATA Error                    SCSI Error
 109  {0x01, 0x03, 0x13, 0x00}, // Address mark not found       Address mark not found for data field
 110  {0x04, 0x0b, 0x00, 0x00}, // Aborted command              Aborted command
 111  {0x10, 0x0b, 0x14, 0x00}, // ID not found                 Recorded entity not found
 112  {0x40, 0x03, 0x11, 0x00}, // Uncorrectable ECC error      Unrecovered read error
 113  {0x61, 0x04, 0x00, 0x00}, // Device fault                 Hardware error
 114  {0x84, 0x0b, 0x47, 0x00}, // Data CRC error               SCSI parity error
 115  {0xd0, 0x0b, 0x00, 0x00}, // Device busy                  Aborted command
 116  {0xd1, 0x0b, 0x00, 0x00}, // Device busy                  Aborted command
 117  {0x37, 0x02, 0x04, 0x00}, // Unit offline                 Not ready
 118  {0x09, 0x02, 0x04, 0x00}, // Unrecovered disk error       Not ready
 119
 120  /* Codes for older firmware */
 121                            // 3ware Error                  SCSI Error
 122  {0x51, 0x0b, 0x00, 0x00}  // Unspecified                  Aborted command
 123};
 124
 125/* Control register bit definitions */
 126#define TW_CONTROL_CLEAR_HOST_INTERRUPT        0x00080000
 127#define TW_CONTROL_CLEAR_ATTENTION_INTERRUPT   0x00040000
 128#define TW_CONTROL_MASK_COMMAND_INTERRUPT      0x00020000
 129#define TW_CONTROL_MASK_RESPONSE_INTERRUPT     0x00010000
 130#define TW_CONTROL_UNMASK_COMMAND_INTERRUPT    0x00008000
 131#define TW_CONTROL_UNMASK_RESPONSE_INTERRUPT   0x00004000
 132#define TW_CONTROL_CLEAR_ERROR_STATUS          0x00000200
 133#define TW_CONTROL_ISSUE_SOFT_RESET            0x00000100
 134#define TW_CONTROL_ENABLE_INTERRUPTS           0x00000080
 135#define TW_CONTROL_DISABLE_INTERRUPTS          0x00000040
 136#define TW_CONTROL_ISSUE_HOST_INTERRUPT        0x00000020
 137#define TW_CONTROL_CLEAR_PARITY_ERROR          0x00800000
 138#define TW_CONTROL_CLEAR_QUEUE_ERROR           0x00400000
 139#define TW_CONTROL_CLEAR_PCI_ABORT             0x00100000
 140#define TW_CONTROL_CLEAR_SBUF_WRITE_ERROR      0x00000008
 141
 142/* Status register bit definitions */
 143#define TW_STATUS_MAJOR_VERSION_MASK           0xF0000000
 144#define TW_STATUS_MINOR_VERSION_MASK           0x0F000000
 145#define TW_STATUS_PCI_PARITY_ERROR             0x00800000
 146#define TW_STATUS_QUEUE_ERROR                  0x00400000
 147#define TW_STATUS_MICROCONTROLLER_ERROR        0x00200000
 148#define TW_STATUS_PCI_ABORT                    0x00100000
 149#define TW_STATUS_HOST_INTERRUPT               0x00080000
 150#define TW_STATUS_ATTENTION_INTERRUPT          0x00040000
 151#define TW_STATUS_COMMAND_INTERRUPT            0x00020000
 152#define TW_STATUS_RESPONSE_INTERRUPT           0x00010000
 153#define TW_STATUS_COMMAND_QUEUE_FULL           0x00008000
 154#define TW_STATUS_RESPONSE_QUEUE_EMPTY         0x00004000
 155#define TW_STATUS_MICROCONTROLLER_READY        0x00002000
 156#define TW_STATUS_COMMAND_QUEUE_EMPTY          0x00001000
 157#define TW_STATUS_ALL_INTERRUPTS               0x000F0000
 158#define TW_STATUS_CLEARABLE_BITS               0x00D00000
 159#define TW_STATUS_EXPECTED_BITS                0x00002000
 160#define TW_STATUS_UNEXPECTED_BITS              0x00F00008
 161#define TW_STATUS_SBUF_WRITE_ERROR             0x00000008
 162#define TW_STATUS_VALID_INTERRUPT              0x00DF0008
 163
 164/* RESPONSE QUEUE BIT DEFINITIONS */
 165#define TW_RESPONSE_ID_MASK                    0x00000FF0
 166
 167/* PCI related defines */
 168#define TW_IO_ADDRESS_RANGE                    0x10
 169#define TW_DEVICE_NAME                         "3ware Storage Controller"
 170#define TW_VENDOR_ID (0x13C1)   /* 3ware */
 171#define TW_DEVICE_ID (0x1000)   /* Storage Controller */
 172#define TW_DEVICE_ID2 (0x1001)  /* 7000 series controller */
 173#define TW_NUMDEVICES 2
 174#define TW_PCI_CLEAR_PARITY_ERRORS 0xc100
 175#define TW_PCI_CLEAR_PCI_ABORT     0x2000
 176
 177/* Command packet opcodes */
 178#define TW_OP_NOP             0x0
 179#define TW_OP_INIT_CONNECTION 0x1
 180#define TW_OP_READ            0x2
 181#define TW_OP_WRITE           0x3
 182#define TW_OP_VERIFY          0x4
 183#define TW_OP_GET_PARAM       0x12
 184#define TW_OP_SET_PARAM       0x13
 185#define TW_OP_SECTOR_INFO     0x1a
 186#define TW_OP_AEN_LISTEN      0x1c
 187#define TW_OP_FLUSH_CACHE     0x0e
 188#define TW_CMD_PACKET         0x1d
 189#define TW_ATA_PASSTHRU       0x1e
 190#define TW_CMD_PACKET_WITH_DATA 0x1f
 191
 192/* Asynchronous Event Notification (AEN) Codes */
 193#define TW_AEN_QUEUE_EMPTY       0x0000
 194#define TW_AEN_SOFT_RESET        0x0001
 195#define TW_AEN_DEGRADED_MIRROR   0x0002
 196#define TW_AEN_CONTROLLER_ERROR  0x0003
 197#define TW_AEN_REBUILD_FAIL      0x0004
 198#define TW_AEN_REBUILD_DONE      0x0005
 199#define TW_AEN_QUEUE_FULL        0x00ff
 200#define TW_AEN_TABLE_UNDEFINED   0x15
 201#define TW_AEN_APORT_TIMEOUT     0x0009
 202#define TW_AEN_DRIVE_ERROR       0x000A
 203#define TW_AEN_SMART_FAIL        0x000F
 204#define TW_AEN_SBUF_FAIL         0x0024
 205
 206/* Misc defines */
 207#define TW_ALIGNMENT_6000                     64 /* 64 bytes */
 208#define TW_ALIGNMENT_7000                     4  /* 4 bytes */
 209#define TW_MAX_UNITS                          16
 210#define TW_COMMAND_ALIGNMENT_MASK             0x1ff
 211#define TW_INIT_MESSAGE_CREDITS               0x100
 212#define TW_INIT_COMMAND_PACKET_SIZE           0x3
 213#define TW_POLL_MAX_RETRIES                   20000
 214#define TW_MAX_SGL_LENGTH                     62
 215#define TW_ATA_PASS_SGL_MAX                   60
 216#define TW_MAX_PASSTHRU_BYTES                 4096
 217#define TW_Q_LENGTH                           256
 218#define TW_MAX_BOUNCEBUF                      16
 219#define TW_Q_START                            0
 220#define TW_MAX_SLOT                           32
 221#define TW_MAX_PCI_BUSES                      255
 222#define TW_MAX_RESET_TRIES                    3
 223#define TW_UNIT_INFORMATION_TABLE_BASE        0x300
 224#define TW_MAX_CMDS_PER_LUN                   254 /* 254 for io, 1 for 
 225                                                     chrdev ioctl, one for
 226                                                     internal aen post */
 227#define TW_BLOCK_SIZE                         0x200 /* 512-byte blocks */
 228#define TW_IOCTL                              0x80
 229#define TW_UNIT_ONLINE                        1
 230#define TW_IN_INTR                            1
 231#define TW_IN_IOCTL                           2
 232#define TW_IN_CHRDEV_IOCTL                    3
 233#define TW_MAX_SECTORS                        256
 234#define TW_MAX_BOUNCE_SECTORS                 128
 235#define TW_AEN_WAIT_TIME                      1000
 236#define TW_IOCTL_WAIT_TIME                    (1 * HZ) /* 1 second */
 237#define TW_MAX_CDB_LEN                        16
 238#define TW_ISR_DONT_COMPLETE                  2
 239#define TW_ISR_DONT_RESULT                    3
 240#define TW_IOCTL_TIMEOUT                      25 /* 25 seconds */
 241#define TW_IOCTL_CHRDEV_TIMEOUT               60 /* 60 seconds */
 242#define TW_IOCTL_CHRDEV_FREE                  -1
 243
 244/* Macros */
 245#define TW_STATUS_ERRORS(x) \
 246        (((x & TW_STATUS_PCI_ABORT) || \
 247        (x & TW_STATUS_PCI_PARITY_ERROR) || \
 248        (x & TW_STATUS_QUEUE_ERROR) || \
 249        (x & TW_STATUS_MICROCONTROLLER_ERROR)) && \
 250        (x & TW_STATUS_MICROCONTROLLER_READY))
 251
 252/* This was taken from 2.5 kernel */
 253#define tw_wait_event_interruptible_timeout(wq, condition, ret)         \
 254do {                                                                    \
 255        wait_queue_t __wait;                                            \
 256        init_waitqueue_entry(&__wait, current);                         \
 257                                                                        \
 258        add_wait_queue(&wq, &__wait);                                   \
 259        for (;;) {                                                      \
 260                set_current_state(TASK_INTERRUPTIBLE);                  \
 261                if (condition)                                          \
 262                        break;                                          \
 263                if (!signal_pending(current)) {                         \
 264                        ret = schedule_timeout(ret);                    \
 265                        if (!ret)                                       \
 266                                break;                                  \
 267                        continue;                                       \
 268                }                                                       \
 269                ret = -ERESTARTSYS;                                     \
 270                break;                                                  \
 271        }                                                               \
 272        current->state = TASK_RUNNING;                                  \
 273        remove_wait_queue(&wq, &__wait);                                \
 274} while (0)
 275
 276#ifdef TW_DEBUG
 277#define dprintk(msg...) printk(msg)
 278#else
 279#define dprintk(msg...) do { } while(0)
 280#endif
 281
 282#pragma pack(1)
 283
 284/* Scatter Gather List Entry */
 285typedef struct TAG_TW_SG_Entry {
 286        u32 address;
 287        u32 length;
 288} TW_SG_Entry;
 289
 290typedef unsigned char TW_Sector[512];
 291
 292/* Command Packet */
 293typedef struct TW_Command {
 294        /* First DWORD */
 295        struct {
 296                unsigned char opcode:5;
 297                unsigned char sgl_offset:3;
 298        } byte0;
 299        unsigned char size;
 300        unsigned char request_id;
 301        struct {
 302                unsigned char unit:4;
 303                unsigned char host_id:4;
 304        } byte3;
 305        /* Second DWORD */
 306        unsigned char status;
 307        unsigned char flags;
 308        union {
 309                unsigned short block_count;
 310                unsigned short parameter_count;
 311                unsigned short message_credits;
 312        } byte6;
 313        union {
 314                struct {
 315                        u32 lba;
 316                        TW_SG_Entry sgl[TW_MAX_SGL_LENGTH];
 317                        u32 padding;    /* pad to 512 bytes */
 318                } io;
 319                struct {
 320                        TW_SG_Entry sgl[TW_MAX_SGL_LENGTH];
 321                        u32 padding[2];
 322                } param;
 323                struct {
 324                        u32 response_queue_pointer;
 325                        u32 padding[125];
 326                } init_connection;
 327                struct {
 328                        char version[504];
 329                } ioctl_miniport_version;
 330        } byte8;
 331} TW_Command;
 332
 333#pragma pack()
 334
 335typedef struct TAG_TW_Ioctl {
 336#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,15)
 337        int buffer;
 338#endif
 339        unsigned char opcode;
 340        unsigned short table_id;
 341        unsigned char parameter_id;
 342        unsigned char parameter_size_bytes;
 343        unsigned char unit_index;
 344        unsigned char data[1];
 345} TW_Ioctl;
 346
 347#pragma pack(1)
 348
 349/* Structure for new chardev ioctls */
 350typedef struct TAG_TW_New_Ioctl {
 351        unsigned int data_buffer_length;
 352        unsigned char padding [508];
 353        TW_Command firmware_command;
 354        char data_buffer[1];
 355} TW_New_Ioctl;
 356
 357/* GetParam descriptor */
 358typedef struct {
 359        unsigned short  table_id;
 360        unsigned char   parameter_id;
 361        unsigned char   parameter_size_bytes;
 362        unsigned char   data[1];
 363} TW_Param, *PTW_Param;
 364
 365/* Response queue */
 366typedef union TAG_TW_Response_Queue {
 367        struct {
 368                u32 undefined_1: 4;
 369                u32 response_id: 8;
 370                u32 undefined_2: 20;
 371        } u;
 372        u32 value;
 373} TW_Response_Queue;
 374
 375typedef struct TAG_TW_Registers {
 376        u32 base_addr;
 377        u32 control_reg_addr;
 378        u32 status_reg_addr;
 379        u32 command_que_addr;
 380        u32 response_que_addr;
 381} TW_Registers;
 382
 383typedef struct TAG_TW_Info {
 384        char *buffer;
 385        int length;
 386        int offset;
 387        int position;
 388} TW_Info;
 389
 390typedef int TW_Cmd_State;
 391
 392#define TW_S_INITIAL   0x1  /* Initial state */
 393#define TW_S_STARTED   0x2  /* Id in use */
 394#define TW_S_POSTED    0x4  /* Posted to the controller */
 395#define TW_S_PENDING   0x8  /* Waiting to be posted in isr */
 396#define TW_S_COMPLETED 0x10 /* Completed by isr */
 397#define TW_S_FINISHED  0x20 /* I/O completely done */
 398#define TW_START_MASK (TW_S_STARTED | TW_S_POSTED | TW_S_PENDING | TW_S_COMPLETED)
 399
 400/* Command header for ATA pass-thru */
 401typedef struct TAG_TW_Passthru
 402{
 403        struct {
 404                unsigned char opcode:5;
 405                unsigned char sgloff:3;
 406        } byte0;
 407        unsigned char size;
 408        unsigned char request_id;
 409        struct {
 410                unsigned char aport:4;
 411                unsigned char host_id:4;
 412        } byte3;
 413        unsigned char status;
 414        unsigned char flags;
 415        unsigned short param;
 416        unsigned short features;
 417        unsigned short sector_count;
 418        unsigned short sector_num;
 419        unsigned short cylinder_lo;
 420        unsigned short cylinder_hi;
 421        unsigned char drive_head;
 422        unsigned char command;
 423        TW_SG_Entry sg_list[TW_ATA_PASS_SGL_MAX];
 424        unsigned char padding[12];
 425} TW_Passthru;
 426
 427typedef struct TAG_TW_Device_Extension {
 428        TW_Registers            registers;
 429        unsigned long           *alignment_virtual_address[TW_Q_LENGTH];
 430        unsigned long           alignment_physical_address[TW_Q_LENGTH];
 431        unsigned long           *bounce_buffer[TW_Q_LENGTH];
 432        unsigned long           bounce_buffer_phys[TW_Q_LENGTH];
 433        int                     is_unit_present[TW_MAX_UNITS];
 434        int                     is_raid_five[TW_MAX_UNITS];
 435        int                     num_units;
 436        int                     num_raid_five;
 437        unsigned long           *command_packet_virtual_address[TW_Q_LENGTH];
 438        unsigned long           command_packet_physical_address[TW_Q_LENGTH];
 439        struct pci_dev          *tw_pci_dev;
 440        Scsi_Cmnd               *srb[TW_Q_LENGTH];
 441        unsigned char           free_queue[TW_Q_LENGTH];
 442        unsigned char           free_head;
 443        unsigned char           free_tail;
 444        unsigned char           free_wrap;
 445        unsigned char           pending_queue[TW_Q_LENGTH];
 446        unsigned char           pending_head;
 447        unsigned char           pending_tail;
 448        TW_Cmd_State            state[TW_Q_LENGTH];
 449        u32                     posted_request_count;
 450        u32                     max_posted_request_count;
 451        u32                     request_count_marked_pending;
 452        u32                     pending_request_count;
 453        u32                     max_pending_request_count;
 454        u32                     max_sgl_entries;
 455        u32                     sgl_entries;
 456        u32                     num_aborts;
 457        u32                     num_resets;
 458        u32                     sector_count;
 459        u32                     max_sector_count;
 460        u32                     aen_count;
 461        struct Scsi_Host        *host;
 462        spinlock_t              tw_lock;
 463        struct semaphore        ioctl_sem;
 464        int                     ioctl_size[TW_Q_LENGTH];
 465        unsigned short          aen_queue[TW_Q_LENGTH];
 466        unsigned char           aen_head;
 467        unsigned char           aen_tail;
 468        volatile long           flags; /* long req'd for set_bit --RR */
 469        unsigned long           *ioctl_data[TW_Q_LENGTH];
 470        int                     reset_print;
 471        char                    online;
 472        volatile int            chrdev_request_id;
 473        wait_queue_head_t       ioctl_wqueue;
 474} TW_Device_Extension;
 475
 476#pragma pack()
 477
 478/* Function prototypes */
 479int tw_aen_complete(TW_Device_Extension *tw_dev, int request_id);
 480int tw_aen_drain_queue(TW_Device_Extension *tw_dev);
 481int tw_aen_read_queue(TW_Device_Extension *tw_dev, int request_id);
 482int tw_allocate_memory(TW_Device_Extension *tw_dev, int size, int which);
 483int tw_check_bits(u32 status_reg_value);
 484int tw_check_errors(TW_Device_Extension *tw_dev);
 485void tw_clear_all_interrupts(TW_Device_Extension *tw_dev);
 486void tw_clear_attention_interrupt(TW_Device_Extension *tw_dev);
 487void tw_clear_host_interrupt(TW_Device_Extension *tw_dev);
 488int tw_decode_bits(TW_Device_Extension *tw_dev, u32 status_reg_value, int print_host);
 489int tw_decode_sense(TW_Device_Extension *tw_dev, int request_id, int fill_sense);
 490void tw_disable_interrupts(TW_Device_Extension *tw_dev);
 491void tw_empty_response_que(TW_Device_Extension *tw_dev);
 492void tw_enable_interrupts(TW_Device_Extension *tw_dev);
 493void tw_enable_and_clear_interrupts(TW_Device_Extension *tw_dev);
 494int tw_findcards(Scsi_Host_Template *tw_host);
 495void tw_free_device_extension(TW_Device_Extension *tw_dev);
 496int tw_initconnection(TW_Device_Extension *tw_dev, int message_credits);
 497int tw_initialize_device_extension(TW_Device_Extension *tw_dev);
 498int tw_initialize_units(TW_Device_Extension *tw_dev);
 499int tw_ioctl(TW_Device_Extension *tw_dev, int request_id);
 500int tw_ioctl_complete(TW_Device_Extension *tw_dev, int request_id);
 501void tw_mask_command_interrupt(TW_Device_Extension *tw_dev);
 502int tw_poll_status(TW_Device_Extension *tw_dev, u32 flag, int seconds);
 503int tw_poll_status_gone(TW_Device_Extension *tw_dev, u32 flag, int seconds);
 504int tw_post_command_packet(TW_Device_Extension *tw_dev, int request_id);
 505int tw_reset_device_extension(TW_Device_Extension *tw_dev);
 506int tw_reset_sequence(TW_Device_Extension *tw_dev);
 507int tw_scsi_biosparam(Disk *disk, kdev_t dev, int geom[]);
 508int tw_scsi_detect(Scsi_Host_Template *tw_host);
 509int tw_scsi_eh_abort(Scsi_Cmnd *SCpnt);
 510int tw_scsi_eh_reset(Scsi_Cmnd *SCpnt);
 511int tw_scsi_proc_info(char *buffer, char **start, off_t offset, int length, int inode, int inout);
 512int tw_scsi_queue(Scsi_Cmnd *cmd, void (*done) (Scsi_Cmnd *));
 513int tw_scsi_release(struct Scsi_Host *tw_host);
 514int tw_scsiop_inquiry(TW_Device_Extension *tw_dev, int request_id);
 515int tw_scsiop_inquiry_complete(TW_Device_Extension *tw_dev, int request_id);
 516int tw_scsiop_mode_sense(TW_Device_Extension *tw_dev, int request_id);
 517int tw_scsiop_mode_sense_complete(TW_Device_Extension *tw_dev, int request_id);
 518int tw_scsiop_read_capacity(TW_Device_Extension *tw_dev, int request_id);
 519int tw_scsiop_read_capacity_complete(TW_Device_Extension *tw_dev, int request_id);
 520int tw_scsiop_read_write(TW_Device_Extension *tw_dev, int request_id);
 521int tw_scsiop_request_sense(TW_Device_Extension *tw_dev, int request_id);
 522int tw_scsiop_synchronize_cache(TW_Device_Extension *tw_dev, int request_id);
 523int tw_scsiop_test_unit_ready(TW_Device_Extension *tw_dev, int request_id);
 524int tw_scsiop_test_unit_ready_complete(TW_Device_Extension *tw_dev, int request_id);
 525void tw_select_queue_depths(struct Scsi_Host *host, Scsi_Device *dev);
 526int tw_setfeature(TW_Device_Extension *tw_dev, int parm, int param_size, 
 527                  unsigned char *val);
 528int tw_setup_irq(TW_Device_Extension *tw_dev);
 529int tw_shutdown_device(TW_Device_Extension *tw_dev);
 530void tw_soft_reset(TW_Device_Extension *tw_dev);
 531int tw_state_request_finish(TW_Device_Extension *tw_dev,int request_id);
 532int tw_state_request_start(TW_Device_Extension *tw_dev, int *request_id);
 533void tw_unmask_command_interrupt(TW_Device_Extension *tw_dev);
 534
 535/* Scsi_Host_Template Initializer */
 536#ifdef BLK_BOUNCE_HIGH
 537#define TWXXXX {                                        \
 538        next : NULL,                                    \
 539        module : NULL,                                  \
 540        proc_name : "3w-xxxx",                          \
 541        proc_info : tw_scsi_proc_info,                  \
 542        name : "3ware Storage Controller",              \
 543        detect : tw_scsi_detect,                        \
 544        release : tw_scsi_release,                      \
 545        info : NULL,                                    \
 546        ioctl : NULL,                                   \
 547        command : NULL,                                 \
 548        queuecommand : tw_scsi_queue,                   \
 549        eh_strategy_handler : NULL,                     \
 550        eh_abort_handler : tw_scsi_eh_abort,            \
 551        eh_device_reset_handler : NULL,                 \
 552        eh_bus_reset_handler : NULL,                    \
 553        eh_host_reset_handler : tw_scsi_eh_reset,       \
 554        abort : NULL,                                   \
 555        reset : NULL,                                   \
 556        slave_attach : NULL,                            \
 557        bios_param : tw_scsi_biosparam,                 \
 558        can_queue : TW_Q_LENGTH-2,                      \
 559        this_id: -1,                                    \
 560        sg_tablesize : TW_MAX_SGL_LENGTH,               \
 561        cmd_per_lun: TW_MAX_CMDS_PER_LUN,               \
 562        present : 0,                                    \
 563        unchecked_isa_dma : 0,                          \
 564        use_clustering : ENABLE_CLUSTERING,             \
 565        use_new_eh_code : 1,                            \
 566        emulated : 1,                                   \
 567        highmem_io : 1                                  \
 568}
 569#else
 570#define TWXXXX {                                        \
 571        next : NULL,                                    \
 572        module : NULL,                                  \
 573        proc_name : "3w-xxxx",                          \
 574        proc_info : tw_scsi_proc_info,                  \
 575        name : "3ware Storage Controller",              \
 576        detect : tw_scsi_detect,                        \
 577        release : tw_scsi_release,                      \
 578        info : NULL,                                    \
 579        ioctl : NULL,                                   \
 580        command : NULL,                                 \
 581        queuecommand : tw_scsi_queue,                   \
 582        eh_strategy_handler : NULL,                     \
 583        eh_abort_handler : tw_scsi_eh_abort,            \
 584        eh_device_reset_handler : NULL,                 \
 585        eh_bus_reset_handler : NULL,                    \
 586        eh_host_reset_handler : tw_scsi_eh_reset,       \
 587        abort : NULL,                                   \
 588        reset : NULL,                                   \
 589        slave_attach : NULL,                            \
 590        bios_param : tw_scsi_biosparam,                 \
 591        can_queue : TW_Q_LENGTH-2,                      \
 592        this_id: -1,                                    \
 593        sg_tablesize : TW_MAX_SGL_LENGTH,               \
 594        cmd_per_lun: TW_MAX_CMDS_PER_LUN,               \
 595        present : 0,                                    \
 596        unchecked_isa_dma : 0,                          \
 597        use_clustering : ENABLE_CLUSTERING,             \
 598        use_new_eh_code : 1,                            \
 599        emulated : 1                                    \
 600}
 601#endif /* BLK_BOUNCE_HIGH */
 602#endif /* _3W_XXXX_H */
 603