LXR linux-old/drivers/char/drm/i810

   1/* i810_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*-
   2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
   3 *
   4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
   5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
   6 * All rights reserved.
   7 *
   8 * Permission is hereby granted, free of charge, to any person obtaining a
   9 * copy of this software and associated documentation files (the "Software"),
  10 * to deal in the Software without restriction, including without limitation
  11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12 * and/or sell copies of the Software, and to permit persons to whom the
  13 * Software is furnished to do so, subject to the following conditions:
  14 *
  15 * The above copyright notice and this permission notice (including the next
  16 * paragraph) shall be included in all copies or substantial portions of the
  17 * Software.
  18 *
  19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  25 * DEALINGS IN THE SOFTWARE.
  26 *
  27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
  28 *          Jeff Hartmann <jhartmann@valinux.com>
  29 *
  30 */
  31
  32#ifndef _I810_DRV_H_
  33#define _I810_DRV_H_
  34
  35typedef struct drm_i810_buf_priv {
  36        u32 *in_use;
  37        int my_use_idx;
  38        int currently_mapped;
  39        void *virtual;
  40        void *kernel_virtual;
  41        int map_count;
  42        struct vm_area_struct *vma;
  43} drm_i810_buf_priv_t;
  44
  45typedef struct _drm_i810_ring_buffer{
  46        int tail_mask;
  47        unsigned long Start;
  48        unsigned long End;
  49        unsigned long Size;
  50        u8 *virtual_start;
  51        int head;
  52        int tail;
  53        int space;
  54} drm_i810_ring_buffer_t;
  55
  56typedef struct drm_i810_private {
  57        drm_map_t *sarea_map;
  58        drm_map_t *buffer_map;
  59        drm_map_t *mmio_map;
  60
  61        drm_i810_sarea_t *sarea_priv;
  62        drm_i810_ring_buffer_t ring;
  63
  64        unsigned long hw_status_page;
  65        unsigned long counter;
  66
  67        dma_addr_t dma_status_page;
  68
  69        drm_buf_t *mmap_buffer;
  70
  71
  72        u32 front_di1, back_di1, zi1;
  73
  74        int back_offset;
  75        int depth_offset;
  76        int overlay_offset;
  77        int overlay_physical;
  78        int w, h;
  79        int pitch;
  80
  81} drm_i810_private_t;
  82
  83                                /* i810_dma.c */
  84extern int  i810_dma_schedule(drm_device_t *dev, int locked);
  85extern int  i810_getbuf(struct inode *inode, struct file *filp,
  86                        unsigned int cmd, unsigned long arg);
  87extern int  i810_dma_init(struct inode *inode, struct file *filp,
  88                          unsigned int cmd, unsigned long arg);
  89extern int  i810_flush_ioctl(struct inode *inode, struct file *filp,
  90                             unsigned int cmd, unsigned long arg);
  91extern void i810_reclaim_buffers(drm_device_t *dev, pid_t pid);
  92extern int  i810_getage(struct inode *inode, struct file *filp,
  93                        unsigned int cmd, unsigned long arg);
  94extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma);
  95
  96/* Obsolete:
  97 */
  98extern int i810_copybuf(struct inode *inode, struct file *filp,
  99                        unsigned int cmd, unsigned long arg);
 100/* Obsolete:
 101 */
 102extern int i810_docopy(struct inode *inode, struct file *filp,
 103                       unsigned int cmd, unsigned long arg);
 104
 105extern int i810_rstatus(struct inode *inode, struct file *filp,
 106                        unsigned int cmd, unsigned long arg);
 107extern int i810_ov0_info(struct inode *inode, struct file *filp,
 108                        unsigned int cmd, unsigned long arg);
 109extern int i810_fstatus(struct inode *inode, struct file *filp,
 110                        unsigned int cmd, unsigned long arg);
 111extern int i810_ov0_flip(struct inode *inode, struct file *filp,
 112                        unsigned int cmd, unsigned long arg);
 113extern int i810_dma_mc(struct inode *inode, struct file *filp,
 114                        unsigned int cmd, unsigned long arg);
 115
 116
 117extern void i810_dma_quiescent(drm_device_t *dev);
 118
 119int i810_dma_vertex(struct inode *inode, struct file *filp,
 120                    unsigned int cmd, unsigned long arg);
 121
 122int i810_swap_bufs(struct inode *inode, struct file *filp,
 123                   unsigned int cmd, unsigned long arg);
 124
 125int i810_clear_bufs(struct inode *inode, struct file *filp,
 126                    unsigned int cmd, unsigned long arg);
 127
 128
 129#define I810_BASE(reg)          ((unsigned long) \
 130                                dev_priv->mmio_map->handle)
 131#define I810_ADDR(reg)          (I810_BASE(reg) + reg)
 132#define I810_DEREF(reg)         *(__volatile__ int *)I810_ADDR(reg)
 133#define I810_READ(reg)          I810_DEREF(reg)
 134#define I810_WRITE(reg,val)     do { I810_DEREF(reg) = val; } while (0)
 135#define I810_DEREF16(reg)       *(__volatile__ u16 *)I810_ADDR(reg)
 136#define I810_READ16(reg)        I810_DEREF16(reg)
 137#define I810_WRITE16(reg,val)   do { I810_DEREF16(reg) = val; } while (0)
 138
 139
 140#define GFX_OP_USER_INTERRUPT           ((0<<29)|(2<<23))
 141#define GFX_OP_BREAKPOINT_INTERRUPT     ((0<<29)|(1<<23))
 142#define CMD_REPORT_HEAD                 (7<<23)
 143#define CMD_STORE_DWORD_IDX             ((0x21<<23) | 0x1)
 144#define CMD_OP_BATCH_BUFFER  ((0x0<<29)|(0x30<<23)|0x1)
 145
 146#define INST_PARSER_CLIENT   0x00000000
 147#define INST_OP_FLUSH        0x02000000
 148#define INST_FLUSH_MAP_CACHE 0x00000001
 149
 150
 151#define BB1_START_ADDR_MASK   (~0x7)
 152#define BB1_PROTECTED         (1<<0)
 153#define BB1_UNPROTECTED       (0<<0)
 154#define BB2_END_ADDR_MASK     (~0x7)
 155
 156#define I810REG_HWSTAM          0x02098
 157#define I810REG_INT_IDENTITY_R  0x020a4
 158#define I810REG_INT_MASK_R      0x020a8
 159#define I810REG_INT_ENABLE_R    0x020a0
 160
 161#define LP_RING                 0x2030
 162#define HP_RING                 0x2040
 163#define RING_TAIL               0x00
 164#define TAIL_ADDR               0x000FFFF8
 165#define RING_HEAD               0x04
 166#define HEAD_WRAP_COUNT         0xFFE00000
 167#define HEAD_WRAP_ONE           0x00200000
 168#define HEAD_ADDR               0x001FFFFC
 169#define RING_START              0x08
 170#define START_ADDR              0x00FFFFF8
 171#define RING_LEN                0x0C
 172#define RING_NR_PAGES           0x000FF000
 173#define RING_REPORT_MASK        0x00000006
 174#define RING_REPORT_64K         0x00000002
 175#define RING_REPORT_128K        0x00000004
 176#define RING_NO_REPORT          0x00000000
 177#define RING_VALID_MASK         0x00000001
 178#define RING_VALID              0x00000001
 179#define RING_INVALID            0x00000000
 180
 181#define GFX_OP_SCISSOR         ((0x3<<29)|(0x1c<<24)|(0x10<<19))
 182#define SC_UPDATE_SCISSOR       (0x1<<1)
 183#define SC_ENABLE_MASK          (0x1<<0)
 184#define SC_ENABLE               (0x1<<0)
 185
 186#define GFX_OP_SCISSOR_INFO    ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
 187#define SCI_YMIN_MASK      (0xffff<<16)
 188#define SCI_XMIN_MASK      (0xffff<<0)
 189#define SCI_YMAX_MASK      (0xffff<<16)
 190#define SCI_XMAX_MASK      (0xffff<<0)
 191
 192#define GFX_OP_COLOR_FACTOR      ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
 193#define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
 194#define GFX_OP_MAP_INFO          ((0x3<<29)|(0x1d<<24)|0x2)
 195#define GFX_OP_DESTBUFFER_VARS   ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
 196#define GFX_OP_DRAWRECT_INFO     ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
 197#define GFX_OP_PRIMITIVE         ((0x3<<29)|(0x1f<<24))
 198
 199#define CMD_OP_Z_BUFFER_INFO     ((0x0<<29)|(0x16<<23))
 200#define CMD_OP_DESTBUFFER_INFO   ((0x0<<29)|(0x15<<23))
 201#define CMD_OP_FRONTBUFFER_INFO  ((0x0<<29)|(0x14<<23))
 202
 203#define BR00_BITBLT_CLIENT   0x40000000
 204#define BR00_OP_COLOR_BLT    0x10000000
 205#define BR00_OP_SRC_COPY_BLT 0x10C00000
 206#define BR13_SOLID_PATTERN   0x80000000
 207
 208
 209
 210#endif
 211