LXR linux-old/include/asm-arm/arch-l7200/hardware.h

   1/*
   2 * linux/include/asm-arm/arch-l7200/hardware.h
   3 *
   4 * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net)
   5 *                    Steve Hill (sjhill@cotw.com)
   6 *
   7 * This file contains the hardware definitions for the 
   8 * LinkUp Systems L7200 SOC development board.
   9 *
  10 * Changelog:
  11 *   02-01-2000  RS     Created L7200 version, derived from rpc code
  12 *   03-21-2000 SJH     Cleaned up file
  13 *   04-21-2000  RS     Changed mapping of I/O in virtual space
  14 *   04-25-2000 SJH     Removed unused symbols and such
  15 *   05-05-2000 SJH     Complete rewrite
  16 *   07-31-2000 SJH     Added undocumented debug auxillary port to
  17 *                      get at last two columns for keyboard driver
  18 */
  19#ifndef __ASM_ARCH_HARDWARE_H
  20#define __ASM_ARCH_HARDWARE_H
  21
  22/* Hardware addresses of major areas.
  23 *  *_START is the physical address
  24 *  *_SIZE  is the size of the region
  25 *  *_BASE  is the virtual address
  26 */
  27#define RAM_START               0xf0000000
  28#define RAM_SIZE                0x02000000
  29#define RAM_BASE                0xc0000000
  30
  31#define IO_START                0x80000000      /* I/O */
  32#define IO_SIZE                 0x01000000
  33#define IO_BASE                 0xd0000000
  34
  35#define IO_START_2              0x90000000      /* I/O */
  36#define IO_SIZE_2               0x01000000
  37#define IO_BASE_2               0xd1000000
  38
  39#define AUX_START               0x1a000000      /* AUX PORT */
  40#define AUX_SIZE                0x01000000
  41#define AUX_BASE                0xd2000000
  42
  43#define FLASH1_START            0x00000000      /* FLASH BANK 1 */
  44#define FLASH1_SIZE             0x01000000
  45#define FLASH1_BASE             0xd3000000
  46
  47#define FLASH2_START            0x10000000      /* FLASH BANK 2 */
  48#define FLASH2_SIZE             0x01000000
  49#define FLASH2_BASE             0xd4000000
  50
  51#define ISA_START               0x20000000      /* ISA */
  52#define ISA_SIZE                0x20000000
  53#define ISA_BASE                0xe0000000
  54
  55#define FLUSH_BASE_PHYS         0x40000000      /* ROM */
  56#define FLUSH_BASE              0xdf000000
  57
  58#define PCIO_BASE               IO_BASE
  59
  60#endif
  61