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103#include <linux/config.h>
104
105#include "matroxfb_base.h"
106#include "matroxfb_misc.h"
107#include "matroxfb_accel.h"
108#include "matroxfb_DAC1064.h"
109#include "matroxfb_Ti3026.h"
110#include "matroxfb_maven.h"
111#include "matroxfb_crtc2.h"
112#include "matroxfb_g450.h"
113#include <linux/matroxfb.h>
114#include <asm/uaccess.h>
115
116#ifdef CONFIG_PPC
117unsigned char nvram_read_byte(int);
118static int default_vmode = VMODE_NVRAM;
119static int default_cmode = CMODE_NVRAM;
120#endif
121
122static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
123
124
125
126
127
128
129
130
131
132static struct fb_var_screeninfo vesafb_defined = {
133 640,480,640,480,
134 0,0,
135 8,
136 0,
137 {0,0,0},
138 {0,0,0},
139 {0,0,0},
140 {0,0,0},
141 0,
142 FB_ACTIVATE_NOW,
143 -1,-1,
144 FB_ACCELF_TEXT,
145 39721L,48L,16L,33L,10L,
146 96L,2L,~0,
147 FB_VMODE_NONINTERLACED,
148 {0,0,0,0,0,0}
149};
150
151
152
153
154
155static void matroxfb_crtc1_panpos(WPMINFO2) {
156 if (ACCESS_FBINFO(crtc1.panpos) >= 0) {
157 unsigned long flags;
158 int panpos;
159
160 matroxfb_DAC_lock_irqsave(flags);
161 panpos = ACCESS_FBINFO(crtc1.panpos);
162 if (panpos >= 0) {
163 unsigned int extvga_reg;
164
165 ACCESS_FBINFO(crtc1.panpos) = -1;
166 extvga_reg = mga_inb(M_EXTVGA_INDEX);
167 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
168 if (extvga_reg != 0x00) {
169 mga_outb(M_EXTVGA_INDEX, extvga_reg);
170 }
171 }
172 matroxfb_DAC_unlock_irqrestore(flags);
173 }
174}
175
176static void matrox_irq(int irq, void *dev_id, struct pt_regs *fp)
177{
178 u_int32_t status;
179 int handled = 0;
180
181 MINFO_FROM(dev_id);
182
183 status = mga_inl(M_STATUS);
184
185 if (status & 0x20) {
186 mga_outl(M_ICLEAR, 0x20);
187 ACCESS_FBINFO(crtc1.vsync.cnt)++;
188 matroxfb_crtc1_panpos(PMINFO2);
189 wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait));
190 handled = 1;
191 }
192 if (status & 0x200) {
193 mga_outl(M_ICLEAR, 0x200);
194 ACCESS_FBINFO(crtc2.vsync.cnt)++;
195 wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait));
196 handled = 1;
197 }
198 return;
199}
200
201int matroxfb_enable_irq(WPMINFO int reenable) {
202 u_int32_t bm;
203
204 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
205 bm = 0x220;
206 else
207 bm = 0x020;
208
209 if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) {
210 if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq,
211 SA_SHIRQ, "matroxfb", MINFO)) {
212 clear_bit(0, &ACCESS_FBINFO(irq_flags));
213 return -EINVAL;
214 }
215
216 mga_outl(M_ICLEAR, bm);
217 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
218 } else if (reenable) {
219 u_int32_t ien;
220
221 ien = mga_inl(M_IEN);
222 if ((ien & bm) != bm) {
223 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
224 mga_outl(M_IEN, ien | bm);
225 }
226 }
227 return 0;
228}
229
230static void matroxfb_disable_irq(WPMINFO2) {
231 if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) {
232
233 matroxfb_crtc1_panpos(PMINFO2);
234 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
235 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
236 else
237 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
238 free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO);
239 }
240}
241
242#ifndef wait_event_interruptible_timeout
243#define __wait_event_interruptible_timeout(wq, condition, ret) \
244do { \
245 wait_queue_t __wait; \
246 init_waitqueue_entry(&__wait, current); \
247 \
248 add_wait_queue(&wq, &__wait); \
249 for (;;) { \
250 set_current_state(TASK_INTERRUPTIBLE); \
251 if (condition) \
252 break; \
253 if (!signal_pending(current)) { \
254 ret = schedule_timeout(ret); \
255 if (!ret) \
256 break; \
257 continue; \
258 } \
259 ret = -ERESTARTSYS; \
260 break; \
261 } \
262 current->state = TASK_RUNNING; \
263 remove_wait_queue(&wq, &__wait); \
264} while (0)
265
266#define wait_event_interruptible_timeout(wq, condition, timeout) \
267({ \
268 long __ret = timeout; \
269 if (!(condition)) \
270 __wait_event_interruptible_timeout(wq, condition, __ret); \
271 __ret; \
272})
273#endif
274
275int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
276 wait_queue_t __wait;
277 struct matrox_vsync *vs;
278 unsigned int cnt;
279 int ret;
280
281 switch (crtc) {
282 case 0:
283 vs = &ACCESS_FBINFO(crtc1.vsync);
284 break;
285 case 1:
286 if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) {
287 return -ENODEV;
288 }
289 vs = &ACCESS_FBINFO(crtc2.vsync);
290 break;
291 default:
292 return -ENODEV;
293 }
294 ret = matroxfb_enable_irq(PMINFO 0);
295 if (ret) {
296 return ret;
297 }
298 init_waitqueue_entry(&__wait, current);
299
300 cnt = vs->cnt;
301 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
302 if (ret < 0) {
303 return ret;
304 }
305 if (ret == 0) {
306 matroxfb_enable_irq(PMINFO 1);
307 return -ETIMEDOUT;
308 }
309 return 0;
310}
311
312
313
314static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
315 unsigned int pos;
316 unsigned short p0, p1, p2;
317#ifdef CONFIG_FB_MATROX_32MB
318 unsigned int p3;
319#endif
320 struct display *disp;
321 int vbl;
322 unsigned long flags;
323 CRITFLAGS
324
325 DBG("matrox_pan_var")
326
327 if (ACCESS_FBINFO(dead))
328 return;
329
330 disp = ACCESS_FBINFO(currcon_display);
331 if (disp->type == FB_TYPE_TEXT) {
332 pos = var->yoffset / fontheight(disp) * disp->next_line / ACCESS_FBINFO(devflags.textstep) + var->xoffset / (fontwidth(disp)?fontwidth(disp):8);
333 } else {
334 pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
335 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
336 }
337 p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF;
338 p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8;
339 p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
340#ifdef CONFIG_FB_MATROX_32MB
341 p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21;
342#endif
343
344
345 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0);
346
347 CRITBEGIN
348
349 matroxfb_DAC_lock_irqsave(flags);
350
351 mga_setr(M_CRTC_INDEX, 0x0D, p0);
352 mga_setr(M_CRTC_INDEX, 0x0C, p1);
353#ifdef CONFIG_FB_MATROX_32MB
354 if (ACCESS_FBINFO(devflags.support32MB))
355 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
356#endif
357 if (vbl) {
358 ACCESS_FBINFO(crtc1.panpos) = p2;
359 } else {
360
361 ACCESS_FBINFO(crtc1.panpos) = -1;
362 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
363 }
364 matroxfb_DAC_unlock_irqrestore(flags);
365
366 CRITEND
367}
368
369static void matroxfb_remove(WPMINFO int dummy) {
370
371
372
373
374
375
376
377
378 ACCESS_FBINFO(dead) = 1;
379 if (ACCESS_FBINFO(usecount)) {
380
381 return;
382 }
383 matroxfb_unregister_device(MINFO);
384 unregister_framebuffer(&ACCESS_FBINFO(fbcon));
385 matroxfb_g450_shutdown(PMINFO2);
386 del_timer_sync(&ACCESS_FBINFO(cursor.timer));
387#ifdef CONFIG_MTRR
388 if (ACCESS_FBINFO(mtrr.vram_valid))
389 mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len));
390#endif
391 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
392 mga_iounmap(ACCESS_FBINFO(video.vbase));
393 release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum));
394 release_mem_region(ACCESS_FBINFO(mmio.base), 16384);
395#ifdef CONFIG_FB_MATROX_MULTIHEAD
396 kfree(ACCESS_FBINFO(fbcon.disp));
397 kfree(minfo);
398#endif
399}
400
401
402
403
404
405static int matroxfb_open(struct fb_info *info, int user)
406{
407 MINFO_FROM_INFO(info);
408
409 DBG_LOOP(__FUNCTION__)
410
411 if (ACCESS_FBINFO(dead)) {
412 return -ENXIO;
413 }
414 ACCESS_FBINFO(usecount)++;
415 if (user) {
416 ACCESS_FBINFO(userusecount)++;
417 }
418 return 0;
419}
420
421static int matroxfb_release(struct fb_info *info, int user)
422{
423 MINFO_FROM_INFO(info);
424
425 DBG_LOOP(__FUNCTION__)
426
427 if (user) {
428 if (0 == --ACCESS_FBINFO(userusecount)) {
429 matroxfb_disable_irq(PMINFO2);
430 }
431 }
432 if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) {
433 matroxfb_remove(PMINFO 0);
434 }
435 return 0;
436}
437
438static int matroxfb_pan_display(struct fb_var_screeninfo *var, int con,
439 struct fb_info* info) {
440 struct display* dsp;
441 MINFO_FROM_INFO(info);
442 DBG("matroxfb_pan_display")
443
444 if (con < 0) {
445 dsp = info->disp;
446 } else {
447 dsp = fb_display + con;
448 }
449 if (var->vmode & FB_VMODE_YWRAP) {
450 return -EINVAL;
451 } else {
452 if (var->xoffset+dsp->var.xres > dsp->var.xres_virtual ||
453 var->yoffset+dsp->var.yres > dsp->var.yres_virtual)
454 return -EINVAL;
455 }
456 if (con == ACCESS_FBINFO(currcon))
457 matrox_pan_var(PMINFO var);
458 dsp->var.xoffset = var->xoffset;
459 dsp->var.yoffset = var->yoffset;
460 dsp->var.vmode &= ~FB_VMODE_YWRAP;
461 return 0;
462}
463
464static int matroxfb_updatevar(int con, struct fb_info *info)
465{
466#define minfo (list_entry(info, struct matrox_fb_info, fbcon))
467 DBG("matroxfb_updatevar");
468
469 matrox_pan_var(PMINFO &fb_display[con].var);
470 return 0;
471#undef minfo
472}
473
474static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
475 int bppshft2;
476
477 DBG("matroxfb_get_final_bppShift")
478
479 bppshft2 = bpp;
480 if (!bppshft2) {
481 return 8;
482 }
483 if (isInterleave(MINFO))
484 bppshft2 >>= 1;
485 if (ACCESS_FBINFO(devflags.video64bits))
486 bppshft2 >>= 1;
487 return bppshft2;
488}
489
490static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
491 int over;
492 int rounding;
493
494 DBG("matroxfb_test_and_set_rounding")
495
496 switch (bpp) {
497 case 0: return xres;
498 case 4: rounding = 128;
499 break;
500 case 8: rounding = 64;
501 break;
502 case 16: rounding = 32;
503 break;
504 case 24: rounding = 64;
505 break;
506 default: rounding = 16;
507
508 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
509 rounding = 32;
510 break;
511 }
512 if (isInterleave(MINFO)) {
513 rounding *= 2;
514 }
515 over = xres % rounding;
516 if (over)
517 xres += rounding-over;
518 return xres;
519}
520
521static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
522 const int* width;
523 int xres_new;
524
525 DBG("matroxfb_pitch_adjust")
526
527 if (!bpp) return xres;
528
529 width = ACCESS_FBINFO(capable.vxres);
530
531 if (ACCESS_FBINFO(devflags.precise_width)) {
532 while (*width) {
533 if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) {
534 break;
535 }
536 width++;
537 }
538 xres_new = *width;
539 } else {
540 xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp);
541 }
542 if (!xres_new) return 0;
543 if (xres != xres_new) {
544 printk(KERN_INFO "matroxfb: cannot set xres to %d, rounded up to %d\n", xres, xres_new);
545 }
546 return xres_new;
547}
548
549static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
550
551 DBG("matroxfb_get_cmap_len")
552
553 switch (var->bits_per_pixel) {
554#ifdef FBCON_HAS_VGATEXT
555 case 0:
556 return 16;
557#endif
558#ifdef FBCON_HAS_CFB4
559 case 4:
560 return 16;
561#endif
562#ifdef FBCON_HAS_CFB8
563 case 8:
564 return 256;
565#endif
566#ifdef FBCON_HAS_CFB16
567 case 16:
568 return 16;
569
570#endif
571#ifdef FBCON_HAS_CFB24
572 case 24:
573 return 16;
574
575#endif
576#ifdef FBCON_HAS_CFB32
577 case 32:
578 return 16;
579
580#endif
581 }
582 return 16;
583}
584
585static int matroxfb_decode_var(CPMINFO struct display* p, struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) {
586 struct RGBT {
587 unsigned char bpp;
588 struct {
589 unsigned char offset,
590 length;
591 } red,
592 green,
593 blue,
594 transp;
595 signed char visual;
596 };
597 static const struct RGBT table[]= {
598#if defined FBCON_HAS_VGATEXT
599 { 0,{ 0,6},{0,6},{0,6},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
600#endif
601#if defined FBCON_HAS_CFB4 || defined FBCON_HAS_CFB8
602 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
603#endif
604#if defined FBCON_HAS_CFB16
605 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
606 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
607#endif
608#if defined FBCON_HAS_CFB24
609 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
610#endif
611#if defined FBCON_HAS_CFB32
612 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
613#endif
614 };
615 struct RGBT const *rgbt;
616 unsigned int bpp = var->bits_per_pixel;
617 unsigned int vramlen;
618 unsigned int memlen;
619
620 DBG("matroxfb_decode_var")
621
622 switch (bpp) {
623#ifdef FBCON_HAS_VGATEXT
624 case 0: if (!ACCESS_FBINFO(capable.text)) return -EINVAL;
625 break;
626#endif
627#ifdef FBCON_HAS_CFB4
628 case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL;
629 break;
630#endif
631#ifdef FBCON_HAS_CFB8
632 case 8: break;
633#endif
634#ifdef FBCON_HAS_CFB16
635 case 16: break;
636#endif
637#ifdef FBCON_HAS_CFB24
638 case 24: break;
639#endif
640#ifdef FBCON_HAS_CFB32
641 case 32: break;
642#endif
643 default: return -EINVAL;
644 }
645 *ydstorg = 0;
646 vramlen = ACCESS_FBINFO(video.len_usable);
647 if (var->yres_virtual < var->yres)
648 var->yres_virtual = var->yres;
649 if (var->xres_virtual < var->xres)
650 var->xres_virtual = var->xres;
651 if (bpp) {
652 var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp);
653 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
654 if (memlen > vramlen) {
655 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
656 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
657 }
658
659
660
661 if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) {
662 if (bpp == 24) {
663
664 } else {
665 unsigned int linelen;
666 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
667 unsigned int m2 = PAGE_SIZE;
668 unsigned int max_yres;
669
670 while (m1) {
671 int t;
672
673 while (m2 >= m1) m2 -= m1;
674 t = m1;
675 m1 = m2;
676 m2 = t;
677 }
678 m2 = linelen * PAGE_SIZE / m2;
679 *ydstorg = m2 = 0x400000 % m2;
680 max_yres = (vramlen - m2) / linelen;
681 if (var->yres_virtual > max_yres)
682 var->yres_virtual = max_yres;
683 }
684 }
685 } else {
686 matrox_text_round(PMINFO var, p);
687#if 0
688
689
690
691
692 if (var->pixclock < 15000)
693 var->pixclock = 15000;
694#endif
695 }
696
697 if (var->yres_virtual > 32767)
698 var->yres_virtual = 32767;
699
700
701 if (var->yres_virtual < var->yres)
702 var->yres = var->yres_virtual;
703 if (var->xres_virtual < var->xres)
704 var->xres = var->xres_virtual;
705 if (var->xoffset + var->xres > var->xres_virtual)
706 var->xoffset = var->xres_virtual - var->xres;
707 if (var->yoffset + var->yres > var->yres_virtual)
708 var->yoffset = var->yres_virtual - var->yres;
709
710 if (bpp == 16 && var->green.length == 5) {
711 bpp--;
712 }
713
714 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
715#define SETCLR(clr)\
716 var->clr.offset = rgbt->clr.offset;\
717 var->clr.length = rgbt->clr.length
718 SETCLR(red);
719 SETCLR(green);
720 SETCLR(blue);
721 SETCLR(transp);
722#undef SETCLR
723 *visual = rgbt->visual;
724
725 if (bpp > 8)
726 dprintk("matroxfb: truecolor: "
727 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
728 var->transp.length, var->red.length, var->green.length, var->blue.length,
729 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
730
731 *video_cmap_len = matroxfb_get_cmap_len(var);
732 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
733 var->xres_virtual, var->yres_virtual);
734 return 0;
735}
736
737static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
738 unsigned blue, unsigned transp,
739 struct fb_info *fb_info)
740{
741 struct display* p;
742#ifdef CONFIG_FB_MATROX_MULTIHEAD
743 struct matrox_fb_info* minfo = list_entry(fb_info, struct matrox_fb_info, fbcon);
744#endif
745
746 DBG("matroxfb_setcolreg")
747
748
749
750
751
752
753
754
755 if (regno >= ACCESS_FBINFO(curr.cmap_len))
756 return 1;
757
758 ACCESS_FBINFO(palette[regno].red) = red;
759 ACCESS_FBINFO(palette[regno].green) = green;
760 ACCESS_FBINFO(palette[regno].blue) = blue;
761 ACCESS_FBINFO(palette[regno].transp) = transp;
762
763 p = ACCESS_FBINFO(currcon_display);
764 if (p->var.grayscale) {
765
766 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
767 }
768
769 red = CNVT_TOHW(red, p->var.red.length);
770 green = CNVT_TOHW(green, p->var.green.length);
771 blue = CNVT_TOHW(blue, p->var.blue.length);
772 transp = CNVT_TOHW(transp, p->var.transp.length);
773
774 switch (p->var.bits_per_pixel) {
775#if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB4) || defined(FBCON_HAS_VGATEXT)
776#ifdef FBCON_HAS_VGATEXT
777 case 0:
778#endif
779#ifdef FBCON_HAS_CFB4
780 case 4:
781#endif
782#ifdef FBCON_HAS_CFB8
783 case 8:
784#endif
785 mga_outb(M_DAC_REG, regno);
786 mga_outb(M_DAC_VAL, red);
787 mga_outb(M_DAC_VAL, green);
788 mga_outb(M_DAC_VAL, blue);
789 break;
790#endif
791#ifdef FBCON_HAS_CFB16
792 case 16:
793 ACCESS_FBINFO(cmap.cfb16[regno]) =
794 (red << p->var.red.offset) |
795 (green << p->var.green.offset) |
796 (blue << p->var.blue.offset) |
797 (transp << p->var.transp.offset);
798 break;
799#endif
800#ifdef FBCON_HAS_CFB24
801 case 24:
802 ACCESS_FBINFO(cmap.cfb24[regno]) =
803 (red << p->var.red.offset) |
804 (green << p->var.green.offset) |
805 (blue << p->var.blue.offset);
806 break;
807#endif
808#ifdef FBCON_HAS_CFB32
809 case 32:
810 ACCESS_FBINFO(cmap.cfb32[regno]) =
811 (red << p->var.red.offset) |
812 (green << p->var.green.offset) |
813 (blue << p->var.blue.offset) |
814 (transp << p->var.transp.offset);
815 break;
816#endif
817 }
818 return 0;
819}
820
821static inline void my_install_cmap(WPMINFO2)
822{
823
824
825 struct fb_cmap* cmap = &ACCESS_FBINFO(currcon_display)->cmap;
826
827 if (cmap->len)
828 fb_set_cmap(cmap, 1, matroxfb_setcolreg, &ACCESS_FBINFO(fbcon));
829 else
830 fb_set_cmap(fb_default_cmap(ACCESS_FBINFO(curr.cmap_len)),
831 1, matroxfb_setcolreg, &ACCESS_FBINFO(fbcon));
832}
833
834static int matroxfb_get_fix(struct fb_fix_screeninfo *fix, int con,
835 struct fb_info *info)
836{
837 struct display* p;
838 DBG("matroxfb_get_fix")
839
840#define minfo (list_entry(info, struct matrox_fb_info, fbcon))
841
842 if (ACCESS_FBINFO(dead)) {
843 return -ENXIO;
844 }
845
846 if (con >= 0)
847 p = fb_display + con;
848 else
849 p = ACCESS_FBINFO(fbcon.disp);
850
851 memset(fix, 0, sizeof(*fix));
852 strcpy(fix->id,"MATROX");
853
854 fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes);
855 fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes);
856 fix->type = p->type;
857 fix->type_aux = p->type_aux;
858 fix->visual = p->visual;
859 fix->xpanstep = 8;
860 fix->ypanstep = 1;
861 fix->ywrapstep = 0;
862 fix->line_length = p->line_length;
863 fix->mmio_start = ACCESS_FBINFO(mmio.base);
864 fix->mmio_len = ACCESS_FBINFO(mmio.len);
865 fix->accel = ACCESS_FBINFO(devflags.accelerator);
866 return 0;
867#undef minfo
868}
869
870static int matroxfb_get_var(struct fb_var_screeninfo *var, int con,
871 struct fb_info *info)
872{
873#define minfo (list_entry(info, struct matrox_fb_info, fbcon))
874 DBG("matroxfb_get_var")
875
876 if(con < 0)
877 *var=ACCESS_FBINFO(fbcon.disp)->var;
878 else
879 *var=fb_display[con].var;
880 return 0;
881#undef minfo
882}
883
884static int matroxfb_set_var(struct fb_var_screeninfo *var, int con,
885 struct fb_info *info)
886{
887#define minfo (list_entry(info, struct matrox_fb_info, fbcon))
888 int err;
889 int visual;
890 int cmap_len;
891 unsigned int ydstorg;
892 struct display* display;
893 int chgvar;
894
895 DBG("matroxfb_set_var")
896
897 if (ACCESS_FBINFO(dead)) {
898 return -ENXIO;
899 }
900
901 if (con >= 0)
902 display = fb_display + con;
903 else
904 display = ACCESS_FBINFO(fbcon.disp);
905 if ((err = matroxfb_decode_var(PMINFO display, var, &visual, &cmap_len, &ydstorg)) != 0)
906 return err;
907 switch (var->activate & FB_ACTIVATE_MASK) {
908 case FB_ACTIVATE_TEST: return 0;
909 case FB_ACTIVATE_NXTOPEN:
910 case FB_ACTIVATE_NOW: break;
911 default: return -EINVAL;
912 }
913 if (con >= 0) {
914 chgvar = ((display->var.xres != var->xres) ||
915 (display->var.yres != var->yres) ||
916 (display->var.xres_virtual != var->xres_virtual) ||
917 (display->var.yres_virtual != var->yres_virtual) ||
918 (display->var.bits_per_pixel != var->bits_per_pixel) ||
919 memcmp(&display->var.red, &var->red, sizeof(var->red)) ||
920 memcmp(&display->var.green, &var->green, sizeof(var->green)) ||
921 memcmp(&display->var.blue, &var->blue, sizeof(var->blue)));
922 } else {
923 chgvar = 0;
924 }
925 display->var = *var;
926
927 display->screen_base = ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg;
928 display->visual = visual;
929 display->ypanstep = 1;
930 display->ywrapstep = 0;
931 if (var->bits_per_pixel) {
932 display->type = FB_TYPE_PACKED_PIXELS;
933 display->type_aux = 0;
934 display->next_line = display->line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
935 } else {
936 display->type = FB_TYPE_TEXT;
937 display->type_aux = ACCESS_FBINFO(devflags.text_type_aux);
938 display->next_line = display->line_length = (var->xres_virtual / (fontwidth(display)?fontwidth(display):8)) * ACCESS_FBINFO(devflags.textstep);
939 }
940 display->can_soft_blank = 1;
941 display->inverse = ACCESS_FBINFO(devflags.inverse);
942
943
944 initMatrox(PMINFO display);
945
946
947 if (chgvar && info && info->changevar)
948 info->changevar(con);
949 if (con == ACCESS_FBINFO(currcon)) {
950 unsigned int pos;
951
952 ACCESS_FBINFO(curr.cmap_len) = cmap_len;
953 if (display->type == FB_TYPE_TEXT) {
954
955 ACCESS_FBINFO(curr.ydstorg.bytes) = 0;
956 ACCESS_FBINFO(curr.ydstorg.chunks) = 0;
957 ACCESS_FBINFO(curr.ydstorg.pixels) = 0;
958 } else {
959 ydstorg += ACCESS_FBINFO(devflags.ydstorg);
960 ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg;
961 ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2);
962 if (var->bits_per_pixel == 4)
963 ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg;
964 else
965 ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel;
966 }
967 ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel);
968 if (visual == MX_VISUAL_PSEUDOCOLOR) {
969 int i;
970
971 for (i = 0; i < 16; i++) {
972 int j;
973
974 j = color_table[i];
975 ACCESS_FBINFO(palette[i].red) = default_red[j];
976 ACCESS_FBINFO(palette[i].green) = default_grn[j];
977 ACCESS_FBINFO(palette[i].blue) = default_blu[j];
978 }
979 }
980
981 { struct my_timming mt;
982 struct matrox_hw_state* hw;
983 int out;
984
985 matroxfb_var2my(var, &mt);
986 mt.crtc = MATROXFB_SRC_CRTC1;
987
988 switch (var->bits_per_pixel) {
989 case 0: mt.delay = 31 + 0; break;
990 case 16: mt.delay = 21 + 8; break;
991 case 24: mt.delay = 17 + 8; break;
992 case 32: mt.delay = 16 + 8; break;
993 default: mt.delay = 31 + 8; break;
994 }
995
996 hw = &ACCESS_FBINFO(hw);
997
998 del_timer_sync(&ACCESS_FBINFO(cursor.timer));
999 ACCESS_FBINFO(cursor.state) = CM_ERASE;
1000
1001 down_read(&ACCESS_FBINFO(altout).lock);
1002 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
1003 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
1004 ACCESS_FBINFO(outputs[out]).output->compute) {
1005 ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt);
1006 }
1007 }
1008 up_read(&ACCESS_FBINFO(altout).lock);
1009 ACCESS_FBINFO(crtc1).pixclock = mt.pixclock;
1010 ACCESS_FBINFO(crtc1).mnp = mt.mnp;
1011 ACCESS_FBINFO(hw_switch->init(PMINFO &mt, display));
1012 if (display->type == FB_TYPE_TEXT) {
1013 if (fontheight(display))
1014 pos = var->yoffset / fontheight(display) * display->next_line / ACCESS_FBINFO(devflags.textstep) + var->xoffset / (fontwidth(display)?fontwidth(display):8);
1015 else
1016 pos = 0;
1017 } else {
1018 pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
1019 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
1020 }
1021
1022 hw->CRTC[0x0D] = pos & 0xFF;
1023 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
1024 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
1025 hw->CRTCEXT[8] = pos >> 21;
1026
1027 ACCESS_FBINFO(hw_switch->restore(PMINFO display));
1028 down_read(&ACCESS_FBINFO(altout).lock);
1029 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
1030 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
1031 ACCESS_FBINFO(outputs[out]).output->program) {
1032 ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data);
1033 }
1034 }
1035 ACCESS_FBINFO(cursor.redraw) = 1;
1036 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
1037 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
1038 ACCESS_FBINFO(outputs[out]).output->start) {
1039 ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data);
1040 }
1041 }
1042 up_read(&ACCESS_FBINFO(altout).lock);
1043 matrox_cfbX_init(PMINFO display);
1044 my_install_cmap(PMINFO2);
1045#if defined(CONFIG_FB_COMPAT_XPMAC)
1046 if (console_fb_info == &ACCESS_FBINFO(fbcon)) {
1047 int vmode, cmode;
1048
1049 display_info.width = var->xres;
1050 display_info.height = var->yres;
1051 display_info.depth = var->bits_per_pixel;
1052 display_info.pitch = (var->xres_virtual)*(var->bits_per_pixel)/8;
1053 if (mac_var_to_vmode(var, &vmode, &cmode))
1054 display_info.mode = 0;
1055 else
1056 display_info.mode = vmode;
1057 strcpy(display_info.name, ACCESS_FBINFO(matrox_name));
1058 display_info.fb_address = ACCESS_FBINFO(video.base);
1059 display_info.cmap_adr_address = 0;
1060 display_info.cmap_data_address = 0;
1061 display_info.disp_reg_address = ACCESS_FBINFO(mmio.base);
1062 }
1063#endif
1064 }
1065 }
1066 return 0;
1067#undef minfo
1068}
1069
1070static int matrox_getcolreg(unsigned regno, unsigned *red, unsigned *green,
1071 unsigned *blue, unsigned *transp,
1072 struct fb_info *info)
1073{
1074
1075 DBG("matrox_getcolreg")
1076
1077#define minfo (list_entry(info, struct matrox_fb_info, fbcon))
1078
1079
1080
1081
1082
1083 if (regno >= ACCESS_FBINFO(curr.cmap_len))
1084 return 1;
1085
1086 *red = ACCESS_FBINFO(palette[regno].red);
1087 *green = ACCESS_FBINFO(palette[regno].green);
1088 *blue = ACCESS_FBINFO(palette[regno].blue);
1089 *transp = ACCESS_FBINFO(palette[regno].transp);
1090 return 0;
1091#undef minfo
1092}
1093
1094static int matroxfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
1095 struct fb_info *info)
1096{
1097#define minfo (list_entry(info, struct matrox_fb_info, fbcon))
1098 struct display* dsp = (con < 0) ? ACCESS_FBINFO(fbcon.disp)
1099 : fb_display + con;
1100
1101 DBG("matroxfb_get_cmap")
1102
1103 if (ACCESS_FBINFO(dead)) {
1104 return -ENXIO;
1105 }
1106
1107 if (con == ACCESS_FBINFO(currcon))
1108 return fb_get_cmap(cmap, kspc, matrox_getcolreg, info);
1109 else if (dsp->cmap.len)
1110 fb_copy_cmap(&dsp->cmap, cmap, kspc ? 0 : 2);
1111 else
1112 fb_copy_cmap(fb_default_cmap(matroxfb_get_cmap_len(&dsp->var)),
1113 cmap, kspc ? 0 : 2);
1114 return 0;
1115#undef minfo
1116}
1117
1118static int matroxfb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
1119 struct fb_info *info)
1120{
1121 unsigned int cmap_len;
1122 struct display* dsp = (con < 0) ? info->disp : (fb_display + con);
1123#define minfo (list_entry(info, struct matrox_fb_info, fbcon))
1124
1125 DBG("matroxfb_set_cmap")
1126
1127 if (ACCESS_FBINFO(dead)) {
1128 return -ENXIO;
1129 }
1130
1131 cmap_len = matroxfb_get_cmap_len(&dsp->var);
1132 if (dsp->cmap.len != cmap_len) {
1133 int err;
1134
1135 err = fb_alloc_cmap(&dsp->cmap, cmap_len, 0);
1136 if (err)
1137 return err;
1138 }
1139 if (con == ACCESS_FBINFO(currcon)) {
1140 return fb_set_cmap(cmap, kspc, matroxfb_setcolreg, info);
1141 } else
1142 fb_copy_cmap(cmap, &dsp->cmap, kspc ? 0 : 1);
1143 return 0;
1144#undef minfo
1145}
1146
1147static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank)
1148{
1149 unsigned int sts1;
1150
1151 matroxfb_enable_irq(PMINFO 0);
1152 memset(vblank, 0, sizeof(*vblank));
1153 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
1154 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
1155 sts1 = mga_inb(M_INSTS1);
1156 vblank->vcount = mga_inl(M_VCOUNT);
1157
1158
1159
1160 if (sts1 & 1)
1161 vblank->flags |= FB_VBLANK_HBLANKING;
1162 if (sts1 & 8)
1163 vblank->flags |= FB_VBLANK_VSYNCING;
1164 if (vblank->vcount >= ACCESS_FBINFO(currcon_display)->var.yres)
1165 vblank->flags |= FB_VBLANK_VBLANKING;
1166 if (test_bit(0, &ACCESS_FBINFO(irq_flags))) {
1167 vblank->flags |= FB_VBLANK_HAVE_COUNT;
1168
1169
1170 vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt;
1171 }
1172 return 0;
1173}
1174
1175static struct matrox_altout panellink_output = {
1176 .owner = THIS_MODULE,
1177 .name = "Panellink output",
1178};
1179
1180static int matroxfb_ioctl(struct inode *inode, struct file *file,
1181 unsigned int cmd, unsigned long arg, int con,
1182 struct fb_info *info)
1183{
1184#define minfo (list_entry(info, struct matrox_fb_info, fbcon))
1185 DBG("matroxfb_ioctl")
1186
1187 if (ACCESS_FBINFO(dead)) {
1188 return -ENXIO;
1189 }
1190
1191 switch (cmd) {
1192 case FBIOGET_VBLANK:
1193 {
1194 struct fb_vblank vblank;
1195 int err;
1196
1197 err = matroxfb_get_vblank(PMINFO &vblank);
1198 if (err)
1199 return err;
1200 if (copy_to_user((struct fb_vblank*)arg, &vblank, sizeof(vblank)))
1201 return -EFAULT;
1202 return 0;
1203 }
1204 case FBIO_WAITFORVSYNC:
1205 {
1206 u_int32_t crt;
1207
1208 if (get_user(crt, (u_int32_t *)arg))
1209 return -EFAULT;
1210
1211 return matroxfb_wait_for_sync(PMINFO crt);
1212 }
1213 case MATROXFB_SET_OUTPUT_MODE:
1214 {
1215 struct matroxioc_output_mode mom;
1216 struct matrox_altout *oproc;
1217 int val;
1218
1219 if (copy_from_user(&mom, (struct matroxioc_output_mode*)arg, sizeof(mom)))
1220 return -EFAULT;
1221 if (mom.output >= MATROXFB_MAX_OUTPUTS)
1222 return -ENXIO;
1223 down_read(&ACCESS_FBINFO(altout.lock));
1224 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
1225 if (!oproc) {
1226 val = -ENXIO;
1227 } else if (!oproc->verifymode) {
1228 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
1229 val = 0;
1230 } else {
1231 val = -EINVAL;
1232 }
1233 } else {
1234 val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode);
1235 }
1236 if (!val) {
1237 if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) {
1238 ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode;
1239 val = 1;
1240 }
1241 }
1242 up_read(&ACCESS_FBINFO(altout.lock));
1243 if (val != 1)
1244 return val;
1245 switch (ACCESS_FBINFO(outputs[mom.output]).src) {
1246 case MATROXFB_SRC_CRTC1:
1247 matroxfb_switch(ACCESS_FBINFO(currcon), info);
1248 break;
1249 case MATROXFB_SRC_CRTC2:
1250 {
1251 struct matroxfb_dh_fb_info* crtc2;
1252
1253 down_read(&ACCESS_FBINFO(crtc2.lock));
1254 crtc2 = ACCESS_FBINFO(crtc2.info);
1255 if (crtc2)
1256 crtc2->fbcon.switch_con(crtc2->currcon, &crtc2->fbcon);
1257 up_read(&ACCESS_FBINFO(crtc2.lock));
1258 }
1259 break;
1260 }
1261 return 0;
1262 }
1263 case MATROXFB_GET_OUTPUT_MODE:
1264 {
1265 struct matroxioc_output_mode mom;
1266 struct matrox_altout *oproc;
1267 int val;
1268
1269 if (copy_from_user(&mom, (struct matroxioc_output_mode*)arg, sizeof(mom)))
1270 return -EFAULT;
1271 if (mom.output >= MATROXFB_MAX_OUTPUTS)
1272 return -ENXIO;
1273 down_read(&ACCESS_FBINFO(altout.lock));
1274 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
1275 if (!oproc) {
1276 val = -ENXIO;
1277 } else {
1278 mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode;
1279 val = 0;
1280 }
1281 up_read(&ACCESS_FBINFO(altout.lock));
1282 if (val)
1283 return val;
1284 if (copy_to_user((struct matroxioc_output_mode*)arg, &mom, sizeof(mom)))
1285 return -EFAULT;
1286 return 0;
1287 }
1288 case MATROXFB_SET_OUTPUT_CONNECTION:
1289 {
1290 u_int32_t tmp;
1291 int i;
1292 int changes;
1293
1294 if (copy_from_user(&tmp, (u_int32_t*)arg, sizeof(tmp)))
1295 return -EFAULT;
1296 for (i = 0; i < 32; i++) {
1297 if (tmp & (1 << i)) {
1298 if (i >= MATROXFB_MAX_OUTPUTS)
1299 return -ENXIO;
1300 if (!ACCESS_FBINFO(outputs[i]).output)
1301 return -ENXIO;
1302 switch (ACCESS_FBINFO(outputs[i]).src) {
1303 case MATROXFB_SRC_NONE:
1304 case MATROXFB_SRC_CRTC1:
1305 break;
1306 default:
1307 return -EBUSY;
1308 }
1309 }
1310 }
1311 if (ACCESS_FBINFO(devflags.panellink)) {
1312 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1313 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1314 return -EINVAL;
1315 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1316 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) {
1317 return -EBUSY;
1318 }
1319 }
1320 }
1321 }
1322 changes = 0;
1323 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1324 if (tmp & (1 << i)) {
1325 if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) {
1326 changes = 1;
1327 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1;
1328 }
1329 } else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1330 changes = 1;
1331 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE;
1332 }
1333 }
1334 if (!changes)
1335 return 0;
1336 matroxfb_switch(ACCESS_FBINFO(currcon), info);
1337 return 0;
1338 }
1339 case MATROXFB_GET_OUTPUT_CONNECTION:
1340 {
1341 u_int32_t conn = 0;
1342 int i;
1343
1344 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1345 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1346 conn |= 1 << i;
1347 }
1348 }
1349 if (put_user(conn, (u_int32_t*)arg))
1350 return -EFAULT;
1351 return 0;
1352 }
1353 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1354 {
1355 u_int32_t conn = 0;
1356 int i;
1357
1358 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1359 if (ACCESS_FBINFO(outputs[i]).output) {
1360 switch (ACCESS_FBINFO(outputs[i]).src) {
1361 case MATROXFB_SRC_NONE:
1362 case MATROXFB_SRC_CRTC1:
1363 conn |= 1 << i;
1364 break;
1365 }
1366 }
1367 }
1368 if (ACCESS_FBINFO(devflags.panellink)) {
1369 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1370 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1371 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1372 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1373 }
1374 if (put_user(conn, (u_int32_t*)arg))
1375 return -EFAULT;
1376 return 0;
1377 }
1378 case MATROXFB_GET_ALL_OUTPUTS:
1379 {
1380 u_int32_t conn = 0;
1381 int i;
1382
1383 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1384 if (ACCESS_FBINFO(outputs[i]).output) {
1385 conn |= 1 << i;
1386 }
1387 }
1388 if (put_user(conn, (u_int32_t*)arg))
1389 return -EFAULT;
1390 return 0;
1391 }
1392 case 0x80585600:
1393 {
1394 struct {
1395 char name[32];
1396 int type;
1397 int inputs;
1398 int outputs;
1399 int audios;
1400 int maxwidth;
1401 int maxheight;
1402 int minwidth;
1403 int minheight;
1404 int maxframerate;
1405 __u32 flags;
1406 __u32 reserved[4];
1407 } r;
1408
1409 memset(&r, 0, sizeof(r));
1410 strcat(r.name, "Matrox TVO");
1411 r.type = 2;
1412 r.inputs = 0;
1413 r.outputs = 1;
1414 r.audios = 0;
1415 r.maxwidth = 1023;
1416 r.maxheight = 625;
1417 r.minwidth = 512;
1418 r.minheight = 480;
1419 r.maxframerate = 60;
1420 r.flags = 0;
1421 if (copy_to_user((void*)arg, &r, sizeof(r)))
1422 return -EFAULT;
1423 return 0;
1424
1425 }
1426 case MATROXFB_TVOQUERYCTRL:
1427 {
1428 struct matroxfb_queryctrl qctrl;
1429 int err;
1430
1431 if (copy_from_user(&qctrl, (struct matroxfb_queryctrl*)arg, sizeof(qctrl)))
1432 return -EFAULT;
1433
1434 down_read(&ACCESS_FBINFO(altout).lock);
1435 if (!ACCESS_FBINFO(outputs[1]).output) {
1436 err = -ENXIO;
1437 } else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) {
1438 err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl);
1439 } else {
1440 err = -EINVAL;
1441 }
1442 up_read(&ACCESS_FBINFO(altout).lock);
1443 if (err >= 0 &&
1444 copy_to_user((struct matroxfb_queryctrl*)arg, &qctrl, sizeof(qctrl)))
1445 return -EFAULT;
1446 return err;
1447 }
1448 case MATROXFB_G_TVOCTRL:
1449 {
1450 struct matroxfb_control ctrl;
1451 int err;
1452
1453 if (copy_from_user(&ctrl, (struct matroxfb_control*)arg, sizeof(ctrl)))
1454 return -EFAULT;
1455
1456 down_read(&ACCESS_FBINFO(altout).lock);
1457 if (!ACCESS_FBINFO(outputs[1]).output) {
1458 err = -ENXIO;
1459 } else if (ACCESS_FBINFO(outputs[1]).output->getctrl) {
1460 err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1461 } else {
1462 err = -EINVAL;
1463 }
1464 up_read(&ACCESS_FBINFO(altout).lock);
1465 if (err >= 0 &&
1466 copy_to_user((struct matroxfb_control*)arg, &ctrl, sizeof(ctrl)))
1467 return -EFAULT;
1468 return err;
1469 }
1470 case MATROXFB_S_TVOCTRL:
1471 {
1472 struct matroxfb_control ctrl;
1473 int err;
1474
1475 if (copy_from_user(&ctrl, (struct matroxfb_control*)arg, sizeof(ctrl)))
1476 return -EFAULT;
1477
1478 down_read(&ACCESS_FBINFO(altout).lock);
1479 if (!ACCESS_FBINFO(outputs[1]).output) {
1480 err = -ENXIO;
1481 } else if (ACCESS_FBINFO(outputs[1]).output->setctrl) {
1482 err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1483 } else {
1484 err = -EINVAL;
1485 }
1486 up_read(&ACCESS_FBINFO(altout).lock);
1487 return err;
1488 }
1489 }
1490 return -ENOTTY;
1491#undef minfo
1492}
1493
1494
1495
1496static int matroxfb_blank(int blank, struct fb_info *info)
1497{
1498#define minfo (list_entry(info, struct matrox_fb_info, fbcon))
1499 int seq;
1500 int crtc;
1501 CRITFLAGS
1502
1503 DBG("matroxfb_blank")
1504
1505 if (ACCESS_FBINFO(dead))
1506 return 1;
1507
1508 switch (blank) {
1509 case 1: seq = 0x20; crtc = 0x00; break;
1510 case 2: seq = 0x20; crtc = 0x10; break;
1511 case 3: seq = 0x20; crtc = 0x20; break;
1512 case 4: seq = 0x20; crtc = 0x30; break;
1513 default: seq = 0x00; crtc = 0x00; break;
1514 }
1515
1516 CRITBEGIN
1517
1518 mga_outb(M_SEQ_INDEX, 1);
1519 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1520 mga_outb(M_EXTVGA_INDEX, 1);
1521 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1522
1523 CRITEND
1524 return 0;
1525#undef minfo
1526}
1527
1528static void matroxfb_blank24(int blank, struct fb_info *info)
1529{
1530 matroxfb_blank(blank, info);
1531}
1532
1533static struct fb_ops matroxfb_ops = {
1534 owner: THIS_MODULE,
1535 fb_open: matroxfb_open,
1536 fb_release: matroxfb_release,
1537 fb_get_fix: matroxfb_get_fix,
1538 fb_get_var: matroxfb_get_var,
1539 fb_set_var: matroxfb_set_var,
1540 fb_get_cmap: matroxfb_get_cmap,
1541 fb_set_cmap: matroxfb_set_cmap,
1542 fb_pan_display: matroxfb_pan_display,
1543 fb_ioctl: matroxfb_ioctl,
1544};
1545
1546int matroxfb_switch(int con, struct fb_info *info)
1547{
1548#define minfo (list_entry(info, struct matrox_fb_info, fbcon))
1549 struct fb_cmap* cmap;
1550 struct display *p;
1551
1552 DBG("matroxfb_switch");
1553
1554 if (ACCESS_FBINFO(currcon) >= 0) {
1555
1556 cmap = &(ACCESS_FBINFO(currcon_display)->cmap);
1557 dprintk(KERN_DEBUG "switch1: con = %d, cmap.len = %d\n", ACCESS_FBINFO(currcon), cmap->len);
1558
1559 if (cmap->len) {
1560 dprintk(KERN_DEBUG "switch1a: %p %p %p %p\n", cmap->red, cmap->green, cmap->blue, cmap->transp);
1561 fb_get_cmap(cmap, 1, matrox_getcolreg, info);
1562#ifdef DEBUG
1563 if (cmap->red) {
1564 dprintk(KERN_DEBUG "switch1r: %X\n", cmap->red[0]);
1565 }
1566#endif
1567 }
1568 }
1569 ACCESS_FBINFO(currcon) = con;
1570 if (con < 0)
1571 p = ACCESS_FBINFO(fbcon.disp);
1572 else
1573 p = fb_display + con;
1574 ACCESS_FBINFO(currcon_display) = p;
1575 p->var.activate = FB_ACTIVATE_NOW;
1576#ifdef DEBUG
1577 cmap = &p->cmap;
1578 dprintk(KERN_DEBUG "switch2: con = %d, cmap.len = %d\n", con, cmap->len);
1579 dprintk(KERN_DEBUG "switch2a: %p %p %p %p\n", cmap->red, cmap->green, cmap->blue, cmap->transp);
1580 if (p->cmap.red) {
1581 dprintk(KERN_DEBUG "switch2r: %X\n", cmap->red[0]);
1582 }
1583#endif
1584 matroxfb_set_var(&p->var, con, info);
1585#ifdef DEBUG
1586 dprintk(KERN_DEBUG "switch3: con = %d, cmap.len = %d\n", con, cmap->len);
1587 dprintk(KERN_DEBUG "switch3a: %p %p %p %p\n", cmap->red, cmap->green, cmap->blue, cmap->transp);
1588 if (p->cmap.red) {
1589 dprintk(KERN_DEBUG "switch3r: %X\n", cmap->red[0]);
1590 }
1591#endif
1592 return 0;
1593#undef minfo
1594}
1595
1596#define RSDepth(X) (((X) >> 8) & 0x0F)
1597#define RS8bpp 0x1
1598#define RS15bpp 0x2
1599#define RS16bpp 0x3
1600#define RS32bpp 0x4
1601#define RS4bpp 0x5
1602#define RS24bpp 0x6
1603#define RSText 0x7
1604#define RSText8 0x8
1605
1606static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1607 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1608 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1609 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1610 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1611 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1612 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1613 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 },
1614 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 },
1615};
1616
1617
1618static unsigned int mem;
1619static int option_precise_width = 1;
1620static int inv24;
1621static int cross4MB = -1;
1622static int disabled;
1623static int noaccel;
1624static int nopan;
1625static int no_pci_retry;
1626static int novga;
1627static int nobios;
1628static int noinit = 1;
1629static int inverse;
1630static int hwcursor = 1;
1631static int blink = 1;
1632static int sgram;
1633#ifdef CONFIG_MTRR
1634static int mtrr = 1;
1635#endif
1636static int grayscale;
1637static unsigned int fastfont;
1638static int dev = -1;
1639static unsigned int vesa = ~0;
1640static int depth = -1;
1641static unsigned int xres;
1642static unsigned int yres;
1643static unsigned int upper = ~0;
1644static unsigned int lower = ~0;
1645static unsigned int vslen;
1646static unsigned int left = ~0;
1647static unsigned int right = ~0;
1648static unsigned int hslen;
1649static unsigned int pixclock;
1650static int sync = -1;
1651static unsigned int fv;
1652static unsigned int fh;
1653static unsigned int maxclk;
1654static int dfp;
1655static int dfp_type = -1;
1656static int memtype = -1;
1657static char fontname[64];
1658
1659#ifndef MODULE
1660static char videomode[64];
1661#endif
1662
1663static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){
1664 vaddr_t vm;
1665 unsigned int offs;
1666 unsigned int offs2;
1667 unsigned char store;
1668 unsigned char bytes[32];
1669 unsigned char* tmp;
1670
1671 DBG("matroxfb_getmemory")
1672
1673 vm = ACCESS_FBINFO(video.vbase);
1674 maxSize &= ~0x1FFFFF;
1675
1676 if (maxSize < 0x0200000) return 0;
1677 if (maxSize > 0x2000000) maxSize = 0x2000000;
1678
1679 mga_outb(M_EXTVGA_INDEX, 0x03);
1680 mga_outb(M_EXTVGA_DATA, mga_inb(M_EXTVGA_DATA) | 0x80);
1681
1682 store = mga_readb(vm, 0x1234);
1683 tmp = bytes;
1684 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1685 *tmp++ = mga_readb(vm, offs);
1686 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1687 mga_writeb(vm, offs, 0x02);
1688 if (ACCESS_FBINFO(features.accel.has_cacheflush))
1689 mga_outb(M_CACHEFLUSH, 0x00);
1690 else
1691 mga_writeb(vm, 0x1234, 0x99);
1692 for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1693 if (mga_readb(vm, offs) != 0x02)
1694 break;
1695 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1696 if (mga_readb(vm, offs))
1697 break;
1698 }
1699 tmp = bytes;
1700 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1701 mga_writeb(vm, offs2, *tmp++);
1702 mga_writeb(vm, 0x1234, store);
1703
1704 mga_outb(M_EXTVGA_INDEX, 0x03);
1705 mga_outb(M_EXTVGA_DATA, mga_inb(M_EXTVGA_DATA) & ~0x80);
1706
1707 *realSize = offs - 0x100000;
1708#ifdef CONFIG_FB_MATROX_MILLENIUM
1709 ACCESS_FBINFO(interleave) = !(!isMillenium(MINFO) || ((offs - 0x100000) & 0x3FFFFF));
1710#endif
1711 return 1;
1712}
1713
1714struct video_board {
1715 int maxvram;
1716 int maxdisplayable;
1717 int accelID;
1718 struct matrox_switch* lowlevel;
1719 };
1720#ifdef CONFIG_FB_MATROX_MILLENIUM
1721static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
1722static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
1723static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
1724#endif
1725#ifdef CONFIG_FB_MATROX_MYSTIQUE
1726static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
1727#endif
1728#ifdef CONFIG_FB_MATROX_G100
1729static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
1730static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
1731#ifdef CONFIG_FB_MATROX_32MB
1732
1733
1734static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1735#else
1736static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1737#endif
1738#endif
1739
1740#define DEVF_VIDEO64BIT 0x0001
1741#define DEVF_SWAPS 0x0002
1742#define DEVF_SRCORG 0x0004
1743#define DEVF_DUALHEAD 0x0008
1744#define DEVF_CROSS4MB 0x0010
1745#define DEVF_TEXT4B 0x0020
1746
1747
1748#define DEVF_SUPPORT32MB 0x0100
1749#define DEVF_ANY_VXRES 0x0200
1750#define DEVF_TEXT16B 0x0400
1751#define DEVF_CRTC2 0x0800
1752#define DEVF_MAVEN_CAPABLE 0x1000
1753#define DEVF_PANELLINK_CAPABLE 0x2000
1754#define DEVF_G450DAC 0x4000
1755
1756#define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1757#define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1758#define DEVF_G100 (DEVF_GCORE)
1759#define DEVF_G200 (DEVF_G2CORE)
1760#define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1761
1762#define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1763#define DEVF_G550 (DEVF_G450)
1764
1765static struct board {
1766 unsigned short vendor, device, rev, svid, sid;
1767 unsigned int flags;
1768 unsigned int maxclk;
1769 enum mga_chip chip;
1770 struct video_board* base;
1771 const char* name;
1772 } dev_list[] = {
1773#ifdef CONFIG_FB_MATROX_MILLENIUM
1774 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1775 0, 0,
1776 DEVF_TEXT4B,
1777 230000,
1778 MGA_2064,
1779 &vbMillennium,
1780 "Millennium (PCI)"},
1781 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1782 0, 0,
1783 DEVF_SWAPS,
1784 220000,
1785 MGA_2164,
1786 &vbMillennium2,
1787 "Millennium II (PCI)"},
1788 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1789 0, 0,
1790 DEVF_SWAPS,
1791 250000,
1792 MGA_2164,
1793 &vbMillennium2A,
1794 "Millennium II (AGP)"},
1795#endif
1796#ifdef CONFIG_FB_MATROX_MYSTIQUE
1797 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1798 0, 0,
1799 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1800 180000,
1801 MGA_1064,
1802 &vbMystique,
1803 "Mystique (PCI)"},
1804 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1805 0, 0,
1806 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1807 220000,
1808 MGA_1164,
1809 &vbMystique,
1810 "Mystique 220 (PCI)"},
1811#endif
1812#ifdef CONFIG_FB_MATROX_G100
1813 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1814 0, 0,
1815 DEVF_G100,
1816 230000,
1817 MGA_G100,
1818 &vbG100,
1819 "MGA-G100 (PCI)"},
1820 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1821 0, 0,
1822 DEVF_G100,
1823 230000,
1824 MGA_G100,
1825 &vbG100,
1826 "MGA-G100 (AGP)"},
1827 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1828 0, 0,
1829 DEVF_G200,
1830 250000,
1831 MGA_G200,
1832 &vbG200,
1833 "MGA-G200 (PCI)"},
1834 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1835 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1836 DEVF_G200,
1837 220000,
1838 MGA_G200,
1839 &vbG200,
1840 "MGA-G200 (AGP)"},
1841 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1842 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1843 DEVF_G200,
1844 230000,
1845 MGA_G200,
1846 &vbG200,
1847 "Mystique G200 (AGP)"},
1848 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1849 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1850 DEVF_G200,
1851 250000,
1852 MGA_G200,
1853 &vbG200,
1854 "Millennium G200 (AGP)"},
1855 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1856 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1857 DEVF_G200,
1858 230000,
1859 MGA_G200,
1860 &vbG200,
1861 "Marvel G200 (AGP)"},
1862 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1863 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1864 DEVF_G200,
1865 230000,
1866 MGA_G200,
1867 &vbG200,
1868 "MGA-G200 (AGP)"},
1869 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1870 0, 0,
1871 DEVF_G200,
1872 230000,
1873 MGA_G200,
1874 &vbG200,
1875 "G200 (AGP)"},
1876 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1877 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1878 DEVF_G400,
1879 360000,
1880 MGA_G400,
1881 &vbG400,
1882 "Millennium G400 MAX (AGP)"},
1883 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1884 0, 0,
1885 DEVF_G400,
1886 300000,
1887 MGA_G400,
1888 &vbG400,
1889 "G400 (AGP)"},
1890 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1891 0, 0,
1892 DEVF_G450,
1893 360000,
1894 MGA_G450,
1895 &vbG400,
1896 "G450"},
1897 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1898 0, 0,
1899 DEVF_G550,
1900 360000,
1901 MGA_G550,
1902 &vbG400,
1903 "G550"},
1904#endif
1905 {0, 0, 0xFF,
1906 0, 0,
1907 0,
1908 0,
1909 0,
1910 NULL,
1911 NULL}};
1912
1913#ifndef MODULE
1914static struct fb_videomode defaultmode = {
1915
1916 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1917 0, FB_VMODE_NONINTERLACED
1918};
1919#endif
1920
1921static int hotplug = 0;
1922
1923static int initMatrox2(WPMINFO struct display* d, struct board* b){
1924 unsigned long ctrlptr_phys = 0;
1925 unsigned long video_base_phys = 0;
1926 unsigned int memsize;
1927 int err;
1928
1929 DBG("initMatrox2")
1930
1931
1932 vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1933
1934 ACCESS_FBINFO(hw_switch) = b->base->lowlevel;
1935 ACCESS_FBINFO(devflags.accelerator) = b->base->accelID;
1936 ACCESS_FBINFO(max_pixel_clock) = b->maxclk;
1937
1938 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1939 ACCESS_FBINFO(capable.plnwt) = 1;
1940 ACCESS_FBINFO(chip) = b->chip;
1941 ACCESS_FBINFO(capable.srcorg) = b->flags & DEVF_SRCORG;
1942 ACCESS_FBINFO(devflags.video64bits) = b->flags & DEVF_VIDEO64BIT;
1943 if (b->flags & DEVF_TEXT4B) {
1944 ACCESS_FBINFO(devflags.vgastep) = 4;
1945 ACCESS_FBINFO(devflags.textmode) = 4;
1946 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1947 } else if (b->flags & DEVF_TEXT16B) {
1948 ACCESS_FBINFO(devflags.vgastep) = 16;
1949 ACCESS_FBINFO(devflags.textmode) = 1;
1950 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1951 } else {
1952 ACCESS_FBINFO(devflags.vgastep) = 8;
1953 ACCESS_FBINFO(devflags.textmode) = 1;
1954 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP8;
1955 }
1956#ifdef CONFIG_FB_MATROX_32MB
1957 ACCESS_FBINFO(devflags.support32MB) = (b->flags & DEVF_SUPPORT32MB) != 0;
1958#endif
1959 ACCESS_FBINFO(devflags.precise_width) = !(b->flags & DEVF_ANY_VXRES);
1960 ACCESS_FBINFO(devflags.crtc2) = (b->flags & DEVF_CRTC2) != 0;
1961 ACCESS_FBINFO(devflags.maven_capable) = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1962 ACCESS_FBINFO(devflags.dualhead) = (b->flags & DEVF_DUALHEAD) != 0;
1963 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1964 ACCESS_FBINFO(outputs[2]).data = MINFO;
1965 ACCESS_FBINFO(outputs[2]).output = &panellink_output;
1966 if (dfp)
1967 ACCESS_FBINFO(outputs[2]).src = MATROXFB_SRC_CRTC1;
1968 else
1969 ACCESS_FBINFO(outputs[2]).src = MATROXFB_SRC_NONE;
1970 ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
1971 ACCESS_FBINFO(devflags.panellink) = 1;
1972 }
1973 ACCESS_FBINFO(devflags.dfp_type) = dfp_type;
1974 ACCESS_FBINFO(devflags.g450dac) = (b->flags & DEVF_G450DAC) != 0;
1975 ACCESS_FBINFO(devflags.textstep) = ACCESS_FBINFO(devflags.vgastep) * ACCESS_FBINFO(devflags.textmode);
1976 ACCESS_FBINFO(devflags.textvram) = 65536 / ACCESS_FBINFO(devflags.textmode);
1977
1978 if (ACCESS_FBINFO(capable.cross4MB) < 0)
1979 ACCESS_FBINFO(capable.cross4MB) = b->flags & DEVF_CROSS4MB;
1980 if (b->flags & DEVF_SWAPS) {
1981 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1982 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1983 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_0;
1984 } else {
1985 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1986 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1987 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_1;
1988 }
1989 err = -EINVAL;
1990 if (!ctrlptr_phys) {
1991 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1992 goto fail;
1993 }
1994 if (!video_base_phys) {
1995 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1996 goto fail;
1997 }
1998 memsize = b->base->maxvram;
1999 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
2000 goto fail;
2001 }
2002 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
2003 goto failCtrlMR;
2004 }
2005 ACCESS_FBINFO(video.len_maximum) = memsize;
2006
2007 if (mem < 1024) mem *= 1024;
2008 if (mem < 0x00100000) mem *= 1024;
2009
2010 if (mem && (mem < memsize))
2011 memsize = mem;
2012 err = -ENOMEM;
2013 if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &ACCESS_FBINFO(mmio.vbase))) {
2014 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
2015 goto failVideoMR;
2016 }
2017 ACCESS_FBINFO(mmio.base) = ctrlptr_phys;
2018 ACCESS_FBINFO(mmio.len) = 16384;
2019 ACCESS_FBINFO(video.base) = video_base_phys;
2020 if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &ACCESS_FBINFO(video.vbase))) {
2021 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
2022 video_base_phys, memsize);
2023 goto failCtrlIO;
2024 }
2025 {
2026 u_int32_t cmd;
2027 u_int32_t mga_option;
2028
2029 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, &mga_option);
2030 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, &cmd);
2031 mga_option &= 0x7FFFFFFF;
2032 mga_option |= MX_OPTION_BSWAP;
2033
2034 cmd &= ~PCI_COMMAND_VGA_PALETTE;
2035 if (pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437, NULL)) {
2036 if (!(mga_option & 0x20000000) && !ACCESS_FBINFO(devflags.nopciretry)) {
2037 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
2038 }
2039 mga_option |= 0x20000000;
2040 ACCESS_FBINFO(devflags.nopciretry) = 1;
2041 }
2042 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, cmd);
2043 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mga_option);
2044 ACCESS_FBINFO(hw).MXoptionReg = mga_option;
2045
2046
2047
2048 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MGA_INDEX, 0x00003C00);
2049 }
2050
2051 err = -ENXIO;
2052 matroxfb_read_pins(PMINFO2);
2053 if (ACCESS_FBINFO(hw_switch)->preinit(PMINFO2)) {
2054 goto failVideoIO;
2055 }
2056
2057 err = -ENOMEM;
2058 if (!matroxfb_getmemory(PMINFO memsize, &ACCESS_FBINFO(video.len)) || !ACCESS_FBINFO(video.len)) {
2059 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
2060 goto failVideoIO;
2061 }
2062 ACCESS_FBINFO(devflags.ydstorg) = 0;
2063
2064 ACCESS_FBINFO(currcon) = -1;
2065 ACCESS_FBINFO(currcon_display) = d;
2066 ACCESS_FBINFO(video.base) = video_base_phys;
2067 ACCESS_FBINFO(video.len_usable) = ACCESS_FBINFO(video.len);
2068 if (ACCESS_FBINFO(video.len_usable) > b->base->maxdisplayable)
2069 ACCESS_FBINFO(video.len_usable) = b->base->maxdisplayable;
2070#ifdef CONFIG_MTRR
2071 if (mtrr) {
2072 ACCESS_FBINFO(mtrr.vram) = mtrr_add(video_base_phys, ACCESS_FBINFO(video.len), MTRR_TYPE_WRCOMB, 1);
2073 ACCESS_FBINFO(mtrr.vram_valid) = 1;
2074 printk(KERN_INFO "matroxfb: MTRR's turned on\n");
2075 }
2076#endif
2077
2078 if (!ACCESS_FBINFO(devflags.novga))
2079 request_region(0x3C0, 32, "matrox");
2080 matroxfb_g450_connect(PMINFO2);
2081 ACCESS_FBINFO(hw_switch->reset(PMINFO2));
2082
2083 ACCESS_FBINFO(fbcon.monspecs.hfmin) = 0;
2084 ACCESS_FBINFO(fbcon.monspecs.hfmax) = fh;
2085 ACCESS_FBINFO(fbcon.monspecs.vfmin) = 0;
2086 ACCESS_FBINFO(fbcon.monspecs.vfmax) = fv;
2087 ACCESS_FBINFO(fbcon.monspecs.dpms) = 0;
2088
2089
2090 if ((depth == RSText8) && (!*ACCESS_FBINFO(fbcon.fontname))) {
2091 strcpy(ACCESS_FBINFO(fbcon.fontname), "VGA8x8");
2092 }
2093 vesafb_defined.red = colors[depth-1].red;
2094 vesafb_defined.green = colors[depth-1].green;
2095 vesafb_defined.blue = colors[depth-1].blue;
2096 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
2097 vesafb_defined.grayscale = grayscale;
2098 vesafb_defined.vmode = 0;
2099 if (noaccel)
2100 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
2101
2102 strcpy(ACCESS_FBINFO(fbcon.modename), "MATROX VGA");
2103 ACCESS_FBINFO(fbcon.changevar) = NULL;
2104 ACCESS_FBINFO(fbcon.node) = NODEV;
2105 ACCESS_FBINFO(fbcon.fbops) = &matroxfb_ops;
2106 ACCESS_FBINFO(fbcon.disp) = d;
2107 ACCESS_FBINFO(fbcon.switch_con) = &matroxfb_switch;
2108 ACCESS_FBINFO(fbcon.updatevar) = &matroxfb_updatevar;
2109 ACCESS_FBINFO(fbcon.blank) = &matroxfb_blank24;
2110
2111 ACCESS_FBINFO(fbcon.flags) = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
2112 ACCESS_FBINFO(video.len_usable) &= PAGE_MASK;
2113
2114#ifndef MODULE
2115
2116 if (!hotplug) {
2117 fb_find_mode(&vesafb_defined, &ACCESS_FBINFO(fbcon), videomode[0]?videomode:NULL,
2118 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
2119 }
2120#endif
2121
2122
2123 if (hslen)
2124 vesafb_defined.hsync_len = hslen;
2125 if (vslen)
2126 vesafb_defined.vsync_len = vslen;
2127 if (left != ~0)
2128 vesafb_defined.left_margin = left;
2129 if (right != ~0)
2130 vesafb_defined.right_margin = right;
2131 if (upper != ~0)
2132 vesafb_defined.upper_margin = upper;
2133 if (lower != ~0)
2134 vesafb_defined.lower_margin = lower;
2135 if (xres)
2136 vesafb_defined.xres = xres;
2137 if (yres)
2138 vesafb_defined.yres = yres;
2139 if (sync != -1)
2140 vesafb_defined.sync = sync;
2141 else if (vesafb_defined.sync == ~0) {
2142 vesafb_defined.sync = 0;
2143 if (yres < 400)
2144 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
2145 else if (yres < 480)
2146 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
2147 }
2148
2149
2150 {
2151 unsigned int tmp;
2152
2153 if (fv) {
2154 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
2155 + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
2156 if ((tmp < fh) || (fh == 0)) fh = tmp;
2157 }
2158 if (fh) {
2159 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
2160 + vesafb_defined.right_margin + vesafb_defined.hsync_len);
2161 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
2162 }
2163 tmp = (maxclk + 499) / 500;
2164 if (tmp) {
2165 tmp = (2000000000 + tmp) / tmp;
2166 if (tmp > pixclock) pixclock = tmp;
2167 }
2168 }
2169 if (pixclock) {
2170 if (pixclock < 2000)
2171 pixclock = 4000;
2172 if (pixclock > 1000000)
2173 pixclock = 1000000;
2174 vesafb_defined.pixclock = pixclock;
2175 }
2176
2177
2178#if defined(CONFIG_ALL_PPC)
2179#if defined(CONFIG_FB_COMPAT_XPMAC)
2180 strcpy(ACCESS_FBINFO(matrox_name), "MTRX,");
2181 strncat(ACCESS_FBINFO(matrox_name), b->name, 26);
2182 if (!console_fb_info)
2183 console_fb_info = &ACCESS_FBINFO(fbcon);
2184#endif
2185#ifndef MODULE
2186 if (_machine == _MACH_Pmac) {
2187 struct fb_var_screeninfo var;
2188 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
2189 default_vmode = VMODE_640_480_60;
2190#ifdef CONFIG_NVRAM
2191 if (default_cmode == CMODE_NVRAM)
2192 default_cmode = nvram_read_byte(NV_CMODE);
2193#endif
2194 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
2195 default_cmode = CMODE_8;
2196 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
2197 var.accel_flags = vesafb_defined.accel_flags;
2198 var.xoffset = var.yoffset = 0;
2199
2200 vesafb_defined = var;
2201 }
2202 }
2203#endif
2204#endif
2205 vesafb_defined.xres_virtual = vesafb_defined.xres;
2206 if (nopan) {
2207 vesafb_defined.yres_virtual = vesafb_defined.yres;
2208 } else {
2209 vesafb_defined.yres_virtual = 65536;
2210
2211 }
2212 err = -EINVAL;
2213 if (matroxfb_set_var(&vesafb_defined, -2, &ACCESS_FBINFO(fbcon))) {
2214 printk(KERN_ERR "matroxfb: cannot set required parameters\n");
2215 goto failVideoIO;
2216 }
2217
2218 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
2219 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
2220 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
2221 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
2222 ACCESS_FBINFO(video.base), vaddr_va(ACCESS_FBINFO(video.vbase)), ACCESS_FBINFO(video.len));
2223
2224
2225
2226
2227 if (register_framebuffer(&ACCESS_FBINFO(fbcon)) < 0) {
2228 goto failVideoIO;
2229 }
2230 printk("fb%d: %s frame buffer device\n",
2231 GET_FB_IDX(ACCESS_FBINFO(fbcon.node)), ACCESS_FBINFO(fbcon.modename));
2232 if (ACCESS_FBINFO(currcon) < 0) {
2233
2234
2235 printk(KERN_INFO "fb%d: initializing hardware\n",
2236 GET_FB_IDX(ACCESS_FBINFO(fbcon.node)));
2237 matroxfb_set_var(&vesafb_defined, -1, &ACCESS_FBINFO(fbcon));
2238 }
2239 return 0;
2240failVideoIO:;
2241 matroxfb_g450_shutdown(PMINFO2);
2242 mga_iounmap(ACCESS_FBINFO(video.vbase));
2243failCtrlIO:;
2244 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
2245failVideoMR:;
2246 release_mem_region(video_base_phys, ACCESS_FBINFO(video.len_maximum));
2247failCtrlMR:;
2248 release_mem_region(ctrlptr_phys, 16384);
2249fail:;
2250 return err;
2251}
2252
2253LIST_HEAD(matroxfb_list);
2254LIST_HEAD(matroxfb_driver_list);
2255
2256#define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
2257#define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
2258int matroxfb_register_driver(struct matroxfb_driver* drv) {
2259 struct matrox_fb_info* minfo;
2260
2261 list_add(&drv->node, &matroxfb_driver_list);
2262 for (minfo = matroxfb_l(matroxfb_list.next);
2263 minfo != matroxfb_l(&matroxfb_list);
2264 minfo = matroxfb_l(minfo->next_fb.next)) {
2265 void* p;
2266
2267 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
2268 continue;
2269 p = drv->probe(minfo);
2270 if (p) {
2271 minfo->drivers_data[minfo->drivers_count] = p;
2272 minfo->drivers[minfo->drivers_count++] = drv;
2273 }
2274 }
2275 return 0;
2276}
2277
2278void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
2279 struct matrox_fb_info* minfo;
2280
2281 list_del(&drv->node);
2282 for (minfo = matroxfb_l(matroxfb_list.next);
2283 minfo != matroxfb_l(&matroxfb_list);
2284 minfo = matroxfb_l(minfo->next_fb.next)) {
2285 int i;
2286
2287 for (i = 0; i < minfo->drivers_count; ) {
2288 if (minfo->drivers[i] == drv) {
2289 if (drv && drv->remove)
2290 drv->remove(minfo, minfo->drivers_data[i]);
2291 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
2292 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
2293 } else
2294 i++;
2295 }
2296 }
2297}
2298
2299static void matroxfb_register_device(struct matrox_fb_info* minfo) {
2300 struct matroxfb_driver* drv;
2301 int i = 0;
2302 list_add(&ACCESS_FBINFO(next_fb), &matroxfb_list);
2303 for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
2304 drv != matroxfb_driver_l(&matroxfb_driver_list);
2305 drv = matroxfb_driver_l(drv->node.next)) {
2306 if (drv && drv->probe) {
2307 void *p = drv->probe(minfo);
2308 if (p) {
2309 minfo->drivers_data[i] = p;
2310 minfo->drivers[i++] = drv;
2311 if (i == MATROXFB_MAX_FB_DRIVERS)
2312 break;
2313 }
2314 }
2315 }
2316 minfo->drivers_count = i;
2317}
2318
2319static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
2320 int i;
2321
2322 list_del(&ACCESS_FBINFO(next_fb));
2323 for (i = 0; i < minfo->drivers_count; i++) {
2324 struct matroxfb_driver* drv = minfo->drivers[i];
2325
2326 if (drv && drv->remove)
2327 drv->remove(minfo, minfo->drivers_data[i]);
2328 }
2329}
2330
2331static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
2332 struct board* b;
2333 u_int8_t rev;
2334 u_int16_t svid;
2335 u_int16_t sid;
2336 struct matrox_fb_info* minfo;
2337 struct display* d;
2338 int err;
2339 u_int32_t cmd;
2340#ifndef CONFIG_FB_MATROX_MULTIHEAD
2341 static int registered = 0;
2342 static struct display global_disp;
2343#endif
2344 DBG("matroxfb_probe")
2345
2346 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
2347 svid = pdev->subsystem_vendor;
2348 sid = pdev->subsystem_device;
2349 for (b = dev_list; b->vendor; b++) {
2350 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < rev)) continue;
2351 if (b->svid)
2352 if ((b->svid != svid) || (b->sid != sid)) continue;
2353 break;
2354 }
2355
2356 if (!b->vendor)
2357 return -1;
2358 if (dev > 0) {
2359
2360 dev--;
2361 return -1;
2362 }
2363 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2364 if (pci_enable_device(pdev)) {
2365 return -1;
2366 }
2367
2368#ifdef CONFIG_FB_MATROX_MULTIHEAD
2369 minfo = (struct matrox_fb_info*)kmalloc(sizeof(*minfo), GFP_KERNEL);
2370 if (!minfo)
2371 return -1;
2372 d = (struct display*)kmalloc(sizeof(*d), GFP_KERNEL);
2373 if (!d) {
2374 kfree(minfo);
2375 return -1;
2376 }
2377#else
2378 if (registered)
2379 return -1;
2380 minfo = &matroxfb_global_mxinfo;
2381 d = &global_disp;
2382#endif
2383 memset(MINFO, 0, sizeof(*MINFO));
2384 memset(d, 0, sizeof(*d));
2385
2386 ACCESS_FBINFO(pcidev) = pdev;
2387 ACCESS_FBINFO(dead) = 0;
2388 ACCESS_FBINFO(usecount) = 0;
2389 pci_set_drvdata(pdev, MINFO);
2390
2391 memcpy(ACCESS_FBINFO(fbcon.fontname), fontname, sizeof(ACCESS_FBINFO(fbcon.fontname)));
2392
2393 ACCESS_FBINFO(devflags.inverse) = inverse;
2394 ACCESS_FBINFO(devflags.memtype) = memtype;
2395 if (memtype != -1)
2396 noinit = 0;
2397 if (cmd & PCI_COMMAND_MEMORY) {
2398 ACCESS_FBINFO(devflags.novga) = novga;
2399 ACCESS_FBINFO(devflags.nobios) = nobios;
2400 ACCESS_FBINFO(devflags.noinit) = noinit;
2401
2402 novga = 1;
2403 nobios = 1;
2404 noinit = 0;
2405 } else {
2406 ACCESS_FBINFO(devflags.novga) = 1;
2407 ACCESS_FBINFO(devflags.nobios) = 1;
2408 ACCESS_FBINFO(devflags.noinit) = 0;
2409 }
2410
2411 ACCESS_FBINFO(devflags.nopciretry) = no_pci_retry;
2412 ACCESS_FBINFO(devflags.mga_24bpp_fix) = inv24;
2413 ACCESS_FBINFO(devflags.precise_width) = option_precise_width;
2414 ACCESS_FBINFO(devflags.hwcursor) = hwcursor;
2415 ACCESS_FBINFO(devflags.blink) = blink;
2416 ACCESS_FBINFO(devflags.sgram) = sgram;
2417 ACCESS_FBINFO(capable.cross4MB) = cross4MB;
2418
2419 ACCESS_FBINFO(fastfont.size) = fastfont;
2420
2421 ACCESS_FBINFO(cursor.state) = CM_ERASE;
2422 init_timer (&ACCESS_FBINFO(cursor.timer));
2423 ACCESS_FBINFO(cursor.timer.data) = (unsigned long)MINFO;
2424 spin_lock_init(&ACCESS_FBINFO(lock.DAC));
2425 spin_lock_init(&ACCESS_FBINFO(lock.accel));
2426 init_rwsem(&ACCESS_FBINFO(crtc2.lock));
2427 init_rwsem(&ACCESS_FBINFO(altout.lock));
2428 ACCESS_FBINFO(irq_flags) = 0;
2429 init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait));
2430 init_waitqueue_head(&ACCESS_FBINFO(crtc2.vsync.wait));
2431 ACCESS_FBINFO(crtc1.panpos) = -1;
2432
2433 err = initMatrox2(PMINFO d, b);
2434 if (!err) {
2435#ifndef CONFIG_FB_MATROX_MULTIHEAD
2436 registered = 1;
2437#endif
2438 matroxfb_register_device(MINFO);
2439 return 0;
2440 }
2441#ifdef CONFIG_FB_MATROX_MULTIHEAD
2442 kfree(d);
2443 kfree(minfo);
2444#endif
2445 return -1;
2446}
2447
2448static void pci_remove_matrox(struct pci_dev* pdev) {
2449 struct matrox_fb_info* minfo;
2450
2451 minfo = pci_get_drvdata(pdev);
2452 matroxfb_remove(PMINFO 1);
2453}
2454
2455static struct pci_device_id matroxfb_devices[] __devinitdata = {
2456#ifdef CONFIG_FB_MATROX_MILLENIUM
2457 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2458 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2459 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2460 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2461 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2462 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2463#endif
2464#ifdef CONFIG_FB_MATROX_MYSTIQUE
2465 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2466 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2467#endif
2468#ifdef CONFIG_FB_MATROX_G100
2469 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2470 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2471 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2472 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2473 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2474 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2475 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2476 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2477 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2478 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2479 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2480 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2481#endif
2482 {0, 0,
2483 0, 0, 0, 0, 0}
2484};
2485
2486MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2487
2488
2489static struct pci_driver matroxfb_driver = {
2490 name: "matroxfb",
2491 id_table: matroxfb_devices,
2492 probe: matroxfb_probe,
2493 remove: pci_remove_matrox,
2494};
2495
2496
2497
2498#define RSResolution(X) ((X) & 0x0F)
2499#define RS640x400 1
2500#define RS640x480 2
2501#define RS800x600 3
2502#define RS1024x768 4
2503#define RS1280x1024 5
2504#define RS1600x1200 6
2505#define RS768x576 7
2506#define RS960x720 8
2507#define RS1152x864 9
2508#define RS1408x1056 10
2509#define RS640x350 11
2510#define RS1056x344 12
2511#define RS1056x400 13
2512#define RS1056x480 14
2513#define RSNoxNo 15
2514
2515static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2516 { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2517 { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2518 { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2519 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2520 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2521 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2522 { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2523 { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2524 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2525 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2526 { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2527 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2528 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2529 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2530 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2531};
2532
2533#define RSCreate(X,Y) ((X) | ((Y) << 8))
2534static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2535
2536#ifdef FBCON_HAS_CFB8
2537 { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2538 { 0x101, RSCreate(RS640x480, RS8bpp ) },
2539 { 0x100, RSCreate(RS640x400, RS8bpp ) },
2540 { 0x180, RSCreate(RS768x576, RS8bpp ) },
2541 { 0x103, RSCreate(RS800x600, RS8bpp ) },
2542 { 0x188, RSCreate(RS960x720, RS8bpp ) },
2543 { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2544 { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2545 { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2546 { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2547 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2548#endif
2549#ifdef FBCON_HAS_CFB16
2550 { ~0, RSCreate(RSNoxNo, RS15bpp) },
2551 { 0x110, RSCreate(RS640x480, RS15bpp) },
2552 { 0x181, RSCreate(RS768x576, RS15bpp) },
2553 { 0x113, RSCreate(RS800x600, RS15bpp) },
2554 { 0x189, RSCreate(RS960x720, RS15bpp) },
2555 { 0x116, RSCreate(RS1024x768, RS15bpp) },
2556 { 0x191, RSCreate(RS1152x864, RS15bpp) },
2557 { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2558 { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2559 { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2560 { 0x111, RSCreate(RS640x480, RS16bpp) },
2561 { 0x182, RSCreate(RS768x576, RS16bpp) },
2562 { 0x114, RSCreate(RS800x600, RS16bpp) },
2563 { 0x18A, RSCreate(RS960x720, RS16bpp) },
2564 { 0x117, RSCreate(RS1024x768, RS16bpp) },
2565 { 0x192, RSCreate(RS1152x864, RS16bpp) },
2566 { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2567 { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2568 { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2569#endif
2570#ifdef FBCON_HAS_CFB24
2571 { ~0, RSCreate(RSNoxNo, RS24bpp) },
2572 { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2573 { 0x184, RSCreate(RS768x576, RS24bpp) },
2574 { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2575 { 0x18C, RSCreate(RS960x720, RS24bpp) },
2576 { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2577 { 0x194, RSCreate(RS1152x864, RS24bpp) },
2578 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2579 { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2580 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2581#endif
2582#ifdef FBCON_HAS_CFB32
2583 { ~0, RSCreate(RSNoxNo, RS32bpp) },
2584 { 0x112, RSCreate(RS640x480, RS32bpp) },
2585 { 0x183, RSCreate(RS768x576, RS32bpp) },
2586 { 0x115, RSCreate(RS800x600, RS32bpp) },
2587 { 0x18B, RSCreate(RS960x720, RS32bpp) },
2588 { 0x118, RSCreate(RS1024x768, RS32bpp) },
2589 { 0x193, RSCreate(RS1152x864, RS32bpp) },
2590 { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2591 { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2592 { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2593#endif
2594#ifdef FBCON_HAS_VGATEXT
2595 { ~0, RSCreate(RSNoxNo, RSText ) },
2596 { 0x002, RSCreate(RS640x400, RSText ) },
2597 { 0x003, RSCreate(RS640x400, RSText ) },
2598 { 0x007, RSCreate(RS640x400, RSText ) },
2599 { 0x1C0, RSCreate(RS640x400, RSText8) },
2600 { 0x108, RSCreate(RS640x480, RSText8) },
2601 { 0x109, RSCreate(RS1056x400, RSText ) },
2602 { 0x10A, RSCreate(RS1056x344, RSText8) },
2603 { 0x10B, RSCreate(RS1056x400, RSText8) },
2604 { 0x10C, RSCreate(RS1056x480, RSText8) },
2605#endif
2606#ifdef FBCON_HAS_CFB4
2607 { ~0, RSCreate(RSNoxNo, RS4bpp ) },
2608 { 0x010, RSCreate(RS640x350, RS4bpp ) },
2609 { 0x012, RSCreate(RS640x480, RS4bpp ) },
2610 { 0x102, RSCreate(RS800x600, RS4bpp ) },
2611 { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2612 { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2613#endif
2614 { 0, 0 }};
2615
2616static void __init matroxfb_init_params(void) {
2617
2618 if (fh < 1000)
2619 fh *= 1000;
2620
2621 if (maxclk < 1000) maxclk *= 1000;
2622 if (maxclk < 1000000) maxclk *= 1000;
2623
2624 if (vesa != ~0)
2625 vesa &= 0x1DFF;
2626
2627
2628 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2629 if (RSptr->vesa == vesa) break;
2630 }
2631 if (!RSptr->vesa) {
2632 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2633 RSptr = vesamap;
2634 }
2635 {
2636 int res = RSResolution(RSptr->info)-1;
2637 if (left == ~0)
2638 left = timmings[res].left;
2639 if (!xres)
2640 xres = timmings[res].xres;
2641 if (right == ~0)
2642 right = timmings[res].right;
2643 if (!hslen)
2644 hslen = timmings[res].hslen;
2645 if (upper == ~0)
2646 upper = timmings[res].upper;
2647 if (!yres)
2648 yres = timmings[res].yres;
2649 if (lower == ~0)
2650 lower = timmings[res].lower;
2651 if (!vslen)
2652 vslen = timmings[res].vslen;
2653 if (!(fv||fh||maxclk||pixclock))
2654 fv = timmings[res].vfreq;
2655 if (depth == -1)
2656 depth = RSDepth(RSptr->info);
2657 }
2658}
2659
2660static void __init matrox_init(void) {
2661 matroxfb_init_params();
2662 pci_register_driver(&matroxfb_driver);
2663 dev = -1;
2664}
2665
2666
2667
2668static void __exit matrox_done(void) {
2669 pci_unregister_driver(&matroxfb_driver);
2670}
2671
2672#ifndef MODULE
2673
2674
2675
2676int __init matroxfb_setup(char *options) {
2677 char *this_opt;
2678
2679 DBG("matroxfb_setup")
2680
2681 fontname[0] = '\0';
2682
2683 if (!options || !*options)
2684 return 0;
2685
2686 while ((this_opt = strsep(&options, ",")) != NULL) {
2687 if (!*this_opt) continue;
2688
2689 dprintk("matroxfb_setup: option %s\n", this_opt);
2690
2691 if (!strncmp(this_opt, "dev:", 4))
2692 dev = simple_strtoul(this_opt+4, NULL, 0);
2693 else if (!strncmp(this_opt, "depth:", 6)) {
2694 switch (simple_strtoul(this_opt+6, NULL, 0)) {
2695 case 0: depth = RSText; break;
2696 case 4: depth = RS4bpp; break;
2697 case 8: depth = RS8bpp; break;
2698 case 15:depth = RS15bpp; break;
2699 case 16:depth = RS16bpp; break;
2700 case 24:depth = RS24bpp; break;
2701 case 32:depth = RS32bpp; break;
2702 default:
2703 printk(KERN_ERR "matroxfb: unsupported color depth\n");
2704 }
2705 } else if (!strncmp(this_opt, "xres:", 5))
2706 xres = simple_strtoul(this_opt+5, NULL, 0);
2707 else if (!strncmp(this_opt, "yres:", 5))
2708 yres = simple_strtoul(this_opt+5, NULL, 0);
2709 else if (!strncmp(this_opt, "vslen:", 6))
2710 vslen = simple_strtoul(this_opt+6, NULL, 0);
2711 else if (!strncmp(this_opt, "hslen:", 6))
2712 hslen = simple_strtoul(this_opt+6, NULL, 0);
2713 else if (!strncmp(this_opt, "left:", 5))
2714 left = simple_strtoul(this_opt+5, NULL, 0);
2715 else if (!strncmp(this_opt, "right:", 6))
2716 right = simple_strtoul(this_opt+6, NULL, 0);
2717 else if (!strncmp(this_opt, "upper:", 6))
2718 upper = simple_strtoul(this_opt+6, NULL, 0);
2719 else if (!strncmp(this_opt, "lower:", 6))
2720 lower = simple_strtoul(this_opt+6, NULL, 0);
2721 else if (!strncmp(this_opt, "pixclock:", 9))
2722 pixclock = simple_strtoul(this_opt+9, NULL, 0);
2723 else if (!strncmp(this_opt, "sync:", 5))
2724 sync = simple_strtoul(this_opt+5, NULL, 0);
2725 else if (!strncmp(this_opt, "vesa:", 5))
2726 vesa = simple_strtoul(this_opt+5, NULL, 0);
2727 else if (!strncmp(this_opt, "font:", 5))
2728 strncpy(fontname, this_opt+5, sizeof(fontname)-1);
2729 else if (!strncmp(this_opt, "maxclk:", 7))
2730 maxclk = simple_strtoul(this_opt+7, NULL, 0);
2731 else if (!strncmp(this_opt, "fh:", 3))
2732 fh = simple_strtoul(this_opt+3, NULL, 0);
2733 else if (!strncmp(this_opt, "fv:", 3))
2734 fv = simple_strtoul(this_opt+3, NULL, 0);
2735 else if (!strncmp(this_opt, "mem:", 4))
2736 mem = simple_strtoul(this_opt+4, NULL, 0);
2737 else if (!strncmp(this_opt, "mode:", 5))
2738 strncpy(videomode, this_opt+5, sizeof(videomode)-1);
2739 else if (!strncmp(this_opt, "dfp:", 4)) {
2740 dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2741 dfp = 1;
2742 }
2743#ifdef CONFIG_PPC
2744 else if (!strncmp(this_opt, "vmode:", 6)) {
2745 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2746 if (vmode > 0 && vmode <= VMODE_MAX)
2747 default_vmode = vmode;
2748 } else if (!strncmp(this_opt, "cmode:", 6)) {
2749 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2750 switch (cmode) {
2751 case 0:
2752 case 8:
2753 default_cmode = CMODE_8;
2754 break;
2755 case 15:
2756 case 16:
2757 default_cmode = CMODE_16;
2758 break;
2759 case 24:
2760 case 32:
2761 default_cmode = CMODE_32;
2762 break;
2763 }
2764 }
2765#endif
2766 else if (!strncmp(this_opt, "fastfont:", 9))
2767 fastfont = simple_strtoul(this_opt+9, NULL, 0);
2768 else if (!strcmp(this_opt, "nofastfont"))
2769 fastfont = 0;
2770 else if (!strcmp(this_opt, "disabled"))
2771 disabled = 1;
2772 else if (!strcmp(this_opt, "enabled"))
2773 disabled = 0;
2774 else if (!strcmp(this_opt, "sgram"))
2775 sgram = 1;
2776 else if (!strcmp(this_opt, "sdram"))
2777 sgram = 0;
2778 else if (!strncmp(this_opt, "memtype:", 8))
2779 memtype = simple_strtoul(this_opt+8, NULL, 0);
2780 else {
2781 int value = 1;
2782
2783 if (!strncmp(this_opt, "no", 2)) {
2784 value = 0;
2785 this_opt += 2;
2786 }
2787 if (! strcmp(this_opt, "inverse"))
2788 inverse = value;
2789 else if (!strcmp(this_opt, "accel"))
2790 noaccel = !value;
2791 else if (!strcmp(this_opt, "pan"))
2792 nopan = !value;
2793 else if (!strcmp(this_opt, "pciretry"))
2794 no_pci_retry = !value;
2795 else if (!strcmp(this_opt, "vga"))
2796 novga = !value;
2797 else if (!strcmp(this_opt, "bios"))
2798 nobios = !value;
2799 else if (!strcmp(this_opt, "init"))
2800 noinit = !value;
2801#ifdef CONFIG_MTRR
2802 else if (!strcmp(this_opt, "mtrr"))
2803 mtrr = value;
2804#endif
2805 else if (!strcmp(this_opt, "inv24"))
2806 inv24 = value;
2807 else if (!strcmp(this_opt, "cross4MB"))
2808 cross4MB = value;
2809 else if (!strcmp(this_opt, "hwcursor"))
2810 hwcursor = value;
2811 else if (!strcmp(this_opt, "blink"))
2812 blink = value;
2813 else if (!strcmp(this_opt, "grayscale"))
2814 grayscale = value;
2815 else if (!strcmp(this_opt, "dfp"))
2816 dfp = value;
2817 else {
2818 strncpy(videomode, this_opt, sizeof(videomode)-1);
2819 }
2820 }
2821 }
2822 return 0;
2823}
2824
2825static int __initdata initialized = 0;
2826
2827int __init matroxfb_init(void)
2828{
2829 DBG("matroxfb_init")
2830
2831 if (disabled)
2832 return -ENXIO;
2833 if (!initialized) {
2834 initialized = 1;
2835 matrox_init();
2836 }
2837 hotplug = 1;
2838
2839 return 0;
2840}
2841
2842#else
2843
2844
2845
2846MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2847MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2848MODULE_LICENSE("GPL");
2849
2850MODULE_PARM(mem, "i");
2851MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2852MODULE_PARM(disabled, "i");
2853MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2854MODULE_PARM(noaccel, "i");
2855MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2856MODULE_PARM(nopan, "i");
2857MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2858MODULE_PARM(no_pci_retry, "i");
2859MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2860MODULE_PARM(novga, "i");
2861MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2862MODULE_PARM(nobios, "i");
2863MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2864MODULE_PARM(noinit, "i");
2865MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2866MODULE_PARM(memtype, "i");
2867MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
2868MODULE_PARM(mtrr, "i");
2869MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2870MODULE_PARM(sgram, "i");
2871MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2872MODULE_PARM(inv24, "i");
2873MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2874MODULE_PARM(inverse, "i");
2875MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2876#ifdef CONFIG_FB_MATROX_MULTIHEAD
2877MODULE_PARM(dev, "i");
2878MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2879#else
2880MODULE_PARM(dev, "i");
2881MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=first working)");
2882#endif
2883MODULE_PARM(vesa, "i");
2884MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2885MODULE_PARM(xres, "i");
2886MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2887MODULE_PARM(yres, "i");
2888MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2889MODULE_PARM(upper, "i");
2890MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2891MODULE_PARM(lower, "i");
2892MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2893MODULE_PARM(vslen, "i");
2894MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2895MODULE_PARM(left, "i");
2896MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2897MODULE_PARM(right, "i");
2898MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2899MODULE_PARM(hslen, "i");
2900MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2901MODULE_PARM(pixclock, "i");
2902MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2903MODULE_PARM(sync, "i");
2904MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2905MODULE_PARM(depth, "i");
2906MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2907MODULE_PARM(maxclk, "i");
2908MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2909MODULE_PARM(fh, "i");
2910MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2911MODULE_PARM(fv, "i");
2912MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2913"You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"\n");
2914MODULE_PARM(hwcursor, "i");
2915MODULE_PARM_DESC(hwcursor, "Enables hardware cursor (0 or 1) (default=0)");
2916MODULE_PARM(blink, "i");
2917MODULE_PARM_DESC(blink, "Enables hardware cursor blinking (0 or 1) (default=1)");
2918MODULE_PARM(fastfont, "i");
2919MODULE_PARM_DESC(fastfont, "Specifies, how much memory should be used for font data (0, 1024-65536 are reasonable) (default=0)");
2920MODULE_PARM(grayscale, "i");
2921MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2922MODULE_PARM(cross4MB, "i");
2923MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2924MODULE_PARM(dfp, "i");
2925MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2926MODULE_PARM(dfp_type, "i");
2927MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2928#ifdef CONFIG_PPC
2929MODULE_PARM(vmode, "i");
2930MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2931MODULE_PARM(cmode, "i");
2932MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2933#endif
2934
2935int __init init_module(void){
2936
2937 DBG("init_module")
2938
2939 if (disabled)
2940 return -ENXIO;
2941
2942 if (depth == 0)
2943 depth = RSText;
2944 else if (depth == 4)
2945 depth = RS4bpp;
2946 else if (depth == 8)
2947 depth = RS8bpp;
2948 else if (depth == 15)
2949 depth = RS15bpp;
2950 else if (depth == 16)
2951 depth = RS16bpp;
2952 else if (depth == 24)
2953 depth = RS24bpp;
2954 else if (depth == 32)
2955 depth = RS32bpp;
2956 else if (depth != -1) {
2957 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2958 depth = -1;
2959 }
2960 matrox_init();
2961
2962 return 0;
2963}
2964#endif
2965
2966module_exit(matrox_done);
2967EXPORT_SYMBOL(matroxfb_register_driver);
2968EXPORT_SYMBOL(matroxfb_unregister_driver);
2969EXPORT_SYMBOL(matroxfb_switch);
2970EXPORT_SYMBOL(matroxfb_wait_for_sync);
2971EXPORT_SYMBOL(matroxfb_enable_irq);
2972
2973
2974
2975
2976
2977
2978
2979
2980
