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9#include <linux/config.h>
10#include <linux/errno.h>
11#include <linux/fs.h>
12#include <linux/major.h>
13#include <asm/segment.h>
14#include <asm/io.h>
15#include <linux/delay.h>
16#include <linux/kernel.h>
17#include <linux/signal.h>
18#include <linux/slab.h>
19#include <linux/mm.h>
20#include <linux/mman.h>
21#include <linux/ioport.h>
22#include <linux/timer.h>
23#include <linux/wait.h>
24#include <linux/isdnif.h>
25#include <linux/tty.h>
26#include <linux/serial_reg.h>
27#include <linux/netdevice.h>
28
29#define ERROR_STATISTIC
30
31#define REQUEST 0
32#define CONFIRM 1
33#define INDICATION 2
34#define RESPONSE 3
35
36#define HW_ENABLE 0x0000
37#define HW_RESET 0x0004
38#define HW_POWERUP 0x0008
39#define HW_ACTIVATE 0x0010
40#define HW_DEACTIVATE 0x0018
41
42#define HW_INFO1 0x0010
43#define HW_INFO2 0x0020
44#define HW_INFO3 0x0030
45#define HW_INFO4 0x0040
46#define HW_INFO4_P8 0x0040
47#define HW_INFO4_P10 0x0048
48#define HW_RSYNC 0x0060
49#define HW_TESTLOOP 0x0070
50#define CARD_RESET 0x00F0
51#define CARD_INIT 0x00F2
52#define CARD_RELEASE 0x00F3
53#define CARD_TEST 0x00F4
54#define CARD_AUX_IND 0x00F5
55
56#define PH_ACTIVATE 0x0100
57#define PH_DEACTIVATE 0x0110
58#define PH_DATA 0x0120
59#define PH_PULL 0x0130
60#define PH_TESTLOOP 0x0140
61#define PH_PAUSE 0x0150
62#define MPH_ACTIVATE 0x0180
63#define MPH_DEACTIVATE 0x0190
64#define MPH_INFORMATION 0x01A0
65
66#define DL_ESTABLISH 0x0200
67#define DL_RELEASE 0x0210
68#define DL_DATA 0x0220
69#define DL_FLUSH 0x0224
70#define DL_UNIT_DATA 0x0230
71
72#define MDL_BC_RELEASE 0x0278
73#define MDL_BC_ASSIGN 0x027C
74#define MDL_ASSIGN 0x0280
75#define MDL_REMOVE 0x0284
76#define MDL_ERROR 0x0288
77#define MDL_INFO_SETUP 0x02E0
78#define MDL_INFO_CONN 0x02E4
79#define MDL_INFO_REL 0x02E8
80
81#define CC_SETUP 0x0300
82#define CC_RESUME 0x0304
83#define CC_MORE_INFO 0x0310
84#define CC_IGNORE 0x0320
85#define CC_REJECT 0x0324
86#define CC_SETUP_COMPL 0x0330
87#define CC_PROCEEDING 0x0340
88#define CC_ALERTING 0x0344
89#define CC_PROGRESS 0x0348
90#define CC_CONNECT 0x0350
91#define CC_CHARGE 0x0354
92#define CC_NOTIFY 0x0358
93#define CC_DISCONNECT 0x0360
94#define CC_RELEASE 0x0368
95#define CC_SUSPEND 0x0370
96#define CC_PROCEED_SEND 0x0374
97#define CC_REDIR 0x0378
98#define CC_T302 0x0382
99#define CC_T303 0x0383
100#define CC_T304 0x0384
101#define CC_T305 0x0385
102#define CC_T308_1 0x0388
103#define CC_T308_2 0x038A
104#define CC_T309 0x0309
105#define CC_T310 0x0390
106#define CC_T313 0x0393
107#define CC_T318 0x0398
108#define CC_T319 0x0399
109#define CC_TSPID 0x03A0
110#define CC_NOSETUP_RSP 0x03E0
111#define CC_SETUP_ERR 0x03E1
112#define CC_SUSPEND_ERR 0x03E2
113#define CC_RESUME_ERR 0x03E3
114#define CC_CONNECT_ERR 0x03E4
115#define CC_RELEASE_ERR 0x03E5
116#define CC_RESTART 0x03F4
117#define CC_TDSS1_IO 0x13F4
118#define CC_TNI1_IO 0x13F5
119
120
121#define MAX_WAITING_CALLS 2
122
123
124#ifdef __KERNEL__
125
126
127#ifdef CONFIG_HISAX_EURO
128 #define l3dss1_process
129 #include "l3dss1.h"
130 #undef l3dss1_process
131#endif
132
133#ifdef CONFIG_HISAX_NI1
134 #define l3ni1_process
135 #include "l3ni1.h"
136 #undef l3ni1_process
137#endif
138
139#define MAX_DFRAME_LEN 260
140#define MAX_DFRAME_LEN_L1 300
141#define HSCX_BUFMAX 4096
142#define MAX_DATA_SIZE (HSCX_BUFMAX - 4)
143#define MAX_DATA_MEM (HSCX_BUFMAX + 64)
144#define RAW_BUFMAX (((HSCX_BUFMAX*6)/5) + 5)
145#define MAX_HEADER_LEN 4
146#define MAX_WINDOW 8
147#define MAX_MON_FRAME 32
148#define MAX_DLOG_SPACE 2048
149#define MAX_BLOG_SPACE 256
150
151
152#define I4L_IRQ_FLAG 0
153
154
155
156
157
158struct FsmInst;
159
160typedef void (* FSMFNPTR)(struct FsmInst *, int, void *);
161
162struct Fsm {
163 FSMFNPTR *jumpmatrix;
164 int state_count, event_count;
165 char **strEvent, **strState;
166};
167
168struct FsmInst {
169 struct Fsm *fsm;
170 int state;
171 int debug;
172 void *userdata;
173 int userint;
174 void (*printdebug) (struct FsmInst *, char *, ...);
175};
176
177struct FsmNode {
178 int state, event;
179 void (*routine) (struct FsmInst *, int, void *);
180};
181
182struct FsmTimer {
183 struct FsmInst *fi;
184 struct timer_list tl;
185 int event;
186 void *arg;
187};
188
189struct L3Timer {
190 struct l3_process *pc;
191 struct timer_list tl;
192 int event;
193};
194
195#define FLG_L1_ACTIVATING 1
196#define FLG_L1_ACTIVATED 2
197#define FLG_L1_DEACTTIMER 3
198#define FLG_L1_ACTTIMER 4
199#define FLG_L1_T3RUN 5
200#define FLG_L1_PULL_REQ 6
201#define FLG_L1_UINT 7
202
203struct Layer1 {
204 void *hardware;
205 struct BCState *bcs;
206 struct PStack **stlistp;
207 long Flags;
208 struct FsmInst l1m;
209 struct FsmTimer timer;
210 void (*l1l2) (struct PStack *, int, void *);
211 void (*l1hw) (struct PStack *, int, void *);
212 void (*l1tei) (struct PStack *, int, void *);
213 int mode, bc;
214 int delay;
215};
216
217#define GROUP_TEI 127
218#define TEI_SAPI 63
219#define CTRL_SAPI 0
220#define PACKET_NOACK 250
221
222
223
224#define FLG_LAPB 0
225#define FLG_LAPD 1
226#define FLG_ORIG 2
227#define FLG_MOD128 3
228#define FLG_PEND_REL 4
229#define FLG_L3_INIT 5
230#define FLG_T200_RUN 6
231#define FLG_ACK_PEND 7
232#define FLG_REJEXC 8
233#define FLG_OWN_BUSY 9
234#define FLG_PEER_BUSY 10
235#define FLG_DCHAN_BUSY 11
236#define FLG_L1_ACTIV 12
237#define FLG_ESTAB_PEND 13
238#define FLG_PTP 14
239#define FLG_FIXED_TEI 15
240#define FLG_L2BLOCK 16
241
242struct Layer2 {
243 int tei;
244 int sap;
245 int maxlen;
246 unsigned long flag;
247 unsigned int vs, va, vr;
248 int rc;
249 unsigned int window;
250 unsigned int sow;
251 struct sk_buff *windowar[MAX_WINDOW];
252 struct sk_buff_head i_queue;
253 struct sk_buff_head ui_queue;
254 void (*l2l1) (struct PStack *, int, void *);
255 void (*l2l3) (struct PStack *, int, void *);
256 void (*l2tei) (struct PStack *, int, void *);
257 struct FsmInst l2m;
258 struct FsmTimer t200, t203;
259 int T200, N200, T203;
260 int debug;
261 char debug_id[16];
262};
263
264struct Layer3 {
265 void (*l3l4) (struct PStack *, int, void *);
266 void (*l3ml3) (struct PStack *, int, void *);
267 void (*l3l2) (struct PStack *, int, void *);
268 struct FsmInst l3m;
269 struct FsmTimer l3m_timer;
270 struct sk_buff_head squeue;
271 struct l3_process *proc;
272 struct l3_process *global;
273 int N303;
274 int debug;
275 char debug_id[8];
276};
277
278struct LLInterface {
279 void (*l4l3) (struct PStack *, int, void *);
280 int (*l4l3_proto) (struct PStack *, isdn_ctrl *);
281 void *userdata;
282 void (*l1writewakeup) (struct PStack *, int);
283 void (*l2writewakeup) (struct PStack *, int);
284};
285
286
287struct Management {
288 int ri;
289 struct FsmInst tei_m;
290 struct FsmTimer t202;
291 int T202, N202, debug;
292 void (*layer) (struct PStack *, int, void *);
293};
294
295#define NO_CAUSE 254
296
297struct Param {
298 u_char cause;
299 u_char loc;
300 u_char diag[6];
301 int bchannel;
302 int chargeinfo;
303 int spv;
304 setup_parm setup;
305 u_char moderate;
306};
307
308
309struct PStack {
310 struct PStack *next;
311 struct Layer1 l1;
312 struct Layer2 l2;
313 struct Layer3 l3;
314 struct LLInterface lli;
315 struct Management ma;
316 int protocol;
317
318
319 union
320 { u_char uuuu;
321#ifdef CONFIG_HISAX_EURO
322 dss1_stk_priv dss1;
323#endif
324#ifdef CONFIG_HISAX_NI1
325 ni1_stk_priv ni1;
326#endif
327 } prot;
328};
329
330struct l3_process {
331 int callref;
332 int state;
333 struct L3Timer timer;
334 int N303;
335 int debug;
336 struct Param para;
337 struct Channel *chan;
338 struct PStack *st;
339 struct l3_process *next;
340 ulong redir_result;
341
342
343 union
344 { u_char uuuu;
345#ifdef CONFIG_HISAX_EURO
346 dss1_proc_priv dss1;
347#endif
348#ifdef CONFIG_HISAX_NI1
349 ni1_proc_priv ni1;
350#endif
351 } prot;
352};
353
354struct hscx_hw {
355 int hscx;
356 int rcvidx;
357 int count;
358 u_char *rcvbuf;
359 u_char tsaxr0;
360 u_char tsaxr1;
361};
362
363struct w6692B_hw {
364 int bchan;
365 int rcvidx;
366 int count;
367 u_char *rcvbuf;
368};
369
370struct isar_reg {
371 unsigned long Flags;
372 volatile u_char bstat;
373 volatile u_char iis;
374 volatile u_char cmsb;
375 volatile u_char clsb;
376 volatile u_char par[8];
377};
378
379struct isar_hw {
380 int dpath;
381 int rcvidx;
382 int txcnt;
383 int mml;
384 u_char state;
385 u_char cmd;
386 u_char mod;
387 u_char newcmd;
388 u_char newmod;
389 char try_mod;
390 struct timer_list ftimer;
391 u_char *rcvbuf;
392 u_char conmsg[16];
393 struct isar_reg *reg;
394};
395
396struct hdlc_stat_reg {
397#ifdef __BIG_ENDIAN
398 u_char fill __attribute__((packed));
399 u_char mode __attribute__((packed));
400 u_char xml __attribute__((packed));
401 u_char cmd __attribute__((packed));
402#else
403 u_char cmd __attribute__((packed));
404 u_char xml __attribute__((packed));
405 u_char mode __attribute__((packed));
406 u_char fill __attribute__((packed));
407#endif
408};
409
410struct hdlc_hw {
411 union {
412 u_int ctrl;
413 struct hdlc_stat_reg sr;
414 } ctrl;
415 u_int stat;
416 int rcvidx;
417 int count;
418 u_char *rcvbuf;
419};
420
421struct hfcB_hw {
422 unsigned int *send;
423 int f1;
424 int f2;
425};
426
427struct tiger_hw {
428 u_int *send;
429 u_int *s_irq;
430 u_int *s_end;
431 u_int *sendp;
432 u_int *rec;
433 int free;
434 u_char *rcvbuf;
435 u_char *sendbuf;
436 u_char *sp;
437 int sendcnt;
438 u_int s_tot;
439 u_int r_bitcnt;
440 u_int r_tot;
441 u_int r_err;
442 u_int r_fcs;
443 u_char r_state;
444 u_char r_one;
445 u_char r_val;
446 u_char s_state;
447};
448
449struct amd7930_hw {
450 u_char *tx_buff;
451 u_char *rv_buff;
452 int rv_buff_in;
453 int rv_buff_out;
454 struct sk_buff *rv_skb;
455 struct hdlc_state *hdlc_state;
456 struct tq_struct tq_rcv;
457 struct tq_struct tq_xmt;
458};
459
460#define BC_FLG_INIT 1
461#define BC_FLG_ACTIV 2
462#define BC_FLG_BUSY 3
463#define BC_FLG_NOFRAME 4
464#define BC_FLG_HALF 5
465#define BC_FLG_EMPTY 6
466#define BC_FLG_ORIG 7
467#define BC_FLG_DLEETX 8
468#define BC_FLG_LASTDLE 9
469#define BC_FLG_FIRST 10
470#define BC_FLG_LASTDATA 11
471#define BC_FLG_NMD_DATA 12
472#define BC_FLG_FTI_RUN 13
473#define BC_FLG_LL_OK 14
474#define BC_FLG_LL_CONN 15
475#define BC_FLG_FTI_FTS 16
476#define BC_FLG_FRH_WAIT 17
477
478#define L1_MODE_NULL 0
479#define L1_MODE_TRANS 1
480#define L1_MODE_HDLC 2
481#define L1_MODE_EXTRN 3
482#define L1_MODE_HDLC_56K 4
483#define L1_MODE_MODEM 7
484#define L1_MODE_V32 8
485#define L1_MODE_FAX 9
486
487struct BCState {
488 int channel;
489 int mode;
490 long Flag;
491 struct IsdnCardState *cs;
492 int tx_cnt;
493 struct sk_buff *tx_skb;
494 struct sk_buff_head rqueue;
495 struct sk_buff_head squeue;
496 struct PStack *st;
497 u_char *blog;
498 u_char *conmsg;
499 struct timer_list transbusy;
500 struct tq_struct tqueue;
501 int event;
502 int (*BC_SetStack) (struct PStack *, struct BCState *);
503 void (*BC_Close) (struct BCState *);
504#ifdef ERROR_STATISTIC
505 int err_crc;
506 int err_tx;
507 int err_rdo;
508 int err_inv;
509#endif
510 union {
511 struct hscx_hw hscx;
512 struct hdlc_hw hdlc;
513 struct isar_hw isar;
514 struct hfcB_hw hfc;
515 struct tiger_hw tiger;
516 struct amd7930_hw amd7930;
517 struct w6692B_hw w6692;
518 struct hisax_b_if *b_if;
519 } hw;
520};
521
522struct Channel {
523 struct PStack *b_st, *d_st;
524 struct IsdnCardState *cs;
525 struct BCState *bcs;
526 int chan;
527 int incoming;
528 struct FsmInst fi;
529 struct FsmTimer drel_timer, dial_timer;
530 int debug;
531 int l2_protocol, l2_active_protocol;
532 int l3_protocol;
533 int data_open;
534 struct l3_process *proc;
535 setup_parm setup;
536 long Flags;
537
538 int leased;
539};
540
541struct elsa_hw {
542 unsigned long base;
543 unsigned int cfg;
544 unsigned int ctrl;
545 unsigned int ale;
546 unsigned int isac;
547 unsigned int itac;
548 unsigned int hscx;
549 unsigned int trig;
550 unsigned int timer;
551 unsigned int counter;
552 unsigned int status;
553 struct timer_list tl;
554 unsigned int MFlag;
555 struct BCState *bcs;
556 u_char *transbuf;
557 u_char *rcvbuf;
558 unsigned int transp;
559 unsigned int rcvp;
560 unsigned int transcnt;
561 unsigned int rcvcnt;
562 u_char IER;
563 u_char FCR;
564 u_char LCR;
565 u_char MCR;
566 u_char ctrl_reg;
567};
568
569struct teles3_hw {
570 unsigned int cfg_reg;
571 signed int isac;
572 signed int hscx[2];
573 signed int isacfifo;
574 signed int hscxfifo[2];
575};
576
577struct teles0_hw {
578 unsigned int cfg_reg;
579 unsigned long membase;
580 unsigned long phymem;
581};
582
583struct avm_hw {
584 unsigned int cfg_reg;
585 unsigned int isac;
586 unsigned int hscx[2];
587 unsigned int isacfifo;
588 unsigned int hscxfifo[2];
589 unsigned int counter;
590};
591
592struct ix1_hw {
593 unsigned int cfg_reg;
594 unsigned int isac_ale;
595 unsigned int isac;
596 unsigned int hscx_ale;
597 unsigned int hscx;
598};
599
600struct diva_hw {
601 unsigned long cfg_reg;
602 unsigned long pci_cfg;
603 unsigned int ctrl;
604 unsigned long isac_adr;
605 unsigned int isac;
606 unsigned long hscx_adr;
607 unsigned int hscx;
608 unsigned int status;
609 struct timer_list tl;
610 u_char ctrl_reg;
611};
612
613struct asus_hw {
614 unsigned int cfg_reg;
615 unsigned int adr;
616 unsigned int isac;
617 unsigned int hscx;
618 unsigned int u7;
619 unsigned int pots;
620};
621
622
623struct hfc_hw {
624 unsigned int addr;
625 unsigned int fifosize;
626 unsigned char cirm;
627 unsigned char ctmt;
628 unsigned char cip;
629 u_char isac_spcr;
630 struct timer_list timer;
631};
632
633struct sedl_hw {
634 unsigned int cfg_reg;
635 unsigned int adr;
636 unsigned int isac;
637 unsigned int hscx;
638 unsigned int reset_on;
639 unsigned int reset_off;
640 struct isar_reg isar;
641 unsigned int chip;
642 unsigned int bus;
643};
644
645struct spt_hw {
646 unsigned int cfg_reg;
647 unsigned int isac;
648 unsigned int hscx[2];
649 unsigned char res_irq;
650};
651
652struct mic_hw {
653 unsigned int cfg_reg;
654 unsigned int adr;
655 unsigned int isac;
656 unsigned int hscx;
657};
658
659struct njet_hw {
660 unsigned long base;
661 unsigned int isac;
662 unsigned int auxa;
663 unsigned char auxd;
664 unsigned char dmactrl;
665 unsigned char ctrl_reg;
666 unsigned char irqmask0;
667 unsigned char irqstat0;
668 unsigned char last_is0;
669};
670
671struct hfcPCI_hw {
672 unsigned char cirm;
673 unsigned char ctmt;
674 unsigned char conn;
675 unsigned char mst_m;
676 unsigned char int_m1;
677 unsigned char int_m2;
678 unsigned char int_s1;
679 unsigned char sctrl;
680 unsigned char sctrl_r;
681 unsigned char sctrl_e;
682 unsigned char trm;
683 unsigned char stat;
684 unsigned char fifo;
685 unsigned char fifo_en;
686 unsigned char bswapped;
687 unsigned char nt_mode;
688 int nt_timer;
689 unsigned char pci_bus;
690 unsigned char pci_device_fn;
691 unsigned char *pci_io;
692 void *share_start;
693 void *fifos;
694 int last_bfifo_cnt[2];
695 struct timer_list timer;
696};
697
698struct hfcSX_hw {
699 unsigned long base;
700 unsigned char cirm;
701 unsigned char ctmt;
702 unsigned char conn;
703 unsigned char mst_m;
704 unsigned char int_m1;
705 unsigned char int_m2;
706 unsigned char int_s1;
707 unsigned char sctrl;
708 unsigned char sctrl_r;
709 unsigned char sctrl_e;
710 unsigned char trm;
711 unsigned char stat;
712 unsigned char fifo;
713 unsigned char bswapped;
714 unsigned char nt_mode;
715 unsigned char chip;
716 int b_fifo_size;
717 unsigned char last_fifo;
718 void *extra;
719 int nt_timer;
720 struct timer_list timer;
721};
722
723struct hfcD_hw {
724 unsigned int addr;
725 unsigned int bfifosize;
726 unsigned int dfifosize;
727 unsigned char cirm;
728 unsigned char ctmt;
729 unsigned char cip;
730 unsigned char conn;
731 unsigned char mst_m;
732 unsigned char int_m1;
733 unsigned char int_m2;
734 unsigned char int_s1;
735 unsigned char sctrl;
736 unsigned char stat;
737 unsigned char fifo;
738 unsigned char f1;
739 unsigned char f2;
740 unsigned int *send;
741 struct timer_list timer;
742};
743
744struct isurf_hw {
745 unsigned int reset;
746 unsigned long phymem;
747 unsigned long isac;
748 unsigned long isar;
749 struct isar_reg isar_r;
750};
751
752struct saphir_hw {
753 unsigned int cfg_reg;
754 unsigned int ale;
755 unsigned int isac;
756 unsigned int hscx;
757 struct timer_list timer;
758};
759
760struct bkm_hw {
761 unsigned long base;
762
763 unsigned long isac_adr;
764 unsigned int isac_ale;
765 unsigned long jade_adr;
766 unsigned int jade_ale;
767
768 unsigned long plx_adr;
769 unsigned long data_adr;
770};
771
772struct gazel_hw {
773 unsigned int cfg_reg;
774 unsigned int pciaddr[2];
775 signed int ipac;
776 signed int isac;
777 signed int hscx[2];
778 signed int isacfifo;
779 signed int hscxfifo[2];
780 unsigned char timeslot;
781 unsigned char iom2;
782};
783
784struct w6692_hw {
785 unsigned int iobase;
786 struct timer_list timer;
787};
788
789#ifdef CONFIG_HISAX_TESTEMU
790struct te_hw {
791 unsigned char *sfifo;
792 unsigned char *sfifo_w;
793 unsigned char *sfifo_r;
794 unsigned char *sfifo_e;
795 int sfifo_cnt;
796 unsigned int stat;
797 wait_queue_head_t rwaitq;
798 wait_queue_head_t swaitq;
799};
800#endif
801
802struct arcofi_msg {
803 struct arcofi_msg *next;
804 u_char receive;
805 u_char len;
806 u_char msg[10];
807};
808
809struct isac_chip {
810 int ph_state;
811 u_char *mon_tx;
812 u_char *mon_rx;
813 int mon_txp;
814 int mon_txc;
815 int mon_rxp;
816 struct arcofi_msg *arcofi_list;
817 struct timer_list arcofitimer;
818 wait_queue_head_t arcofi_wait;
819 u_char arcofi_bc;
820 u_char arcofi_state;
821 u_char mocr;
822 u_char adf2;
823};
824
825struct hfcd_chip {
826 int ph_state;
827};
828
829struct hfcpci_chip {
830 int ph_state;
831};
832
833struct hfcsx_chip {
834 int ph_state;
835};
836
837struct w6692_chip {
838 int ph_state;
839};
840
841struct amd7930_chip {
842 u_char lmr1;
843 u_char ph_state;
844 u_char old_state;
845 u_char flg_t3;
846 unsigned int tx_xmtlen;
847 struct timer_list timer3;
848 void (*ph_command) (struct IsdnCardState *, u_char, char *);
849 void (*setIrqMask) (struct IsdnCardState *, u_char);
850};
851
852struct icc_chip {
853 int ph_state;
854 u_char *mon_tx;
855 u_char *mon_rx;
856 int mon_txp;
857 int mon_txc;
858 int mon_rxp;
859 struct arcofi_msg *arcofi_list;
860 struct timer_list arcofitimer;
861 wait_queue_head_t arcofi_wait;
862 u_char arcofi_bc;
863 u_char arcofi_state;
864 u_char mocr;
865 u_char adf2;
866};
867
868#define HW_IOM1 0
869#define HW_IPAC 1
870#define HW_ISAR 2
871#define HW_ARCOFI 3
872#define FLG_TWO_DCHAN 4
873#define FLG_L1_DBUSY 5
874#define FLG_DBUSY_TIMER 6
875#define FLG_LOCK_ATOMIC 7
876#define FLG_ARCOFI_TIMER 8
877#define FLG_ARCOFI_ERROR 9
878#define FLG_HW_L1_UINT 10
879
880struct IsdnCardState {
881 unsigned char typ;
882 unsigned char subtyp;
883 int protocol;
884 unsigned int irq;
885 unsigned long irq_flags;
886 long HW_Flags;
887 int *busy_flag;
888 int chanlimit;
889 int logecho;
890 union {
891 struct elsa_hw elsa;
892 struct teles0_hw teles0;
893 struct teles3_hw teles3;
894 struct avm_hw avm;
895 struct ix1_hw ix1;
896 struct diva_hw diva;
897 struct asus_hw asus;
898 struct hfc_hw hfc;
899 struct sedl_hw sedl;
900 struct spt_hw spt;
901 struct mic_hw mic;
902 struct njet_hw njet;
903 struct hfcD_hw hfcD;
904 struct hfcPCI_hw hfcpci;
905 struct hfcSX_hw hfcsx;
906 struct ix1_hw niccy;
907 struct isurf_hw isurf;
908 struct saphir_hw saphir;
909#ifdef CONFIG_HISAX_TESTEMU
910 struct te_hw te;
911#endif
912 struct bkm_hw ax;
913 struct gazel_hw gazel;
914 struct w6692_hw w6692;
915 struct hisax_d_if *hisax_d_if;
916 } hw;
917 int myid;
918 isdn_if iif;
919 u_char *status_buf;
920 u_char *status_read;
921 u_char *status_write;
922 u_char *status_end;
923 u_char (*readisac) (struct IsdnCardState *, u_char);
924 void (*writeisac) (struct IsdnCardState *, u_char, u_char);
925 void (*readisacfifo) (struct IsdnCardState *, u_char *, int);
926 void (*writeisacfifo) (struct IsdnCardState *, u_char *, int);
927 u_char (*BC_Read_Reg) (struct IsdnCardState *, int, u_char);
928 void (*BC_Write_Reg) (struct IsdnCardState *, int, u_char, u_char);
929 void (*BC_Send_Data) (struct BCState *);
930 int (*cardmsg) (struct IsdnCardState *, int, void *);
931 void (*setstack_d) (struct PStack *, struct IsdnCardState *);
932 void (*DC_Close) (struct IsdnCardState *);
933 void (*irq_func) (int, void *, struct pt_regs *);
934 int (*auxcmd) (struct IsdnCardState *, isdn_ctrl *);
935 struct Channel channel[2+MAX_WAITING_CALLS];
936 struct BCState bcs[2+MAX_WAITING_CALLS];
937 struct PStack *stlist;
938 struct sk_buff_head rq, sq;
939 int cardnr;
940 char *dlog;
941 int debug;
942 union {
943 struct isac_chip isac;
944 struct hfcd_chip hfcd;
945 struct hfcpci_chip hfcpci;
946 struct hfcsx_chip hfcsx;
947 struct w6692_chip w6692;
948 struct amd7930_chip amd7930;
949 struct icc_chip icc;
950 } dc;
951 u_char *rcvbuf;
952 int rcvidx;
953 struct sk_buff *tx_skb;
954 int tx_cnt;
955 long event;
956 struct tq_struct tqueue;
957 struct timer_list dbusytimer;
958#ifdef ERROR_STATISTIC
959 int err_crc;
960 int err_tx;
961 int err_rx;
962#endif
963};
964
965#define MON0_RX 1
966#define MON1_RX 2
967#define MON0_TX 4
968#define MON1_TX 8
969
970#define ISDN_CTYPE_16_0 1
971#define ISDN_CTYPE_8_0 2
972#define ISDN_CTYPE_16_3 3
973#define ISDN_CTYPE_PNP 4
974#define ISDN_CTYPE_A1 5
975#define ISDN_CTYPE_ELSA 6
976#define ISDN_CTYPE_ELSA_PNP 7
977#define ISDN_CTYPE_TELESPCMCIA 8
978#define ISDN_CTYPE_IX1MICROR2 9
979#define ISDN_CTYPE_ELSA_PCMCIA 10
980#define ISDN_CTYPE_DIEHLDIVA 11
981#define ISDN_CTYPE_ASUSCOM 12
982#define ISDN_CTYPE_TELEINT 13
983#define ISDN_CTYPE_TELES3C 14
984#define ISDN_CTYPE_SEDLBAUER 15
985#define ISDN_CTYPE_SPORTSTER 16
986#define ISDN_CTYPE_MIC 17
987#define ISDN_CTYPE_ELSA_PCI 18
988#define ISDN_CTYPE_COMPAQ_ISA 19
989#define ISDN_CTYPE_NETJET_S 20
990#define ISDN_CTYPE_TELESPCI 21
991#define ISDN_CTYPE_SEDLBAUER_PCMCIA 22
992#define ISDN_CTYPE_AMD7930 23
993#define ISDN_CTYPE_NICCY 24
994#define ISDN_CTYPE_S0BOX 25
995#define ISDN_CTYPE_A1_PCMCIA 26
996#define ISDN_CTYPE_FRITZPCI 27
997#define ISDN_CTYPE_SEDLBAUER_FAX 28
998#define ISDN_CTYPE_ISURF 29
999#define ISDN_CTYPE_ACERP10 30
1000#define ISDN_CTYPE_HSTSAPHIR 31
1001#define ISDN_CTYPE_BKM_A4T 32
1002#define ISDN_CTYPE_SCT_QUADRO 33
1003#define ISDN_CTYPE_GAZEL 34
1004#define ISDN_CTYPE_HFC_PCI 35
1005#define ISDN_CTYPE_W6692 36
1006#define ISDN_CTYPE_HFC_SX 37
1007#define ISDN_CTYPE_NETJET_U 38
1008#define ISDN_CTYPE_HFC_SP_PCMCIA 39
1009#define ISDN_CTYPE_DYNAMIC 40
1010#define ISDN_CTYPE_ENTERNOW 41
1011#define ISDN_CTYPE_COUNT 41
1012
1013
1014#ifdef ISDN_CHIP_ISAC
1015#undef ISDN_CHIP_ISAC
1016#endif
1017
1018#ifdef CONFIG_HISAX_16_0
1019#define CARD_TELES0 1
1020#ifndef ISDN_CHIP_ISAC
1021#define ISDN_CHIP_ISAC 1
1022#endif
1023#else
1024#define CARD_TELES0 0
1025#endif
1026
1027#ifdef CONFIG_HISAX_16_3
1028#define CARD_TELES3 1
1029#ifndef ISDN_CHIP_ISAC
1030#define ISDN_CHIP_ISAC 1
1031#endif
1032#else
1033#define CARD_TELES3 0
1034#endif
1035
1036#ifdef CONFIG_HISAX_TELESPCI
1037#define CARD_TELESPCI 1
1038#ifndef ISDN_CHIP_ISAC
1039#define ISDN_CHIP_ISAC 1
1040#endif
1041#else
1042#define CARD_TELESPCI 0
1043#endif
1044
1045#ifdef CONFIG_HISAX_AVM_A1
1046#define CARD_AVM_A1 1
1047#ifndef ISDN_CHIP_ISAC
1048#define ISDN_CHIP_ISAC 1
1049#endif
1050#else
1051#define CARD_AVM_A1 0
1052#endif
1053
1054#ifdef CONFIG_HISAX_AVM_A1_PCMCIA
1055#define CARD_AVM_A1_PCMCIA 1
1056#ifndef ISDN_CHIP_ISAC
1057#define ISDN_CHIP_ISAC 1
1058#endif
1059#else
1060#define CARD_AVM_A1_PCMCIA 0
1061#endif
1062
1063#ifdef CONFIG_HISAX_FRITZPCI
1064#define CARD_FRITZPCI 1
1065#ifndef ISDN_CHIP_ISAC
1066#define ISDN_CHIP_ISAC 1
1067#endif
1068#else
1069#define CARD_FRITZPCI 0
1070#endif
1071
1072#ifdef CONFIG_HISAX_ELSA
1073#define CARD_ELSA 1
1074#ifndef ISDN_CHIP_ISAC
1075#define ISDN_CHIP_ISAC 1
1076#endif
1077#else
1078#define CARD_ELSA 0
1079#endif
1080
1081#ifdef CONFIG_HISAX_IX1MICROR2
1082#define CARD_IX1MICROR2 1
1083#ifndef ISDN_CHIP_ISAC
1084#define ISDN_CHIP_ISAC 1
1085#endif
1086#else
1087#define CARD_IX1MICROR2 0
1088#endif
1089
1090#ifdef CONFIG_HISAX_DIEHLDIVA
1091#define CARD_DIEHLDIVA 1
1092#ifndef ISDN_CHIP_ISAC
1093#define ISDN_CHIP_ISAC 1
1094#endif
1095#else
1096#define CARD_DIEHLDIVA 0
1097#endif
1098
1099#ifdef CONFIG_HISAX_ASUSCOM
1100#define CARD_ASUSCOM 1
1101#ifndef ISDN_CHIP_ISAC
1102#define ISDN_CHIP_ISAC 1
1103#endif
1104#else
1105#define CARD_ASUSCOM 0
1106#endif
1107
1108#ifdef CONFIG_HISAX_TELEINT
1109#define CARD_TELEINT 1
1110#ifndef ISDN_CHIP_ISAC
1111#define ISDN_CHIP_ISAC 1
1112#endif
1113#else
1114#define CARD_TELEINT 0
1115#endif
1116
1117#ifdef CONFIG_HISAX_SEDLBAUER
1118#define CARD_SEDLBAUER 1
1119#ifndef ISDN_CHIP_ISAC
1120#define ISDN_CHIP_ISAC 1
1121#endif
1122#else
1123#define CARD_SEDLBAUER 0
1124#endif
1125
1126#ifdef CONFIG_HISAX_SPORTSTER
1127#define CARD_SPORTSTER 1
1128#ifndef ISDN_CHIP_ISAC
1129#define ISDN_CHIP_ISAC 1
1130#endif
1131#else
1132#define CARD_SPORTSTER 0
1133#endif
1134
1135#ifdef CONFIG_HISAX_MIC
1136#define CARD_MIC 1
1137#ifndef ISDN_CHIP_ISAC
1138#define ISDN_CHIP_ISAC 1
1139#endif
1140#else
1141#define CARD_MIC 0
1142#endif
1143
1144#ifdef CONFIG_HISAX_NETJET
1145#define CARD_NETJET_S 1
1146#ifndef ISDN_CHIP_ISAC
1147#define ISDN_CHIP_ISAC 1
1148#endif
1149#else
1150#define CARD_NETJET_S 0
1151#endif
1152
1153#ifdef CONFIG_HISAX_HFCS
1154#define CARD_HFCS 1
1155#else
1156#define CARD_HFCS 0
1157#endif
1158
1159#ifdef CONFIG_HISAX_HFC_PCI
1160#define CARD_HFC_PCI 1
1161#else
1162#define CARD_HFC_PCI 0
1163#endif
1164
1165#ifdef CONFIG_HISAX_HFC_SX
1166#define CARD_HFC_SX 1
1167#else
1168#define CARD_HFC_SX 0
1169#endif
1170
1171#ifdef CONFIG_HISAX_AMD7930
1172#define CARD_AMD7930 1
1173#else
1174#define CARD_AMD7930 0
1175#endif
1176
1177#ifdef CONFIG_HISAX_NICCY
1178#define CARD_NICCY 1
1179#ifndef ISDN_CHIP_ISAC
1180#define ISDN_CHIP_ISAC 1
1181#endif
1182#else
1183#define CARD_NICCY 0
1184#endif
1185
1186#ifdef CONFIG_HISAX_ISURF
1187#define CARD_ISURF 1
1188#ifndef ISDN_CHIP_ISAC
1189#define ISDN_CHIP_ISAC 1
1190#endif
1191#else
1192#define CARD_ISURF 0
1193#endif
1194
1195#ifdef CONFIG_HISAX_S0BOX
1196#define CARD_S0BOX 1
1197#ifndef ISDN_CHIP_ISAC
1198#define ISDN_CHIP_ISAC 1
1199#endif
1200#else
1201#define CARD_S0BOX 0
1202#endif
1203
1204#ifdef CONFIG_HISAX_HSTSAPHIR
1205#define CARD_HSTSAPHIR 1
1206#ifndef ISDN_CHIP_ISAC
1207#define ISDN_CHIP_ISAC 1
1208#endif
1209#else
1210#define CARD_HSTSAPHIR 0
1211#endif
1212
1213#ifdef CONFIG_HISAX_TESTEMU
1214#define CARD_TESTEMU 1
1215#define ISDN_CTYPE_TESTEMU 99
1216#undef ISDN_CTYPE_COUNT
1217#define ISDN_CTYPE_COUNT ISDN_CTYPE_TESTEMU
1218#else
1219#define CARD_TESTEMU 0
1220#endif
1221
1222#ifdef CONFIG_HISAX_BKM_A4T
1223#define CARD_BKM_A4T 1
1224#ifndef ISDN_CHIP_ISAC
1225#define ISDN_CHIP_ISAC 1
1226#endif
1227#else
1228#define CARD_BKM_A4T 0
1229#endif
1230
1231#ifdef CONFIG_HISAX_SCT_QUADRO
1232#define CARD_SCT_QUADRO 1
1233#ifndef ISDN_CHIP_ISAC
1234#define ISDN_CHIP_ISAC 1
1235#endif
1236#else
1237#define CARD_SCT_QUADRO 0
1238#endif
1239
1240#ifdef CONFIG_HISAX_GAZEL
1241#define CARD_GAZEL 1
1242#ifndef ISDN_CHIP_ISAC
1243#define ISDN_CHIP_ISAC 1
1244#endif
1245#else
1246#define CARD_GAZEL 0
1247#endif
1248
1249#ifdef CONFIG_HISAX_W6692
1250#define CARD_W6692 1
1251#ifndef ISDN_CHIP_W6692
1252#define ISDN_CHIP_W6692 1
1253#endif
1254#else
1255#define CARD_W6692 0
1256#endif
1257
1258#ifdef CONFIG_HISAX_NETJET_U
1259#define CARD_NETJET_U 1
1260#ifndef ISDN_CHIP_ICC
1261#define ISDN_CHIP_ICC 1
1262#endif
1263#ifndef HISAX_UINTERFACE
1264#define HISAX_UINTERFACE 1
1265#endif
1266#else
1267#define CARD_NETJET_U 0
1268#endif
1269
1270#ifdef CONFIG_HISAX_ENTERNOW_PCI
1271#define CARD_FN_ENTERNOW_PCI 1
1272#endif
1273
1274#define TEI_PER_CARD 1
1275
1276
1277#define L1_DEB_WARN 0x01
1278#define L1_DEB_INTSTAT 0x02
1279#define L1_DEB_ISAC 0x04
1280#define L1_DEB_ISAC_FIFO 0x08
1281#define L1_DEB_HSCX 0x10
1282#define L1_DEB_HSCX_FIFO 0x20
1283#define L1_DEB_LAPD 0x40
1284#define L1_DEB_IPAC 0x80
1285#define L1_DEB_RECEIVE_FRAME 0x100
1286#define L1_DEB_MONITOR 0x200
1287#define DEB_DLOG_HEX 0x400
1288#define DEB_DLOG_VERBOSE 0x800
1289
1290#define L2FRAME_DEBUG
1291
1292#ifdef L2FRAME_DEBUG
1293extern void Logl2Frame(struct IsdnCardState *cs, struct sk_buff *skb, char *buf, int dir);
1294#endif
1295
1296struct IsdnCard {
1297 int typ;
1298 int protocol;
1299 unsigned long para[4];
1300 struct IsdnCardState *cs;
1301};
1302
1303void init_bcstate(struct IsdnCardState *cs, int bc);
1304
1305void setstack_HiSax(struct PStack *st, struct IsdnCardState *cs);
1306unsigned int random_ri(void);
1307void HiSax_addlist(struct IsdnCardState *sp, struct PStack *st);
1308void HiSax_rmlist(struct IsdnCardState *sp, struct PStack *st);
1309
1310void setstack_l1_B(struct PStack *st);
1311
1312void setstack_tei(struct PStack *st);
1313void setstack_manager(struct PStack *st);
1314
1315void setstack_isdnl2(struct PStack *st, char *debug_id);
1316void releasestack_isdnl2(struct PStack *st);
1317void setstack_transl2(struct PStack *st);
1318void releasestack_transl2(struct PStack *st);
1319
1320void setstack_l3dc(struct PStack *st, struct Channel *chanp);
1321void setstack_l3bc(struct PStack *st, struct Channel *chanp);
1322void releasestack_isdnl3(struct PStack *st);
1323
1324u_char *findie(u_char * p, int size, u_char ie, int wanted_set);
1325int getcallref(u_char * p);
1326int newcallref(void);
1327
1328int FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount);
1329void FsmFree(struct Fsm *fsm);
1330int FsmEvent(struct FsmInst *fi, int event, void *arg);
1331void FsmChangeState(struct FsmInst *fi, int newstate);
1332void FsmInitTimer(struct FsmInst *fi, struct FsmTimer *ft);
1333int FsmAddTimer(struct FsmTimer *ft, int millisec, int event,
1334 void *arg, int where);
1335void FsmRestartTimer(struct FsmTimer *ft, int millisec, int event,
1336 void *arg, int where);
1337void FsmDelTimer(struct FsmTimer *ft, int where);
1338int jiftime(char *s, long mark);
1339
1340int HiSax_command(isdn_ctrl * ic);
1341int HiSax_writebuf_skb(int id, int chan, int ack, struct sk_buff *skb);
1342void HiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, ...);
1343void VHiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, va_list args);
1344void HiSax_reportcard(int cardnr, int sel);
1345int QuickHex(char *txt, u_char * p, int cnt);
1346void LogFrame(struct IsdnCardState *cs, u_char * p, int size);
1347void dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir);
1348void iecpy(u_char * dest, u_char * iestart, int ieoffset);
1349#ifdef ISDN_CHIP_ISAC
1350void setstack_isac(struct PStack *st, struct IsdnCardState *cs);
1351#endif
1352#endif
1353
1354#define HZDELAY(jiffs) {int tout = jiffs; while (tout--) udelay(1000000/HZ);}
1355
1356int ll_run(struct IsdnCardState *cs, int addfeatures);
1357void ll_stop(struct IsdnCardState *cs);
1358int CallcNew(void);
1359void CallcFree(void);
1360int CallcNewChan(struct IsdnCardState *cs);
1361void CallcFreeChan(struct IsdnCardState *cs);
1362int Isdnl1New(void);
1363void Isdnl1Free(void);
1364int Isdnl2New(void);
1365void Isdnl2Free(void);
1366int Isdnl3New(void);
1367void Isdnl3Free(void);
1368void init_tei(struct IsdnCardState *cs, int protocol);
1369void release_tei(struct IsdnCardState *cs);
1370char *HiSax_getrev(const char *revision);
1371int TeiNew(void);
1372void TeiFree(void);
1373int certification_check(int output);
1374
