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29#include <linux/config.h>
30#include <linux/module.h>
31#include <linux/kernel.h>
32#include <linux/ioport.h>
33#include <linux/blkdev.h>
34#include <linux/pci.h>
35#include <linux/init.h>
36#include <linux/ide.h>
37#include <asm/io.h>
38
39#include "ide-timing.h"
40#include "via82cxxx.h"
41
42#define VIA_IDE_ENABLE 0x40
43#define VIA_IDE_CONFIG 0x41
44#define VIA_FIFO_CONFIG 0x43
45#define VIA_MISC_1 0x44
46#define VIA_MISC_2 0x45
47#define VIA_MISC_3 0x46
48#define VIA_DRIVE_TIMING 0x48
49#define VIA_8BIT_TIMING 0x4e
50#define VIA_ADDRESS_SETUP 0x4c
51#define VIA_UDMA_TIMING 0x50
52
53#define VIA_UDMA 0x007
54#define VIA_UDMA_NONE 0x000
55#define VIA_UDMA_33 0x001
56#define VIA_UDMA_66 0x002
57#define VIA_UDMA_100 0x003
58#define VIA_UDMA_133 0x004
59#define VIA_BAD_PREQ 0x010
60#define VIA_BAD_CLK66 0x020
61#define VIA_SET_FIFO 0x040
62#define VIA_NO_UNMASK 0x080
63#define VIA_BAD_ID 0x100
64#define VIA_BAD_AST 0x200
65
66
67
68
69
70static struct via_isa_bridge {
71 char *name;
72 u16 id;
73 u8 rev_min;
74 u8 rev_max;
75 u16 flags;
76} via_isa_bridges[] = {
77 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
78 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
79 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
80 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
81 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
82 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
83 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
84 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
85 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
86 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
87 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
88 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
89 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
90 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
91 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
92 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
93 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
94 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
95 { NULL }
96};
97
98static struct via_isa_bridge *via_config;
99static unsigned char via_enabled;
100static unsigned int via_80w;
101static unsigned int via_clock;
102static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" };
103
104
105
106
107
108#if defined(DISPLAY_VIA_TIMINGS) && defined(CONFIG_PROC_FS)
109
110#include <linux/stat.h>
111#include <linux/proc_fs.h>
112
113static u8 via_proc = 0;
114static unsigned long via_base;
115static struct pci_dev *bmide_dev, *isa_dev;
116
117static char *via_control3[] = { "No limit", "64", "128", "192" };
118
119#define via_print(format, arg...) p += sprintf(p, format "\n" , ## arg)
120#define via_print_drive(name, format, arg...)\
121 p += sprintf(p, name); for (i = 0; i < 4; i++) p += sprintf(p, format, ## arg); p += sprintf(p, "\n");
122
123
124
125
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132
133
134
135static int via_get_info(char *buffer, char **addr, off_t offset, int count)
136{
137 int speed[4], cycle[4], setup[4], active[4], recover[4], den[4],
138 uen[4], udma[4], umul[4], active8b[4], recover8b[4];
139 struct pci_dev *dev = bmide_dev;
140 unsigned int v, u, i;
141 int len;
142 u16 c, w;
143 u8 t, x;
144 char *p = buffer;
145
146 via_print("----------VIA BusMastering IDE Configuration"
147 "----------------");
148
149 via_print("Driver Version: 3.37");
150 via_print("South Bridge: VIA %s",
151 via_config->name);
152
153 pci_read_config_byte(isa_dev, PCI_REVISION_ID, &t);
154 pci_read_config_byte(dev, PCI_REVISION_ID, &x);
155 via_print("Revision: ISA %#x IDE %#x", t, x);
156 via_print("Highest DMA rate: %s",
157 via_dma[via_config->flags & VIA_UDMA]);
158
159 via_print("BM-DMA base: %#lx", via_base);
160 via_print("PCI clock: %d.%dMHz",
161 via_clock / 1000, via_clock / 100 % 10);
162
163 pci_read_config_byte(dev, VIA_MISC_1, &t);
164 via_print("Master Read Cycle IRDY: %dws",
165 (t & 64) >> 6);
166 via_print("Master Write Cycle IRDY: %dws",
167 (t & 32) >> 5);
168 via_print("BM IDE Status Register Read Retry: %s",
169 (t & 8) ? "yes" : "no");
170
171 pci_read_config_byte(dev, VIA_MISC_3, &t);
172 via_print("Max DRDY Pulse Width: %s%s",
173 via_control3[(t & 0x03)], (t & 0x03) ? " PCI clocks" : "");
174
175 via_print("-----------------------Primary IDE"
176 "-------Secondary IDE------");
177 via_print("Read DMA FIFO flush: %10s%20s",
178 (t & 0x80) ? "yes" : "no", (t & 0x40) ? "yes" : "no");
179 via_print("End Sector FIFO flush: %10s%20s",
180 (t & 0x20) ? "yes" : "no", (t & 0x10) ? "yes" : "no");
181
182 pci_read_config_byte(dev, VIA_IDE_CONFIG, &t);
183 via_print("Prefetch Buffer: %10s%20s",
184 (t & 0x80) ? "yes" : "no", (t & 0x20) ? "yes" : "no");
185 via_print("Post Write Buffer: %10s%20s",
186 (t & 0x40) ? "yes" : "no", (t & 0x10) ? "yes" : "no");
187
188 pci_read_config_byte(dev, VIA_IDE_ENABLE, &t);
189 via_print("Enabled: %10s%20s",
190 (t & 0x02) ? "yes" : "no", (t & 0x01) ? "yes" : "no");
191
192 c = inb(via_base + 0x02) | (inb(via_base + 0x0a) << 8);
193 via_print("Simplex only: %10s%20s",
194 (c & 0x80) ? "yes" : "no", (c & 0x8000) ? "yes" : "no");
195
196 via_print("Cable Type: %10s%20s",
197 (via_80w & 1) ? "80w" : "40w", (via_80w & 2) ? "80w" : "40w");
198
199 via_print("-------------------drive0----drive1"
200 "----drive2----drive3-----");
201
202 pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
203 pci_read_config_dword(dev, VIA_DRIVE_TIMING, &v);
204 pci_read_config_word(dev, VIA_8BIT_TIMING, &w);
205
206 if (via_config->flags & VIA_UDMA)
207 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
208 else u = 0;
209
210 for (i = 0; i < 4; i++) {
211
212 setup[i] = ((t >> ((3 - i) << 1)) & 0x3) + 1;
213 recover8b[i] = ((w >> ((1 - (i >> 1)) << 3)) & 0xf) + 1;
214 active8b[i] = ((w >> (((1 - (i >> 1)) << 3) + 4)) & 0xf) + 1;
215 active[i] = ((v >> (((3 - i) << 3) + 4)) & 0xf) + 1;
216 recover[i] = ((v >> ((3 - i) << 3)) & 0xf) + 1;
217 udma[i] = ((u >> ((3 - i) << 3)) & 0x7) + 2;
218 umul[i] = ((u >> (((3 - i) & 2) << 3)) & 0x8) ? 1 : 2;
219 uen[i] = ((u >> ((3 - i) << 3)) & 0x20);
220 den[i] = (c & ((i & 1) ? 0x40 : 0x20) << ((i & 2) << 2));
221
222 speed[i] = 2 * via_clock / (active[i] + recover[i]);
223 cycle[i] = 1000000 * (active[i] + recover[i]) / via_clock;
224
225 if (!uen[i] || !den[i])
226 continue;
227
228 switch (via_config->flags & VIA_UDMA) {
229
230 case VIA_UDMA_33:
231 speed[i] = 2 * via_clock / udma[i];
232 cycle[i] = 1000000 * udma[i] / via_clock;
233 break;
234
235 case VIA_UDMA_66:
236 speed[i] = 4 * via_clock / (udma[i] * umul[i]);
237 cycle[i] = 500000 * (udma[i] * umul[i]) / via_clock;
238 break;
239
240 case VIA_UDMA_100:
241 speed[i] = 6 * via_clock / udma[i];
242 cycle[i] = 333333 * udma[i] / via_clock;
243 break;
244
245 case VIA_UDMA_133:
246 speed[i] = 8 * via_clock / udma[i];
247 cycle[i] = 250000 * udma[i] / via_clock;
248 break;
249 }
250 }
251
252 via_print_drive("Transfer Mode: ", "%10s",
253 den[i] ? (uen[i] ? "UDMA" : "DMA") : "PIO");
254
255 via_print_drive("Address Setup: ", "%8dns",
256 1000000 * setup[i] / via_clock);
257 via_print_drive("Cmd Active: ", "%8dns",
258 1000000 * active8b[i] / via_clock);
259 via_print_drive("Cmd Recovery: ", "%8dns",
260 1000000 * recover8b[i] / via_clock);
261 via_print_drive("Data Active: ", "%8dns",
262 1000000 * active[i] / via_clock);
263 via_print_drive("Data Recovery: ", "%8dns",
264 1000000 * recover[i] / via_clock);
265 via_print_drive("Cycle Time: ", "%8dns",
266 cycle[i]);
267 via_print_drive("Transfer Rate: ", "%4d.%dMB/s",
268 speed[i] / 1000, speed[i] / 100 % 10);
269
270
271 len = (p - buffer) - offset;
272 *addr = buffer + offset;
273
274 return len > count ? count : len;
275}
276
277#endif
278
279
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283
284
285
286
287
288static void via_set_speed(struct pci_dev *dev, u8 dn, struct ide_timing *timing)
289{
290 u8 t;
291
292 if (~via_config->flags & VIA_BAD_AST) {
293 pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
294 t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
295 pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
296 }
297
298 pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
299 ((FIT(timing->act8b, 1, 16) - 1) << 4) | (FIT(timing->rec8b, 1, 16) - 1));
300
301 pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
302 ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
303
304 switch (via_config->flags & VIA_UDMA) {
305 case VIA_UDMA_33: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
306 case VIA_UDMA_66: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break;
307 case VIA_UDMA_100: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
308 case VIA_UDMA_133: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
309 default: return;
310 }
311
312 pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
313}
314
315
316
317
318
319
320
321
322
323
324
325static int via_set_drive(ide_drive_t *drive, u8 speed)
326{
327 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
328 struct ide_timing t, p;
329 unsigned int T, UT;
330
331 if (speed != XFER_PIO_SLOW && speed != drive->current_speed)
332 if (ide_config_drive_speed(drive, speed))
333 printk(KERN_WARNING "ide%d: Drive %d didn't "
334 "accept speed setting. Oh, well.\n",
335 drive->dn >> 1, drive->dn & 1);
336
337 T = 1000000000 / via_clock;
338
339 switch (via_config->flags & VIA_UDMA) {
340 case VIA_UDMA_33: UT = T; break;
341 case VIA_UDMA_66: UT = T/2; break;
342 case VIA_UDMA_100: UT = T/3; break;
343 case VIA_UDMA_133: UT = T/4; break;
344 default: UT = T;
345 }
346
347 ide_timing_compute(drive, speed, &t, T, UT);
348
349 if (peer->present) {
350 ide_timing_compute(peer, peer->current_speed, &p, T, UT);
351 ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
352 }
353
354 via_set_speed(HWIF(drive)->pci_dev, drive->dn, &t);
355
356 if (!drive->init_speed)
357 drive->init_speed = speed;
358 drive->current_speed = speed;
359
360 return 0;
361}
362
363
364
365
366
367
368
369
370
371static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio)
372{
373 if (!((via_enabled >> HWIF(drive)->channel) & 1))
374 return;
375
376 if (pio == 255) {
377 via_set_drive(drive,
378 ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
379 return;
380 }
381
382 via_set_drive(drive, XFER_PIO_0 + MIN(pio, 5));
383}
384
385
386
387
388
389
390
391
392
393static int via82cxxx_ide_dma_check (ide_drive_t *drive)
394{
395 u16 w80 = HWIF(drive)->udma_four;
396
397 u16 speed = ide_find_best_mode(drive,
398 XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA |
399 (via_config->flags & VIA_UDMA ? XFER_UDMA : 0) |
400 (w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) |
401 (w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0) |
402 (w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_133 ? XFER_UDMA_133 : 0));
403
404 via_set_drive(drive, speed);
405
406 if (drive->autodma && (speed & XFER_MODE) != XFER_PIO)
407 return HWIF(drive)->ide_dma_on(drive);
408 return HWIF(drive)->ide_dma_off_quietly(drive);
409}
410
411
412
413
414
415
416
417
418
419
420static unsigned int __init init_chipset_via82cxxx(struct pci_dev *dev, const char *name)
421{
422 struct pci_dev *isa = NULL;
423 u8 t, v;
424 unsigned int u;
425 int i;
426
427
428
429
430
431 for (via_config = via_isa_bridges; via_config->id; via_config++)
432 if ((isa = pci_find_device(PCI_VENDOR_ID_VIA +
433 !!(via_config->flags & VIA_BAD_ID),
434 via_config->id, NULL))) {
435
436 pci_read_config_byte(isa, PCI_REVISION_ID, &t);
437 if (t >= via_config->rev_min &&
438 t <= via_config->rev_max)
439 break;
440 }
441
442 if (!via_config->id) {
443 printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
444 return -ENODEV;
445 }
446
447
448
449
450
451 switch (via_config->flags & VIA_UDMA) {
452
453 case VIA_UDMA_66:
454
455 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
456 pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
457 for (i = 24; i >= 0; i -= 8)
458 if (((u >> (i & 16)) & 8) &&
459 ((u >> i) & 0x20) &&
460 (((u >> i) & 7) < 2)) {
461
462
463
464
465 via_80w |= (1 << (1 - (i >> 4)));
466 }
467 break;
468
469 case VIA_UDMA_100:
470 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
471 for (i = 24; i >= 0; i -= 8)
472 if (((u >> i) & 0x10) ||
473 (((u >> i) & 0x20) &&
474 (((u >> i) & 7) < 4))) {
475
476
477
478 via_80w |= (1 << (1 - (i >> 4)));
479 }
480 break;
481
482 case VIA_UDMA_133:
483 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
484 for (i = 24; i >= 0; i -= 8)
485 if (((u >> i) & 0x10) ||
486 (((u >> i) & 0x20) &&
487 (((u >> i) & 7) < 6))) {
488
489
490
491 via_80w |= (1 << (1 - (i >> 4)));
492 }
493 break;
494
495 }
496
497
498 if (via_config->flags & VIA_BAD_CLK66) {
499
500 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
501 pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
502 }
503
504
505
506
507
508 pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
509 via_enabled = ((v & 1) ? 2 : 0) | ((v & 2) ? 1 : 0);
510
511
512
513
514
515 pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
516
517
518 if (via_config->flags & VIA_BAD_PREQ) {
519
520 t &= 0x7f;
521 }
522
523
524 if (via_config->flags & VIA_SET_FIFO) {
525 t &= (t & 0x9f);
526 switch (via_enabled) {
527 case 1: t |= 0x00; break;
528 case 2: t |= 0x60; break;
529 case 3: t |= 0x20; break;
530 }
531 }
532
533 pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
534
535
536
537
538
539 via_clock = system_bus_clock() * 1000;
540
541 switch (via_clock) {
542 case 33000: via_clock = 33333; break;
543 case 37000: via_clock = 37500; break;
544 case 41000: via_clock = 41666; break;
545 }
546
547 if (via_clock < 20000 || via_clock > 50000) {
548 printk(KERN_WARNING "VP_IDE: User given PCI clock speed "
549 "impossible (%d), using 33 MHz instead.\n", via_clock);
550 printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want "
551 "to assume 80-wire cable.\n");
552 via_clock = 33333;
553 }
554
555
556
557
558
559 pci_read_config_byte(isa, PCI_REVISION_ID, &t);
560 printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %s "
561 "controller on pci%s\n",
562 via_config->name, t,
563 via_dma[via_config->flags & VIA_UDMA],
564 dev->slot_name);
565
566
567
568
569
570#if defined(DISPLAY_VIA_TIMINGS) && defined(CONFIG_PROC_FS)
571 if (!via_proc) {
572 via_base = pci_resource_start(dev, 4);
573 bmide_dev = dev;
574 isa_dev = isa;
575 ide_pci_register_host_proc(&via_procs[0]);
576 via_proc = 1;
577 }
578#endif
579 return 0;
580}
581
582static void __init init_hwif_via82cxxx(ide_hwif_t *hwif)
583{
584 int i;
585
586 hwif->autodma = 0;
587
588 hwif->tuneproc = &via82cxxx_tune_drive;
589 hwif->speedproc = &via_set_drive;
590
591 for (i = 0; i < 2; i++) {
592 hwif->drives[i].io_32bit = 1;
593 hwif->drives[i].unmask = (via_config->flags & VIA_NO_UNMASK) ? 0 : 1;
594 hwif->drives[i].autotune = 1;
595 hwif->drives[i].dn = hwif->channel * 2 + i;
596 }
597
598 if (!hwif->dma_base)
599 return;
600
601 hwif->atapi_dma = 1;
602 hwif->ultra_mask = 0x7f;
603 hwif->mwdma_mask = 0x07;
604 hwif->swdma_mask = 0x07;
605
606 if (!(hwif->udma_four))
607 hwif->udma_four = ((via_enabled & via_80w) >> hwif->channel) & 1;
608 hwif->ide_dma_check = &via82cxxx_ide_dma_check;
609 if (!noautodma)
610 hwif->autodma = 1;
611 hwif->drives[0].autodma = hwif->autodma;
612 hwif->drives[1].autodma = hwif->autodma;
613}
614
615
616
617
618
619
620
621
622
623static void __init init_dma_via82cxxx(ide_hwif_t *hwif, unsigned long dmabase)
624{
625 if ((via_enabled >> hwif->channel) & 1)
626 ide_setup_dma(hwif, dmabase, 8);
627}
628
629extern void ide_setup_pci_device(struct pci_dev *, ide_pci_device_t *);
630
631static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
632{
633 ide_pci_device_t *d = &via82cxxx_chipsets[id->driver_data];
634 if (dev->device != d->device)
635 BUG();
636 ide_setup_pci_device(dev, d);
637 MOD_INC_USE_COUNT;
638 return 0;
639}
640
641static struct pci_device_id via_pci_tbl[] __devinitdata = {
642 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
643 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
644 { 0, },
645};
646
647static struct pci_driver driver = {
648 .name = "VIA IDE",
649 .id_table = via_pci_tbl,
650 .probe = via_init_one,
651};
652
653static int via_ide_init(void)
654{
655 return ide_pci_register_driver(&driver);
656}
657
658static void via_ide_exit(void)
659{
660 ide_pci_unregister_driver(&driver);
661}
662
663module_init(via_ide_init);
664module_exit(via_ide_exit);
665
666MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
667MODULE_DESCRIPTION("PCI driver module for VIA IDE");
668MODULE_LICENSE("GPL");
669
670EXPORT_NO_SYMBOLS;
671
