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28#include <linux/version.h>
29#include <linux/config.h>
30#include <linux/kernel.h>
31#include <linux/slab.h>
32#include <linux/init.h>
33#include <linux/capability.h>
34#include <linux/sched.h>
35#include <linux/interrupt.h>
36#include <linux/bitops.h>
37#include <linux/pci.h>
38#include <linux/module.h>
39#include <linux/atmdev.h>
40#include <linux/sonet.h>
41#include <linux/atm_suni.h>
42#include <asm/io.h>
43#include <asm/string.h>
44#include <asm/segment.h>
45#include <asm/page.h>
46#include <asm/irq.h>
47#include <asm/dma.h>
48#include <asm/byteorder.h>
49#include <asm/uaccess.h>
50#include <asm/atomic.h>
51
52#ifdef CONFIG_ATM_FORE200E_SBA
53#include <asm/idprom.h>
54#include <asm/sbus.h>
55#include <asm/openprom.h>
56#include <asm/oplib.h>
57#include <asm/pgtable.h>
58#endif
59
60#if defined(CONFIG_ATM_FORE200E_USE_TASKLET)
61#define FORE200E_USE_TASKLET
62#endif
63
64#if 0
65#define FORE200E_BSQ_DEBUG
66#endif
67
68#if 1
69#define FORE200E_52BYTE_AAL0_SDU
70#endif
71
72#include "fore200e.h"
73#include "suni.h"
74
75#define FORE200E_VERSION "0.3e"
76
77#define FORE200E "fore200e: "
78
79#if 0
80#define CONFIG_ATM_FORE200E_DEBUG 1
81#endif
82#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
83#define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
84 printk(FORE200E format, ##args); } while (0)
85#else
86#define DPRINTK(level, format, args...) do {} while (0)
87#endif
88
89
90#define FORE200E_ALIGN(addr, alignment) \
91 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
92
93#define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
94
95#define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
96
97#define FORE200E_NEXT_ENTRY(index, modulo) (index = ++(index) % (modulo))
98
99
100#define MSECS(ms) (((ms)*HZ/1000)+1)
101
102
103#if 1
104#undef ASSERT
105#define ASSERT(expr) if (!(expr)) { \
106 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
107 __FUNCTION__, __LINE__, #expr); \
108 panic(FORE200E "%s", __FUNCTION__); \
109 }
110#else
111#define ASSERT(expr) do {} while (0)
112#endif
113
114
115extern const struct atmdev_ops fore200e_ops;
116extern const struct fore200e_bus fore200e_bus[];
117
118static struct fore200e* fore200e_boards = NULL;
119
120#ifdef MODULE
121MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
122MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
123MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
124#endif
125
126
127static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
128 { BUFFER_S1_NBR, BUFFER_L1_NBR },
129 { BUFFER_S2_NBR, BUFFER_L2_NBR }
130};
131
132static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
133 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
134 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
135};
136
137
138#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
139static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
140#endif
141
142
143#if 0
144static int
145fore200e_fore2atm_aal(enum fore200e_aal aal)
146{
147 switch(aal) {
148 case FORE200E_AAL0: return ATM_AAL0;
149 case FORE200E_AAL34: return ATM_AAL34;
150 case FORE200E_AAL5: return ATM_AAL5;
151 }
152
153 return -EINVAL;
154}
155#endif
156
157
158static enum fore200e_aal
159fore200e_atm2fore_aal(int aal)
160{
161 switch(aal) {
162 case ATM_AAL0: return FORE200E_AAL0;
163 case ATM_AAL34: return FORE200E_AAL34;
164 case ATM_AAL1:
165 case ATM_AAL2:
166 case ATM_AAL5: return FORE200E_AAL5;
167 }
168
169 return -EINVAL;
170}
171
172
173static char*
174fore200e_irq_itoa(int irq)
175{
176#if defined(__sparc_v9__)
177 return __irq_itoa(irq);
178#else
179 static char str[8];
180 sprintf(str, "%d", irq);
181 return str;
182#endif
183}
184
185
186static void*
187fore200e_kmalloc(int size, int flags)
188{
189 void* chunk = kmalloc(size, flags);
190
191 if (chunk)
192 memset(chunk, 0x00, size);
193 else
194 printk(FORE200E "kmalloc() failed, requested size = %d, flags = 0x%x\n", size, flags);
195
196 return chunk;
197}
198
199
200static void
201fore200e_kfree(void* chunk)
202{
203 kfree(chunk);
204}
205
206
207
208
209
210static int
211fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
212{
213 unsigned long offset = 0;
214
215 if (alignment <= sizeof(int))
216 alignment = 0;
217
218 chunk->alloc_size = size + alignment;
219 chunk->align_size = size;
220 chunk->direction = direction;
221
222 chunk->alloc_addr = fore200e_kmalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
223 if (chunk->alloc_addr == NULL)
224 return -ENOMEM;
225
226 if (alignment > 0)
227 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
228
229 chunk->align_addr = chunk->alloc_addr + offset;
230
231 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
232
233 return 0;
234}
235
236
237
238
239static void
240fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
241{
242 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
243
244 fore200e_kfree(chunk->alloc_addr);
245}
246
247
248static void
249fore200e_spin(int msecs)
250{
251 unsigned long timeout = jiffies + MSECS(msecs);
252 while (time_before(jiffies, timeout));
253}
254
255
256static int
257fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
258{
259 unsigned long timeout = jiffies + MSECS(msecs);
260 int ok;
261
262 mb();
263 do {
264 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
265 break;
266
267 } while (time_before(jiffies, timeout));
268
269#if 1
270 if (!ok) {
271 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
272 *addr, val);
273 }
274#endif
275
276 return ok;
277}
278
279
280static int
281fore200e_io_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
282{
283 unsigned long timeout = jiffies + MSECS(msecs);
284 int ok;
285
286 do {
287 if ((ok = (fore200e->bus->read(addr) == val)))
288 break;
289
290 } while (time_before(jiffies, timeout));
291
292#if 1
293 if (!ok) {
294 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
295 fore200e->bus->read(addr), val);
296 }
297#endif
298
299 return ok;
300}
301
302
303static void
304fore200e_free_rx_buf(struct fore200e* fore200e)
305{
306 int scheme, magn, nbr;
307 struct buffer* buffer;
308
309 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
310 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
311
312 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
313
314 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
315
316 struct chunk* data = &buffer[ nbr ].data;
317
318 if (data->alloc_addr != NULL)
319 fore200e_chunk_free(fore200e, data);
320 }
321 }
322 }
323 }
324}
325
326
327static void
328fore200e_uninit_bs_queue(struct fore200e* fore200e)
329{
330 int scheme, magn;
331
332 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
333 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
334
335 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
336 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
337
338 if (status->alloc_addr)
339 fore200e->bus->dma_chunk_free(fore200e, status);
340
341 if (rbd_block->alloc_addr)
342 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
343 }
344 }
345}
346
347
348static int
349fore200e_reset(struct fore200e* fore200e, int diag)
350{
351 int ok;
352
353 fore200e->cp_monitor = (struct cp_monitor*)(fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET);
354
355 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
356
357 fore200e->bus->reset(fore200e);
358
359 if (diag) {
360 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
361 if (ok == 0) {
362
363 printk(FORE200E "device %s self-test failed\n", fore200e->name);
364 return -ENODEV;
365 }
366
367 printk(FORE200E "device %s self-test passed\n", fore200e->name);
368
369 fore200e->state = FORE200E_STATE_RESET;
370 }
371
372 return 0;
373}
374
375
376static void
377fore200e_shutdown(struct fore200e* fore200e)
378{
379 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
380 fore200e->name, fore200e->phys_base,
381 fore200e_irq_itoa(fore200e->irq));
382
383 if (fore200e->state > FORE200E_STATE_RESET) {
384
385 fore200e_reset(fore200e, 0);
386 }
387
388
389 switch(fore200e->state) {
390
391 case FORE200E_STATE_COMPLETE:
392 if (fore200e->stats)
393 kfree(fore200e->stats);
394
395 case FORE200E_STATE_IRQ:
396 free_irq(fore200e->irq, fore200e->atm_dev);
397
398 case FORE200E_STATE_ALLOC_BUF:
399 fore200e_free_rx_buf(fore200e);
400
401 case FORE200E_STATE_INIT_BSQ:
402 fore200e_uninit_bs_queue(fore200e);
403
404 case FORE200E_STATE_INIT_RXQ:
405 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
406 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
407
408 case FORE200E_STATE_INIT_TXQ:
409 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
410 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
411
412 case FORE200E_STATE_INIT_CMDQ:
413 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
414
415 case FORE200E_STATE_INITIALIZE:
416
417
418 case FORE200E_STATE_START_FW:
419
420
421 case FORE200E_STATE_LOAD_FW:
422
423
424 case FORE200E_STATE_RESET:
425
426
427 case FORE200E_STATE_MAP:
428 fore200e->bus->unmap(fore200e);
429
430 case FORE200E_STATE_CONFIGURE:
431
432
433 case FORE200E_STATE_REGISTER:
434
435 atm_dev_deregister(fore200e->atm_dev);
436
437 case FORE200E_STATE_BLANK:
438
439 break;
440 }
441}
442
443
444#ifdef CONFIG_ATM_FORE200E_PCA
445
446static u32 fore200e_pca_read(volatile u32* addr)
447{
448
449
450 return le32_to_cpu(readl(addr));
451}
452
453
454static void fore200e_pca_write(u32 val, volatile u32* addr)
455{
456
457
458 writel(cpu_to_le32(val), addr);
459}
460
461
462static u32
463fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
464{
465 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
466
467 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
468 virt_addr, size, direction, dma_addr);
469
470 return dma_addr;
471}
472
473
474static void
475fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
476{
477 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
478 dma_addr, size, direction);
479
480 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
481}
482
483
484static void
485fore200e_pca_dma_sync(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
486{
487 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
488
489 pci_dma_sync_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
490}
491
492
493
494
495
496static int
497fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
498 int size, int nbr, int alignment)
499{
500
501 chunk->alloc_size = size * nbr;
502 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
503 chunk->alloc_size,
504 &chunk->dma_addr);
505
506 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
507 return -ENOMEM;
508
509 chunk->align_addr = chunk->alloc_addr;
510
511 return 0;
512}
513
514
515
516
517static void
518fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
519{
520 pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
521 chunk->alloc_size,
522 chunk->alloc_addr,
523 chunk->dma_addr);
524}
525
526
527static int
528fore200e_pca_irq_check(struct fore200e* fore200e)
529{
530
531 int irq_posted = readl(fore200e->regs.pca.psr);
532
533#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
534 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
535 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
536 }
537#endif
538
539 return irq_posted;
540}
541
542
543static void
544fore200e_pca_irq_ack(struct fore200e* fore200e)
545{
546 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
547}
548
549
550static void
551fore200e_pca_reset(struct fore200e* fore200e)
552{
553 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
554 fore200e_spin(10);
555 writel(0, fore200e->regs.pca.hcr);
556}
557
558
559static int __init
560fore200e_pca_map(struct fore200e* fore200e)
561{
562 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
563
564 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
565
566 if (fore200e->virt_base == NULL) {
567 printk(FORE200E "can't map device %s\n", fore200e->name);
568 return -EFAULT;
569 }
570
571 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
572
573
574 fore200e->regs.pca.hcr = (u32*)(fore200e->virt_base + PCA200E_HCR_OFFSET);
575 fore200e->regs.pca.imr = (u32*)(fore200e->virt_base + PCA200E_IMR_OFFSET);
576 fore200e->regs.pca.psr = (u32*)(fore200e->virt_base + PCA200E_PSR_OFFSET);
577
578 fore200e->state = FORE200E_STATE_MAP;
579 return 0;
580}
581
582
583static void
584fore200e_pca_unmap(struct fore200e* fore200e)
585{
586 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
587
588 if (fore200e->virt_base != NULL)
589 iounmap(fore200e->virt_base);
590}
591
592
593static int __init
594fore200e_pca_configure(struct fore200e* fore200e)
595{
596 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
597 u8 master_ctrl, latency;
598
599 DPRINTK(2, "device %s being configured\n", fore200e->name);
600
601 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
602 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
603 return -EIO;
604 }
605
606 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
607
608 master_ctrl = master_ctrl
609#if defined(__BIG_ENDIAN)
610
611 | PCA200E_CTRL_CONVERT_ENDIAN
612#endif
613#if 0
614 | PCA200E_CTRL_DIS_CACHE_RD
615 | PCA200E_CTRL_DIS_WRT_INVAL
616 | PCA200E_CTRL_ENA_CONT_REQ_MODE
617 | PCA200E_CTRL_2_CACHE_WRT_INVAL
618#endif
619 | PCA200E_CTRL_LARGE_PCI_BURSTS;
620
621 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
622
623
624
625
626 latency = 192;
627 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
628
629 fore200e->state = FORE200E_STATE_CONFIGURE;
630 return 0;
631}
632
633
634static struct fore200e* __init
635fore200e_pca_detect(const struct fore200e_bus* bus, int index)
636{
637 struct fore200e* fore200e;
638 struct pci_dev* pci_dev = NULL;
639 int count = index;
640
641 if (pci_present() == 0) {
642 printk(FORE200E "no PCI subsystem\n");
643 return NULL;
644 }
645
646 do {
647 pci_dev = pci_find_device(PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, pci_dev);
648 if (pci_dev == NULL)
649 return NULL;
650 } while (count--);
651
652 if (pci_enable_device(pci_dev))
653 return NULL;
654
655 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
656 if (fore200e == NULL)
657 return NULL;
658
659 fore200e->bus = bus;
660 fore200e->bus_dev = pci_dev;
661 fore200e->irq = pci_dev->irq;
662 fore200e->phys_base = pci_resource_start(pci_dev, 0);
663
664 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
665
666 pci_set_master(pci_dev);
667
668 return fore200e;
669}
670
671
672static int __init
673fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
674{
675 struct host_cmdq* cmdq = &fore200e->host_cmdq;
676 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
677 struct prom_opcode opcode;
678 int ok;
679 u32 prom_dma;
680
681 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
682
683 opcode.opcode = OPCODE_GET_PROM;
684 opcode.pad = 0;
685
686 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
687
688 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
689
690 *entry->status = STATUS_PENDING;
691
692 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.prom_block.opcode);
693
694 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
695
696 *entry->status = STATUS_FREE;
697
698 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
699
700 if (ok == 0) {
701 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
702 return -EIO;
703 }
704
705#if defined(__BIG_ENDIAN)
706
707#define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
708
709
710 swap_here(&prom->mac_addr[0]);
711 swap_here(&prom->mac_addr[4]);
712#endif
713
714 return 0;
715}
716
717
718static int
719fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
720{
721 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
722
723 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
724 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
725}
726
727#endif
728
729
730#ifdef CONFIG_ATM_FORE200E_SBA
731
732static u32
733fore200e_sba_read(volatile u32* addr)
734{
735 return sbus_readl(addr);
736}
737
738
739static void
740fore200e_sba_write(u32 val, volatile u32* addr)
741{
742 sbus_writel(val, addr);
743}
744
745
746static u32
747fore200e_sba_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
748{
749 u32 dma_addr = sbus_map_single((struct sbus_dev*)fore200e->bus_dev, virt_addr, size, direction);
750
751 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
752 virt_addr, size, direction, dma_addr);
753
754 return dma_addr;
755}
756
757
758static void
759fore200e_sba_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
760{
761 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
762 dma_addr, size, direction);
763
764 sbus_unmap_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
765}
766
767
768static void
769fore200e_sba_dma_sync(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
770{
771 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
772
773 sbus_dma_sync_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
774}
775
776
777
778
779
780static int
781fore200e_sba_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
782 int size, int nbr, int alignment)
783{
784 chunk->alloc_size = chunk->align_size = size * nbr;
785
786
787 chunk->alloc_addr = sbus_alloc_consistent((struct sbus_dev*)fore200e->bus_dev,
788 chunk->alloc_size,
789 &chunk->dma_addr);
790
791 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
792 return -ENOMEM;
793
794 chunk->align_addr = chunk->alloc_addr;
795
796 return 0;
797}
798
799
800
801
802static void
803fore200e_sba_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
804{
805 sbus_free_consistent((struct sbus_dev*)fore200e->bus_dev,
806 chunk->alloc_size,
807 chunk->alloc_addr,
808 chunk->dma_addr);
809}
810
811
812static void
813fore200e_sba_irq_enable(struct fore200e* fore200e)
814{
815 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
816 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
817}
818
819
820static int
821fore200e_sba_irq_check(struct fore200e* fore200e)
822{
823 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
824}
825
826
827static void
828fore200e_sba_irq_ack(struct fore200e* fore200e)
829{
830 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
831 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
832}
833
834
835static void
836fore200e_sba_reset(struct fore200e* fore200e)
837{
838 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
839 fore200e_spin(10);
840 fore200e->bus->write(0, fore200e->regs.sba.hcr);
841}
842
843
844static int __init
845fore200e_sba_map(struct fore200e* fore200e)
846{
847 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
848 unsigned int bursts;
849
850
851 fore200e->regs.sba.hcr = (u32*)sbus_ioremap(&sbus_dev->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
852 fore200e->regs.sba.bsr = (u32*)sbus_ioremap(&sbus_dev->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
853 fore200e->regs.sba.isr = (u32*)sbus_ioremap(&sbus_dev->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
854 fore200e->virt_base = (u32*)sbus_ioremap(&sbus_dev->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
855
856 if (fore200e->virt_base == NULL) {
857 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
858 return -EFAULT;
859 }
860
861 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
862
863 fore200e->bus->write(0x02, fore200e->regs.sba.isr);
864
865
866 bursts = prom_getintdefault(sbus_dev->bus->prom_node, "burst-sizes", 0x00);
867
868 if (sbus_can_dma_64bit(sbus_dev))
869 sbus_set_sbus64(sbus_dev, bursts);
870
871 fore200e->state = FORE200E_STATE_MAP;
872 return 0;
873}
874
875
876static void
877fore200e_sba_unmap(struct fore200e* fore200e)
878{
879 sbus_iounmap((ulong)fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
880 sbus_iounmap((ulong)fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
881 sbus_iounmap((ulong)fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
882 sbus_iounmap((ulong)fore200e->virt_base, SBA200E_RAM_LENGTH);
883}
884
885
886static int __init
887fore200e_sba_configure(struct fore200e* fore200e)
888{
889 fore200e->state = FORE200E_STATE_CONFIGURE;
890 return 0;
891}
892
893
894static struct fore200e* __init
895fore200e_sba_detect(const struct fore200e_bus* bus, int index)
896{
897 struct fore200e* fore200e;
898 struct sbus_bus* sbus_bus;
899 struct sbus_dev* sbus_dev = NULL;
900
901 unsigned int count = 0;
902
903 for_each_sbus (sbus_bus) {
904 for_each_sbusdev (sbus_dev, sbus_bus) {
905 if (strcmp(sbus_dev->prom_name, SBA200E_PROM_NAME) == 0) {
906 if (count >= index)
907 goto found;
908 count++;
909 }
910 }
911 }
912 return NULL;
913
914 found:
915 if (sbus_dev->num_registers != 4) {
916 printk(FORE200E "this %s device has %d instead of 4 registers\n",
917 bus->model_name, sbus_dev->num_registers);
918 return NULL;
919 }
920
921 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
922 if (fore200e == NULL)
923 return NULL;
924
925 fore200e->bus = bus;
926 fore200e->bus_dev = sbus_dev;
927 fore200e->irq = sbus_dev->irqs[ 0 ];
928
929 fore200e->phys_base = (unsigned long)sbus_dev;
930
931 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
932
933 return fore200e;
934}
935
936
937static int __init
938fore200e_sba_prom_read(struct fore200e* fore200e, struct prom_data* prom)
939{
940 struct sbus_dev* sbus_dev = (struct sbus_dev*) fore200e->bus_dev;
941 int len;
942
943 len = prom_getproperty(sbus_dev->prom_node, "macaddrlo2", &prom->mac_addr[ 4 ], 4);
944 if (len < 0)
945 return -EBUSY;
946
947 len = prom_getproperty(sbus_dev->prom_node, "macaddrhi4", &prom->mac_addr[ 2 ], 4);
948 if (len < 0)
949 return -EBUSY;
950
951 prom_getproperty(sbus_dev->prom_node, "serialnumber",
952 (char*)&prom->serial_number, sizeof(prom->serial_number));
953
954 prom_getproperty(sbus_dev->prom_node, "promversion",
955 (char*)&prom->hw_revision, sizeof(prom->hw_revision));
956
957 return 0;
958}
959
960
961static int
962fore200e_sba_proc_read(struct fore200e* fore200e, char *page)
963{
964 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
965
966 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n", sbus_dev->slot, sbus_dev->prom_name);
967}
968#endif
969
970
971static void
972fore200e_tx_irq(struct fore200e* fore200e)
973{
974 struct host_txq* txq = &fore200e->host_txq;
975 struct host_txq_entry* entry;
976 struct atm_vcc* vcc;
977 struct fore200e_vc_map* vc_map;
978
979 if (fore200e->host_txq.txing == 0)
980 return;
981
982 for (;;) {
983
984 entry = &txq->host_entry[ txq->tail ];
985
986 if ((*entry->status & STATUS_COMPLETE) == 0) {
987 break;
988 }
989
990 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
991 entry, txq->tail, entry->vc_map, entry->skb);
992
993
994 if (entry->data)
995 kfree(entry->data);
996
997
998 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
999 FORE200E_DMA_TODEVICE);
1000
1001 vc_map = entry->vc_map;
1002
1003
1004 if ((vc_map->vcc == NULL) ||
1005 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1006
1007 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
1008 fore200e->atm_dev->number);
1009
1010 dev_kfree_skb_any(entry->skb);
1011 }
1012 else {
1013 ASSERT(vc_map->vcc);
1014
1015
1016 if (vc_map->incarn != entry->incarn) {
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
1031 fore200e->atm_dev->number);
1032
1033 dev_kfree_skb_any(entry->skb);
1034 }
1035 else {
1036 vcc = vc_map->vcc;
1037 ASSERT(vcc);
1038
1039
1040 if (vcc->pop) {
1041 vcc->pop(vcc, entry->skb);
1042 }
1043 else {
1044 dev_kfree_skb_any(entry->skb);
1045 }
1046#if 1
1047
1048 if (atomic_read(&vcc->sk->wmem_alloc) < 0) {
1049 atomic_set(&vcc->sk->wmem_alloc, 0);
1050 }
1051#endif
1052
1053 if (*entry->status & STATUS_ERROR)
1054 atomic_inc(&vcc->stats->tx_err);
1055 else
1056 atomic_inc(&vcc->stats->tx);
1057 }
1058 }
1059
1060 *entry->status = STATUS_FREE;
1061
1062 fore200e->host_txq.txing--;
1063
1064 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
1065 }
1066}
1067
1068
1069#ifdef FORE200E_BSQ_DEBUG
1070int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
1071{
1072 struct buffer* buffer;
1073 int count = 0;
1074
1075 buffer = bsq->freebuf;
1076 while (buffer) {
1077
1078 if (buffer->supplied) {
1079 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
1080 where, scheme, magn, buffer->index);
1081 }
1082
1083 if (buffer->magn != magn) {
1084 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
1085 where, scheme, magn, buffer->index, buffer->magn);
1086 }
1087
1088 if (buffer->scheme != scheme) {
1089 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
1090 where, scheme, magn, buffer->index, buffer->scheme);
1091 }
1092
1093 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
1094 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
1095 where, scheme, magn, buffer->index);
1096 }
1097
1098 count++;
1099 buffer = buffer->next;
1100 }
1101
1102 if (count != bsq->freebuf_count) {
1103 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
1104 where, scheme, magn, count, bsq->freebuf_count);
1105 }
1106 return 0;
1107}
1108#endif
1109
1110
1111static void
1112fore200e_supply(struct fore200e* fore200e)
1113{
1114 int scheme, magn, i;
1115
1116 struct host_bsq* bsq;
1117 struct host_bsq_entry* entry;
1118 struct buffer* buffer;
1119
1120 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1121 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1122
1123 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1124
1125#ifdef FORE200E_BSQ_DEBUG
1126 bsq_audit(1, bsq, scheme, magn);
1127#endif
1128 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
1129
1130 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
1131 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
1132
1133 entry = &bsq->host_entry[ bsq->head ];
1134
1135 for (i = 0; i < RBD_BLK_SIZE; i++) {
1136
1137
1138 buffer = bsq->freebuf;
1139 if (!buffer) {
1140 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
1141 scheme, magn, bsq->freebuf_count);
1142 return;
1143 }
1144 bsq->freebuf = buffer->next;
1145
1146#ifdef FORE200E_BSQ_DEBUG
1147 if (buffer->supplied)
1148 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
1149 scheme, magn, buffer->index);
1150 buffer->supplied = 1;
1151#endif
1152 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1153 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1154 }
1155
1156 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1157
1158
1159 bsq->freebuf_count -= RBD_BLK_SIZE;
1160
1161 *entry->status = STATUS_PENDING;
1162 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1163 }
1164 }
1165 }
1166}
1167
1168
1169static int
1170fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
1171{
1172 struct sk_buff* skb;
1173 struct buffer* buffer;
1174 struct fore200e_vcc* fore200e_vcc;
1175 int i, pdu_len = 0;
1176#ifdef FORE200E_52BYTE_AAL0_SDU
1177 u32 cell_header = 0;
1178#endif
1179
1180 ASSERT(vcc);
1181
1182 fore200e_vcc = FORE200E_VCC(vcc);
1183 ASSERT(fore200e_vcc);
1184
1185#ifdef FORE200E_52BYTE_AAL0_SDU
1186 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1187
1188 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1189 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1190 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1191 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1192 rpd->atm_header.clp;
1193 pdu_len = 4;
1194 }
1195#endif
1196
1197
1198 for (i = 0; i < rpd->nseg; i++)
1199 pdu_len += rpd->rsd[ i ].length;
1200
1201 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1202 if (skb == NULL) {
1203 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1204
1205 atomic_inc(&vcc->stats->rx_drop);
1206 return -ENOMEM;
1207 }
1208
1209 skb->stamp = xtime;
1210
1211#ifdef FORE200E_52BYTE_AAL0_SDU
1212 if (cell_header) {
1213 *((u32*)skb_put(skb, 4)) = cell_header;
1214 }
1215#endif
1216
1217
1218 for (i = 0; i < rpd->nseg; i++) {
1219
1220
1221 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1222
1223
1224 fore200e->bus->dma_sync(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, FORE200E_DMA_FROMDEVICE);
1225
1226 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
1227 }
1228
1229 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1230
1231 if (pdu_len < fore200e_vcc->rx_min_pdu)
1232 fore200e_vcc->rx_min_pdu = pdu_len;
1233 if (pdu_len > fore200e_vcc->rx_max_pdu)
1234 fore200e_vcc->rx_max_pdu = pdu_len;
1235 fore200e_vcc->rx_pdu++;
1236
1237
1238 if (atm_charge(vcc, skb->truesize) == 0) {
1239
1240 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1241 vcc->itf, vcc->vpi, vcc->vci);
1242
1243 dev_kfree_skb_any(skb);
1244
1245 atomic_inc(&vcc->stats->rx_drop);
1246 return -ENOMEM;
1247 }
1248
1249 ASSERT(atomic_read(&vcc->sk->wmem_alloc) >= 0);
1250
1251 vcc->push(vcc, skb);
1252 atomic_inc(&vcc->stats->rx);
1253
1254 ASSERT(atomic_read(&vcc->sk->wmem_alloc) >= 0);
1255
1256 return 0;
1257}
1258
1259
1260static void
1261fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1262{
1263 struct host_bsq* bsq;
1264 struct buffer* buffer;
1265 int i;
1266
1267 for (i = 0; i < rpd->nseg; i++) {
1268
1269
1270 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1271
1272 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1273
1274#ifdef FORE200E_BSQ_DEBUG
1275 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1276
1277 if (buffer->supplied == 0)
1278 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1279 buffer->scheme, buffer->magn, buffer->index);
1280 buffer->supplied = 0;
1281#endif
1282
1283
1284 buffer->next = bsq->freebuf;
1285 bsq->freebuf = buffer;
1286
1287
1288 bsq->freebuf_count++;
1289 }
1290}
1291
1292
1293static void
1294fore200e_rx_irq(struct fore200e* fore200e)
1295{
1296 struct host_rxq* rxq = &fore200e->host_rxq;
1297 struct host_rxq_entry* entry;
1298 struct atm_vcc* vcc;
1299 struct fore200e_vc_map* vc_map;
1300
1301 for (;;) {
1302
1303 entry = &rxq->host_entry[ rxq->head ];
1304
1305
1306 if ((*entry->status & STATUS_COMPLETE) == 0)
1307 break;
1308
1309 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1310
1311 if ((vc_map->vcc == NULL) ||
1312 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1313
1314 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1315 fore200e->atm_dev->number,
1316 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1317 }
1318 else {
1319 vcc = vc_map->vcc;
1320 ASSERT(vcc);
1321
1322 if ((*entry->status & STATUS_ERROR) == 0) {
1323
1324 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1325 }
1326 else {
1327 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1328 fore200e->atm_dev->number,
1329 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1330 atomic_inc(&vcc->stats->rx_err);
1331 }
1332 }
1333
1334 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1335
1336 fore200e_collect_rpd(fore200e, entry->rpd);
1337
1338
1339 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1340 *entry->status = STATUS_FREE;
1341
1342 fore200e_supply(fore200e);
1343 }
1344}
1345
1346
1347#ifndef FORE200E_USE_TASKLET
1348static void
1349fore200e_irq(struct fore200e* fore200e)
1350{
1351 unsigned long flags;
1352
1353 spin_lock_irqsave(&fore200e->q_lock, flags);
1354 fore200e_rx_irq(fore200e);
1355 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1356
1357 spin_lock_irqsave(&fore200e->q_lock, flags);
1358 fore200e_tx_irq(fore200e);
1359 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1360}
1361#endif
1362
1363
1364static void
1365fore200e_interrupt(int irq, void* dev, struct pt_regs* regs)
1366{
1367 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1368
1369 if (fore200e->bus->irq_check(fore200e) == 0) {
1370
1371 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1372 return;
1373 }
1374 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1375
1376#ifdef FORE200E_USE_TASKLET
1377 tasklet_schedule(&fore200e->tx_tasklet);
1378 tasklet_schedule(&fore200e->rx_tasklet);
1379#else
1380 fore200e_irq(fore200e);
1381#endif
1382
1383 fore200e->bus->irq_ack(fore200e);
1384}
1385
1386
1387#ifdef FORE200E_USE_TASKLET
1388static void
1389fore200e_tx_tasklet(unsigned long data)
1390{
1391 struct fore200e* fore200e = (struct fore200e*) data;
1392 unsigned long flags;
1393
1394 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1395
1396 spin_lock_irqsave(&fore200e->q_lock, flags);
1397 fore200e_tx_irq(fore200e);
1398 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1399}
1400
1401
1402static void
1403fore200e_rx_tasklet(unsigned long data)
1404{
1405 struct fore200e* fore200e = (struct fore200e*) data;
1406 unsigned long flags;
1407
1408 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1409
1410 spin_lock_irqsave(&fore200e->q_lock, flags);
1411 fore200e_rx_irq((struct fore200e*) data);
1412 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1413}
1414#endif
1415
1416
1417static int
1418fore200e_select_scheme(struct atm_vcc* vcc)
1419{
1420
1421 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1422
1423 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1424 vcc->itf, vcc->vpi, vcc->vci, scheme);
1425
1426 return scheme;
1427}
1428
1429
1430static int
1431fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1432{
1433 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1434 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1435 struct activate_opcode activ_opcode;
1436 struct deactivate_opcode deactiv_opcode;
1437 struct vpvc vpvc;
1438 int ok;
1439 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1440
1441 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1442
1443 if (activate) {
1444 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1445
1446 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1447 activ_opcode.aal = aal;
1448 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1449 activ_opcode.pad = 0;
1450 }
1451 else {
1452 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1453 deactiv_opcode.pad = 0;
1454 }
1455
1456 vpvc.vci = vcc->vci;
1457 vpvc.vpi = vcc->vpi;
1458
1459 *entry->status = STATUS_PENDING;
1460
1461 if (activate) {
1462
1463#ifdef FORE200E_52BYTE_AAL0_SDU
1464 mtu = 48;
1465#endif
1466
1467 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1468 fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.activate_block.vpvc);
1469 fore200e->bus->write(*(u32*)&activ_opcode, (u32*)&entry->cp_entry->cmd.activate_block.opcode);
1470 }
1471 else {
1472 fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.deactivate_block.vpvc);
1473 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32*)&entry->cp_entry->cmd.deactivate_block.opcode);
1474 }
1475
1476 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1477
1478 *entry->status = STATUS_FREE;
1479
1480 if (ok == 0) {
1481 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1482 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1483 return -EIO;
1484 }
1485
1486 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1487 activate ? "open" : "clos");
1488
1489 return 0;
1490}
1491
1492
1493static int
1494fore200e_walk_vccs(struct atm_vcc *vcc, short *vpi, int *vci)
1495{
1496 struct atm_vcc* walk;
1497 struct sock *s;
1498
1499
1500
1501 read_lock(&vcc_sklist_lock);
1502
1503 if (*vpi == ATM_VPI_ANY) {
1504
1505 for (*vpi = 0, s = vcc_sklist; s; s = s->next) {
1506 walk = s->protinfo.af_atm;
1507 if (walk->dev != vcc->dev)
1508 continue;
1509
1510 if ((walk->vci == *vci) && (walk->vpi == *vpi)) {
1511 (*vpi)++;
1512 s = vcc_sklist;
1513 }
1514 }
1515 }
1516
1517
1518 if (*vci == ATM_VCI_ANY) {
1519
1520 for (*vci = ATM_NOT_RSV_VCI, s = vcc_sklist; s; s = s->next) {
1521 walk = s->protinfo.af_atm;
1522 if (walk->dev != vcc->dev)
1523 continue;
1524
1525 if ((walk->vpi = *vpi) && (walk->vci == *vci)) {
1526 *vci = walk->vci + 1;
1527 s = vcc_sklist;
1528 }
1529 }
1530 }
1531
1532 read_unlock(&vcc_sklist_lock);
1533
1534 return 0;
1535}
1536
1537
1538#define FORE200E_MAX_BACK2BACK_CELLS 255
1539
1540static void
1541fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1542{
1543 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1544
1545
1546 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1547 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1548 }
1549 else {
1550
1551 rate->data_cells = rate->idle_cells = 0;
1552 }
1553}
1554
1555
1556static int
1557fore200e_open(struct atm_vcc *vcc, short vpi, int vci)
1558{
1559 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1560 struct fore200e_vcc* fore200e_vcc;
1561 struct fore200e_vc_map* vc_map;
1562 unsigned long flags;
1563
1564 fore200e_walk_vccs(vcc, &vpi, &vci);
1565
1566 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1567 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1568
1569 spin_lock_irqsave(&fore200e->q_lock, flags);
1570
1571 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1572 if (vc_map->vcc) {
1573
1574 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1575
1576 printk(FORE200E "VC %d.%d.%d already in use\n",
1577 fore200e->atm_dev->number, vpi, vci);
1578
1579 return -EINVAL;
1580 }
1581
1582 vc_map->vcc = vcc;
1583
1584 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1585
1586 fore200e_vcc = fore200e_kmalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1587 if (fore200e_vcc == NULL) {
1588 vc_map->vcc = NULL;
1589 return -ENOMEM;
1590 }
1591
1592 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1593 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1594 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1595 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1596 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1597 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1598 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1599
1600
1601 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1602
1603 down(&fore200e->rate_sf);
1604 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1605 up(&fore200e->rate_sf);
1606
1607 fore200e_kfree(fore200e_vcc);
1608 vc_map->vcc = NULL;
1609 return -EAGAIN;
1610 }
1611
1612
1613 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1614 up(&fore200e->rate_sf);
1615 }
1616
1617 vcc->itf = vcc->dev->number;
1618 vcc->vpi = vpi;
1619 vcc->vci = vci;
1620
1621 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1622 set_bit(ATM_VF_ADDR, &vcc->flags);
1623
1624 vcc->dev_data = fore200e_vcc;
1625
1626 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1627
1628 vc_map->vcc = NULL;
1629
1630 clear_bit(ATM_VF_ADDR, &vcc->flags);
1631 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1632
1633 vcc->dev_data = NULL;
1634
1635 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1636
1637 fore200e_kfree(fore200e_vcc);
1638 return -EINVAL;
1639 }
1640
1641
1642 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1643
1644 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1645 set_bit(ATM_VF_HASQOS, &vcc->flags);
1646
1647 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1648 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1649 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1650 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1651 }
1652
1653 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1654 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1655 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1656
1657
1658 vc_map->incarn = ++fore200e->incarn_count;
1659
1660
1661 set_bit(ATM_VF_READY, &vcc->flags);
1662
1663 return 0;
1664}
1665
1666
1667static void
1668fore200e_close(struct atm_vcc* vcc)
1669{
1670 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1671 struct fore200e_vcc* fore200e_vcc;
1672 struct fore200e_vc_map* vc_map;
1673 unsigned long flags;
1674
1675 ASSERT(vcc);
1676 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1677 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1678
1679 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1680
1681 clear_bit(ATM_VF_READY, &vcc->flags);
1682
1683 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1684
1685 spin_lock_irqsave(&fore200e->q_lock, flags);
1686
1687 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1688
1689
1690 vc_map->vcc = NULL;
1691
1692 vcc->itf = vcc->vci = vcc->vpi = 0;
1693
1694 fore200e_vcc = FORE200E_VCC(vcc);
1695 vcc->dev_data = NULL;
1696
1697 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1698
1699
1700 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1701
1702 down(&fore200e->rate_sf);
1703 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1704 up(&fore200e->rate_sf);
1705
1706 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1707 }
1708
1709 clear_bit(ATM_VF_ADDR, &vcc->flags);
1710 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1711
1712 ASSERT(fore200e_vcc);
1713 fore200e_kfree(fore200e_vcc);
1714}
1715
1716
1717static int
1718fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1719{
1720 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1721 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1722 struct fore200e_vc_map* vc_map;
1723 struct host_txq* txq = &fore200e->host_txq;
1724 struct host_txq_entry* entry;
1725 struct tpd* tpd;
1726 struct tpd_haddr tpd_haddr;
1727 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1728 int tx_copy = 0;
1729 int tx_len = skb->len;
1730 u32* cell_header = NULL;
1731 unsigned char* skb_data;
1732 int skb_len;
1733 unsigned char* data;
1734 unsigned long flags;
1735
1736 ASSERT(vcc);
1737 ASSERT(atomic_read(&vcc->sk->wmem_alloc) >= 0);
1738 ASSERT(fore200e);
1739 ASSERT(fore200e_vcc);
1740
1741 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1742 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1743 dev_kfree_skb_any(skb);
1744 return -EINVAL;
1745 }
1746
1747#ifdef FORE200E_52BYTE_AAL0_SDU
1748 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1749 cell_header = (u32*) skb->data;
1750 skb_data = skb->data + 4;
1751 skb_len = tx_len = skb->len - 4;
1752
1753 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1754 }
1755 else
1756#endif
1757 {
1758 skb_data = skb->data;
1759 skb_len = skb->len;
1760 }
1761
1762 if (((unsigned long)skb_data) & 0x3) {
1763
1764 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1765 tx_copy = 1;
1766 tx_len = skb_len;
1767 }
1768
1769 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1770
1771
1772 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1773 tx_copy = 1;
1774 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1775 }
1776
1777 if (tx_copy) {
1778 data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1779 if (data == NULL) {
1780 if (vcc->pop) {
1781 vcc->pop(vcc, skb);
1782 }
1783 else {
1784 dev_kfree_skb_any(skb);
1785 }
1786 return -ENOMEM;
1787 }
1788
1789 memcpy(data, skb_data, skb_len);
1790 if (skb_len < tx_len)
1791 memset(data + skb_len, 0x00, tx_len - skb_len);
1792 }
1793 else {
1794 data = skb_data;
1795 }
1796
1797 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1798 ASSERT(vc_map->vcc == vcc);
1799
1800 retry_here:
1801
1802 spin_lock_irqsave(&fore200e->q_lock, flags);
1803
1804 entry = &txq->host_entry[ txq->head ];
1805
1806 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1807
1808
1809 fore200e_tx_irq(fore200e);
1810
1811 if (*entry->status != STATUS_FREE) {
1812
1813 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1814
1815
1816 if(--retry > 0) {
1817 schedule();
1818 goto retry_here;
1819 }
1820
1821 atomic_inc(&vcc->stats->tx_err);
1822
1823 fore200e->tx_sat++;
1824 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1825 fore200e->name, fore200e->cp_queues->heartbeat);
1826 if (vcc->pop) {
1827 vcc->pop(vcc, skb);
1828 }
1829 else {
1830 dev_kfree_skb_any(skb);
1831 }
1832
1833 if (tx_copy)
1834 kfree(data);
1835
1836 return -ENOBUFS;
1837 }
1838 }
1839
1840 entry->incarn = vc_map->incarn;
1841 entry->vc_map = vc_map;
1842 entry->skb = skb;
1843 entry->data = tx_copy ? data : NULL;
1844
1845 tpd = entry->tpd;
1846 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, FORE200E_DMA_TODEVICE);
1847 tpd->tsd[ 0 ].length = tx_len;
1848
1849 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1850 txq->txing++;
1851
1852
1853 fore200e->bus->dma_sync(fore200e, tpd->tsd[ 0 ].buffer, tpd->tsd[ 0 ].length, FORE200E_DMA_TODEVICE);
1854
1855 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1856 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1857 tpd->tsd[0].length, skb_len);
1858
1859 if (skb_len < fore200e_vcc->tx_min_pdu)
1860 fore200e_vcc->tx_min_pdu = skb_len;
1861 if (skb_len > fore200e_vcc->tx_max_pdu)
1862 fore200e_vcc->tx_max_pdu = skb_len;
1863 fore200e_vcc->tx_pdu++;
1864
1865
1866 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1867 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1868
1869 if (cell_header) {
1870 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1871 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1872 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1873 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1874 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1875 }
1876 else {
1877
1878 tpd->atm_header.clp = 0;
1879 tpd->atm_header.plt = 0;
1880 tpd->atm_header.vci = vcc->vci;
1881 tpd->atm_header.vpi = vcc->vpi;
1882 tpd->atm_header.gfc = 0;
1883 }
1884
1885 tpd->spec.length = tx_len;
1886 tpd->spec.nseg = 1;
1887 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1888 tpd->spec.intr = 1;
1889
1890 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT);
1891 tpd_haddr.pad = 0;
1892 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT;
1893
1894 *entry->status = STATUS_PENDING;
1895 fore200e->bus->write(*(u32*)&tpd_haddr, (u32*)&entry->cp_entry->tpd_haddr);
1896
1897 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1898
1899 return 0;
1900}
1901
1902
1903static int
1904fore200e_getstats(struct fore200e* fore200e)
1905{
1906 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1907 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1908 struct stats_opcode opcode;
1909 int ok;
1910 u32 stats_dma_addr;
1911
1912 if (fore200e->stats == NULL) {
1913 fore200e->stats = fore200e_kmalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1914 if (fore200e->stats == NULL)
1915 return -ENOMEM;
1916 }
1917
1918 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats,
1919 sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
1920
1921 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1922
1923 opcode.opcode = OPCODE_GET_STATS;
1924 opcode.pad = 0;
1925
1926 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1927
1928 *entry->status = STATUS_PENDING;
1929
1930 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.stats_block.opcode);
1931
1932 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1933
1934 *entry->status = STATUS_FREE;
1935
1936 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
1937
1938 if (ok == 0) {
1939 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1940 return -EIO;
1941 }
1942
1943 return 0;
1944}
1945
1946
1947static int
1948fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
1949{
1950
1951
1952 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1953 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1954
1955 return -EINVAL;
1956}
1957
1958
1959static int
1960fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
1961{
1962
1963
1964 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1965 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1966
1967 return -EINVAL;
1968}
1969
1970
1971#if 0
1972static int
1973fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1974{
1975 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1976 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1977 struct oc3_opcode opcode;
1978 int ok;
1979 u32 oc3_regs_dma_addr;
1980
1981 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
1982
1983 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1984
1985 opcode.opcode = OPCODE_GET_OC3;
1986 opcode.reg = 0;
1987 opcode.value = 0;
1988 opcode.mask = 0;
1989
1990 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1991
1992 *entry->status = STATUS_PENDING;
1993
1994 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1995
1996 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1997
1998 *entry->status = STATUS_FREE;
1999
2000 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
2001
2002 if (ok == 0) {
2003 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
2004 return -EIO;
2005 }
2006
2007 return 0;
2008}
2009#endif
2010
2011
2012static int
2013fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
2014{
2015 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2016 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
2017 struct oc3_opcode opcode;
2018 int ok;
2019
2020 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
2021
2022 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
2023
2024 opcode.opcode = OPCODE_SET_OC3;
2025 opcode.reg = reg;
2026 opcode.value = value;
2027 opcode.mask = mask;
2028
2029 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
2030
2031 *entry->status = STATUS_PENDING;
2032
2033 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
2034
2035 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
2036
2037 *entry->status = STATUS_FREE;
2038
2039 if (ok == 0) {
2040 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
2041 return -EIO;
2042 }
2043
2044 return 0;
2045}
2046
2047
2048static int
2049fore200e_setloop(struct fore200e* fore200e, int loop_mode)
2050{
2051 u32 mct_value, mct_mask;
2052 int error;
2053
2054 if (!capable(CAP_NET_ADMIN))
2055 return -EPERM;
2056
2057 switch (loop_mode) {
2058
2059 case ATM_LM_NONE:
2060 mct_value = 0;
2061 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
2062 break;
2063
2064 case ATM_LM_LOC_PHY:
2065 mct_value = mct_mask = SUNI_MCT_DLE;
2066 break;
2067
2068 case ATM_LM_RMT_PHY:
2069 mct_value = mct_mask = SUNI_MCT_LLE;
2070 break;
2071
2072 default:
2073 return -EINVAL;
2074 }
2075
2076 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
2077 if (error == 0)
2078 fore200e->loop_mode = loop_mode;
2079
2080 return error;
2081}
2082
2083
2084static inline unsigned int
2085fore200e_swap(unsigned int in)
2086{
2087#if defined(__LITTLE_ENDIAN)
2088 return swab32(in);
2089#else
2090 return in;
2091#endif
2092}
2093
2094
2095static int
2096fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats* arg)
2097{
2098 struct sonet_stats tmp;
2099
2100 if (fore200e_getstats(fore200e) < 0)
2101 return -EIO;
2102
2103 tmp.section_bip = fore200e_swap(fore200e->stats->oc3.section_bip8_errors);
2104 tmp.line_bip = fore200e_swap(fore200e->stats->oc3.line_bip24_errors);
2105 tmp.path_bip = fore200e_swap(fore200e->stats->oc3.path_bip8_errors);
2106 tmp.line_febe = fore200e_swap(fore200e->stats->oc3.line_febe_errors);
2107 tmp.path_febe = fore200e_swap(fore200e->stats->oc3.path_febe_errors);
2108 tmp.corr_hcs = fore200e_swap(fore200e->stats->oc3.corr_hcs_errors);
2109 tmp.uncorr_hcs = fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors);
2110 tmp.tx_cells = fore200e_swap(fore200e->stats->aal0.cells_transmitted) +
2111 fore200e_swap(fore200e->stats->aal34.cells_transmitted) +
2112 fore200e_swap(fore200e->stats->aal5.cells_transmitted);
2113 tmp.rx_cells = fore200e_swap(fore200e->stats->aal0.cells_received) +
2114 fore200e_swap(fore200e->stats->aal34.cells_received) +
2115 fore200e_swap(fore200e->stats->aal5.cells_received);
2116
2117 if (arg)
2118 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
2119
2120 return 0;
2121}
2122
2123
2124static int
2125fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void* arg)
2126{
2127 struct fore200e* fore200e = FORE200E_DEV(dev);
2128
2129 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
2130
2131 switch (cmd) {
2132
2133 case SONET_GETSTAT:
2134 return fore200e_fetch_stats(fore200e, (struct sonet_stats*)arg);
2135
2136 case SONET_GETDIAG:
2137 return put_user(0, (int*)arg) ? -EFAULT : 0;
2138
2139 case ATM_SETLOOP:
2140 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
2141
2142 case ATM_GETLOOP:
2143 return put_user(fore200e->loop_mode, (int*)arg) ? -EFAULT : 0;
2144
2145 case ATM_QUERYLOOP:
2146 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int*)arg) ? -EFAULT : 0;
2147 }
2148
2149 return -ENOSYS;
2150}
2151
2152
2153static int
2154fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
2155{
2156 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
2157 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
2158
2159 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
2160 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
2161 return -EINVAL;
2162 }
2163
2164 DPRINTK(2, "change_qos %d.%d.%d, "
2165 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
2166 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
2167 "available_cell_rate = %u",
2168 vcc->itf, vcc->vpi, vcc->vci,
2169 fore200e_traffic_class[ qos->txtp.traffic_class ],
2170 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
2171 fore200e_traffic_class[ qos->rxtp.traffic_class ],
2172 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
2173 flags, fore200e->available_cell_rate);
2174
2175 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
2176
2177 down(&fore200e->rate_sf);
2178 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
2179 up(&fore200e->rate_sf);
2180 return -EAGAIN;
2181 }
2182
2183 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
2184 fore200e->available_cell_rate -= qos->txtp.max_pcr;
2185
2186 up(&fore200e->rate_sf);
2187
2188 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2189
2190
2191 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
2192
2193 set_bit(ATM_VF_HASQOS, &vcc->flags);
2194
2195 return 0;
2196 }
2197
2198 return -EINVAL;
2199}
2200
2201
2202static int __init
2203fore200e_irq_request(struct fore200e* fore200e)
2204{
2205 if (request_irq(fore200e->irq, fore200e_interrupt, SA_SHIRQ, fore200e->name, fore200e->atm_dev) < 0) {
2206
2207 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2208 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2209 return -EBUSY;
2210 }
2211
2212 printk(FORE200E "IRQ %s reserved for device %s\n",
2213 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2214
2215#ifdef FORE200E_USE_TASKLET
2216 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
2217 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
2218#endif
2219
2220 fore200e->state = FORE200E_STATE_IRQ;
2221 return 0;
2222}
2223
2224
2225static int __init
2226fore200e_get_esi(struct fore200e* fore200e)
2227{
2228 struct prom_data* prom = fore200e_kmalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2229 int ok, i;
2230
2231 if (!prom)
2232 return -ENOMEM;
2233
2234 ok = fore200e->bus->prom_read(fore200e, prom);
2235 if (ok < 0) {
2236 fore200e_kfree(prom);
2237 return -EBUSY;
2238 }
2239
2240 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %02x:%02x:%02x:%02x:%02x:%02x\n",
2241 fore200e->name,
2242 (prom->hw_revision & 0xFF) + '@',
2243 prom->serial_number & 0xFFFF,
2244 prom->mac_addr[ 2 ], prom->mac_addr[ 3 ], prom->mac_addr[ 4 ],
2245 prom->mac_addr[ 5 ], prom->mac_addr[ 6 ], prom->mac_addr[ 7 ]);
2246
2247 for (i = 0; i < ESI_LEN; i++) {
2248 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2249 }
2250
2251 fore200e_kfree(prom);
2252
2253 return 0;
2254}
2255
2256
2257static int __init
2258fore200e_alloc_rx_buf(struct fore200e* fore200e)
2259{
2260 int scheme, magn, nbr, size, i;
2261
2262 struct host_bsq* bsq;
2263 struct buffer* buffer;
2264
2265 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2266 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2267
2268 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2269
2270 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2271 size = fore200e_rx_buf_size[ scheme ][ magn ];
2272
2273 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2274
2275
2276 buffer = bsq->buffer = fore200e_kmalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2277
2278 if (buffer == NULL)
2279 return -ENOMEM;
2280
2281 bsq->freebuf = NULL;
2282
2283 for (i = 0; i < nbr; i++) {
2284
2285 buffer[ i ].scheme = scheme;
2286 buffer[ i ].magn = magn;
2287#ifdef FORE200E_BSQ_DEBUG
2288 buffer[ i ].index = i;
2289 buffer[ i ].supplied = 0;
2290#endif
2291
2292
2293 if (fore200e_chunk_alloc(fore200e,
2294 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2295 FORE200E_DMA_FROMDEVICE) < 0) {
2296
2297 while (i > 0)
2298 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2299 fore200e_kfree(buffer);
2300
2301 return -ENOMEM;
2302 }
2303
2304
2305 buffer[ i ].next = bsq->freebuf;
2306 bsq->freebuf = &buffer[ i ];
2307 }
2308
2309 bsq->freebuf_count = nbr;
2310
2311#ifdef FORE200E_BSQ_DEBUG
2312 bsq_audit(3, bsq, scheme, magn);
2313#endif
2314 }
2315 }
2316
2317 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2318 return 0;
2319}
2320
2321
2322static int __init
2323fore200e_init_bs_queue(struct fore200e* fore200e)
2324{
2325 int scheme, magn, i;
2326
2327 struct host_bsq* bsq;
2328 struct cp_bsq_entry* cp_entry;
2329
2330 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2331 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2332
2333 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2334
2335 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2336
2337
2338 if (fore200e->bus->dma_chunk_alloc(fore200e,
2339 &bsq->status,
2340 sizeof(enum status),
2341 QUEUE_SIZE_BS,
2342 fore200e->bus->status_alignment) < 0) {
2343 return -ENOMEM;
2344 }
2345
2346
2347 if (fore200e->bus->dma_chunk_alloc(fore200e,
2348 &bsq->rbd_block,
2349 sizeof(struct rbd_block),
2350 QUEUE_SIZE_BS,
2351 fore200e->bus->descr_alignment) < 0) {
2352
2353 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2354 return -ENOMEM;
2355 }
2356
2357
2358 cp_entry = (struct cp_bsq_entry*)(fore200e->virt_base +
2359 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]));
2360
2361
2362 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2363
2364 bsq->host_entry[ i ].status =
2365 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2366 bsq->host_entry[ i ].rbd_block =
2367 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2368 bsq->host_entry[ i ].rbd_block_dma =
2369 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2370 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2371
2372 *bsq->host_entry[ i ].status = STATUS_FREE;
2373
2374 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2375 &cp_entry[ i ].status_haddr);
2376 }
2377 }
2378 }
2379
2380 fore200e->state = FORE200E_STATE_INIT_BSQ;
2381 return 0;
2382}
2383
2384
2385static int __init
2386fore200e_init_rx_queue(struct fore200e* fore200e)
2387{
2388 struct host_rxq* rxq = &fore200e->host_rxq;
2389 struct cp_rxq_entry* cp_entry;
2390 int i;
2391
2392 DPRINTK(2, "receive queue is being initialized\n");
2393
2394
2395 if (fore200e->bus->dma_chunk_alloc(fore200e,
2396 &rxq->status,
2397 sizeof(enum status),
2398 QUEUE_SIZE_RX,
2399 fore200e->bus->status_alignment) < 0) {
2400 return -ENOMEM;
2401 }
2402
2403
2404 if (fore200e->bus->dma_chunk_alloc(fore200e,
2405 &rxq->rpd,
2406 sizeof(struct rpd),
2407 QUEUE_SIZE_RX,
2408 fore200e->bus->descr_alignment) < 0) {
2409
2410 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2411 return -ENOMEM;
2412 }
2413
2414
2415 cp_entry = (struct cp_rxq_entry*)(fore200e->virt_base +
2416 fore200e->bus->read(&fore200e->cp_queues->cp_rxq));
2417
2418
2419 for (i=0; i < QUEUE_SIZE_RX; i++) {
2420
2421 rxq->host_entry[ i ].status =
2422 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2423 rxq->host_entry[ i ].rpd =
2424 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2425 rxq->host_entry[ i ].rpd_dma =
2426 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2427 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2428
2429 *rxq->host_entry[ i ].status = STATUS_FREE;
2430
2431 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2432 &cp_entry[ i ].status_haddr);
2433
2434 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2435 &cp_entry[ i ].rpd_haddr);
2436 }
2437
2438
2439 rxq->head = 0;
2440
2441 fore200e->state = FORE200E_STATE_INIT_RXQ;
2442 return 0;
2443}
2444
2445
2446static int __init
2447fore200e_init_tx_queue(struct fore200e* fore200e)
2448{
2449 struct host_txq* txq = &fore200e->host_txq;
2450 struct cp_txq_entry* cp_entry;
2451 int i;
2452
2453 DPRINTK(2, "transmit queue is being initialized\n");
2454
2455
2456 if (fore200e->bus->dma_chunk_alloc(fore200e,
2457 &txq->status,
2458 sizeof(enum status),
2459 QUEUE_SIZE_TX,
2460 fore200e->bus->status_alignment) < 0) {
2461 return -ENOMEM;
2462 }
2463
2464
2465 if (fore200e->bus->dma_chunk_alloc(fore200e,
2466 &txq->tpd,
2467 sizeof(struct tpd),
2468 QUEUE_SIZE_TX,
2469 fore200e->bus->descr_alignment) < 0) {
2470
2471 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2472 return -ENOMEM;
2473 }
2474
2475
2476 cp_entry = (struct cp_txq_entry*)(fore200e->virt_base +
2477 fore200e->bus->read(&fore200e->cp_queues->cp_txq));
2478
2479
2480 for (i=0; i < QUEUE_SIZE_TX; i++) {
2481
2482 txq->host_entry[ i ].status =
2483 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2484 txq->host_entry[ i ].tpd =
2485 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2486 txq->host_entry[ i ].tpd_dma =
2487 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2488 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2489
2490 *txq->host_entry[ i ].status = STATUS_FREE;
2491
2492 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2493 &cp_entry[ i ].status_haddr);
2494
2495
2496
2497
2498
2499 }
2500
2501
2502 txq->head = 0;
2503 txq->tail = 0;
2504
2505 fore200e->state = FORE200E_STATE_INIT_TXQ;
2506 return 0;
2507}
2508
2509
2510static int __init
2511fore200e_init_cmd_queue(struct fore200e* fore200e)
2512{
2513 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2514 struct cp_cmdq_entry* cp_entry;
2515 int i;
2516
2517 DPRINTK(2, "command queue is being initialized\n");
2518
2519
2520 if (fore200e->bus->dma_chunk_alloc(fore200e,
2521 &cmdq->status,
2522 sizeof(enum status),
2523 QUEUE_SIZE_CMD,
2524 fore200e->bus->status_alignment) < 0) {
2525 return -ENOMEM;
2526 }
2527
2528
2529 cp_entry = (struct cp_cmdq_entry*)(fore200e->virt_base +
2530 fore200e->bus->read(&fore200e->cp_queues->cp_cmdq));
2531
2532
2533 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2534
2535 cmdq->host_entry[ i ].status =
2536 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2537 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2538
2539 *cmdq->host_entry[ i ].status = STATUS_FREE;
2540
2541 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2542 &cp_entry[ i ].status_haddr);
2543 }
2544
2545
2546 cmdq->head = 0;
2547
2548 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2549 return 0;
2550}
2551
2552
2553static void __init
2554fore200e_param_bs_queue(struct fore200e* fore200e,
2555 enum buffer_scheme scheme, enum buffer_magn magn,
2556 int queue_length, int pool_size, int supply_blksize)
2557{
2558 struct bs_spec* bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2559
2560 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2561 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2562 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2563 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2564}
2565
2566
2567static int __init
2568fore200e_initialize(struct fore200e* fore200e)
2569{
2570 struct cp_queues* cpq;
2571 int ok, scheme, magn;
2572
2573 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2574
2575 init_MUTEX(&fore200e->rate_sf);
2576 spin_lock_init(&fore200e->q_lock);
2577
2578 cpq = fore200e->cp_queues = (struct cp_queues*) (fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET);
2579
2580
2581 fore200e->bus->write(1, &cpq->imask);
2582
2583 if (fore200e->bus->irq_enable)
2584 fore200e->bus->irq_enable(fore200e);
2585
2586 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2587
2588 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2589 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2590 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2591
2592 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2593 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2594
2595 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2596 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2597 fore200e_param_bs_queue(fore200e, scheme, magn,
2598 QUEUE_SIZE_BS,
2599 fore200e_rx_buf_nbr[ scheme ][ magn ],
2600 RBD_BLK_SIZE);
2601
2602
2603 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2604 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2605
2606 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2607 if (ok == 0) {
2608 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2609 return -ENODEV;
2610 }
2611
2612 printk(FORE200E "device %s initialized\n", fore200e->name);
2613
2614 fore200e->state = FORE200E_STATE_INITIALIZE;
2615 return 0;
2616}
2617
2618
2619static void __init
2620fore200e_monitor_putc(struct fore200e* fore200e, char c)
2621{
2622 struct cp_monitor* monitor = fore200e->cp_monitor;
2623
2624#if 0
2625 printk("%c", c);
2626#endif
2627 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2628}
2629
2630
2631static int __init
2632fore200e_monitor_getc(struct fore200e* fore200e)
2633{
2634 struct cp_monitor* monitor = fore200e->cp_monitor;
2635 unsigned long timeout = jiffies + MSECS(50);
2636 int c;
2637
2638 while (time_before(jiffies, timeout)) {
2639
2640 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2641
2642 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2643
2644 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2645#if 0
2646 printk("%c", c & 0xFF);
2647#endif
2648 return c & 0xFF;
2649 }
2650 }
2651
2652 return -1;
2653}
2654
2655
2656static void __init
2657fore200e_monitor_puts(struct fore200e* fore200e, char* str)
2658{
2659 while (*str) {
2660
2661
2662 while (fore200e_monitor_getc(fore200e) >= 0);
2663
2664 fore200e_monitor_putc(fore200e, *str++);
2665 }
2666
2667 while (fore200e_monitor_getc(fore200e) >= 0);
2668}
2669
2670
2671static int __init
2672fore200e_start_fw(struct fore200e* fore200e)
2673{
2674 int ok;
2675 char cmd[ 48 ];
2676 struct fw_header* fw_header = (struct fw_header*) fore200e->bus->fw_data;
2677
2678 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2679
2680#if defined(__sparc_v9__)
2681
2682 fore200e_spin(100);
2683#endif
2684
2685 sprintf(cmd, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2686
2687 fore200e_monitor_puts(fore200e, cmd);
2688
2689 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000);
2690 if (ok == 0) {
2691 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2692 return -ENODEV;
2693 }
2694
2695 printk(FORE200E "device %s firmware started\n", fore200e->name);
2696
2697 fore200e->state = FORE200E_STATE_START_FW;
2698 return 0;
2699}
2700
2701
2702static int __init
2703fore200e_load_fw(struct fore200e* fore200e)
2704{
2705 u32* fw_data = (u32*) fore200e->bus->fw_data;
2706 u32 fw_size = (u32) *fore200e->bus->fw_size / sizeof(u32);
2707
2708 struct fw_header* fw_header = (struct fw_header*) fw_data;
2709
2710 u32* load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2711
2712 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2713 fore200e->name, load_addr, fw_size);
2714
2715 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2716 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2717 return -ENODEV;
2718 }
2719
2720 for (; fw_size--; fw_data++, load_addr++)
2721 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2722
2723 fore200e->state = FORE200E_STATE_LOAD_FW;
2724 return 0;
2725}
2726
2727
2728static int __init
2729fore200e_register(struct fore200e* fore200e)
2730{
2731 struct atm_dev* atm_dev;
2732
2733 DPRINTK(2, "device %s being registered\n", fore200e->name);
2734
2735 atm_dev = atm_dev_register(fore200e->bus->proc_name, &fore200e_ops, -1,
2736 NULL);
2737 if (atm_dev == NULL) {
2738 printk(FORE200E "unable to register device %s\n", fore200e->name);
2739 return -ENODEV;
2740 }
2741
2742 atm_dev->dev_data = fore200e;
2743 fore200e->atm_dev = atm_dev;
2744
2745 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2746 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2747
2748 fore200e->available_cell_rate = ATM_OC3_PCR;
2749
2750 fore200e->state = FORE200E_STATE_REGISTER;
2751 return 0;
2752}
2753
2754
2755static int __init
2756fore200e_init(struct fore200e* fore200e)
2757{
2758 if (fore200e_register(fore200e) < 0)
2759 return -ENODEV;
2760
2761 if (fore200e->bus->configure(fore200e) < 0)
2762 return -ENODEV;
2763
2764 if (fore200e->bus->map(fore200e) < 0)
2765 return -ENODEV;
2766
2767 if (fore200e_reset(fore200e, 1) < 0)
2768 return -ENODEV;
2769
2770 if (fore200e_load_fw(fore200e) < 0)
2771 return -ENODEV;
2772
2773 if (fore200e_start_fw(fore200e) < 0)
2774 return -ENODEV;
2775
2776 if (fore200e_initialize(fore200e) < 0)
2777 return -ENODEV;
2778
2779 if (fore200e_init_cmd_queue(fore200e) < 0)
2780 return -ENOMEM;
2781
2782 if (fore200e_init_tx_queue(fore200e) < 0)
2783 return -ENOMEM;
2784
2785 if (fore200e_init_rx_queue(fore200e) < 0)
2786 return -ENOMEM;
2787
2788 if (fore200e_init_bs_queue(fore200e) < 0)
2789 return -ENOMEM;
2790
2791 if (fore200e_alloc_rx_buf(fore200e) < 0)
2792 return -ENOMEM;
2793
2794 if (fore200e_get_esi(fore200e) < 0)
2795 return -EIO;
2796
2797 if (fore200e_irq_request(fore200e) < 0)
2798 return -EBUSY;
2799
2800 fore200e_supply(fore200e);
2801
2802
2803 fore200e->state = FORE200E_STATE_COMPLETE;
2804 return 0;
2805}
2806
2807
2808int __init
2809fore200e_detect(void)
2810{
2811 const struct fore200e_bus* bus;
2812 struct fore200e* fore200e;
2813 int index, link;
2814
2815 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2816
2817
2818 for (link = 0, bus = fore200e_bus; bus->model_name; bus++) {
2819
2820
2821 for (index = 0; (fore200e = bus->detect(bus, index)); index++) {
2822
2823 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2824 fore200e->bus->model_name,
2825 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2826
2827 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2828
2829 if (fore200e_init(fore200e) < 0) {
2830
2831 fore200e_shutdown(fore200e);
2832 break;
2833 }
2834
2835 link++;
2836
2837 fore200e->next = fore200e_boards;
2838 fore200e_boards = fore200e;
2839 }
2840 }
2841
2842 return link;
2843}
2844
2845
2846#ifdef MODULE
2847static void
2848fore200e_cleanup(struct fore200e** head)
2849{
2850 struct fore200e* fore200e = *head;
2851
2852 fore200e_shutdown(fore200e);
2853
2854 *head = fore200e->next;
2855
2856 kfree(fore200e);
2857}
2858#endif
2859
2860
2861static int
2862fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2863{
2864 struct fore200e* fore200e = FORE200E_DEV(dev);
2865 struct fore200e_vcc* fore200e_vcc;
2866 struct atm_vcc* vcc;
2867 int i, len, left = *pos;
2868 unsigned long flags;
2869
2870 if (!left--) {
2871
2872 if (fore200e_getstats(fore200e) < 0)
2873 return -EIO;
2874
2875 len = sprintf(page,"\n"
2876 " device:\n"
2877 " internal name:\t\t%s\n", fore200e->name);
2878
2879
2880 if (fore200e->bus->proc_read)
2881 len += fore200e->bus->proc_read(fore200e, page + len);
2882
2883 len += sprintf(page + len,
2884 " interrupt line:\t\t%s\n"
2885 " physical base address:\t0x%p\n"
2886 " virtual base address:\t0x%p\n"
2887 " factory address (ESI):\t%02x:%02x:%02x:%02x:%02x:%02x\n"
2888 " board serial number:\t\t%d\n\n",
2889 fore200e_irq_itoa(fore200e->irq),
2890 (void*)fore200e->phys_base,
2891 (void*)fore200e->virt_base,
2892 fore200e->esi[0], fore200e->esi[1], fore200e->esi[2],
2893 fore200e->esi[3], fore200e->esi[4], fore200e->esi[5],
2894 fore200e->esi[4] * 256 + fore200e->esi[5]);
2895
2896 return len;
2897 }
2898
2899 if (!left--)
2900 return sprintf(page,
2901 " free small bufs, scheme 1:\t%d\n"
2902 " free large bufs, scheme 1:\t%d\n"
2903 " free small bufs, scheme 2:\t%d\n"
2904 " free large bufs, scheme 2:\t%d\n",
2905 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2906 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2907 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2908 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2909
2910 if (!left--) {
2911 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2912
2913 len = sprintf(page,"\n\n"
2914 " cell processor:\n"
2915 " heartbeat state:\t\t");
2916
2917 if (hb >> 16 != 0xDEAD)
2918 len += sprintf(page + len, "0x%08x\n", hb);
2919 else
2920 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2921
2922 return len;
2923 }
2924
2925 if (!left--) {
2926 static const char* media_name[] = {
2927 "unshielded twisted pair",
2928 "multimode optical fiber ST",
2929 "multimode optical fiber SC",
2930 "single-mode optical fiber ST",
2931 "single-mode optical fiber SC",
2932 "unknown"
2933 };
2934
2935 static const char* oc3_mode[] = {
2936 "normal operation",
2937 "diagnostic loopback",
2938 "line loopback",
2939 "unknown"
2940 };
2941
2942 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2943 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2944 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2945 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2946 u32 oc3_index;
2947
2948 if ((media_index < 0) || (media_index > 4))
2949 media_index = 5;
2950
2951 switch (fore200e->loop_mode) {
2952 case ATM_LM_NONE: oc3_index = 0;
2953 break;
2954 case ATM_LM_LOC_PHY: oc3_index = 1;
2955 break;
2956 case ATM_LM_RMT_PHY: oc3_index = 2;
2957 break;
2958 default: oc3_index = 3;
2959 }
2960
2961 return sprintf(page,
2962 " firmware release:\t\t%d.%d.%d\n"
2963 " monitor release:\t\t%d.%d\n"
2964 " media type:\t\t\t%s\n"
2965 " OC-3 revision:\t\t0x%x\n"
2966 " OC-3 mode:\t\t\t%s",
2967 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2968 mon960_release >> 16, mon960_release << 16 >> 16,
2969 media_name[ media_index ],
2970 oc3_revision,
2971 oc3_mode[ oc3_index ]);
2972 }
2973
2974 if (!left--) {
2975 struct cp_monitor* cp_monitor = fore200e->cp_monitor;
2976
2977 return sprintf(page,
2978 "\n\n"
2979 " monitor:\n"
2980 " version number:\t\t%d\n"
2981 " boot status word:\t\t0x%08x\n",
2982 fore200e->bus->read(&cp_monitor->mon_version),
2983 fore200e->bus->read(&cp_monitor->bstat));
2984 }
2985
2986 if (!left--)
2987 return sprintf(page,
2988 "\n"
2989 " device statistics:\n"
2990 " 4b5b:\n"
2991 " crc_header_errors:\t\t%10u\n"
2992 " framing_errors:\t\t%10u\n",
2993 fore200e_swap(fore200e->stats->phy.crc_header_errors),
2994 fore200e_swap(fore200e->stats->phy.framing_errors));
2995
2996 if (!left--)
2997 return sprintf(page, "\n"
2998 " OC-3:\n"
2999 " section_bip8_errors:\t%10u\n"
3000 " path_bip8_errors:\t\t%10u\n"
3001 " line_bip24_errors:\t\t%10u\n"
3002 " line_febe_errors:\t\t%10u\n"
3003 " path_febe_errors:\t\t%10u\n"
3004 " corr_hcs_errors:\t\t%10u\n"
3005 " ucorr_hcs_errors:\t\t%10u\n",
3006 fore200e_swap(fore200e->stats->oc3.section_bip8_errors),
3007 fore200e_swap(fore200e->stats->oc3.path_bip8_errors),
3008 fore200e_swap(fore200e->stats->oc3.line_bip24_errors),
3009 fore200e_swap(fore200e->stats->oc3.line_febe_errors),
3010 fore200e_swap(fore200e->stats->oc3.path_febe_errors),
3011 fore200e_swap(fore200e->stats->oc3.corr_hcs_errors),
3012 fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors));
3013
3014 if (!left--)
3015 return sprintf(page,"\n"
3016 " ATM:\t\t\t\t cells\n"
3017 " TX:\t\t\t%10u\n"
3018 " RX:\t\t\t%10u\n"
3019 " vpi out of range:\t\t%10u\n"
3020 " vpi no conn:\t\t%10u\n"
3021 " vci out of range:\t\t%10u\n"
3022 " vci no conn:\t\t%10u\n",
3023 fore200e_swap(fore200e->stats->atm.cells_transmitted),
3024 fore200e_swap(fore200e->stats->atm.cells_received),
3025 fore200e_swap(fore200e->stats->atm.vpi_bad_range),
3026 fore200e_swap(fore200e->stats->atm.vpi_no_conn),
3027 fore200e_swap(fore200e->stats->atm.vci_bad_range),
3028 fore200e_swap(fore200e->stats->atm.vci_no_conn));
3029
3030 if (!left--)
3031 return sprintf(page,"\n"
3032 " AAL0:\t\t\t cells\n"
3033 " TX:\t\t\t%10u\n"
3034 " RX:\t\t\t%10u\n"
3035 " dropped:\t\t\t%10u\n",
3036 fore200e_swap(fore200e->stats->aal0.cells_transmitted),
3037 fore200e_swap(fore200e->stats->aal0.cells_received),
3038 fore200e_swap(fore200e->stats->aal0.cells_dropped));
3039
3040 if (!left--)
3041 return sprintf(page,"\n"
3042 " AAL3/4:\n"
3043 " SAR sublayer:\t\t cells\n"
3044 " TX:\t\t\t%10u\n"
3045 " RX:\t\t\t%10u\n"
3046 " dropped:\t\t\t%10u\n"
3047 " CRC errors:\t\t%10u\n"
3048 " protocol errors:\t\t%10u\n\n"
3049 " CS sublayer:\t\t PDUs\n"
3050 " TX:\t\t\t%10u\n"
3051 " RX:\t\t\t%10u\n"
3052 " dropped:\t\t\t%10u\n"
3053 " protocol errors:\t\t%10u\n",
3054 fore200e_swap(fore200e->stats->aal34.cells_transmitted),
3055 fore200e_swap(fore200e->stats->aal34.cells_received),
3056 fore200e_swap(fore200e->stats->aal34.cells_dropped),
3057 fore200e_swap(fore200e->stats->aal34.cells_crc_errors),
3058 fore200e_swap(fore200e->stats->aal34.cells_protocol_errors),
3059 fore200e_swap(fore200e->stats->aal34.cspdus_transmitted),
3060 fore200e_swap(fore200e->stats->aal34.cspdus_received),
3061 fore200e_swap(fore200e->stats->aal34.cspdus_dropped),
3062 fore200e_swap(fore200e->stats->aal34.cspdus_protocol_errors));
3063
3064 if (!left--)
3065 return sprintf(page,"\n"
3066 " AAL5:\n"
3067 " SAR sublayer:\t\t cells\n"
3068 " TX:\t\t\t%10u\n"
3069 " RX:\t\t\t%10u\n"
3070 " dropped:\t\t\t%10u\n"
3071 " congestions:\t\t%10u\n\n"
3072 " CS sublayer:\t\t PDUs\n"
3073 " TX:\t\t\t%10u\n"
3074 " RX:\t\t\t%10u\n"
3075 " dropped:\t\t\t%10u\n"
3076 " CRC errors:\t\t%10u\n"
3077 " protocol errors:\t\t%10u\n",
3078 fore200e_swap(fore200e->stats->aal5.cells_transmitted),
3079 fore200e_swap(fore200e->stats->aal5.cells_received),
3080 fore200e_swap(fore200e->stats->aal5.cells_dropped),
3081 fore200e_swap(fore200e->stats->aal5.congestion_experienced),
3082 fore200e_swap(fore200e->stats->aal5.cspdus_transmitted),
3083 fore200e_swap(fore200e->stats->aal5.cspdus_received),
3084 fore200e_swap(fore200e->stats->aal5.cspdus_dropped),
3085 fore200e_swap(fore200e->stats->aal5.cspdus_crc_errors),
3086 fore200e_swap(fore200e->stats->aal5.cspdus_protocol_errors));
3087
3088 if (!left--)
3089 return sprintf(page,"\n"
3090 " AUX:\t\t allocation failures\n"
3091 " small b1:\t\t\t%10u\n"
3092 " large b1:\t\t\t%10u\n"
3093 " small b2:\t\t\t%10u\n"
3094 " large b2:\t\t\t%10u\n"
3095 " RX PDUs:\t\t\t%10u\n"
3096 " TX PDUs:\t\t\t%10lu\n",
3097 fore200e_swap(fore200e->stats->aux.small_b1_failed),
3098 fore200e_swap(fore200e->stats->aux.large_b1_failed),
3099 fore200e_swap(fore200e->stats->aux.small_b2_failed),
3100 fore200e_swap(fore200e->stats->aux.large_b2_failed),
3101 fore200e_swap(fore200e->stats->aux.rpd_alloc_failed),
3102 fore200e->tx_sat);
3103
3104 if (!left--)
3105 return sprintf(page,"\n"
3106 " receive carrier:\t\t\t%s\n",
3107 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
3108
3109 if (!left--) {
3110 return sprintf(page,"\n"
3111 " VCCs:\n address VPI VCI AAL "
3112 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
3113 }
3114
3115
3116 for (i = 0; i < NBR_CONNECT; i++) {
3117
3118 vcc = fore200e->vc_map[i].vcc;
3119
3120 if (vcc == NULL)
3121 continue;
3122
3123 spin_lock_irqsave(&fore200e->q_lock, flags);
3124
3125 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
3126
3127 fore200e_vcc = FORE200E_VCC(vcc);
3128 ASSERT(fore200e_vcc);
3129
3130 len = sprintf(page,
3131 " %08x %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
3132 (u32)(unsigned long)vcc,
3133 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
3134 fore200e_vcc->tx_pdu,
3135 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
3136 fore200e_vcc->tx_max_pdu,
3137 fore200e_vcc->rx_pdu,
3138 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
3139 fore200e_vcc->rx_max_pdu
3140 );
3141
3142 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3143 return len;
3144 }
3145
3146 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3147 }
3148
3149 return 0;
3150}
3151
3152
3153#ifdef MODULE
3154static int __init
3155fore200e_module_init(void)
3156{
3157 DPRINTK(1, "module loaded\n");
3158 return fore200e_detect() == 0;
3159}
3160
3161static void __exit
3162fore200e_module_cleanup(void)
3163{
3164 while (fore200e_boards) {
3165 fore200e_cleanup(&fore200e_boards);
3166 }
3167 DPRINTK(1, "module being removed\n");
3168}
3169
3170module_init(fore200e_module_init);
3171module_exit(fore200e_module_cleanup);
3172#endif
3173
3174
3175static const struct atmdev_ops fore200e_ops =
3176{
3177 open: fore200e_open,
3178 close: fore200e_close,
3179 ioctl: fore200e_ioctl,
3180 getsockopt: fore200e_getsockopt,
3181 setsockopt: fore200e_setsockopt,
3182 send: fore200e_send,
3183 change_qos: fore200e_change_qos,
3184 proc_read: fore200e_proc_read,
3185 owner: THIS_MODULE
3186};
3187
3188
3189#ifdef CONFIG_ATM_FORE200E_PCA
3190extern const unsigned char _fore200e_pca_fw_data[];
3191extern const unsigned int _fore200e_pca_fw_size;
3192#endif
3193#ifdef CONFIG_ATM_FORE200E_SBA
3194extern const unsigned char _fore200e_sba_fw_data[];
3195extern const unsigned int _fore200e_sba_fw_size;
3196#endif
3197
3198static const struct fore200e_bus fore200e_bus[] = {
3199#ifdef CONFIG_ATM_FORE200E_PCA
3200 { "PCA-200E", "pca200e", 32, 4, 32,
3201 _fore200e_pca_fw_data, &_fore200e_pca_fw_size,
3202 fore200e_pca_read,
3203 fore200e_pca_write,
3204 fore200e_pca_dma_map,
3205 fore200e_pca_dma_unmap,
3206 fore200e_pca_dma_sync,
3207 fore200e_pca_dma_chunk_alloc,
3208 fore200e_pca_dma_chunk_free,
3209 fore200e_pca_detect,
3210 fore200e_pca_configure,
3211 fore200e_pca_map,
3212 fore200e_pca_reset,
3213 fore200e_pca_prom_read,
3214 fore200e_pca_unmap,
3215 NULL,
3216 fore200e_pca_irq_check,
3217 fore200e_pca_irq_ack,
3218 fore200e_pca_proc_read,
3219 },
3220#endif
3221#ifdef CONFIG_ATM_FORE200E_SBA
3222 { "SBA-200E", "sba200e", 32, 64, 32,
3223 _fore200e_sba_fw_data, &_fore200e_sba_fw_size,
3224 fore200e_sba_read,
3225 fore200e_sba_write,
3226 fore200e_sba_dma_map,
3227 fore200e_sba_dma_unmap,
3228 fore200e_sba_dma_sync,
3229 fore200e_sba_dma_chunk_alloc,
3230 fore200e_sba_dma_chunk_free,
3231 fore200e_sba_detect,
3232 fore200e_sba_configure,
3233 fore200e_sba_map,
3234 fore200e_sba_reset,
3235 fore200e_sba_prom_read,
3236 fore200e_sba_unmap,
3237 fore200e_sba_irq_enable,
3238 fore200e_sba_irq_check,
3239 fore200e_sba_irq_ack,
3240 fore200e_sba_proc_read,
3241 },
3242#endif
3243 {}
3244};
3245
3246#ifdef MODULE_LICENSE
3247MODULE_LICENSE("GPL");
3248#endif
3249