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15#include <stdarg.h>
16#include <linux/config.h>
17#include <linux/types.h>
18#include <linux/errno.h>
19#include <linux/kernel.h>
20#include <linux/delay.h>
21#include <linux/sched.h>
22#include <linux/miscdevice.h>
23#include <linux/blkdev.h>
24#include <linux/pci.h>
25#include <linux/slab.h>
26#include <linux/poll.h>
27#include <linux/adb.h>
28#include <linux/pmu.h>
29#include <linux/cuda.h>
30#include <linux/smp_lock.h>
31#include <linux/module.h>
32#include <linux/spinlock.h>
33#include <linux/pm.h>
34#include <linux/proc_fs.h>
35#include <linux/init.h>
36#include <asm/prom.h>
37#include <asm/machdep.h>
38#include <asm/io.h>
39#include <asm/pgtable.h>
40#include <asm/system.h>
41#include <asm/sections.h>
42#include <asm/irq.h>
43#include <asm/hardirq.h>
44#include <asm/pmac_feature.h>
45#include <asm/uaccess.h>
46#include <asm/mmu_context.h>
47#include <asm/sections.h>
48#include <asm/cputable.h>
49#include <asm/time.h>
50#ifdef CONFIG_PMAC_BACKLIGHT
51#include <asm/backlight.h>
52#endif
53
54
55#undef SUSPEND_USES_PMU
56#define DEBUG_SLEEP
57#undef VERBOSE_WAKEUP
58#undef HACKED_PCI_SAVE
59#define NEW_OHARE_CODE
60
61
62#define PMU_MINOR 154
63
64
65#define BATTERY_POLLING_COUNT 2
66
67static volatile unsigned char *via;
68
69
70#define RS 0x200
71#define B 0
72#define A RS
73#define DIRB (2*RS)
74#define DIRA (3*RS)
75#define T1CL (4*RS)
76#define T1CH (5*RS)
77#define T1LL (6*RS)
78#define T1LH (7*RS)
79#define T2CL (8*RS)
80#define T2CH (9*RS)
81#define SR (10*RS)
82#define ACR (11*RS)
83#define PCR (12*RS)
84#define IFR (13*RS)
85#define IER (14*RS)
86#define ANH (15*RS)
87
88
89#define TACK 0x08
90#define TREQ 0x10
91
92
93#define SR_CTRL 0x1c
94#define SR_EXT 0x0c
95#define SR_OUT 0x10
96
97
98#define IER_SET 0x80
99#define IER_CLR 0
100#define SR_INT 0x04
101#define CB2_INT 0x08
102#define CB1_INT 0x10
103
104static volatile enum pmu_state {
105 idle,
106 sending,
107 intack,
108 reading,
109 reading_intr,
110} pmu_state;
111
112static volatile enum int_data_state {
113 int_data_empty,
114 int_data_fill,
115 int_data_ready,
116 int_data_flush
117} int_data_state[2] = { int_data_empty, int_data_empty };
118
119static struct adb_request *current_req;
120static struct adb_request *last_req;
121static struct adb_request *req_awaiting_reply;
122static unsigned char interrupt_data[2][32];
123static int interrupt_data_len[2];
124static int int_data_last;
125static unsigned char *reply_ptr;
126static int data_index;
127static int data_len;
128static volatile int adb_int_pending;
129static volatile int disable_poll;
130static struct adb_request bright_req_1, bright_req_2, bright_req_3;
131static struct device_node *vias;
132static int pmu_kind = PMU_UNKNOWN;
133static int pmu_fully_inited = 0;
134static int pmu_has_adb;
135static unsigned char *gpio_reg = NULL;
136static int gpio_irq = -1;
137static volatile int pmu_suspended = 0;
138static spinlock_t pmu_lock;
139static u8 pmu_intr_mask;
140static int pmu_version;
141static int drop_interrupts;
142#ifdef CONFIG_PMAC_PBOOK
143static int option_lid_wakeup = 1;
144static int sleep_in_progress;
145static int can_sleep;
146#endif
147
148static struct proc_dir_entry *proc_pmu_root;
149static struct proc_dir_entry *proc_pmu_info;
150static struct proc_dir_entry *proc_pmu_options;
151
152#ifdef CONFIG_PMAC_PBOOK
153int pmu_battery_count;
154int pmu_cur_battery;
155unsigned int pmu_power_flags;
156struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
157static int query_batt_timer = BATTERY_POLLING_COUNT;
158static struct adb_request batt_req;
159static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
160#endif
161
162#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
163extern int disable_kernel_backlight;
164#endif
165
166int __fake_sleep;
167int asleep;
168struct notifier_block *sleep_notifier_list;
169
170#ifdef CONFIG_ADB
171static int adb_dev_map = 0;
172static int pmu_adb_flags;
173
174static int pmu_probe(void);
175static int pmu_init(void);
176static int pmu_send_request(struct adb_request *req, int sync);
177static int pmu_adb_autopoll(int devs);
178static int pmu_adb_reset_bus(void);
179#endif
180
181static int init_pmu(void);
182static int pmu_queue_request(struct adb_request *req);
183static void pmu_start(void);
184static void via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs);
185static void gpio1_interrupt(int irq, void *arg, struct pt_regs *regs);
186static int proc_get_info(char *page, char **start, off_t off,
187 int count, int *eof, void *data);
188#ifdef CONFIG_PMAC_BACKLIGHT
189static int pmu_set_backlight_level(int level, void* data);
190static int pmu_set_backlight_enable(int on, int level, void* data);
191#endif
192#ifdef CONFIG_PMAC_PBOOK
193static void pmu_pass_intr(unsigned char *data, int len);
194static int proc_get_batt(char *page, char **start, off_t off,
195 int count, int *eof, void *data);
196#endif
197static int proc_read_options(char *page, char **start, off_t off,
198 int count, int *eof, void *data);
199static int proc_write_options(struct file *file, const char *buffer,
200 unsigned long count, void *data);
201
202#ifdef CONFIG_ADB
203struct adb_driver via_pmu_driver = {
204 "PMU",
205 pmu_probe,
206 pmu_init,
207 pmu_send_request,
208 pmu_adb_autopoll,
209 pmu_poll,
210 pmu_adb_reset_bus
211};
212#endif
213
214extern void low_sleep_handler(void);
215extern void pmac_sleep_save_intrs(int);
216extern void pmac_sleep_restore_intrs(void);
217extern void openpic_sleep_save_intrs(void);
218extern void openpic_sleep_restore_intrs(void);
219extern void enable_kernel_altivec(void);
220extern void enable_kernel_fp(void);
221
222#if defined(DEBUG_SLEEP) || defined(DEBUG_FREQ)
223int pmu_polled_request(struct adb_request *req);
224void pmu_blink(int n);
225#endif
226
227#if defined(CONFIG_PMAC_PBOOK) && defined(CONFIG_PM)
228static int generic_notify_sleep(struct pmu_sleep_notifier *self, int when);
229static struct pmu_sleep_notifier generic_sleep_notifier = {
230 generic_notify_sleep,
231 SLEEP_LEVEL_MISC,
232};
233#endif
234
235
236
237
238
239
240
241
242static const s8 pmu_data_len[256][2] __openfirmwaredata = {
243
244 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
245 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
246 { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
247 { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
248 {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
249 { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
250 { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
251 { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
252 { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
253 { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
254 { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
255 { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
256 { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
257 { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
258 { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
259 { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
260 { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
261 { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
262 { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
263 { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
264 { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
265 { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
266 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
267 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
268 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
269 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
270 { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
271 { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
272 {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
273 { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
274 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
275 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
276};
277
278static char *pbook_type[] = {
279 "Unknown PowerBook",
280 "PowerBook 2400/3400/3500(G3)",
281 "PowerBook G3 Series",
282 "1999 PowerBook G3",
283 "Core99"
284};
285
286#ifdef CONFIG_PMAC_BACKLIGHT
287static struct backlight_controller pmu_backlight_controller = {
288 pmu_set_backlight_enable,
289 pmu_set_backlight_level
290};
291#endif
292
293int __openfirmware
294find_via_pmu()
295{
296 if (via != 0)
297 return 1;
298 vias = find_devices("via-pmu");
299 if (vias == 0)
300 return 0;
301 if (vias->next != 0)
302 printk(KERN_WARNING "Warning: only using 1st via-pmu\n");
303
304 if (vias->n_addrs < 1 || vias->n_intrs < 1) {
305 printk(KERN_ERR "via-pmu: %d addresses, %d interrupts!\n",
306 vias->n_addrs, vias->n_intrs);
307 if (vias->n_addrs < 1 || vias->n_intrs < 1)
308 return 0;
309 }
310
311 spin_lock_init(&pmu_lock);
312
313 pmu_has_adb = 1;
314
315 pmu_intr_mask = PMU_INT_PCEJECT |
316 PMU_INT_SNDBRT |
317 PMU_INT_ADB |
318 PMU_INT_TICK;
319
320 if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
321 || device_is_compatible(vias->parent, "ohare")))
322 pmu_kind = PMU_OHARE_BASED;
323 else if (device_is_compatible(vias->parent, "paddington"))
324 pmu_kind = PMU_PADDINGTON_BASED;
325 else if (device_is_compatible(vias->parent, "heathrow"))
326 pmu_kind = PMU_HEATHROW_BASED;
327 else if (device_is_compatible(vias->parent, "Keylargo")) {
328 struct device_node *gpio, *gpiop;
329
330 pmu_kind = PMU_KEYLARGO_BASED;
331 pmu_has_adb = (find_type_devices("adb") != NULL);
332 pmu_intr_mask = PMU_INT_PCEJECT |
333 PMU_INT_SNDBRT |
334 PMU_INT_ADB |
335 PMU_INT_TICK |
336 PMU_INT_ENVIRONMENT;
337
338 gpiop = find_devices("gpio");
339 if (gpiop && gpiop->n_addrs) {
340 gpio_reg = ioremap(gpiop->addrs->address, 0x10);
341 gpio = find_devices("extint-gpio1");
342 if (gpio && gpio->parent == gpiop && gpio->n_intrs)
343 gpio_irq = gpio->intrs[0].line;
344 }
345 } else
346 pmu_kind = PMU_UNKNOWN;
347
348 via = (volatile unsigned char *) ioremap(vias->addrs->address, 0x2000);
349
350 out_8(&via[IER], IER_CLR | 0x7f);
351 out_8(&via[IFR], 0x7f);
352
353 pmu_state = idle;
354
355 if (!init_pmu()) {
356 via = NULL;
357 return 0;
358 }
359
360 printk(KERN_INFO "PMU driver %d initialized for %s, firmware: %02x\n",
361 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
362
363 sys_ctrler = SYS_CTRLER_PMU;
364
365#if defined(CONFIG_PMAC_PBOOK) && defined(CONFIG_PM)
366 pmu_register_sleep_notifier(&generic_sleep_notifier);
367 pm_active = 1;
368#endif
369
370 return 1;
371}
372
373#ifdef CONFIG_ADB
374static int __openfirmware
375pmu_probe()
376{
377 return vias == NULL? -ENODEV: 0;
378}
379
380static int __openfirmware
381pmu_init(void)
382{
383 if (vias == NULL)
384 return -ENODEV;
385 return 0;
386}
387#endif
388
389
390
391
392
393
394
395
396int via_pmu_start(void)
397{
398 if (vias == NULL)
399 return -ENODEV;
400
401 request_OF_resource(vias, 0, NULL);
402
403 bright_req_1.complete = 1;
404 bright_req_2.complete = 1;
405 bright_req_3.complete = 1;
406#ifdef CONFIG_PMAC_PBOOK
407 batt_req.complete = 1;
408 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
409 can_sleep = 1;
410#endif
411
412 if (request_irq(vias->intrs[0].line, via_pmu_interrupt, 0, "VIA-PMU",
413 (void *)0)) {
414 printk(KERN_ERR "VIA-PMU: can't get irq %d\n",
415 vias->intrs[0].line);
416 return -EAGAIN;
417 }
418
419 if (pmu_kind == PMU_KEYLARGO_BASED && gpio_irq != -1) {
420 if (request_irq(gpio_irq, gpio1_interrupt, 0, "GPIO1/ADB", (void *)0))
421 printk(KERN_ERR "pmu: can't get irq %d (GPIO1)\n", gpio_irq);
422 }
423
424
425 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
426
427 pmu_fully_inited = 1;
428
429#ifdef CONFIG_PMAC_BACKLIGHT
430
431 register_backlight_controller(&pmu_backlight_controller, NULL, "pmu");
432#endif
433
434#ifdef CONFIG_PMAC_PBOOK
435 if (machine_is_compatible("AAPL,3400/2400") ||
436 machine_is_compatible("AAPL,3500")) {
437 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
438 NULL, PMAC_MB_INFO_MODEL, 0);
439 pmu_battery_count = 1;
440 if (mb == PMAC_TYPE_COMET)
441 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
442 else
443 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
444 } else if (machine_is_compatible("AAPL,PowerBook1998") ||
445 machine_is_compatible("PowerBook1,1")) {
446 pmu_battery_count = 2;
447 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
448 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
449 } else {
450 struct device_node* prim = find_devices("power-mgt");
451 u32 *prim_info = NULL;
452 if (prim)
453 prim_info = (u32 *)get_property(prim, "prim-info", NULL);
454 if (prim_info) {
455
456 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
457 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
458 if (pmu_battery_count > 1)
459 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
460 }
461 }
462#endif
463
464 proc_pmu_root = proc_mkdir("pmu", 0);
465 if (proc_pmu_root) {
466 int i;
467 proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root,
468 proc_get_info, NULL);
469#ifdef CONFIG_PMAC_PBOOK
470 for (i=0; i<pmu_battery_count; i++) {
471 char title[16];
472 sprintf(title, "battery_%d", i);
473 proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root,
474 proc_get_batt, (void *)i);
475 }
476#endif
477 proc_pmu_options = create_proc_entry("options", 0600, proc_pmu_root);
478 if (proc_pmu_options) {
479 proc_pmu_options->nlink = 1;
480 proc_pmu_options->read_proc = proc_read_options;
481 proc_pmu_options->write_proc = proc_write_options;
482 }
483 }
484
485
486
487
488
489
490
491
492
493 do {
494 pmu_poll();
495 } while (pmu_state != idle);
496
497 return 0;
498}
499
500static int __openfirmware
501init_pmu()
502{
503 int timeout;
504 struct adb_request req;
505
506 out_8(&via[B], via[B] | TREQ);
507 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK);
508
509 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
510 timeout = 100000;
511 while (!req.complete) {
512 if (--timeout < 0) {
513 printk(KERN_ERR "init_pmu: no response from PMU\n");
514 return 0;
515 }
516 udelay(10);
517 pmu_poll();
518 }
519
520
521 timeout = 100000;
522 interrupt_data[0][0] = 1;
523 while (interrupt_data[0][0] || pmu_state != idle) {
524 if (--timeout < 0) {
525 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
526 return 0;
527 }
528 if (pmu_state == idle)
529 adb_int_pending = 1;
530 via_pmu_interrupt(0, 0, 0);
531 udelay(10);
532 }
533
534
535 if (pmu_kind == PMU_KEYLARGO_BASED) {
536 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
537 while (!req.complete)
538 pmu_poll();
539 }
540
541
542 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
543 while (!req.complete)
544 pmu_poll();
545 if (req.reply_len > 0)
546 pmu_version = req.reply[0];
547
548 return 1;
549}
550
551int
552pmu_get_model(void)
553{
554 return pmu_kind;
555}
556
557static inline void wakeup_decrementer(void)
558{
559 set_dec(tb_ticks_per_jiffy);
560
561
562
563 last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
564}
565
566
567#ifdef CONFIG_PMAC_PBOOK
568
569
570
571
572static void __pmac
573done_battery_state_ohare(struct adb_request* req)
574{
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
594 long pcharge, charge, vb, vmax, lmax;
595 long vmax_charging, vmax_charged;
596 long current, voltage, time, max;
597 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
598 NULL, PMAC_MB_INFO_MODEL, 0);
599
600 if (req->reply[0] & 0x01)
601 pmu_power_flags |= PMU_PWR_AC_PRESENT;
602 else
603 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
604
605 if (mb == PMAC_TYPE_COMET) {
606 vmax_charged = 189;
607 vmax_charging = 213;
608 lmax = 6500;
609 } else {
610 vmax_charged = 330;
611 vmax_charging = 330;
612 lmax = 6500;
613 }
614 vmax = vmax_charged;
615
616
617 if (req->reply[0] & 0x04) {
618 bat_flags |= PMU_BATT_PRESENT;
619 if (req->reply[0] & 0x02)
620 bat_flags |= PMU_BATT_CHARGING;
621 vb = (req->reply[1] << 8) | req->reply[2];
622 voltage = (vb * 265 + 72665) / 10;
623 current = req->reply[5];
624 if ((req->reply[0] & 0x01) == 0) {
625 if (current > 200)
626 vb += ((current - 200) * 15)/100;
627 } else if (req->reply[0] & 0x02) {
628 vb = (vb * 97) / 100;
629 vmax = vmax_charging;
630 }
631 charge = (100 * vb) / vmax;
632 if (req->reply[0] & 0x40) {
633 pcharge = (req->reply[6] << 8) + req->reply[7];
634 if (pcharge > lmax)
635 pcharge = lmax;
636 pcharge *= 100;
637 pcharge = 100 - pcharge / lmax;
638 if (pcharge < charge)
639 charge = pcharge;
640 }
641 if (current > 0)
642 time = (charge * 16440) / current;
643 else
644 time = 0;
645 max = 100;
646 current = -current;
647 } else
648 charge = max = current = voltage = time = 0;
649
650 pmu_batteries[pmu_cur_battery].flags = bat_flags;
651 pmu_batteries[pmu_cur_battery].charge = charge;
652 pmu_batteries[pmu_cur_battery].max_charge = max;
653 pmu_batteries[pmu_cur_battery].current = current;
654 pmu_batteries[pmu_cur_battery].voltage = voltage;
655 pmu_batteries[pmu_cur_battery].time_remaining = time;
656}
657
658static void __pmac
659done_battery_state_smart(struct adb_request* req)
660{
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
681 int current;
682 unsigned int capa, max, voltage;
683
684 if (req->reply[1] & 0x01)
685 pmu_power_flags |= PMU_PWR_AC_PRESENT;
686 else
687 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
688
689
690 if (req->reply[1] & 0x04) {
691 bat_flags |= PMU_BATT_PRESENT;
692 switch(req->reply[0]) {
693 case 3:
694 case 4: capa = req->reply[2];
695 max = req->reply[3];
696 current = *((signed char *)&req->reply[4]);
697 voltage = req->reply[5];
698 break;
699 case 5: capa = (req->reply[2] << 8) | req->reply[3];
700 max = (req->reply[4] << 8) | req->reply[5];
701 current = *((signed short *)&req->reply[6]);
702 voltage = (req->reply[8] << 8) | req->reply[9];
703 break;
704 default:
705 printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n",
706 req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]);
707 break;
708 }
709 } else
710 capa = max = current = voltage = 0;
711
712 if ((req->reply[1] & 0x01) && (current > 0))
713 bat_flags |= PMU_BATT_CHARGING;
714
715 pmu_batteries[pmu_cur_battery].flags = bat_flags;
716 pmu_batteries[pmu_cur_battery].charge = capa;
717 pmu_batteries[pmu_cur_battery].max_charge = max;
718 pmu_batteries[pmu_cur_battery].current = current;
719 pmu_batteries[pmu_cur_battery].voltage = voltage;
720 if (current) {
721 if ((req->reply[1] & 0x01) && (current > 0))
722 pmu_batteries[pmu_cur_battery].time_remaining
723 = ((max-capa) * 3600) / current;
724 else
725 pmu_batteries[pmu_cur_battery].time_remaining
726 = (capa * 3600) / (-current);
727 } else
728 pmu_batteries[pmu_cur_battery].time_remaining = 0;
729
730 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
731}
732
733static void __pmac
734query_battery_state(void)
735{
736 if (!batt_req.complete)
737 return;
738 if (pmu_kind == PMU_OHARE_BASED)
739 pmu_request(&batt_req, done_battery_state_ohare,
740 1, PMU_BATTERY_STATE);
741 else
742 pmu_request(&batt_req, done_battery_state_smart,
743 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
744}
745
746#endif
747
748static int
749proc_get_info(char *page, char **start, off_t off,
750 int count, int *eof, void *data)
751{
752 char* p = page;
753
754 p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
755 p += sprintf(p, "PMU firmware version : %02x\n", pmu_version);
756#ifdef CONFIG_PMAC_PBOOK
757 p += sprintf(p, "AC Power : %d\n",
758 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0));
759 p += sprintf(p, "Battery count : %d\n", pmu_battery_count);
760#endif
761
762 return p - page;
763}
764
765#ifdef CONFIG_PMAC_PBOOK
766static int
767proc_get_batt(char *page, char **start, off_t off,
768 int count, int *eof, void *data)
769{
770 int batnum = (int)data;
771 char *p = page;
772
773 p += sprintf(p, "\n");
774 p += sprintf(p, "flags : %08x\n",
775 pmu_batteries[batnum].flags);
776 p += sprintf(p, "charge : %d\n",
777 pmu_batteries[batnum].charge);
778 p += sprintf(p, "max_charge : %d\n",
779 pmu_batteries[batnum].max_charge);
780 p += sprintf(p, "current : %d\n",
781 pmu_batteries[batnum].current);
782 p += sprintf(p, "voltage : %d\n",
783 pmu_batteries[batnum].voltage);
784 p += sprintf(p, "time rem. : %d\n",
785 pmu_batteries[batnum].time_remaining);
786
787 return p - page;
788}
789#endif
790
791static int
792proc_read_options(char *page, char **start, off_t off,
793 int count, int *eof, void *data)
794{
795 char *p = page;
796
797#ifdef CONFIG_PMAC_PBOOK
798 if (pmu_kind == PMU_KEYLARGO_BASED && can_sleep)
799 p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup);
800#endif
801
802 return p - page;
803}
804
805static int
806proc_write_options(struct file *file, const char *buffer,
807 unsigned long count, void *data)
808{
809 char tmp[33];
810 char *label, *val;
811 unsigned long fcount = count;
812
813 if (!count)
814 return -EINVAL;
815 if (count > 32)
816 count = 32;
817 if (copy_from_user(tmp, buffer, count))
818 return -EFAULT;
819 tmp[count] = 0;
820
821 label = tmp;
822 while(*label == ' ')
823 label++;
824 val = label;
825 while(*val && (*val != '=')) {
826 if (*val == ' ')
827 *val = 0;
828 val++;
829 }
830 if ((*val) == 0)
831 return -EINVAL;
832 *(val++) = 0;
833 while(*val == ' ')
834 val++;
835#ifdef CONFIG_PMAC_PBOOK
836 if (pmu_kind == PMU_KEYLARGO_BASED && can_sleep) {
837 if (!strcmp(label, "lid_wakeup"))
838 option_lid_wakeup = ((*val) == '1');
839 }
840#endif
841 return fcount;
842}
843
844#ifdef CONFIG_ADB
845
846static int __openfirmware
847pmu_send_request(struct adb_request *req, int sync)
848{
849 int i, ret;
850
851 if ((vias == NULL) || (!pmu_fully_inited)) {
852 req->complete = 1;
853 return -ENXIO;
854 }
855
856 ret = -EINVAL;
857
858 switch (req->data[0]) {
859 case PMU_PACKET:
860 for (i = 0; i < req->nbytes - 1; ++i)
861 req->data[i] = req->data[i+1];
862 --req->nbytes;
863 if (pmu_data_len[req->data[0]][1] != 0) {
864 req->reply[0] = ADB_RET_OK;
865 req->reply_len = 1;
866 } else
867 req->reply_len = 0;
868 ret = pmu_queue_request(req);
869 break;
870 case CUDA_PACKET:
871 switch (req->data[1]) {
872 case CUDA_GET_TIME:
873 if (req->nbytes != 2)
874 break;
875 req->data[0] = PMU_READ_RTC;
876 req->nbytes = 1;
877 req->reply_len = 3;
878 req->reply[0] = CUDA_PACKET;
879 req->reply[1] = 0;
880 req->reply[2] = CUDA_GET_TIME;
881 ret = pmu_queue_request(req);
882 break;
883 case CUDA_SET_TIME:
884 if (req->nbytes != 6)
885 break;
886 req->data[0] = PMU_SET_RTC;
887 req->nbytes = 5;
888 for (i = 1; i <= 4; ++i)
889 req->data[i] = req->data[i+1];
890 req->reply_len = 3;
891 req->reply[0] = CUDA_PACKET;
892 req->reply[1] = 0;
893 req->reply[2] = CUDA_SET_TIME;
894 ret = pmu_queue_request(req);
895 break;
896 }
897 break;
898 case ADB_PACKET:
899 if (!pmu_has_adb)
900 return -ENXIO;
901 for (i = req->nbytes - 1; i > 1; --i)
902 req->data[i+2] = req->data[i];
903 req->data[3] = req->nbytes - 2;
904 req->data[2] = pmu_adb_flags;
905
906 req->data[0] = PMU_ADB_CMD;
907 req->nbytes += 2;
908 req->reply_expected = 1;
909 req->reply_len = 0;
910 ret = pmu_queue_request(req);
911 break;
912 }
913 if (ret) {
914 req->complete = 1;
915 return ret;
916 }
917
918 if (sync)
919 while (!req->complete)
920 pmu_poll();
921
922 return 0;
923}
924
925
926static int __openfirmware
927pmu_adb_autopoll(int devs)
928{
929 struct adb_request req;
930
931 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
932 return -ENXIO;
933
934 if (devs) {
935 adb_dev_map = devs;
936 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
937 adb_dev_map >> 8, adb_dev_map);
938 pmu_adb_flags = 2;
939 } else {
940 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
941 pmu_adb_flags = 0;
942 }
943 while (!req.complete)
944 pmu_poll();
945 return 0;
946}
947
948
949static int __openfirmware
950pmu_adb_reset_bus(void)
951{
952 struct adb_request req;
953 int save_autopoll = adb_dev_map;
954
955 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
956 return -ENXIO;
957
958
959 pmu_adb_autopoll(0);
960
961 req.nbytes = 5;
962 req.done = NULL;
963 req.data[0] = PMU_ADB_CMD;
964 req.data[1] = 0;
965 req.data[2] = ADB_BUSRESET;
966 req.data[3] = 0;
967 req.data[4] = 0;
968 req.reply_len = 0;
969 req.reply_expected = 1;
970 if (pmu_queue_request(&req) != 0) {
971 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
972 return -EIO;
973 }
974 while (!req.complete)
975 pmu_poll();
976
977 if (save_autopoll != 0)
978 pmu_adb_autopoll(save_autopoll);
979
980 return 0;
981}
982#endif
983
984
985int __openfirmware
986pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
987 int nbytes, ...)
988{
989 va_list list;
990 int i;
991
992 if (vias == NULL)
993 return -ENXIO;
994
995 if (nbytes < 0 || nbytes > 32) {
996 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
997 req->complete = 1;
998 return -EINVAL;
999 }
1000 req->nbytes = nbytes;
1001 req->done = done;
1002 va_start(list, nbytes);
1003 for (i = 0; i < nbytes; ++i)
1004 req->data[i] = va_arg(list, int);
1005 va_end(list);
1006 req->reply_len = 0;
1007 req->reply_expected = 0;
1008 return pmu_queue_request(req);
1009}
1010
1011int __openfirmware
1012pmu_queue_request(struct adb_request *req)
1013{
1014 unsigned long flags;
1015 int nsend;
1016
1017 if (via == NULL) {
1018 req->complete = 1;
1019 return -ENXIO;
1020 }
1021 if (req->nbytes <= 0) {
1022 req->complete = 1;
1023 return 0;
1024 }
1025 nsend = pmu_data_len[req->data[0]][0];
1026 if (nsend >= 0 && req->nbytes != nsend + 1) {
1027 req->complete = 1;
1028 return -EINVAL;
1029 }
1030
1031 req->next = 0;
1032 req->sent = 0;
1033 req->complete = 0;
1034
1035 spin_lock_irqsave(&pmu_lock, flags);
1036 if (current_req != 0) {
1037 last_req->next = req;
1038 last_req = req;
1039 } else {
1040 current_req = req;
1041 last_req = req;
1042 if (pmu_state == idle)
1043 pmu_start();
1044 }
1045 spin_unlock_irqrestore(&pmu_lock, flags);
1046
1047 return 0;
1048}
1049
1050static inline void
1051wait_for_ack(void)
1052{
1053
1054
1055
1056 int timeout = 4000;
1057 while ((in_8(&via[B]) & TACK) == 0) {
1058 if (--timeout < 0) {
1059 printk(KERN_ERR "PMU not responding (!ack)\n");
1060 return;
1061 }
1062 udelay(10);
1063 }
1064}
1065
1066
1067
1068static inline void
1069send_byte(int x)
1070{
1071 volatile unsigned char *v = via;
1072
1073 out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
1074 out_8(&v[SR], x);
1075 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1076 (void)in_8(&v[B]);
1077}
1078
1079static inline void
1080recv_byte(void)
1081{
1082 volatile unsigned char *v = via;
1083
1084 out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
1085 in_8(&v[SR]);
1086 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1087 (void)in_8(&v[B]);
1088}
1089
1090static inline void
1091pmu_done(struct adb_request *req)
1092{
1093 void (*done)(struct adb_request *) = req->done;
1094 mb();
1095 req->complete = 1;
1096
1097
1098
1099 if (done)
1100 (*done)(req);
1101}
1102
1103static void __openfirmware
1104pmu_start()
1105{
1106 struct adb_request *req;
1107
1108
1109
1110 req = current_req;
1111 if (req == 0 || pmu_state != idle
1112 || (req_awaiting_reply))
1113 return;
1114
1115 pmu_state = sending;
1116 data_index = 1;
1117 data_len = pmu_data_len[req->data[0]][0];
1118
1119
1120
1121
1122 wait_for_ack();
1123
1124 send_byte(req->data[0]);
1125}
1126
1127void __openfirmware
1128pmu_poll()
1129{
1130 if (!via)
1131 return;
1132 if (disable_poll)
1133 return;
1134
1135 if (pmu_suspended)
1136 adb_int_pending = 1;
1137 do {
1138 via_pmu_interrupt(0, 0, 0);
1139 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1140 || req_awaiting_reply));
1141}
1142
1143
1144
1145
1146
1147
1148void __openfirmware
1149pmu_suspend(void)
1150{
1151 unsigned long flags;
1152#ifdef SUSPEND_USES_PMU
1153 struct adb_request *req;
1154#endif
1155 if (!via)
1156 return;
1157
1158 spin_lock_irqsave(&pmu_lock, flags);
1159 pmu_suspended++;
1160 if (pmu_suspended > 1) {
1161 spin_unlock_irqrestore(&pmu_lock, flags);
1162 return;
1163 }
1164
1165 do {
1166 spin_unlock_irqrestore(&pmu_lock, flags);
1167 via_pmu_interrupt(0, 0, 0);
1168 spin_lock_irqsave(&pmu_lock, flags);
1169 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1170#ifdef SUSPEND_USES_PMU
1171 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1172 spin_unlock_irqrestore(&pmu_lock, flags);
1173 while(!req.complete)
1174 pmu_poll();
1175#else
1176 if (gpio_irq >= 0)
1177 disable_irq(gpio_irq);
1178 out_8(&via[IER], CB1_INT | IER_CLR);
1179 spin_unlock_irqrestore(&pmu_lock, flags);
1180#endif
1181 break;
1182 }
1183 } while (1);
1184}
1185
1186void __openfirmware
1187pmu_resume(void)
1188{
1189 unsigned long flags;
1190
1191 if (!via || (pmu_suspended < 1))
1192 return;
1193
1194 spin_lock_irqsave(&pmu_lock, flags);
1195 pmu_suspended--;
1196 if (pmu_suspended > 0) {
1197 spin_unlock_irqrestore(&pmu_lock, flags);
1198 return;
1199 }
1200 adb_int_pending = 1;
1201#ifdef SUSPEND_USES_PMU
1202 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1203 spin_unlock_irqrestore(&pmu_lock, flags);
1204 while(!req.complete)
1205 pmu_poll();
1206#else
1207 if (gpio_irq >= 0)
1208 enable_irq(gpio_irq);
1209 out_8(&via[IER], CB1_INT | IER_SET);
1210 spin_unlock_irqrestore(&pmu_lock, flags);
1211 pmu_poll();
1212#endif
1213}
1214
1215
1216static void __openfirmware
1217pmu_handle_data(unsigned char *data, int len, struct pt_regs *regs)
1218{
1219 asleep = 0;
1220 if (drop_interrupts || len < 1) {
1221 adb_int_pending = 0;
1222 return;
1223 }
1224
1225
1226
1227
1228 if (data[0] & PMU_INT_ADB) {
1229 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1230 struct adb_request *req = req_awaiting_reply;
1231 if (req == 0) {
1232 printk(KERN_ERR "PMU: extra ADB reply\n");
1233 return;
1234 }
1235 req_awaiting_reply = 0;
1236 if (len <= 2)
1237 req->reply_len = 0;
1238 else {
1239 memcpy(req->reply, data + 1, len - 1);
1240 req->reply_len = len - 1;
1241 }
1242 pmu_done(req);
1243 } else {
1244#ifdef CONFIG_XMON
1245 if (len == 4 && data[1] == 0x2c) {
1246 extern int xmon_wants_key, xmon_adb_keycode;
1247 if (xmon_wants_key) {
1248 xmon_adb_keycode = data[2];
1249 return;
1250 }
1251 }
1252#endif
1253#ifdef CONFIG_ADB
1254
1255
1256
1257
1258
1259
1260 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1261 && data[1] == 0x2c && data[3] == 0xff
1262 && (data[2] & ~1) == 0xf4))
1263 adb_input(data+1, len-1, regs, 1);
1264#endif
1265 }
1266 } else {
1267
1268 if ((data[0] & PMU_INT_SNDBRT) && len == 3) {
1269#ifdef CONFIG_PMAC_BACKLIGHT
1270#ifdef CONFIG_INPUT_ADBHID
1271 if (!disable_kernel_backlight)
1272#endif
1273 set_backlight_level(data[1] >> 4);
1274#endif
1275 }
1276#ifdef CONFIG_PMAC_PBOOK
1277
1278 if (pmu_battery_count && (data[0] & PMU_INT_TICK)) {
1279 if ((--query_batt_timer) == 0) {
1280 query_battery_state();
1281 query_batt_timer = BATTERY_POLLING_COUNT;
1282 }
1283 } else if (pmu_battery_count && (data[0] & PMU_INT_ENVIRONMENT))
1284 query_battery_state();
1285 if (data[0])
1286 pmu_pass_intr(data, len);
1287#endif
1288 }
1289}
1290
1291static struct adb_request* __openfirmware
1292pmu_sr_intr(struct pt_regs *regs)
1293{
1294 struct adb_request *req;
1295 int bite;
1296
1297 if (via[B] & TREQ) {
1298 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
1299 out_8(&via[IFR], SR_INT);
1300 return NULL;
1301 }
1302
1303 while ((in_8(&via[B]) & TACK) != 0)
1304 ;
1305
1306
1307 if (pmu_state == reading || pmu_state == reading_intr)
1308 bite = in_8(&via[SR]);
1309
1310
1311 out_8(&via[B], in_8(&via[B]) | TREQ);
1312 wait_for_ack();
1313
1314 switch (pmu_state) {
1315 case sending:
1316 req = current_req;
1317 if (data_len < 0) {
1318 data_len = req->nbytes - 1;
1319 send_byte(data_len);
1320 break;
1321 }
1322 if (data_index <= data_len) {
1323 send_byte(req->data[data_index++]);
1324 break;
1325 }
1326 req->sent = 1;
1327 data_len = pmu_data_len[req->data[0]][1];
1328 if (data_len == 0) {
1329 pmu_state = idle;
1330 current_req = req->next;
1331 if (req->reply_expected)
1332 req_awaiting_reply = req;
1333 else
1334 return req;
1335 } else {
1336 pmu_state = reading;
1337 data_index = 0;
1338 reply_ptr = req->reply + req->reply_len;
1339 recv_byte();
1340 }
1341 break;
1342
1343 case intack:
1344 data_index = 0;
1345 data_len = -1;
1346 pmu_state = reading_intr;
1347 reply_ptr = interrupt_data[int_data_last];
1348 recv_byte();
1349 break;
1350
1351 case reading:
1352 case reading_intr:
1353 if (data_len == -1) {
1354 data_len = bite;
1355 if (bite > 32)
1356 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1357 } else if (data_index < 32) {
1358 reply_ptr[data_index++] = bite;
1359 }
1360 if (data_index < data_len) {
1361 recv_byte();
1362 break;
1363 }
1364
1365 if (pmu_state == reading_intr) {
1366 pmu_state = idle;
1367 int_data_state[int_data_last] = int_data_ready;
1368 interrupt_data_len[int_data_last] = data_len;
1369 } else {
1370 req = current_req;
1371 current_req = req->next;
1372 req->reply_len += data_index;
1373 pmu_state = idle;
1374 return req;
1375 }
1376 break;
1377
1378 default:
1379 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1380 pmu_state);
1381 }
1382 return NULL;
1383}
1384
1385static void __openfirmware
1386via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs)
1387{
1388 unsigned long flags;
1389 int intr;
1390 int nloop = 0;
1391 int int_data = -1;
1392 struct adb_request *req = NULL;
1393
1394
1395 spin_lock_irqsave(&pmu_lock, flags);
1396 ++disable_poll;
1397
1398 for (;;) {
1399 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1400 if (intr == 0)
1401 break;
1402 if (++nloop > 1000) {
1403 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1404 "intr=%x, ier=%x pmu_state=%d\n",
1405 intr, in_8(&via[IER]), pmu_state);
1406 break;
1407 }
1408 out_8(&via[IFR], intr);
1409 if (intr & CB1_INT)
1410 adb_int_pending = 1;
1411 if (intr & SR_INT) {
1412 req = pmu_sr_intr(regs);
1413 if (req)
1414 break;
1415 }
1416 }
1417
1418recheck:
1419 if (pmu_state == idle) {
1420 if (adb_int_pending) {
1421 if (int_data_state[0] == int_data_empty)
1422 int_data_last = 0;
1423 else if (int_data_state[1] == int_data_empty)
1424 int_data_last = 1;
1425 else
1426 goto no_free_slot;
1427 pmu_state = intack;
1428 int_data_state[int_data_last] = int_data_fill;
1429
1430
1431
1432 wait_for_ack();
1433 send_byte(PMU_INT_ACK);
1434 adb_int_pending = 0;
1435no_free_slot:
1436 ;
1437 } else if (current_req)
1438 pmu_start();
1439 }
1440
1441 if (int_data_state[!int_data_last] == int_data_ready) {
1442 int_data_state[!int_data_last] = int_data_flush;
1443 int_data = !int_data_last;
1444 } else if (int_data_state[int_data_last] == int_data_ready) {
1445 int_data_state[int_data_last] = int_data_flush;
1446 int_data = int_data_last;
1447 }
1448 --disable_poll;
1449 spin_unlock_irqrestore(&pmu_lock, flags);
1450
1451
1452 if (req) {
1453 pmu_done(req);
1454 req = NULL;
1455 }
1456
1457
1458 if (int_data >= 0) {
1459 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data], regs);
1460 spin_lock_irqsave(&pmu_lock, flags);
1461 ++disable_poll;
1462 int_data_state[int_data] = int_data_empty;
1463 int_data = -1;
1464 goto recheck;
1465 }
1466}
1467
1468static void __openfirmware
1469gpio1_interrupt(int irq, void *arg, struct pt_regs *regs)
1470{
1471 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1472 adb_int_pending = 1;
1473 via_pmu_interrupt(0, 0, 0);
1474 }
1475}
1476
1477#ifdef CONFIG_PMAC_BACKLIGHT
1478static int backlight_to_bright[] = {
1479 0x7f, 0x46, 0x42, 0x3e, 0x3a, 0x36, 0x32, 0x2e,
1480 0x2a, 0x26, 0x22, 0x1e, 0x1a, 0x16, 0x12, 0x0e
1481};
1482
1483static int __openfirmware
1484pmu_set_backlight_enable(int on, int level, void* data)
1485{
1486 struct adb_request req;
1487
1488 if (vias == NULL)
1489 return -ENODEV;
1490
1491 if (on) {
1492 pmu_request(&req, NULL, 2, PMU_BACKLIGHT_BRIGHT,
1493 backlight_to_bright[level]);
1494 while (!req.complete)
1495 pmu_poll();
1496 }
1497 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1498 PMU_POW_BACKLIGHT | (on ? PMU_POW_ON : PMU_POW_OFF));
1499 while (!req.complete)
1500 pmu_poll();
1501
1502 return 0;
1503}
1504
1505static int __openfirmware
1506pmu_set_backlight_level(int level, void* data)
1507{
1508 if (vias == NULL)
1509 return -ENODEV;
1510
1511 if (!bright_req_1.complete)
1512 return -EAGAIN;
1513 pmu_request(&bright_req_1, NULL, 2, PMU_BACKLIGHT_BRIGHT,
1514 backlight_to_bright[level]);
1515 if (!bright_req_2.complete)
1516 return -EAGAIN;
1517 pmu_request(&bright_req_2, NULL, 2, PMU_POWER_CTRL, PMU_POW_BACKLIGHT
1518 | (level > BACKLIGHT_OFF ? PMU_POW_ON : PMU_POW_OFF));
1519
1520 return 0;
1521}
1522#endif
1523
1524void __openfirmware
1525pmu_enable_irled(int on)
1526{
1527 struct adb_request req;
1528
1529 if (vias == NULL)
1530 return ;
1531 if (pmu_kind == PMU_KEYLARGO_BASED)
1532 return ;
1533
1534 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1535 (on ? PMU_POW_ON : PMU_POW_OFF));
1536 while (!req.complete)
1537 pmu_poll();
1538}
1539
1540void __openfirmware
1541pmu_restart(void)
1542{
1543 struct adb_request req;
1544
1545 local_irq_disable();
1546
1547 drop_interrupts = 1;
1548
1549 if (pmu_kind != PMU_KEYLARGO_BASED) {
1550 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1551 PMU_INT_TICK );
1552 while(!req.complete)
1553 pmu_poll();
1554 }
1555
1556 pmu_request(&req, NULL, 1, PMU_RESET);
1557 while(!req.complete || (pmu_state != idle))
1558 pmu_poll();
1559 for (;;)
1560 ;
1561}
1562
1563void __openfirmware
1564pmu_shutdown(void)
1565{
1566 struct adb_request req;
1567
1568 local_irq_disable();
1569
1570 drop_interrupts = 1;
1571
1572 if (pmu_kind != PMU_KEYLARGO_BASED) {
1573 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1574 PMU_INT_TICK );
1575 while(!req.complete)
1576 pmu_poll();
1577 }
1578
1579 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1580 'M', 'A', 'T', 'T');
1581 while(!req.complete || (pmu_state != idle))
1582 pmu_poll();
1583 for (;;)
1584 ;
1585}
1586
1587int
1588pmu_present(void)
1589{
1590 return via != 0;
1591}
1592
1593struct pmu_i2c_hdr {
1594 u8 bus;
1595 u8 mode;
1596 u8 bus2;
1597 u8 address;
1598 u8 sub_addr;
1599 u8 comb_addr;
1600 u8 count;
1601};
1602
1603int
1604pmu_i2c_combined_read(int bus, int addr, int subaddr, u8* data, int len)
1605{
1606 struct adb_request req;
1607 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
1608 int retry;
1609 int rc;
1610
1611 for (retry=0; retry<16; retry++) {
1612 memset(&req, 0, sizeof(req));
1613
1614 hdr->bus = bus;
1615 hdr->address = addr & 0xfe;
1616 hdr->mode = PMU_I2C_MODE_COMBINED;
1617 hdr->bus2 = 0;
1618 hdr->sub_addr = subaddr;
1619 hdr->comb_addr = addr | 1;
1620 hdr->count = len;
1621
1622 req.nbytes = sizeof(struct pmu_i2c_hdr) + 1;
1623 req.reply_expected = 0;
1624 req.reply_len = 0;
1625 req.data[0] = PMU_I2C_CMD;
1626 req.reply[0] = 0xff;
1627 rc = pmu_queue_request(&req);
1628 if (rc)
1629 return rc;
1630 while(!req.complete)
1631 pmu_poll();
1632 if (req.reply[0] == PMU_I2C_STATUS_OK)
1633 break;
1634 mdelay(15);
1635 }
1636 if (req.reply[0] != PMU_I2C_STATUS_OK)
1637 return -1;
1638
1639 for (retry=0; retry<16; retry++) {
1640 memset(&req, 0, sizeof(req));
1641
1642 mdelay(15);
1643
1644 hdr->bus = PMU_I2C_BUS_STATUS;
1645 req.reply[0] = 0xff;
1646
1647 req.nbytes = 2;
1648 req.reply_expected = 0;
1649 req.reply_len = 0;
1650 req.data[0] = PMU_I2C_CMD;
1651 rc = pmu_queue_request(&req);
1652 if (rc)
1653 return rc;
1654 while(!req.complete)
1655 pmu_poll();
1656 if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) {
1657 memcpy(data, &req.reply[1], req.reply_len - 1);
1658 return req.reply_len - 1;
1659 }
1660 }
1661 return -1;
1662}
1663
1664int
1665pmu_i2c_stdsub_write(int bus, int addr, int subaddr, u8* data, int len)
1666{
1667 struct adb_request req;
1668 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
1669 int retry;
1670 int rc;
1671
1672 for (retry=0; retry<16; retry++) {
1673 memset(&req, 0, sizeof(req));
1674
1675 hdr->bus = bus;
1676 hdr->address = addr & 0xfe;
1677 hdr->mode = PMU_I2C_MODE_STDSUB;
1678 hdr->bus2 = 0;
1679 hdr->sub_addr = subaddr;
1680 hdr->comb_addr = addr & 0xfe;
1681 hdr->count = len;
1682
1683 req.data[0] = PMU_I2C_CMD;
1684 memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len);
1685 req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1;
1686 req.reply_expected = 0;
1687 req.reply_len = 0;
1688 req.reply[0] = 0xff;
1689 rc = pmu_queue_request(&req);
1690 if (rc)
1691 return rc;
1692 while(!req.complete)
1693 pmu_poll();
1694 if (req.reply[0] == PMU_I2C_STATUS_OK)
1695 break;
1696 mdelay(15);
1697 }
1698 if (req.reply[0] != PMU_I2C_STATUS_OK)
1699 return -1;
1700
1701 for (retry=0; retry<16; retry++) {
1702 memset(&req, 0, sizeof(req));
1703
1704 mdelay(15);
1705
1706 hdr->bus = PMU_I2C_BUS_STATUS;
1707 req.reply[0] = 0xff;
1708
1709 req.nbytes = 2;
1710 req.reply_expected = 0;
1711 req.reply_len = 0;
1712 req.data[0] = PMU_I2C_CMD;
1713 rc = pmu_queue_request(&req);
1714 if (rc)
1715 return rc;
1716 while(!req.complete)
1717 pmu_poll();
1718 if (req.reply[0] == PMU_I2C_STATUS_OK)
1719 return len;
1720 }
1721 return -1;
1722}
1723
1724int
1725pmu_i2c_simple_read(int bus, int addr, u8* data, int len)
1726{
1727 struct adb_request req;
1728 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
1729 int retry;
1730 int rc;
1731
1732 for (retry=0; retry<16; retry++) {
1733 memset(&req, 0, sizeof(req));
1734
1735 hdr->bus = bus;
1736 hdr->address = addr | 1;
1737 hdr->mode = PMU_I2C_MODE_SIMPLE;
1738 hdr->bus2 = 0;
1739 hdr->sub_addr = 0;
1740 hdr->comb_addr = 0;
1741 hdr->count = len;
1742
1743 req.data[0] = PMU_I2C_CMD;
1744 req.nbytes = sizeof(struct pmu_i2c_hdr) + 1;
1745 req.reply_expected = 0;
1746 req.reply_len = 0;
1747 req.reply[0] = 0xff;
1748 rc = pmu_queue_request(&req);
1749 if (rc)
1750 return rc;
1751 while(!req.complete)
1752 pmu_poll();
1753 if (req.reply[0] == PMU_I2C_STATUS_OK)
1754 break;
1755 mdelay(15);
1756 }
1757 if (req.reply[0] != PMU_I2C_STATUS_OK)
1758 return -1;
1759
1760 for (retry=0; retry<16; retry++) {
1761 memset(&req, 0, sizeof(req));
1762
1763 mdelay(15);
1764
1765 hdr->bus = PMU_I2C_BUS_STATUS;
1766 req.reply[0] = 0xff;
1767
1768 req.nbytes = 2;
1769 req.reply_expected = 0;
1770 req.reply_len = 0;
1771 req.data[0] = PMU_I2C_CMD;
1772 rc = pmu_queue_request(&req);
1773 if (rc)
1774 return rc;
1775 while(!req.complete)
1776 pmu_poll();
1777 if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) {
1778 memcpy(data, &req.reply[1], req.reply_len - 1);
1779 return req.reply_len - 1;
1780 }
1781 }
1782 return -1;
1783}
1784
1785int
1786pmu_i2c_simple_write(int bus, int addr, u8* data, int len)
1787{
1788 struct adb_request req;
1789 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
1790 int retry;
1791 int rc;
1792
1793 for (retry=0; retry<16; retry++) {
1794 memset(&req, 0, sizeof(req));
1795
1796 hdr->bus = bus;
1797 hdr->address = addr & 0xfe;
1798 hdr->mode = PMU_I2C_MODE_SIMPLE;
1799 hdr->bus2 = 0;
1800 hdr->sub_addr = 0;
1801 hdr->comb_addr = 0;
1802 hdr->count = len;
1803
1804 req.data[0] = PMU_I2C_CMD;
1805 memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len);
1806 req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1;
1807 req.reply_expected = 0;
1808 req.reply_len = 0;
1809 req.reply[0] = 0xff;
1810 rc = pmu_queue_request(&req);
1811 if (rc)
1812 return rc;
1813 while(!req.complete)
1814 pmu_poll();
1815 if (req.reply[0] == PMU_I2C_STATUS_OK)
1816 break;
1817 mdelay(15);
1818 }
1819 if (req.reply[0] != PMU_I2C_STATUS_OK)
1820 return -1;
1821
1822 for (retry=0; retry<16; retry++) {
1823 memset(&req, 0, sizeof(req));
1824
1825 mdelay(15);
1826
1827 hdr->bus = PMU_I2C_BUS_STATUS;
1828 req.reply[0] = 0xff;
1829
1830 req.nbytes = 2;
1831 req.reply_expected = 0;
1832 req.reply_len = 0;
1833 req.data[0] = PMU_I2C_CMD;
1834 rc = pmu_queue_request(&req);
1835 if (rc)
1836 return rc;
1837 while(!req.complete)
1838 pmu_poll();
1839 if (req.reply[0] == PMU_I2C_STATUS_OK)
1840 return len;
1841 }
1842 return -1;
1843}
1844
1845
1846#if defined(DEBUG_SLEEP) || defined(DEBUG_FREQ)
1847
1848void
1849pmu_blink(int n)
1850{
1851 struct adb_request req;
1852
1853 memset(&req, 0, sizeof(req));
1854
1855 for (; n > 0; --n) {
1856 req.nbytes = 4;
1857 req.done = NULL;
1858 req.data[0] = 0xee;
1859 req.data[1] = 4;
1860 req.data[2] = 0;
1861 req.data[3] = 1;
1862 req.reply[0] = ADB_RET_OK;
1863 req.reply_len = 1;
1864 req.reply_expected = 0;
1865 pmu_polled_request(&req);
1866 mdelay(50);
1867 req.nbytes = 4;
1868 req.done = NULL;
1869 req.data[0] = 0xee;
1870 req.data[1] = 4;
1871 req.data[2] = 0;
1872 req.data[3] = 0;
1873 req.reply[0] = ADB_RET_OK;
1874 req.reply_len = 1;
1875 req.reply_expected = 0;
1876 pmu_polled_request(&req);
1877 mdelay(50);
1878 }
1879 mdelay(50);
1880}
1881#endif
1882
1883#ifdef CONFIG_PMAC_PBOOK
1884
1885static LIST_HEAD(sleep_notifiers);
1886
1887#ifdef CONFIG_PM
1888static int
1889generic_notify_sleep(struct pmu_sleep_notifier *self, int when)
1890{
1891 switch (when) {
1892 case PBOOK_SLEEP_NOW:
1893 if (pm_send_all(PM_SUSPEND, (void *)3))
1894 return PBOOK_SLEEP_REJECT;
1895 break;
1896 case PBOOK_WAKE:
1897 (void) pm_send_all(PM_RESUME, (void *)0);
1898 }
1899 return PBOOK_SLEEP_OK;
1900}
1901#endif
1902
1903int
1904pmu_register_sleep_notifier(struct pmu_sleep_notifier *n)
1905{
1906 struct list_head *list;
1907 struct pmu_sleep_notifier *notifier;
1908
1909 for (list = sleep_notifiers.next; list != &sleep_notifiers;
1910 list = list->next) {
1911 notifier = list_entry(list, struct pmu_sleep_notifier, list);
1912 if (n->priority > notifier->priority)
1913 break;
1914 }
1915 __list_add(&n->list, list->prev, list);
1916 return 0;
1917}
1918
1919int
1920pmu_unregister_sleep_notifier(struct pmu_sleep_notifier* n)
1921{
1922 if (n->list.next == 0)
1923 return -ENOENT;
1924 list_del(&n->list);
1925 n->list.next = 0;
1926 return 0;
1927}
1928
1929
1930static int
1931broadcast_sleep(int when, int fallback)
1932{
1933 int ret = PBOOK_SLEEP_OK;
1934 struct list_head *list;
1935 struct pmu_sleep_notifier *notifier;
1936
1937 for (list = sleep_notifiers.prev; list != &sleep_notifiers;
1938 list = list->prev) {
1939 notifier = list_entry(list, struct pmu_sleep_notifier, list);
1940 ret = notifier->notifier_call(notifier, when);
1941 if (ret != PBOOK_SLEEP_OK) {
1942 printk(KERN_DEBUG "sleep %d rejected by %p (%p)\n",
1943 when, notifier, notifier->notifier_call);
1944 for (; list != &sleep_notifiers; list = list->next) {
1945 notifier = list_entry(list, struct pmu_sleep_notifier, list);
1946 notifier->notifier_call(notifier, fallback);
1947 }
1948 return ret;
1949 }
1950 }
1951 return ret;
1952}
1953
1954
1955static int
1956broadcast_wake(void)
1957{
1958 int ret = PBOOK_SLEEP_OK;
1959 struct list_head *list;
1960 struct pmu_sleep_notifier *notifier;
1961
1962 for (list = sleep_notifiers.next; list != &sleep_notifiers;
1963 list = list->next) {
1964 notifier = list_entry(list, struct pmu_sleep_notifier, list);
1965#ifdef VERBOSE_WAKEUP
1966 if (notifier->priority < SLEEP_LEVEL_VIDEO)
1967 xmon_printf("wake, before notifier %x\n", notifier);
1968#endif
1969 notifier->notifier_call(notifier, PBOOK_WAKE);
1970#ifdef VERBOSE_WAKEUP
1971 if (notifier->priority <= SLEEP_LEVEL_VIDEO)
1972 xmon_printf("wake, after notifier %x\n", notifier);
1973#endif
1974 }
1975 return ret;
1976}
1977
1978
1979
1980
1981
1982static struct pci_save {
1983#ifndef HACKED_PCI_SAVE
1984 u16 command;
1985 u16 cache_lat;
1986 u16 intr;
1987 u32 rom_address;
1988#else
1989 u32 config[16];
1990#endif
1991} *pbook_pci_saves;
1992static int pbook_npci_saves;
1993
1994static void __openfirmware
1995pbook_alloc_pci_save(void)
1996{
1997 int npci;
1998 struct pci_dev *pd;
1999
2000 npci = 0;
2001 pci_for_each_dev(pd) {
2002 ++npci;
2003 }
2004 if (npci == 0)
2005 return;
2006 pbook_pci_saves = (struct pci_save *)
2007 kmalloc(npci * sizeof(struct pci_save), GFP_KERNEL);
2008 pbook_npci_saves = npci;
2009}
2010
2011static void __openfirmware
2012pbook_free_pci_save(void)
2013{
2014 if (pbook_pci_saves == NULL)
2015 return;
2016 kfree(pbook_pci_saves);
2017 pbook_pci_saves = NULL;
2018 pbook_npci_saves = 0;
2019}
2020
2021static void __openfirmware
2022pbook_pci_save(void)
2023{
2024 struct pci_save *ps = pbook_pci_saves;
2025 struct pci_dev *pd;
2026 int npci = pbook_npci_saves;
2027
2028 if (ps == NULL)
2029 return;
2030
2031 pci_for_each_dev(pd) {
2032 if (npci-- == 0)
2033 return;
2034#ifndef HACKED_PCI_SAVE
2035 pci_read_config_word(pd, PCI_COMMAND, &ps->command);
2036 pci_read_config_word(pd, PCI_CACHE_LINE_SIZE, &ps->cache_lat);
2037 pci_read_config_word(pd, PCI_INTERRUPT_LINE, &ps->intr);
2038 pci_read_config_dword(pd, PCI_ROM_ADDRESS, &ps->rom_address);
2039#else
2040 int i;
2041 for (i=1;i<16;i++)
2042 pci_read_config_dword(pd, i<<4, &ps->config[i]);
2043#endif
2044 ++ps;
2045 }
2046}
2047
2048
2049
2050
2051
2052static void __openfirmware
2053pbook_pci_restore(void)
2054{
2055 u16 cmd;
2056 struct pci_save *ps = pbook_pci_saves - 1;
2057 struct pci_dev *pd;
2058 int npci = pbook_npci_saves;
2059 int j;
2060
2061 pci_for_each_dev(pd) {
2062#ifdef HACKED_PCI_SAVE
2063 int i;
2064 if (npci-- == 0)
2065 return;
2066 ps++;
2067 for (i=2;i<16;i++)
2068 pci_write_config_dword(pd, i<<4, ps->config[i]);
2069 pci_write_config_dword(pd, 4, ps->config[1]);
2070#else
2071 if (npci-- == 0)
2072 return;
2073 ps++;
2074 if (ps->command == 0)
2075 continue;
2076 pci_read_config_word(pd, PCI_COMMAND, &cmd);
2077 if ((ps->command & ~cmd) == 0)
2078 continue;
2079 switch (pd->hdr_type) {
2080 case PCI_HEADER_TYPE_NORMAL:
2081 for (j = 0; j < 6; ++j)
2082 pci_write_config_dword(pd,
2083 PCI_BASE_ADDRESS_0 + j*4,
2084 pd->resource[j].start);
2085 pci_write_config_dword(pd, PCI_ROM_ADDRESS,
2086 ps->rom_address);
2087 pci_write_config_word(pd, PCI_CACHE_LINE_SIZE,
2088 ps->cache_lat);
2089 pci_write_config_word(pd, PCI_INTERRUPT_LINE,
2090 ps->intr);
2091 pci_write_config_word(pd, PCI_COMMAND, ps->command);
2092 break;
2093 }
2094#endif
2095 }
2096}
2097
2098
2099
2100
2101
2102static u32 save_via[8];
2103static void save_via_state(void)
2104{
2105 save_via[0] = in_8(&via[ANH]);
2106 save_via[1] = in_8(&via[DIRA]);
2107 save_via[2] = in_8(&via[B]);
2108 save_via[3] = in_8(&via[DIRB]);
2109 save_via[4] = in_8(&via[PCR]);
2110 save_via[5] = in_8(&via[ACR]);
2111 save_via[6] = in_8(&via[T1CL]);
2112 save_via[7] = in_8(&via[T1CH]);
2113}
2114static void restore_via_state(void)
2115{
2116 out_8(&via[ANH], save_via[0]);
2117 out_8(&via[DIRA], save_via[1]);
2118 out_8(&via[B], save_via[2]);
2119 out_8(&via[DIRB], save_via[3]);
2120 out_8(&via[PCR], save_via[4]);
2121 out_8(&via[ACR], save_via[5]);
2122 out_8(&via[T1CL], save_via[6]);
2123 out_8(&via[T1CH], save_via[7]);
2124 out_8(&via[IER], IER_CLR | 0x7f);
2125 out_8(&via[IFR], 0x7f);
2126 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
2127}
2128
2129#define GRACKLE_PM (1<<7)
2130#define GRACKLE_DOZE (1<<5)
2131#define GRACKLE_NAP (1<<4)
2132#define GRACKLE_SLEEP (1<<3)
2133
2134int __openfirmware powerbook_sleep_G3(void)
2135{
2136 unsigned long save_l2cr;
2137 unsigned long wait;
2138 unsigned short pmcr1;
2139 struct adb_request req;
2140 int ret;
2141 struct pci_dev *grackle;
2142
2143 grackle = pci_find_slot(0, 0);
2144 if (!grackle)
2145 return -ENODEV;
2146
2147
2148 ret = broadcast_sleep(PBOOK_SLEEP_REQUEST, PBOOK_SLEEP_REJECT);
2149 if (ret != PBOOK_SLEEP_OK) {
2150 printk("pmu: sleep rejected\n");
2151 return -EBUSY;
2152 }
2153
2154
2155
2156
2157
2158
2159
2160 fsync_dev(0);
2161
2162
2163 for (wait = jiffies + (HZ/2); time_before(jiffies, wait); )
2164 mb();
2165
2166
2167 ret = broadcast_sleep(PBOOK_SLEEP_NOW, PBOOK_WAKE);
2168 if (ret != PBOOK_SLEEP_OK) {
2169 printk("pmu: sleep failed\n");
2170 return -EBUSY;
2171 }
2172
2173
2174 while (!bright_req_1.complete || !bright_req_2.complete ||
2175 !bright_req_3.complete || !batt_req.complete)
2176 pmu_poll();
2177
2178
2179 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
2180 while (!req.complete)
2181 pmu_poll();
2182 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
2183 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
2184 while (!req.complete)
2185 pmu_poll();
2186
2187
2188 pmac_sleep_save_intrs(-1);
2189
2190
2191 while (pmu_state != idle)
2192 pmu_poll();
2193
2194
2195 asm volatile("mtdec %0" : : "r" (0x7fffffff));
2196
2197
2198 mb();
2199 asm volatile("mtdec %0" : : "r" (0x7fffffff));
2200
2201
2202 local_irq_disable();
2203
2204
2205 enable_kernel_fp();
2206
2207
2208 save_l2cr = _get_L2CR();
2209 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
2210 _set_L2CR(save_l2cr & 0x7fffffff);
2211
2212
2213 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
2214 while (!req.complete)
2215 pmu_poll();
2216
2217
2218 save_via_state();
2219
2220 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
2221
2222 pci_read_config_word(grackle, 0x70, &pmcr1);
2223
2224 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
2225 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
2226 pci_write_config_word(grackle, 0x70, pmcr1);
2227
2228
2229 low_sleep_handler();
2230
2231
2232 pci_read_config_word(grackle, 0x70, &pmcr1);
2233 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
2234 pci_write_config_word(grackle, 0x70, pmcr1);
2235
2236
2237 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
2238 restore_via_state();
2239
2240
2241 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
2242 _set_L2CR(save_l2cr);
2243
2244
2245 set_context(current->active_mm->context, current->active_mm->pgd);
2246
2247
2248 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0xfc);
2249 while (!req.complete)
2250 pmu_poll();
2251 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
2252 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
2253 while (!req.complete)
2254 pmu_poll();
2255 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
2256 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
2257 while (!req.complete)
2258 pmu_poll();
2259
2260
2261 pmac_sleep_restore_intrs();
2262
2263
2264 mdelay(100);
2265
2266
2267 wakeup_decrementer();
2268
2269
2270 adb_int_pending = 1;
2271 via_pmu_interrupt(0, 0, 0);
2272
2273
2274 local_irq_enable();
2275
2276
2277 broadcast_wake();
2278
2279 return 0;
2280}
2281
2282int __openfirmware powerbook_sleep_Core99(void)
2283{
2284 unsigned long save_l2cr;
2285 unsigned long save_l3cr;
2286 unsigned long wait;
2287 struct adb_request req;
2288 int ret;
2289
2290 if (!can_sleep) {
2291 printk(KERN_ERR "Sleep mode not supported on this machine\n");
2292 return -ENOSYS;
2293 }
2294
2295
2296 ret = broadcast_sleep(PBOOK_SLEEP_REQUEST, PBOOK_SLEEP_REJECT);
2297 if (ret != PBOOK_SLEEP_OK) {
2298 printk("pmu: sleep rejected\n");
2299 return -EBUSY;
2300 }
2301
2302
2303
2304
2305
2306
2307
2308 fsync_dev(0);
2309
2310
2311 for (wait = jiffies + HZ; time_before(jiffies, wait); )
2312 mb();
2313
2314
2315 ret = broadcast_sleep(PBOOK_SLEEP_NOW, PBOOK_WAKE);
2316 if (ret != PBOOK_SLEEP_OK) {
2317 printk("pmu: sleep failed\n");
2318 return -EBUSY;
2319 }
2320
2321 while (!bright_req_1.complete || !bright_req_2.complete ||
2322 !bright_req_3.complete || !batt_req.complete)
2323 pmu_poll();
2324
2325
2326 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
2327 0xff, 0xff);
2328 while (!req.complete)
2329 pmu_poll();
2330
2331 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
2332 0, PMU_PWR_WAKEUP_KEY |
2333 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
2334 while (!req.complete)
2335 pmu_poll();
2336
2337
2338 openpic_sleep_save_intrs();
2339
2340
2341 while (pmu_state != idle)
2342 pmu_poll();
2343
2344
2345 asm volatile("mtdec %0" : : "r" (0x7fffffff));
2346
2347
2348 mb();
2349 asm volatile("mtdec %0" : : "r" (0x7fffffff));
2350
2351
2352 local_irq_disable();
2353
2354
2355 enable_kernel_fp();
2356
2357#ifdef CONFIG_ALTIVEC
2358 if (cur_cpu_spec[0]->cpu_features & CPU_FTR_ALTIVEC)
2359 enable_kernel_altivec();
2360#endif
2361
2362
2363 save_l3cr = _get_L3CR();
2364 save_l2cr = _get_L2CR();
2365 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
2366 _set_L3CR(save_l3cr & 0x7fffffff);
2367 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
2368 _set_L2CR(save_l2cr & 0x7fffffff);
2369
2370
2371
2372
2373 if (!__fake_sleep) {
2374
2375 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
2376 while (!req.complete && pmu_state != idle)
2377 pmu_poll();
2378 }
2379
2380 out_8(&via[B], in_8(&via[B]) | TREQ);
2381 wait_for_ack();
2382
2383
2384 save_via_state();
2385
2386
2387
2388
2389
2390 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
2391
2392
2393 if (__fake_sleep)
2394 mdelay(5000);
2395 else
2396 low_sleep_handler();
2397
2398
2399 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
2400
2401
2402 restore_via_state();
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412#ifdef DEBUG_SLEEP
2413 pmu_blink(2);
2414#endif
2415
2416 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
2417 _set_L2CR(save_l2cr);
2418
2419 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
2420 _set_L3CR(save_l3cr);
2421
2422
2423 set_context(current->active_mm->context, current->active_mm->pgd);
2424
2425
2426 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2427 while (!req.complete)
2428 pmu_poll();
2429 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0xfc);
2430 while (!req.complete)
2431 pmu_poll();
2432
2433
2434 openpic_sleep_restore_intrs();
2435
2436
2437 mdelay(100);
2438
2439
2440 wakeup_decrementer();
2441
2442
2443 adb_int_pending = 1;
2444 via_pmu_interrupt(0, 0, 0);
2445
2446
2447 local_irq_enable();
2448
2449
2450 broadcast_wake();
2451
2452 return 0;
2453}
2454
2455#define PB3400_MEM_CTRL 0xf8000000
2456#define PB3400_MEM_CTRL_SLEEP 0x70
2457
2458int __openfirmware powerbook_sleep_3400(void)
2459{
2460 int ret, i, x;
2461 unsigned int hid0;
2462 unsigned long p, wait;
2463 struct adb_request sleep_req;
2464 char *mem_ctrl;
2465 unsigned int *mem_ctrl_sleep;
2466
2467
2468 mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
2469 if (mem_ctrl == NULL) {
2470 printk("powerbook_sleep_3400: ioremap failed\n");
2471 return -ENOMEM;
2472 }
2473 mem_ctrl_sleep = (unsigned int *) (mem_ctrl + PB3400_MEM_CTRL_SLEEP);
2474
2475
2476 pbook_alloc_pci_save();
2477
2478
2479 ret = broadcast_sleep(PBOOK_SLEEP_REQUEST, PBOOK_SLEEP_REJECT);
2480 if (ret != PBOOK_SLEEP_OK) {
2481 pbook_free_pci_save();
2482 printk("pmu: sleep rejected\n");
2483 return -EBUSY;
2484 }
2485
2486
2487
2488
2489
2490
2491
2492 fsync_dev(0);
2493
2494
2495 for (wait = jiffies + (HZ/4); time_before(jiffies, wait); )
2496 mb();
2497
2498
2499 ret = broadcast_sleep(PBOOK_SLEEP_NOW, PBOOK_WAKE);
2500 if (ret != PBOOK_SLEEP_OK) {
2501 printk("pmu: sleep failed\n");
2502 pbook_free_pci_save();
2503 return -EBUSY;
2504 }
2505
2506
2507 while (!bright_req_1.complete || !bright_req_2.complete ||
2508 !bright_req_3.complete || !batt_req.complete)
2509 pmu_poll();
2510
2511
2512 pmac_sleep_save_intrs(vias->intrs[0].line);
2513
2514
2515 asm volatile("mtdec %0" : : "r" (0x7fffffff));
2516
2517
2518 mb();
2519 asm volatile("mtdec %0" : : "r" (0x7fffffff));
2520
2521
2522 pbook_pci_save();
2523
2524
2525
2526 for (i = 0x403f; i >= 0x4000; --i) {
2527 out_be32(mem_ctrl_sleep, i);
2528 do {
2529 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
2530 } while (x == 0);
2531 if (x >= 0x100)
2532 break;
2533 }
2534
2535
2536 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
2537 while (!sleep_req.complete)
2538 mb();
2539
2540 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
2541
2542
2543 for (p = KERNELBASE; p < KERNELBASE + 0x100000; p += 0x1000)
2544 i = *(volatile int *)p;
2545 asleep = 1;
2546
2547
2548 asm volatile("mfspr %0,1008" : "=r" (hid0) :);
2549 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
2550 asm volatile("mtspr 1008,%0" : : "r" (hid0));
2551 _nmask_and_or_msr(0, MSR_POW | MSR_EE);
2552 udelay(10);
2553
2554
2555 out_be32(mem_ctrl_sleep, 0x3f);
2556 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
2557 pbook_pci_restore();
2558
2559
2560 while (asleep)
2561 mb();
2562
2563
2564 pmac_sleep_restore_intrs();
2565
2566
2567 mdelay(100);
2568
2569
2570 wakeup_decrementer();
2571
2572
2573 local_irq_enable();
2574
2575
2576 broadcast_wake();
2577
2578 pbook_free_pci_save();
2579 iounmap(mem_ctrl);
2580 return 0;
2581}
2582
2583
2584
2585
2586#define RB_SIZE 0x10
2587struct pmu_private {
2588 struct list_head list;
2589 int rb_get;
2590 int rb_put;
2591 struct rb_entry {
2592 unsigned short len;
2593 unsigned char data[16];
2594 } rb_buf[RB_SIZE];
2595 wait_queue_head_t wait;
2596 spinlock_t lock;
2597#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2598 int backlight_locker;
2599#endif
2600};
2601
2602static LIST_HEAD(all_pmu_pvt);
2603static spinlock_t all_pvt_lock = SPIN_LOCK_UNLOCKED;
2604
2605static void pmu_pass_intr(unsigned char *data, int len)
2606{
2607 struct pmu_private *pp;
2608 struct list_head *list;
2609 int i;
2610 unsigned long flags;
2611
2612 if (len > sizeof(pp->rb_buf[0].data))
2613 len = sizeof(pp->rb_buf[0].data);
2614 spin_lock_irqsave(&all_pvt_lock, flags);
2615 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2616 pp = list_entry(list, struct pmu_private, list);
2617 spin_lock(&pp->lock);
2618 i = pp->rb_put + 1;
2619 if (i >= RB_SIZE)
2620 i = 0;
2621 if (i != pp->rb_get) {
2622 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2623 rp->len = len;
2624 memcpy(rp->data, data, len);
2625 pp->rb_put = i;
2626 wake_up_interruptible(&pp->wait);
2627 }
2628 spin_unlock(&pp->lock);
2629 }
2630 spin_unlock_irqrestore(&all_pvt_lock, flags);
2631}
2632
2633static int __openfirmware pmu_open(struct inode *inode, struct file *file)
2634{
2635 struct pmu_private *pp;
2636 unsigned long flags;
2637
2638 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
2639 if (pp == 0)
2640 return -ENOMEM;
2641 pp->rb_get = pp->rb_put = 0;
2642 spin_lock_init(&pp->lock);
2643 init_waitqueue_head(&pp->wait);
2644 spin_lock_irqsave(&all_pvt_lock, flags);
2645#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2646 pp->backlight_locker = 0;
2647#endif
2648 list_add(&pp->list, &all_pmu_pvt);
2649 spin_unlock_irqrestore(&all_pvt_lock, flags);
2650 file->private_data = pp;
2651
2652 return 0;
2653}
2654
2655static ssize_t __openfirmware pmu_read(struct file *file, char *buf,
2656 size_t count, loff_t *ppos)
2657{
2658 struct pmu_private *pp = file->private_data;
2659 DECLARE_WAITQUEUE(wait, current);
2660 unsigned long flags;
2661 int ret;
2662
2663 if (count < 1 || pp == 0)
2664 return -EINVAL;
2665 ret = verify_area(VERIFY_WRITE, buf, count);
2666 if (ret)
2667 return ret;
2668
2669 spin_lock_irqsave(&pp->lock, flags);
2670 add_wait_queue(&pp->wait, &wait);
2671 current->state = TASK_INTERRUPTIBLE;
2672
2673 for (;;) {
2674 ret = -EAGAIN;
2675 if (pp->rb_get != pp->rb_put) {
2676 int i = pp->rb_get;
2677 struct rb_entry *rp = &pp->rb_buf[i];
2678 ret = rp->len;
2679 spin_unlock_irqrestore(&pp->lock, flags);
2680 if (ret > count)
2681 ret = count;
2682 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2683 ret = -EFAULT;
2684 if (++i >= RB_SIZE)
2685 i = 0;
2686 spin_lock_irqsave(&pp->lock, flags);
2687 pp->rb_get = i;
2688 }
2689 if (ret >= 0)
2690 break;
2691 if (file->f_flags & O_NONBLOCK)
2692 break;
2693 ret = -ERESTARTSYS;
2694 if (signal_pending(current))
2695 break;
2696 spin_unlock_irqrestore(&pp->lock, flags);
2697 schedule();
2698 spin_lock_irqsave(&pp->lock, flags);
2699 }
2700 current->state = TASK_RUNNING;
2701 remove_wait_queue(&pp->wait, &wait);
2702 spin_unlock_irqrestore(&pp->lock, flags);
2703
2704 return ret;
2705}
2706
2707static ssize_t __openfirmware pmu_write(struct file *file, const char *buf,
2708 size_t count, loff_t *ppos)
2709{
2710 return 0;
2711}
2712
2713static unsigned int pmu_fpoll(struct file *filp, poll_table *wait)
2714{
2715 struct pmu_private *pp = filp->private_data;
2716 unsigned int mask = 0;
2717 unsigned long flags;
2718
2719 if (pp == 0)
2720 return 0;
2721 poll_wait(filp, &pp->wait, wait);
2722 spin_lock_irqsave(&pp->lock, flags);
2723 if (pp->rb_get != pp->rb_put)
2724 mask |= POLLIN;
2725 spin_unlock_irqrestore(&pp->lock, flags);
2726 return mask;
2727}
2728
2729static int pmu_release(struct inode *inode, struct file *file)
2730{
2731 struct pmu_private *pp = file->private_data;
2732 unsigned long flags;
2733
2734 lock_kernel();
2735 if (pp != 0) {
2736 file->private_data = 0;
2737 spin_lock_irqsave(&all_pvt_lock, flags);
2738 list_del(&pp->list);
2739 spin_unlock_irqrestore(&all_pvt_lock, flags);
2740#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2741 if (pp->backlight_locker) {
2742 spin_lock_irqsave(&pmu_lock, flags);
2743 disable_kernel_backlight--;
2744 spin_unlock_irqrestore(&pmu_lock, flags);
2745 }
2746#endif
2747 kfree(pp);
2748 }
2749 unlock_kernel();
2750 return 0;
2751}
2752
2753
2754static int pmu_ioctl(struct inode * inode, struct file *filp,
2755 u_int cmd, u_long arg)
2756{
2757 struct pmu_private *pp = filp->private_data;
2758 int error;
2759
2760 switch (cmd) {
2761 case PMU_IOC_SLEEP:
2762 if (!capable(CAP_SYS_ADMIN))
2763 return -EACCES;
2764 if (sleep_in_progress)
2765 return -EBUSY;
2766 sleep_in_progress = 1;
2767 switch (pmu_kind) {
2768 case PMU_OHARE_BASED:
2769 error = powerbook_sleep_3400();
2770 break;
2771 case PMU_HEATHROW_BASED:
2772 case PMU_PADDINGTON_BASED:
2773 error = powerbook_sleep_G3();
2774 break;
2775 case PMU_KEYLARGO_BASED:
2776 error = powerbook_sleep_Core99();
2777 break;
2778 default:
2779 error = -ENOSYS;
2780 }
2781 sleep_in_progress = 0;
2782 return error;
2783 case PMU_IOC_CAN_SLEEP:
2784 return put_user((u32)can_sleep, (__u32 *)arg);
2785
2786#ifdef CONFIG_PMAC_BACKLIGHT
2787
2788
2789
2790 case PMU_IOC_GET_BACKLIGHT:
2791 if (sleep_in_progress)
2792 return -EBUSY;
2793 error = get_backlight_level();
2794 if (error < 0)
2795 return error;
2796 return put_user(error, (__u32 *)arg);
2797 case PMU_IOC_SET_BACKLIGHT:
2798 {
2799 __u32 value;
2800 if (sleep_in_progress)
2801 return -EBUSY;
2802 error = get_user(value, (__u32 *)arg);
2803 if (!error)
2804 error = set_backlight_level(value);
2805 return error;
2806 }
2807#ifdef CONFIG_INPUT_ADBHID
2808 case PMU_IOC_GRAB_BACKLIGHT: {
2809 unsigned long flags;
2810 if (pp->backlight_locker)
2811 return 0;
2812 pp->backlight_locker = 1;
2813 spin_lock_irqsave(&pmu_lock, flags);
2814 disable_kernel_backlight++;
2815 spin_unlock_irqrestore(&pmu_lock, flags);
2816 return 0;
2817 }
2818#endif
2819#endif
2820 case PMU_IOC_GET_MODEL:
2821 return put_user(pmu_kind, (__u32 *)arg);
2822 case PMU_IOC_HAS_ADB:
2823 return put_user(pmu_has_adb, (__u32 *)arg);
2824 }
2825 return -EINVAL;
2826}
2827
2828static struct file_operations pmu_device_fops = {
2829 read: pmu_read,
2830 write: pmu_write,
2831 poll: pmu_fpoll,
2832 ioctl: pmu_ioctl,
2833 open: pmu_open,
2834 release: pmu_release,
2835};
2836
2837static struct miscdevice pmu_device = {
2838 PMU_MINOR, "pmu", &pmu_device_fops
2839};
2840
2841void pmu_device_init(void)
2842{
2843 if (via)
2844 misc_register(&pmu_device);
2845}
2846#endif
2847
2848#if defined(DEBUG_SLEEP) || defined(DEBUG_FREQ)
2849static inline void __pmac
2850polled_handshake(volatile unsigned char *via)
2851{
2852 via[B] &= ~TREQ; eieio();
2853 while ((via[B] & TACK) != 0)
2854 ;
2855 via[B] |= TREQ; eieio();
2856 while ((via[B] & TACK) == 0)
2857 ;
2858}
2859
2860static inline void __pmac
2861polled_send_byte(volatile unsigned char *via, int x)
2862{
2863 via[ACR] |= SR_OUT | SR_EXT; eieio();
2864 via[SR] = x; eieio();
2865 polled_handshake(via);
2866}
2867
2868static inline int __pmac
2869polled_recv_byte(volatile unsigned char *via)
2870{
2871 int x;
2872
2873 via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
2874 x = via[SR]; eieio();
2875 polled_handshake(via);
2876 x = via[SR]; eieio();
2877 return x;
2878}
2879
2880int __pmac
2881pmu_polled_request(struct adb_request *req)
2882{
2883 unsigned long flags;
2884 int i, l, c;
2885 volatile unsigned char *v = via;
2886
2887 req->complete = 1;
2888 c = req->data[0];
2889 l = pmu_data_len[c][0];
2890 if (l >= 0 && req->nbytes != l + 1)
2891 return -EINVAL;
2892
2893 local_irq_save(flags);
2894 while (pmu_state != idle)
2895 pmu_poll();
2896
2897 while ((via[B] & TACK) == 0)
2898 ;
2899 polled_send_byte(v, c);
2900 if (l < 0) {
2901 l = req->nbytes - 1;
2902 polled_send_byte(v, l);
2903 }
2904 for (i = 1; i <= l; ++i)
2905 polled_send_byte(v, req->data[i]);
2906
2907 l = pmu_data_len[c][1];
2908 if (l < 0)
2909 l = polled_recv_byte(v);
2910 for (i = 0; i < l; ++i)
2911 req->reply[i + req->reply_len] = polled_recv_byte(v);
2912
2913 if (req->done)
2914 (*req->done)(req);
2915
2916 local_irq_restore(flags);
2917 return 0;
2918}
2919#endif
2920
2921
2922EXPORT_SYMBOL(pmu_request);
2923EXPORT_SYMBOL(pmu_poll);
2924EXPORT_SYMBOL(pmu_suspend);
2925EXPORT_SYMBOL(pmu_resume);
2926EXPORT_SYMBOL(pmu_i2c_combined_read);
2927EXPORT_SYMBOL(pmu_i2c_stdsub_write);
2928EXPORT_SYMBOL(pmu_i2c_simple_read);
2929EXPORT_SYMBOL(pmu_i2c_simple_write);
2930#ifdef CONFIG_PMAC_PBOOK
2931EXPORT_SYMBOL(pmu_register_sleep_notifier);
2932EXPORT_SYMBOL(pmu_unregister_sleep_notifier);
2933EXPORT_SYMBOL(pmu_enable_irled);
2934EXPORT_SYMBOL(pmu_battery_count);
2935EXPORT_SYMBOL(pmu_batteries);
2936EXPORT_SYMBOL(pmu_power_flags);
2937#endif
2938
2939
