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7#include <linux/config.h>
8#include <linux/init.h>
9#include <linux/kbd_ll.h>
10#include <linux/kernel.h>
11#include <linux/kdev_t.h>
12#include <linux/types.h>
13#include <linux/console.h>
14#include <linux/sched.h>
15#include <linux/mc146818rtc.h>
16#include <linux/pc_keyb.h>
17#include <linux/pci.h>
18#include <linux/ide.h>
19#include <linux/ioport.h>
20#include <linux/irq.h>
21
22#include <asm/addrspace.h>
23#include <asm/bcache.h>
24#include <asm/keyboard.h>
25#include <asm/irq.h>
26#include <asm/reboot.h>
27#include <asm/gdb-stub.h>
28#include <asm/time.h>
29#include <asm/nile4.h>
30#include <asm/ddb5xxx/ddb5074.h>
31#include <asm/ddb5xxx/ddb5xxx.h>
32
33
34#ifdef CONFIG_KGDB
35extern void rs_kgdb_hook(int);
36extern void breakpoint(void);
37#endif
38
39extern struct ide_ops std_ide_ops;
40extern struct kbd_ops std_kbd_ops;
41extern struct rtc_ops ddb_rtc_ops;
42
43static void (*back_to_prom) (void) = (void (*)(void)) 0xbfc00000;
44
45static void ddb_machine_restart(char *command)
46{
47 u32 t;
48
49
50 t = nile4_in32(NILE4_PCICTRL + 4);
51 t |= 0x40000000;
52 nile4_out32(NILE4_PCICTRL + 4, t);
53
54 t = nile4_in32(NILE4_CPUSTAT);
55 t |= 1;
56 nile4_out32(NILE4_CPUSTAT, t);
57
58 back_to_prom();
59}
60
61static void ddb_machine_halt(void)
62{
63 printk("DDB Vrc-5074 halted.\n");
64 do {
65 } while (1);
66}
67
68static void ddb_machine_power_off(void)
69{
70 printk("DDB Vrc-5074 halted. Please turn off the power.\n");
71 do {
72 } while (1);
73}
74
75extern void ddb_irq_setup(void);
76extern void rtc_ds1386_init(unsigned long base);
77
78extern void (*board_timer_setup) (struct irqaction * irq);
79
80static void __init ddb_timer_init(struct irqaction *irq)
81{
82
83 nile4_out32(NILE4_T2CTRL, 1000000);
84
85 nile4_out32(NILE4_T2CTRL + 4, 0x00000001);
86
87 nile4_out32(NILE4_T2CNTR, 0);
88
89 setup_irq(nile4_to_irq(NILE4_INT_GPT), irq);
90 nile4_enable_irq(nile4_to_irq(NILE4_INT_GPT));
91 change_c0_status(ST0_IM,
92 IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4);
93
94}
95
96static void __init ddb_time_init(void)
97{
98
99 rtc_ds1386_init(KSEG1ADDR(DDB_PCI_MEM_BASE));
100}
101
102
103
104void __init ddb_setup(void)
105{
106 extern int panic_timeout;
107
108 irq_setup = ddb_irq_setup;
109 set_io_port_base(NILE4_PCI_IO_BASE);
110 isa_slot_offset = NILE4_PCI_MEM_BASE;
111 board_timer_setup = ddb_timer_init;
112 board_time_init = ddb_time_init;
113
114
115 _machine_restart = ddb_machine_restart;
116 _machine_halt = ddb_machine_halt;
117 _machine_power_off = ddb_machine_power_off;
118
119#ifdef CONFIG_BLK_DEV_IDE
120 ide_ops = &std_ide_ops;
121#endif
122
123#ifdef CONFIG_PC_KEYB
124 kbd_ops = &std_kbd_ops;
125#endif
126
127 rtc_ops = &ddb_rtc_ops;
128
129 ddb_out32(DDB_BAR0, 0);
130
131 ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IO, 0, 0x10);
132 ddb_set_pmr(DDB_PCIINIT1, DDB_PCICMD_MEM, DDB_PCI_MEM_BASE , 0x10);
133
134#ifdef CONFIG_FB
135 conswitchp = &dummy_con;
136#endif
137
138
139 panic_timeout = 180;
140}
141
142
143#define USE_NILE4_SERIAL 0
144
145#if USE_NILE4_SERIAL
146#define ns16550_in(reg) nile4_in8((reg)*8)
147#define ns16550_out(reg, val) nile4_out8((reg)*8, (val))
148#else
149#define NS16550_BASE (NILE4_PCI_IO_BASE+0x03f8)
150static inline u8 ns16550_in(u32 reg)
151{
152 return *(volatile u8 *) (NS16550_BASE + reg);
153}
154
155static inline void ns16550_out(u32 reg, u8 val)
156{
157 *(volatile u8 *) (NS16550_BASE + reg) = val;
158}
159#endif
160
161#define NS16550_RBR 0
162#define NS16550_THR 0
163#define NS16550_DLL 0
164#define NS16550_IER 1
165#define NS16550_DLM 1
166#define NS16550_FCR 2
167#define NS16550_IIR 2
168#define NS16550_LCR 3
169#define NS16550_MCR 4
170#define NS16550_LSR 5
171#define NS16550_MSR 6
172#define NS16550_SCR 7
173
174#define NS16550_LSR_DR 0x01
175#define NS16550_LSR_OE 0x02
176#define NS16550_LSR_PE 0x04
177#define NS16550_LSR_FE 0x08
178#define NS16550_LSR_BI 0x10
179#define NS16550_LSR_THRE 0x20
180#define NS16550_LSR_TEMT 0x40
181#define NS16550_LSR_ERR 0x80
182
183
184void _serinit(void)
185{
186#if USE_NILE4_SERIAL
187 ns16550_out(NS16550_LCR, 0x80);
188 ns16550_out(NS16550_DLM, 0x00);
189 ns16550_out(NS16550_DLL, 0x36);
190 ns16550_out(NS16550_LCR, 0x00);
191 ns16550_out(NS16550_LCR, 0x03);
192 ns16550_out(NS16550_FCR, 0x47);
193#else
194
195#endif
196}
197
198void _putc(char c)
199{
200 while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
201 ns16550_out(NS16550_THR, c);
202 if (c == '\n') {
203 while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
204 ns16550_out(NS16550_THR, '\r');
205 }
206}
207
208void _puts(const char *s)
209{
210 char c;
211 while ((c = *s++))
212 _putc(c);
213}
214
215char _getc(void)
216{
217 while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_DR));
218 return ns16550_in(NS16550_RBR);
219}
220
221int _testc(void)
222{
223 return (ns16550_in(NS16550_LSR) & NS16550_LSR_DR) != 0;
224}
225
226
227
228
229
230void ddb5074_led_hex(int hex)
231{
232 outb(hex, 0x80);
233}
234
235
236
237
238
239struct pci_dev *pci_pmu = NULL;
240
241void ddb5074_led_d2(int on)
242{
243 u8 t;
244
245 if (pci_pmu) {
246 pci_read_config_byte(pci_pmu, 0x7e, &t);
247 if (on)
248 t &= 0x7f;
249 else
250 t |= 0x80;
251 pci_write_config_byte(pci_pmu, 0x7e, t);
252 }
253}
254
255void ddb5074_led_d3(int on)
256{
257 u8 t;
258
259 if (pci_pmu) {
260 pci_read_config_byte(pci_pmu, 0x7e, &t);
261 if (on)
262 t &= 0xbf;
263 else
264 t |= 0x40;
265 pci_write_config_byte(pci_pmu, 0x7e, t);
266 }
267}
268