linux-old/drivers/scsi/sym53c8xx.c
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   1/******************************************************************************
   2**  High Performance device driver for the Symbios 53C896 controller.
   3**
   4**  Copyright (C) 1998-2001  Gerard Roudier <groudier@free.fr>
   5**
   6**  This driver also supports all the Symbios 53C8XX controller family, 
   7**  except 53C810 revisions < 16, 53C825 revisions < 16 and all 
   8**  revisions of 53C815 controllers.
   9**
  10**  This driver is based on the Linux port of the FreeBSD ncr driver.
  11** 
  12**  Copyright (C) 1994  Wolfgang Stanglmeier
  13**  
  14**-----------------------------------------------------------------------------
  15**  
  16**  This program is free software; you can redistribute it and/or modify
  17**  it under the terms of the GNU General Public License as published by
  18**  the Free Software Foundation; either version 2 of the License, or
  19**  (at your option) any later version.
  20**
  21**  This program is distributed in the hope that it will be useful,
  22**  but WITHOUT ANY WARRANTY; without even the implied warranty of
  23**  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24**  GNU General Public License for more details.
  25**
  26**  You should have received a copy of the GNU General Public License
  27**  along with this program; if not, write to the Free Software
  28**  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  29**
  30**-----------------------------------------------------------------------------
  31**
  32**  The Linux port of the FreeBSD ncr driver has been achieved in 
  33**  november 1995 by:
  34**
  35**          Gerard Roudier              <groudier@free.fr>
  36**
  37**  Being given that this driver originates from the FreeBSD version, and
  38**  in order to keep synergy on both, any suggested enhancements and corrections
  39**  received on Linux are automatically a potential candidate for the FreeBSD 
  40**  version.
  41**
  42**  The original driver has been written for 386bsd and FreeBSD by
  43**          Wolfgang Stanglmeier        <wolf@cologne.de>
  44**          Stefan Esser                <se@mi.Uni-Koeln.de>
  45**
  46**-----------------------------------------------------------------------------
  47**
  48**  Major contributions:
  49**  --------------------
  50**
  51**  NVRAM detection and reading.
  52**    Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
  53**
  54*******************************************************************************
  55*/
  56
  57/*
  58**      Supported SCSI features:
  59**          Synchronous data transfers
  60**          Wide16 SCSI BUS
  61**          Disconnection/Reselection
  62**          Tagged command queuing
  63**          SCSI Parity checking
  64**
  65**      Supported NCR/SYMBIOS chips:
  66**              53C810A   (8 bits, Fast 10,      no rom BIOS) 
  67**              53C825A   (Wide,   Fast 10,      on-board rom BIOS)
  68**              53C860    (8 bits, Fast 20,      no rom BIOS)
  69**              53C875    (Wide,   Fast 20,      on-board rom BIOS)
  70**              53C876    (Wide,   Fast 20 Dual, on-board rom BIOS)
  71**              53C895    (Wide,   Fast 40,      on-board rom BIOS)
  72**              53C895A   (Wide,   Fast 40,      on-board rom BIOS)
  73**              53C896    (Wide,   Fast 40 Dual, on-board rom BIOS)
  74**              53C897    (Wide,   Fast 40 Dual, on-board rom BIOS)
  75**              53C1510D  (Wide,   Fast 40 Dual, on-board rom BIOS)
  76**              53C1010   (Wide,   Fast 80 Dual, on-board rom BIOS)
  77**              53C1010_66(Wide,   Fast 80 Dual, on-board rom BIOS, 33/66MHz PCI)
  78**
  79**      Other features:
  80**              Memory mapped IO
  81**              Module
  82**              Shared IRQ
  83*/
  84
  85/*
  86**      Name and version of the driver
  87*/
  88#define SCSI_NCR_DRIVER_NAME    "sym53c8xx-1.7.3c-20010512"
  89
  90#define SCSI_NCR_DEBUG_FLAGS    (0)
  91
  92#define NAME53C         "sym53c"
  93#define NAME53C8XX      "sym53c8xx"
  94
  95/*==========================================================
  96**
  97**      Include files
  98**
  99**==========================================================
 100*/
 101
 102#define LinuxVersionCode(v, p, s) (((v)<<16)+((p)<<8)+(s))
 103
 104#include <linux/module.h>
 105
 106#include <asm/dma.h>
 107#include <asm/io.h>
 108#include <asm/system.h>
 109#if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,17)
 110#include <linux/spinlock.h>
 111#elif LINUX_VERSION_CODE >= LinuxVersionCode(2,1,93)
 112#include <asm/spinlock.h>
 113#endif
 114#include <linux/delay.h>
 115#include <linux/signal.h>
 116#include <linux/sched.h>
 117#include <linux/errno.h>
 118#include <linux/pci.h>
 119#include <linux/string.h>
 120#include <linux/mm.h>
 121#include <linux/ioport.h>
 122#include <linux/time.h>
 123#include <linux/timer.h>
 124#include <linux/stat.h>
 125
 126#include <linux/version.h>
 127#include <linux/blk.h>
 128
 129#if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,35)
 130#include <linux/init.h>
 131#endif
 132
 133#ifndef __init
 134#define __init
 135#endif
 136#ifndef __initdata
 137#define __initdata
 138#endif
 139
 140#if LINUX_VERSION_CODE <= LinuxVersionCode(2,1,92)
 141#include <linux/bios32.h>
 142#endif
 143
 144#include "scsi.h"
 145#include "hosts.h"
 146#include "constants.h"
 147#include "sd.h"
 148
 149#include <linux/types.h>
 150
 151/*
 152**      Define BITS_PER_LONG for earlier linux versions.
 153*/
 154#ifndef BITS_PER_LONG
 155#if (~0UL) == 0xffffffffUL
 156#define BITS_PER_LONG   32
 157#else
 158#define BITS_PER_LONG   64
 159#endif
 160#endif
 161
 162/*
 163**      Define the BSD style u_int32 and u_int64 type.
 164**      Are in fact u_int32_t and u_int64_t :-)
 165*/
 166typedef u32 u_int32;
 167typedef u64 u_int64;
 168
 169#include "sym53c8xx.h"
 170
 171/*
 172**      Donnot compile integrity checking code for Linux-2.3.0 
 173**      and above since SCSI data structures are not ready yet.
 174*/
 175/* #if LINUX_VERSION_CODE < LinuxVersionCode(2,3,0) */
 176#if 0
 177#define SCSI_NCR_INTEGRITY_CHECKING
 178#endif
 179
 180#define MIN(a,b)        (((a) < (b)) ? (a) : (b))
 181#define MAX(a,b)        (((a) > (b)) ? (a) : (b))
 182
 183/*
 184**      Hmmm... What complex some PCI-HOST bridges actually are, 
 185**      despite the fact that the PCI specifications are looking 
 186**      so smart and simple! ;-)
 187*/
 188#if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,47)
 189#define SCSI_NCR_DYNAMIC_DMA_MAPPING
 190#endif
 191
 192/*==========================================================
 193**
 194**      A la VMS/CAM-3 queue management.
 195**      Implemented from linux list management.
 196**
 197**==========================================================
 198*/
 199
 200typedef struct xpt_quehead {
 201        struct xpt_quehead *flink;      /* Forward  pointer */
 202        struct xpt_quehead *blink;      /* Backward pointer */
 203} XPT_QUEHEAD;
 204
 205#define xpt_que_init(ptr) do { \
 206        (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
 207} while (0)
 208
 209static inline void __xpt_que_add(struct xpt_quehead * new,
 210        struct xpt_quehead * blink,
 211        struct xpt_quehead * flink)
 212{
 213        flink->blink    = new;
 214        new->flink      = flink;
 215        new->blink      = blink;
 216        blink->flink    = new;
 217}
 218
 219static inline void __xpt_que_del(struct xpt_quehead * blink,
 220        struct xpt_quehead * flink)
 221{
 222        flink->blink = blink;
 223        blink->flink = flink;
 224}
 225
 226static inline int xpt_que_empty(struct xpt_quehead *head)
 227{
 228        return head->flink == head;
 229}
 230
 231static inline void xpt_que_splice(struct xpt_quehead *list,
 232        struct xpt_quehead *head)
 233{
 234        struct xpt_quehead *first = list->flink;
 235
 236        if (first != list) {
 237                struct xpt_quehead *last = list->blink;
 238                struct xpt_quehead *at   = head->flink;
 239
 240                first->blink = head;
 241                head->flink  = first;
 242
 243                last->flink = at;
 244                at->blink   = last;
 245        }
 246}
 247
 248#define xpt_que_entry(ptr, type, member) \
 249        ((type *)((char *)(ptr)-(unsigned long)(&((type *)0)->member)))
 250
 251
 252#define xpt_insque(new, pos)            __xpt_que_add(new, pos, (pos)->flink)
 253
 254#define xpt_remque(el)                  __xpt_que_del((el)->blink, (el)->flink)
 255
 256#define xpt_insque_head(new, head)      __xpt_que_add(new, head, (head)->flink)
 257
 258static inline struct xpt_quehead *xpt_remque_head(struct xpt_quehead *head)
 259{
 260        struct xpt_quehead *elem = head->flink;
 261
 262        if (elem != head)
 263                __xpt_que_del(head, elem->flink);
 264        else
 265                elem = 0;
 266        return elem;
 267}
 268
 269#define xpt_insque_tail(new, head)      __xpt_que_add(new, (head)->blink, head)
 270
 271static inline struct xpt_quehead *xpt_remque_tail(struct xpt_quehead *head)
 272{
 273        struct xpt_quehead *elem = head->blink;
 274
 275        if (elem != head)
 276                __xpt_que_del(elem->blink, head);
 277        else
 278                elem = 0;
 279        return elem;
 280}
 281
 282/*==========================================================
 283**
 284**      Configuration and Debugging
 285**
 286**==========================================================
 287*/
 288
 289/*
 290**    SCSI address of this device.
 291**    The boot routines should have set it.
 292**    If not, use this.
 293*/
 294
 295#ifndef SCSI_NCR_MYADDR
 296#define SCSI_NCR_MYADDR      (7)
 297#endif
 298
 299/*
 300**    The maximum number of tags per logic unit.
 301**    Used only for devices that support tags.
 302*/
 303
 304#ifndef SCSI_NCR_MAX_TAGS
 305#define SCSI_NCR_MAX_TAGS    (8)
 306#endif
 307
 308/*
 309**    TAGS are actually unlimited (256 tags/lun).
 310**    But Linux only supports 255. :)
 311*/
 312#if     SCSI_NCR_MAX_TAGS > 255
 313#define MAX_TAGS        255
 314#else
 315#define MAX_TAGS SCSI_NCR_MAX_TAGS
 316#endif
 317
 318/*
 319**    Since the ncr chips only have a 8 bit ALU, we try to be clever 
 320**    about offset calculation in the TASK TABLE per LUN that is an 
 321**    array of DWORDS = 4 bytes.
 322*/
 323#if     MAX_TAGS > (512/4)
 324#define MAX_TASKS  (1024/4)
 325#elif   MAX_TAGS > (256/4) 
 326#define MAX_TASKS  (512/4)
 327#else
 328#define MAX_TASKS  (256/4)
 329#endif
 330
 331/*
 332**    This one means 'NO TAG for this job'
 333*/
 334#define NO_TAG  (256)
 335
 336/*
 337**    Number of targets supported by the driver.
 338**    n permits target numbers 0..n-1.
 339**    Default is 16, meaning targets #0..#15.
 340**    #7 .. is myself.
 341*/
 342
 343#ifdef SCSI_NCR_MAX_TARGET
 344#define MAX_TARGET  (SCSI_NCR_MAX_TARGET)
 345#else
 346#define MAX_TARGET  (16)
 347#endif
 348
 349/*
 350**    Number of logic units supported by the driver.
 351**    n enables logic unit numbers 0..n-1.
 352**    The common SCSI devices require only
 353**    one lun, so take 1 as the default.
 354*/
 355
 356#ifdef SCSI_NCR_MAX_LUN
 357#define MAX_LUN    64
 358#else
 359#define MAX_LUN    (1)
 360#endif
 361
 362/*
 363**    Asynchronous pre-scaler (ns). Shall be 40 for 
 364**    the SCSI timings to be compliant.
 365*/
 366 
 367#ifndef SCSI_NCR_MIN_ASYNC
 368#define SCSI_NCR_MIN_ASYNC (40)
 369#endif
 370
 371/*
 372**    The maximum number of jobs scheduled for starting.
 373**    We allocate 4 entries more than the value we announce 
 374**    to the SCSI upper layer. Guess why ! :-)
 375*/
 376
 377#ifdef SCSI_NCR_CAN_QUEUE
 378#define MAX_START   (SCSI_NCR_CAN_QUEUE + 4)
 379#else
 380#define MAX_START   (MAX_TARGET + 7 * MAX_TAGS)
 381#endif
 382
 383/*
 384**    We donnot want to allocate more than 1 PAGE for the 
 385**    the start queue and the done queue. We hard-code entry 
 386**    size to 8 in order to let cpp do the checking.
 387**    Allows 512-4=508 pending IOs for i386 but Linux seems for 
 388**    now not able to provide the driver with this amount of IOs.
 389*/
 390#if     MAX_START > PAGE_SIZE/8
 391#undef  MAX_START
 392#define MAX_START (PAGE_SIZE/8)
 393#endif
 394
 395/*
 396**    The maximum number of segments a transfer is split into.
 397**    We support up to 127 segments for both read and write.
 398*/
 399
 400#define MAX_SCATTER (SCSI_NCR_MAX_SCATTER)
 401#define SCR_SG_SIZE     (2)
 402
 403/*
 404**      other
 405*/
 406
 407#define NCR_SNOOP_TIMEOUT (1000000)
 408
 409/*==========================================================
 410**
 411**      Miscallaneous BSDish defines.
 412**
 413**==========================================================
 414*/
 415
 416#define u_char          unsigned char
 417#define u_short         unsigned short
 418#define u_int           unsigned int
 419#define u_long          unsigned long
 420
 421#ifndef bcopy
 422#define bcopy(s, d, n)  memcpy((d), (s), (n))
 423#endif
 424
 425#ifndef bzero
 426#define bzero(d, n)     memset((d), 0, (n))
 427#endif
 428 
 429#ifndef offsetof
 430#define offsetof(t, m)  ((size_t) (&((t *)0)->m))
 431#endif
 432
 433/*
 434**      Simple Wrapper to kernel PCI bus interface.
 435**
 436**      This wrapper allows to get rid of old kernel PCI interface 
 437**      and still allows to preserve linux-2.0 compatibilty.
 438**      In fact, it is mostly an incomplete emulation of the new 
 439**      PCI code for pre-2.2 kernels. When kernel-2.0 support 
 440**      will be dropped, we will just have to remove most of this 
 441**      code.
 442*/
 443
 444#if LINUX_VERSION_CODE >= LinuxVersionCode(2,2,0)
 445
 446typedef struct pci_dev *pcidev_t;
 447#define PCIDEV_NULL             (0)
 448#define PciBusNumber(d)         (d)->bus->number
 449#define PciDeviceFn(d)          (d)->devfn
 450#define PciVendorId(d)          (d)->vendor
 451#define PciDeviceId(d)          (d)->device
 452#define PciIrqLine(d)           (d)->irq
 453
 454static u_long __init
 455pci_get_base_cookie(struct pci_dev *pdev, int index)
 456{
 457        u_long base;
 458
 459#if LINUX_VERSION_CODE > LinuxVersionCode(2,3,12)
 460        base = pdev->resource[index].start;
 461#else
 462        base = pdev->base_address[index];
 463#if BITS_PER_LONG > 32
 464        if ((base & 0x7) == 0x4)
 465                *base |= (((u_long)pdev->base_address[++index]) << 32);
 466#endif
 467#endif
 468        return (base & ~0x7ul);
 469}
 470
 471static int __init
 472pci_get_base_address(struct pci_dev *pdev, int index, u_long *base)
 473{
 474        u32 tmp;
 475#define PCI_BAR_OFFSET(index) (PCI_BASE_ADDRESS_0 + (index<<2))
 476
 477        pci_read_config_dword(pdev, PCI_BAR_OFFSET(index), &tmp);
 478        *base = tmp;
 479        ++index;
 480        if ((tmp & 0x7) == 0x4) {
 481#if BITS_PER_LONG > 32
 482                pci_read_config_dword(pdev, PCI_BAR_OFFSET(index), &tmp);
 483                *base |= (((u_long)tmp) << 32);
 484#endif
 485                ++index;
 486        }
 487        return index;
 488#undef PCI_BAR_OFFSET
 489}
 490
 491#else   /* Incomplete emulation of current PCI code for pre-2.2 kernels */
 492
 493typedef unsigned int pcidev_t;
 494#define PCIDEV_NULL             (~0u)
 495#define PciBusNumber(d)         ((d)>>8)
 496#define PciDeviceFn(d)          ((d)&0xff)
 497#define __PciDev(busn, devfn)   (((busn)<<8)+(devfn))
 498
 499#define pci_present pcibios_present
 500
 501#define pci_read_config_byte(d, w, v) \
 502        pcibios_read_config_byte(PciBusNumber(d), PciDeviceFn(d), w, v)
 503#define pci_read_config_word(d, w, v) \
 504        pcibios_read_config_word(PciBusNumber(d), PciDeviceFn(d), w, v)
 505#define pci_read_config_dword(d, w, v) \
 506        pcibios_read_config_dword(PciBusNumber(d), PciDeviceFn(d), w, v)
 507
 508#define pci_write_config_byte(d, w, v) \
 509        pcibios_write_config_byte(PciBusNumber(d), PciDeviceFn(d), w, v)
 510#define pci_write_config_word(d, w, v) \
 511        pcibios_write_config_word(PciBusNumber(d), PciDeviceFn(d), w, v)
 512#define pci_write_config_dword(d, w, v) \
 513        pcibios_write_config_dword(PciBusNumber(d), PciDeviceFn(d), w, v)
 514
 515static pcidev_t __init
 516pci_find_device(unsigned int vendor, unsigned int device, pcidev_t prev)
 517{
 518        static unsigned short pci_index;
 519        int retv;
 520        unsigned char bus_number, device_fn;
 521
 522        if (prev == PCIDEV_NULL)
 523                pci_index = 0;
 524        else
 525                ++pci_index;
 526        retv = pcibios_find_device (vendor, device, pci_index,
 527                                    &bus_number, &device_fn);
 528        return retv ? PCIDEV_NULL : __PciDev(bus_number, device_fn);
 529}
 530
 531static u_short __init PciVendorId(pcidev_t dev)
 532{
 533        u_short vendor_id;
 534        pci_read_config_word(dev, PCI_VENDOR_ID, &vendor_id);
 535        return vendor_id;
 536}
 537
 538static u_short __init PciDeviceId(pcidev_t dev)
 539{
 540        u_short device_id;
 541        pci_read_config_word(dev, PCI_DEVICE_ID, &device_id);
 542        return device_id;
 543}
 544
 545static u_int __init PciIrqLine(pcidev_t dev)
 546{
 547        u_char irq;
 548        pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
 549        return irq;
 550}
 551
 552static int __init 
 553pci_get_base_address(pcidev_t dev, int offset, u_long *base)
 554{
 555        u_int32 tmp;
 556        
 557        pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + offset, &tmp);
 558        *base = tmp;
 559        offset += sizeof(u_int32);
 560        if ((tmp & 0x7) == 0x4) {
 561#if BITS_PER_LONG > 32
 562                pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + offset, &tmp);
 563                *base |= (((u_long)tmp) << 32);
 564#endif
 565                offset += sizeof(u_int32);
 566        }
 567        return offset;
 568}
 569static u_long __init
 570pci_get_base_cookie(struct pci_dev *pdev, int offset)
 571{
 572        u_long base;
 573
 574        (void) pci_get_base_address(dev, offset, &base);
 575
 576        return base;
 577}
 578
 579#endif  /* LINUX_VERSION_CODE >= LinuxVersionCode(2,2,0) */
 580
 581/* Does not make sense in earlier kernels */
 582#if LINUX_VERSION_CODE < LinuxVersionCode(2,4,0)
 583#define pci_enable_device(pdev)         (0)
 584#endif
 585#if LINUX_VERSION_CODE < LinuxVersionCode(2,4,4)
 586#define scsi_set_pci_device(inst, pdev) (0)
 587#endif
 588
 589/*==========================================================
 590**
 591**      Debugging tags
 592**
 593**==========================================================
 594*/
 595
 596#define DEBUG_ALLOC    (0x0001)
 597#define DEBUG_PHASE    (0x0002)
 598#define DEBUG_QUEUE    (0x0008)
 599#define DEBUG_RESULT   (0x0010)
 600#define DEBUG_POINTER  (0x0020)
 601#define DEBUG_SCRIPT   (0x0040)
 602#define DEBUG_TINY     (0x0080)
 603#define DEBUG_TIMING   (0x0100)
 604#define DEBUG_NEGO     (0x0200)
 605#define DEBUG_TAGS     (0x0400)
 606#define DEBUG_IC       (0x0800)
 607
 608/*
 609**    Enable/Disable debug messages.
 610**    Can be changed at runtime too.
 611*/
 612
 613#ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
 614static int ncr_debug = SCSI_NCR_DEBUG_FLAGS;
 615        #define DEBUG_FLAGS ncr_debug
 616#else
 617        #define DEBUG_FLAGS     SCSI_NCR_DEBUG_FLAGS
 618#endif
 619
 620/*
 621**      SMP threading.
 622**
 623**      Assuming that SMP systems are generally high end systems and may 
 624**      use several SCSI adapters, we are using one lock per controller 
 625**      instead of some global one. For the moment (linux-2.1.95), driver's 
 626**      entry points are called with the 'io_request_lock' lock held, so:
 627**      - We are uselessly loosing a couple of micro-seconds to lock the 
 628**        controller data structure.
 629**      - But the driver is not broken by design for SMP and so can be 
 630**        more resistant to bugs or bad changes in the IO sub-system code.
 631**      - A small advantage could be that the interrupt code is grained as 
 632**        wished (e.g.: threaded by controller).
 633*/
 634
 635#if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,93)
 636
 637spinlock_t sym53c8xx_lock = SPIN_LOCK_UNLOCKED;
 638#define NCR_LOCK_DRIVER(flags)     spin_lock_irqsave(&sym53c8xx_lock, flags)
 639#define NCR_UNLOCK_DRIVER(flags)   spin_unlock_irqrestore(&sym53c8xx_lock,flags)
 640
 641#define NCR_INIT_LOCK_NCB(np)      spin_lock_init(&np->smp_lock);
 642#define NCR_LOCK_NCB(np, flags)    spin_lock_irqsave(&np->smp_lock, flags)
 643#define NCR_UNLOCK_NCB(np, flags)  spin_unlock_irqrestore(&np->smp_lock, flags)
 644
 645#define NCR_LOCK_SCSI_DONE(np, flags) \
 646                spin_lock_irqsave(&io_request_lock, flags)
 647#define NCR_UNLOCK_SCSI_DONE(np, flags) \
 648                spin_unlock_irqrestore(&io_request_lock, flags)
 649
 650#else
 651
 652#define NCR_LOCK_DRIVER(flags)     do { save_flags(flags); cli(); } while (0)
 653#define NCR_UNLOCK_DRIVER(flags)   do { restore_flags(flags); } while (0)
 654
 655#define NCR_INIT_LOCK_NCB(np)      do { } while (0)
 656#define NCR_LOCK_NCB(np, flags)    do { save_flags(flags); cli(); } while (0)
 657#define NCR_UNLOCK_NCB(np, flags)  do { restore_flags(flags); } while (0)
 658
 659#define NCR_LOCK_SCSI_DONE(np, flags)    do {;} while (0)
 660#define NCR_UNLOCK_SCSI_DONE(np, flags)  do {;} while (0)
 661
 662#endif
 663
 664/*
 665**      Memory mapped IO
 666**
 667**      Since linux-2.1, we must use ioremap() to map the io memory space.
 668**      iounmap() to unmap it. That allows portability.
 669**      Linux 1.3.X and 2.0.X allow to remap physical pages addresses greater 
 670**      than the highest physical memory address to kernel virtual pages with 
 671**      vremap() / vfree(). That was not portable but worked with i386 
 672**      architecture.
 673*/
 674
 675#if LINUX_VERSION_CODE < LinuxVersionCode(2,1,0)
 676#define ioremap vremap
 677#define iounmap vfree
 678#endif
 679
 680#ifdef __sparc__
 681#  include <asm/irq.h>
 682#  define memcpy_to_pci(a, b, c)        memcpy_toio((a), (b), (c))
 683#elif defined(__alpha__)
 684#  define memcpy_to_pci(a, b, c)        memcpy_toio((a), (b), (c))
 685#else   /* others */
 686#  define memcpy_to_pci(a, b, c)        memcpy_toio((a), (b), (c))
 687#endif
 688
 689#ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
 690static u_long __init remap_pci_mem(u_long base, u_long size)
 691{
 692        u_long page_base        = ((u_long) base) & PAGE_MASK;
 693        u_long page_offs        = ((u_long) base) - page_base;
 694        u_long page_remapped    = (u_long) ioremap(page_base, page_offs+size);
 695
 696        return page_remapped? (page_remapped + page_offs) : 0UL;
 697}
 698
 699static void __init unmap_pci_mem(u_long vaddr, u_long size)
 700{
 701        if (vaddr)
 702                iounmap((void *) (vaddr & PAGE_MASK));
 703}
 704
 705#endif /* not def SCSI_NCR_PCI_MEM_NOT_SUPPORTED */
 706
 707/*
 708**      Insert a delay in micro-seconds and milli-seconds.
 709**      -------------------------------------------------
 710**      Under Linux, udelay() is restricted to delay < 1 milli-second.
 711**      In fact, it generally works for up to 1 second delay.
 712**      Since 2.1.105, the mdelay() function is provided for delays 
 713**      in milli-seconds.
 714**      Under 2.0 kernels, udelay() is an inline function that is very 
 715**      inaccurate on Pentium processors.
 716*/
 717
 718#if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,105)
 719#define UDELAY udelay
 720#define MDELAY mdelay
 721#else
 722static void UDELAY(long us) { udelay(us); }
 723static void MDELAY(long ms) { while (ms--) UDELAY(1000); }
 724#endif
 725
 726/*
 727**      Simple power of two buddy-like allocator
 728**      ----------------------------------------
 729**      This simple code is not intended to be fast, but to provide 
 730**      power of 2 aligned memory allocations.
 731**      Since the SCRIPTS processor only supplies 8 bit arithmetic,
 732**      this allocator allows simple and fast address calculations  
 733**      from the SCRIPTS code. In addition, cache line alignment 
 734**      is guaranteed for power of 2 cache line size.
 735**      Enhanced in linux-2.3.44 to provide a memory pool per pcidev 
 736**      to support dynamic dma mapping. (I would have preferred a 
 737**      real bus astraction, btw).
 738*/
 739
 740#if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,0)
 741#define __GetFreePages(flags, order) __get_free_pages(flags, order)
 742#else
 743#define __GetFreePages(flags, order) __get_free_pages(flags, order, 0)
 744#endif
 745
 746#define MEMO_SHIFT      4       /* 16 bytes minimum memory chunk */
 747#if PAGE_SIZE >= 8192
 748#define MEMO_PAGE_ORDER 0       /* 1 PAGE  maximum */
 749#else
 750#define MEMO_PAGE_ORDER 1       /* 2 PAGES maximum */
 751#endif
 752#define MEMO_FREE_UNUSED        /* Free unused pages immediately */
 753#define MEMO_WARN       1
 754#define MEMO_GFP_FLAGS  GFP_ATOMIC
 755#define MEMO_CLUSTER_SHIFT      (PAGE_SHIFT+MEMO_PAGE_ORDER)
 756#define MEMO_CLUSTER_SIZE       (1UL << MEMO_CLUSTER_SHIFT)
 757#define MEMO_CLUSTER_MASK       (MEMO_CLUSTER_SIZE-1)
 758
 759typedef u_long m_addr_t;        /* Enough bits to bit-hack addresses */
 760typedef pcidev_t m_bush_t;      /* Something that addresses DMAable */
 761
 762typedef struct m_link {         /* Link between free memory chunks */
 763        struct m_link *next;
 764} m_link_s;
 765
 766#ifdef  SCSI_NCR_DYNAMIC_DMA_MAPPING
 767typedef struct m_vtob {         /* Virtual to Bus address translation */
 768        struct m_vtob *next;
 769        m_addr_t vaddr;
 770        m_addr_t baddr;
 771} m_vtob_s;
 772#define VTOB_HASH_SHIFT         5
 773#define VTOB_HASH_SIZE          (1UL << VTOB_HASH_SHIFT)
 774#define VTOB_HASH_MASK          (VTOB_HASH_SIZE-1)
 775#define VTOB_HASH_CODE(m)       \
 776        ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
 777#endif
 778
 779typedef struct m_pool {         /* Memory pool of a given kind */
 780#ifdef  SCSI_NCR_DYNAMIC_DMA_MAPPING
 781        m_bush_t bush;
 782        m_addr_t (*getp)(struct m_pool *);
 783        void (*freep)(struct m_pool *, m_addr_t);
 784#define M_GETP()                mp->getp(mp)
 785#define M_FREEP(p)              mp->freep(mp, p)
 786#define GetPages()              __GetFreePages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER)
 787#define FreePages(p)            free_pages(p, MEMO_PAGE_ORDER)
 788        int nump;
 789        m_vtob_s *(vtob[VTOB_HASH_SIZE]);
 790        struct m_pool *next;
 791#else
 792#define M_GETP()                __GetFreePages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER)
 793#define M_FREEP(p)              free_pages(p, MEMO_PAGE_ORDER)
 794#endif  /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
 795        struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1];
 796} m_pool_s;
 797
 798static void *___m_alloc(m_pool_s *mp, int size)
 799{
 800        int i = 0;
 801        int s = (1 << MEMO_SHIFT);
 802        int j;
 803        m_addr_t a;
 804        m_link_s *h = mp->h;
 805
 806        if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
 807                return 0;
 808
 809        while (size > s) {
 810                s <<= 1;
 811                ++i;
 812        }
 813
 814        j = i;
 815        while (!h[j].next) {
 816                if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
 817                        h[j].next = (m_link_s *) M_GETP();
 818                        if (h[j].next)
 819                                h[j].next->next = 0;
 820                        break;
 821                }
 822                ++j;
 823                s <<= 1;
 824        }
 825        a = (m_addr_t) h[j].next;
 826        if (a) {
 827                h[j].next = h[j].next->next;
 828                while (j > i) {
 829                        j -= 1;
 830                        s >>= 1;
 831                        h[j].next = (m_link_s *) (a+s);
 832                        h[j].next->next = 0;
 833                }
 834        }
 835#ifdef DEBUG
 836        printk("___m_alloc(%d) = %p\n", size, (void *) a);
 837#endif
 838        return (void *) a;
 839}
 840
 841static void ___m_free(m_pool_s *mp, void *ptr, int size)
 842{
 843        int i = 0;
 844        int s = (1 << MEMO_SHIFT);
 845        m_link_s *q;
 846        m_addr_t a, b;
 847        m_link_s *h = mp->h;
 848
 849#ifdef DEBUG
 850        printk("___m_free(%p, %d)\n", ptr, size);
 851#endif
 852
 853        if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
 854                return;
 855
 856        while (size > s) {
 857                s <<= 1;
 858                ++i;
 859        }
 860
 861        a = (m_addr_t) ptr;
 862
 863        while (1) {
 864#ifdef MEMO_FREE_UNUSED
 865                if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
 866                        M_FREEP(a);
 867                        break;
 868                }
 869#endif
 870                b = a ^ s;
 871                q = &h[i];
 872                while (q->next && q->next != (m_link_s *) b) {
 873                        q = q->next;
 874                }
 875                if (!q->next) {
 876                        ((m_link_s *) a)->next = h[i].next;
 877                        h[i].next = (m_link_s *) a;
 878                        break;
 879                }
 880                q->next = q->next->next;
 881                a = a & b;
 882                s <<= 1;
 883                ++i;
 884        }
 885}
 886
 887static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags)
 888{
 889        void *p;
 890
 891        p = ___m_alloc(mp, size);
 892
 893        if (DEBUG_FLAGS & DEBUG_ALLOC)
 894                printk ("new %-10s[%4d] @%p.\n", name, size, p);
 895
 896        if (p)
 897                bzero(p, size);
 898        else if (uflags & MEMO_WARN)
 899                printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size);
 900
 901        return p;
 902}
 903
 904#define __m_calloc(mp, s, n)    __m_calloc2(mp, s, n, MEMO_WARN)
 905
 906static void __m_free(m_pool_s *mp, void *ptr, int size, char *name)
 907{
 908        if (DEBUG_FLAGS & DEBUG_ALLOC)
 909                printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
 910
 911        ___m_free(mp, ptr, size);
 912
 913}
 914
 915/*
 916 * With pci bus iommu support, we use a default pool of unmapped memory 
 917 * for memory we donnot need to DMA from/to and one pool per pcidev for 
 918 * memory accessed by the PCI chip. `mp0' is the default not DMAable pool.
 919 */
 920
 921#ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
 922
 923static m_pool_s mp0;
 924
 925#else
 926
 927static m_addr_t ___mp0_getp(m_pool_s *mp)
 928{
 929        m_addr_t m = GetPages();
 930        if (m)
 931                ++mp->nump;
 932        return m;
 933}
 934
 935static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
 936{
 937        FreePages(m);
 938        --mp->nump;
 939}
 940
 941static m_pool_s mp0 = {0, ___mp0_getp, ___mp0_freep};
 942
 943#endif  /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
 944
 945static void *m_calloc(int size, char *name)
 946{
 947        u_long flags;
 948        void *m;
 949        NCR_LOCK_DRIVER(flags);
 950        m = __m_calloc(&mp0, size, name);
 951        NCR_UNLOCK_DRIVER(flags);
 952        return m;
 953}
 954
 955static void m_free(void *ptr, int size, char *name)
 956{
 957        u_long flags;
 958        NCR_LOCK_DRIVER(flags);
 959        __m_free(&mp0, ptr, size, name);
 960        NCR_UNLOCK_DRIVER(flags);
 961}
 962
 963/*
 964 * DMAable pools.
 965 */
 966
 967#ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
 968
 969/* Without pci bus iommu support, all the memory is assumed DMAable */
 970
 971#define __m_calloc_dma(b, s, n)         m_calloc(s, n)
 972#define __m_free_dma(b, p, s, n)        m_free(p, s, n)
 973#define __vtobus(b, p)                  virt_to_bus(p)
 974
 975#else
 976
 977/*
 978 * With pci bus iommu support, we maintain one pool per pcidev and a 
 979 * hashed reverse table for virtual to bus physical address translations.
 980 */
 981static m_addr_t ___dma_getp(m_pool_s *mp)
 982{
 983        m_addr_t vp;
 984        m_vtob_s *vbp;
 985
 986        vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB");
 987        if (vbp) {
 988                dma_addr_t daddr;
 989                vp = (m_addr_t) pci_alloc_consistent(mp->bush,
 990                                                     PAGE_SIZE<<MEMO_PAGE_ORDER,
 991                                                     &daddr);
 992                if (vp) {
 993                        int hc = VTOB_HASH_CODE(vp);
 994                        vbp->vaddr = vp;
 995                        vbp->baddr = daddr;
 996                        vbp->next = mp->vtob[hc];
 997                        mp->vtob[hc] = vbp;
 998                        ++mp->nump;
 999                        return vp;
1000                }
1001                else
1002                        __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
1003        }
1004        return 0;
1005}
1006
1007static void ___dma_freep(m_pool_s *mp, m_addr_t m)
1008{
1009        m_vtob_s **vbpp, *vbp;
1010        int hc = VTOB_HASH_CODE(m);
1011
1012        vbpp = &mp->vtob[hc];
1013        while (*vbpp && (*vbpp)->vaddr != m)
1014                vbpp = &(*vbpp)->next;
1015        if (*vbpp) {
1016                vbp = *vbpp;
1017                *vbpp = (*vbpp)->next;
1018                pci_free_consistent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER,
1019                                    (void *)vbp->vaddr, (dma_addr_t)vbp->baddr);
1020                __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
1021                --mp->nump;
1022        }
1023}
1024
1025static inline m_pool_s *___get_dma_pool(m_bush_t bush)
1026{
1027        m_pool_s *mp;
1028        for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next);
1029        return mp;
1030}
1031
1032static m_pool_s *___cre_dma_pool(m_bush_t bush)
1033{
1034        m_pool_s *mp;
1035        mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL");
1036        if (mp) {
1037                bzero(mp, sizeof(*mp));
1038                mp->bush = bush;
1039                mp->getp = ___dma_getp;
1040                mp->freep = ___dma_freep;
1041                mp->next = mp0.next;
1042                mp0.next = mp;
1043        }
1044        return mp;
1045}
1046
1047static void ___del_dma_pool(m_pool_s *p)
1048{
1049        struct m_pool **pp = &mp0.next;
1050
1051        while (*pp && *pp != p)
1052                pp = &(*pp)->next;
1053        if (*pp) {
1054                *pp = (*pp)->next;
1055                __m_free(&mp0, p, sizeof(*p), "MPOOL");
1056        }
1057}
1058
1059static void *__m_calloc_dma(m_bush_t bush, int size, char *name)
1060{
1061        u_long flags;
1062        struct m_pool *mp;
1063        void *m = 0;
1064
1065        NCR_LOCK_DRIVER(flags);
1066        mp = ___get_dma_pool(bush);
1067        if (!mp)
1068                mp = ___cre_dma_pool(bush);
1069        if (mp)
1070                m = __m_calloc(mp, size, name);
1071        if (mp && !mp->nump)
1072                ___del_dma_pool(mp);
1073        NCR_UNLOCK_DRIVER(flags);
1074
1075        return m;
1076}
1077
1078static void __m_free_dma(m_bush_t bush, void *m, int size, char *name)
1079{
1080        u_long flags;
1081        struct m_pool *mp;
1082
1083        NCR_LOCK_DRIVER(flags);
1084        mp = ___get_dma_pool(bush);
1085        if (mp)
1086                __m_free(mp, m, size, name);
1087        if (mp && !mp->nump)
1088                ___del_dma_pool(mp);
1089        NCR_UNLOCK_DRIVER(flags);
1090}
1091
1092static m_addr_t __vtobus(m_bush_t bush, void *m)
1093{
1094        u_long flags;
1095        m_pool_s *mp;
1096        int hc = VTOB_HASH_CODE(m);
1097        m_vtob_s *vp = 0;
1098        m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
1099
1100        NCR_LOCK_DRIVER(flags);
1101        mp = ___get_dma_pool(bush);
1102        if (mp) {
1103                vp = mp->vtob[hc];
1104                while (vp && (m_addr_t) vp->vaddr != a)
1105                        vp = vp->next;
1106        }
1107        NCR_UNLOCK_DRIVER(flags);
1108        return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
1109}
1110
1111#endif  /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
1112
1113#define _m_calloc_dma(np, s, n)         __m_calloc_dma(np->pdev, s, n)
1114#define _m_free_dma(np, p, s, n)        __m_free_dma(np->pdev, p, s, n)
1115#define m_calloc_dma(s, n)              _m_calloc_dma(np, s, n)
1116#define m_free_dma(p, s, n)             _m_free_dma(np, p, s, n)
1117#define _vtobus(np, p)                  __vtobus(np->pdev, p)
1118#define vtobus(p)                       _vtobus(np, p)
1119
1120/*
1121 *  Deal with DMA mapping/unmapping.
1122 */
1123
1124#ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
1125
1126/* Linux versions prior to pci bus iommu kernel interface */
1127
1128#define __unmap_scsi_data(pdev, cmd)    do {; } while (0)
1129#define __map_scsi_single_data(pdev, cmd) (__vtobus(pdev,(cmd)->request_buffer))
1130#define __map_scsi_sg_data(pdev, cmd)   ((cmd)->use_sg)
1131#define __sync_scsi_data(pdev, cmd)     do {; } while (0)
1132
1133#define scsi_sg_dma_address(sc)         vtobus((sc)->address)
1134#define scsi_sg_dma_len(sc)             ((sc)->length)
1135
1136#else
1137
1138/* Linux version with pci bus iommu kernel interface */
1139
1140/* To keep track of the dma mapping (sg/single) that has been set */
1141#define __data_mapped(cmd)      (cmd)->SCp.phase
1142#define __data_mapping(cmd)     (cmd)->SCp.dma_handle
1143
1144static void __unmap_scsi_data(pcidev_t pdev, Scsi_Cmnd *cmd)
1145{
1146        int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1147
1148        switch(__data_mapped(cmd)) {
1149        case 2:
1150                pci_unmap_sg(pdev, cmd->buffer, cmd->use_sg, dma_dir);
1151                break;
1152        case 1:
1153                pci_unmap_page(pdev, __data_mapping(cmd),
1154                               cmd->request_bufflen, dma_dir);
1155                break;
1156        }
1157        __data_mapped(cmd) = 0;
1158}
1159
1160static dma_addr_t __map_scsi_single_data(pcidev_t pdev, Scsi_Cmnd *cmd)
1161{
1162        dma_addr_t mapping;
1163        int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1164
1165        if (cmd->request_bufflen == 0)
1166                return 0;
1167
1168        mapping = pci_map_page(pdev,
1169                               virt_to_page(cmd->request_buffer),
1170                               ((unsigned long)cmd->request_buffer &
1171                                ~PAGE_MASK),
1172                               cmd->request_bufflen, dma_dir);
1173        __data_mapped(cmd) = 1;
1174        __data_mapping(cmd) = mapping;
1175
1176        return mapping;
1177}
1178
1179static int __map_scsi_sg_data(pcidev_t pdev, Scsi_Cmnd *cmd)
1180{
1181        int use_sg;
1182        int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1183
1184        if (cmd->use_sg == 0)
1185                return 0;
1186
1187        use_sg = pci_map_sg(pdev, cmd->buffer, cmd->use_sg, dma_dir);
1188        __data_mapped(cmd) = 2;
1189        __data_mapping(cmd) = use_sg;
1190
1191        return use_sg;
1192}
1193
1194static void __sync_scsi_data(pcidev_t pdev, Scsi_Cmnd *cmd)
1195{
1196        int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1197
1198        switch(__data_mapped(cmd)) {
1199        case 2:
1200                pci_dma_sync_sg(pdev, cmd->buffer, cmd->use_sg, dma_dir);
1201                break;
1202        case 1:
1203                pci_dma_sync_single(pdev, __data_mapping(cmd),
1204                                    cmd->request_bufflen, dma_dir);
1205                break;
1206        }
1207}
1208
1209#define scsi_sg_dma_address(sc)         sg_dma_address(sc)
1210#define scsi_sg_dma_len(sc)             sg_dma_len(sc)
1211
1212#endif  /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
1213
1214#define unmap_scsi_data(np, cmd)        __unmap_scsi_data(np->pdev, cmd)
1215#define map_scsi_single_data(np, cmd)   __map_scsi_single_data(np->pdev, cmd)
1216#define map_scsi_sg_data(np, cmd)       __map_scsi_sg_data(np->pdev, cmd)
1217#define sync_scsi_data(np, cmd)         __sync_scsi_data(np->pdev, cmd)
1218
1219
1220/*
1221 * Print out some buffer.
1222 */
1223static void ncr_print_hex(u_char *p, int n)
1224{
1225        while (n-- > 0)
1226                printk (" %x", *p++);
1227}
1228
1229static void ncr_printl_hex(char *label, u_char *p, int n)
1230{
1231        printk("%s", label);
1232        ncr_print_hex(p, n);
1233        printk (".\n");
1234}
1235
1236/*
1237**      Transfer direction
1238**
1239**      Until some linux kernel version near 2.3.40, low-level scsi 
1240**      drivers were not told about data transfer direction.
1241**      We check the existence of this feature that has been expected 
1242**      for a _long_ time by all SCSI driver developers by just 
1243**      testing against the definition of SCSI_DATA_UNKNOWN. Indeed 
1244**      this is a hack, but testing against a kernel version would 
1245**      have been a shame. ;-)
1246*/
1247#ifdef  SCSI_DATA_UNKNOWN
1248
1249#define scsi_data_direction(cmd)        (cmd->sc_data_direction)
1250
1251#else
1252
1253#define SCSI_DATA_UNKNOWN       0
1254#define SCSI_DATA_WRITE         1
1255#define SCSI_DATA_READ          2
1256#define SCSI_DATA_NONE          3
1257
1258static __inline__ int scsi_data_direction(Scsi_Cmnd *cmd)
1259{
1260        int direction;
1261
1262        switch((int) cmd->cmnd[0]) {
1263        case 0x08:  /*  READ(6)                         08 */
1264        case 0x28:  /*  READ(10)                        28 */
1265        case 0xA8:  /*  READ(12)                        A8 */
1266                direction = SCSI_DATA_READ;
1267                break;
1268        case 0x0A:  /*  WRITE(6)                        0A */
1269        case 0x2A:  /*  WRITE(10)                       2A */
1270        case 0xAA:  /*  WRITE(12)                       AA */
1271                direction = SCSI_DATA_WRITE;
1272                break;
1273        default:
1274                direction = SCSI_DATA_UNKNOWN;
1275                break;
1276        }
1277
1278        return direction;
1279}
1280
1281#endif  /* SCSI_DATA_UNKNOWN */
1282
1283/*
1284**      Head of list of NCR boards
1285**
1286**      For kernel version < 1.3.70, host is retrieved by its irq level.
1287**      For later kernels, the internal host control block address 
1288**      (struct ncb) is used as device id parameter of the irq stuff.
1289*/
1290
1291static struct Scsi_Host *first_host = NULL;
1292
1293
1294/*
1295**      /proc directory entry and proc_info function
1296*/
1297#if LINUX_VERSION_CODE < LinuxVersionCode(2,3,27)
1298static struct proc_dir_entry proc_scsi_sym53c8xx = {
1299    PROC_SCSI_SYM53C8XX, 9, NAME53C8XX,
1300    S_IFDIR | S_IRUGO | S_IXUGO, 2
1301};
1302#endif
1303#ifdef SCSI_NCR_PROC_INFO_SUPPORT
1304static int sym53c8xx_proc_info(char *buffer, char **start, off_t offset,
1305                        int length, int hostno, int func);
1306#endif
1307
1308/*
1309**      Driver setup.
1310**
1311**      This structure is initialized from linux config options.
1312**      It can be overridden at boot-up by the boot command line.
1313*/
1314static struct ncr_driver_setup
1315        driver_setup                    = SCSI_NCR_DRIVER_SETUP;
1316
1317#ifdef  SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
1318static struct ncr_driver_setup
1319        driver_safe_setup __initdata    = SCSI_NCR_DRIVER_SAFE_SETUP;
1320# ifdef MODULE
1321char *sym53c8xx = 0;    /* command line passed by insmod */
1322#  if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,30)
1323MODULE_PARM(sym53c8xx, "s");
1324#  endif
1325# endif
1326#endif
1327
1328/*
1329**      Other Linux definitions
1330*/
1331#define SetScsiResult(cmd, h_sts, s_sts) \
1332        cmd->result = (((h_sts) << 16) + ((s_sts) & 0x7f))
1333
1334/* We may have to remind our amnesiac SCSI layer of the reason of the abort */
1335#if 0
1336#define SetScsiAbortResult(cmd) \
1337          SetScsiResult(        \
1338            cmd,                \
1339            (cmd)->abort_reason == DID_TIME_OUT ? DID_TIME_OUT : DID_ABORT, \
1340            0xff)
1341#else
1342#define SetScsiAbortResult(cmd) SetScsiResult(cmd, DID_ABORT, 0xff)
1343#endif
1344
1345static void sym53c8xx_select_queue_depths(
1346        struct Scsi_Host *host, struct scsi_device *devlist);
1347static void sym53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs);
1348static void sym53c8xx_timeout(unsigned long np);
1349
1350#define initverbose (driver_setup.verbose)
1351#define bootverbose (np->verbose)
1352
1353#ifdef SCSI_NCR_NVRAM_SUPPORT
1354static u_char Tekram_sync[16] __initdata =
1355        {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
1356#endif /* SCSI_NCR_NVRAM_SUPPORT */
1357
1358/*
1359**      Structures used by sym53c8xx_detect/sym53c8xx_pci_init to 
1360**      transmit device configuration to the ncr_attach() function.
1361*/
1362typedef struct {
1363        int     bus;
1364        u_char  device_fn;
1365        u_long  base;
1366        u_long  base_2;
1367        u_long  io_port;
1368        u_long  base_c;
1369        u_long  base_2_c;
1370        int     irq;
1371/* port and reg fields to use INB, OUTB macros */
1372        u_long  base_io;
1373        volatile struct ncr_reg *reg;
1374} ncr_slot;
1375
1376typedef struct {
1377        int type;
1378#define SCSI_NCR_SYMBIOS_NVRAM  (1)
1379#define SCSI_NCR_TEKRAM_NVRAM   (2)
1380#ifdef  SCSI_NCR_NVRAM_SUPPORT
1381        union {
1382                Symbios_nvram Symbios;
1383                Tekram_nvram Tekram;
1384        } data;
1385#endif
1386} ncr_nvram;
1387
1388/*
1389**      Structure used by sym53c8xx_detect/sym53c8xx_pci_init
1390**      to save data on each detected board for ncr_attach().
1391*/
1392typedef struct {
1393        pcidev_t  pdev;
1394        ncr_slot  slot;
1395        ncr_chip  chip;
1396        ncr_nvram *nvram;
1397        u_char host_id;
1398#ifdef  SCSI_NCR_PQS_PDS_SUPPORT
1399        u_char pqs_pds;
1400#endif
1401        int attach_done;
1402} ncr_device;
1403
1404/*==========================================================
1405**
1406**      assert ()
1407**
1408**==========================================================
1409**
1410**      modified copy from 386bsd:/usr/include/sys/assert.h
1411**
1412**----------------------------------------------------------
1413*/
1414
1415#define assert(expression) { \
1416        if (!(expression)) { \
1417                (void)panic( \
1418                        "assertion \"%s\" failed: file \"%s\", line %d\n", \
1419                        #expression, \
1420                        __FILE__, __LINE__); \
1421        } \
1422}
1423
1424/*==========================================================
1425**
1426**      Command control block states.
1427**
1428**==========================================================
1429*/
1430
1431#define HS_IDLE         (0)
1432#define HS_BUSY         (1)
1433#define HS_NEGOTIATE    (2)     /* sync/wide data transfer*/
1434#define HS_DISCONNECT   (3)     /* Disconnected by target */
1435
1436#define HS_DONEMASK     (0x80)
1437#define HS_COMPLETE     (4|HS_DONEMASK)
1438#define HS_SEL_TIMEOUT  (5|HS_DONEMASK) /* Selection timeout      */
1439#define HS_RESET        (6|HS_DONEMASK) /* SCSI reset             */
1440#define HS_ABORTED      (7|HS_DONEMASK) /* Transfer aborted       */
1441#define HS_TIMEOUT      (8|HS_DONEMASK) /* Software timeout       */
1442#define HS_FAIL         (9|HS_DONEMASK) /* SCSI or PCI bus errors */
1443#define HS_UNEXPECTED   (10|HS_DONEMASK)/* Unexpected disconnect  */
1444
1445#define DSA_INVALID 0xffffffff
1446
1447/*==========================================================
1448**
1449**      Software Interrupt Codes
1450**
1451**==========================================================
1452*/
1453
1454#define SIR_BAD_STATUS          (1)
1455#define SIR_SEL_ATN_NO_MSG_OUT  (2)
1456#define SIR_MSG_RECEIVED        (3)
1457#define SIR_MSG_WEIRD           (4)
1458#define SIR_NEGO_FAILED         (5)
1459#define SIR_NEGO_PROTO          (6)
1460#define SIR_SCRIPT_STOPPED      (7)
1461#define SIR_REJECT_TO_SEND      (8)
1462#define SIR_SWIDE_OVERRUN       (9)
1463#define SIR_SODL_UNDERRUN       (10)
1464#define SIR_RESEL_NO_MSG_IN     (11)
1465#define SIR_RESEL_NO_IDENTIFY   (12)
1466#define SIR_RESEL_BAD_LUN       (13)
1467#define SIR_TARGET_SELECTED     (14)
1468#define SIR_RESEL_BAD_I_T_L     (15)
1469#define SIR_RESEL_BAD_I_T_L_Q   (16)
1470#define SIR_ABORT_SENT          (17)
1471#define SIR_RESEL_ABORTED       (18)
1472#define SIR_MSG_OUT_DONE        (19)
1473#define SIR_AUTO_SENSE_DONE     (20)
1474#define SIR_DUMMY_INTERRUPT     (21)
1475#define SIR_DATA_OVERRUN        (22)
1476#define SIR_BAD_PHASE           (23)
1477#define SIR_MAX                 (23)
1478
1479/*==========================================================
1480**
1481**      Extended error bits.
1482**      xerr_status field of struct ccb.
1483**
1484**==========================================================
1485*/
1486
1487#define XE_EXTRA_DATA   (1)     /* unexpected data phase         */
1488#define XE_BAD_PHASE    (2)     /* illegal phase (4/5)           */
1489#define XE_PARITY_ERR   (4)     /* unrecovered SCSI parity error */
1490#define XE_SODL_UNRUN   (1<<3)
1491#define XE_SWIDE_OVRUN  (1<<4)
1492
1493/*==========================================================
1494**
1495**      Negotiation status.
1496**      nego_status field       of struct ccb.
1497**
1498**==========================================================
1499*/
1500
1501#define NS_NOCHANGE     (0)
1502#define NS_SYNC         (1)
1503#define NS_WIDE         (2)
1504#define NS_PPR          (4)
1505
1506/*==========================================================
1507**
1508**      "Special features" of targets.
1509**      quirks field            of struct tcb.
1510**      actualquirks field      of struct ccb.
1511**
1512**==========================================================
1513*/
1514
1515#define QUIRK_AUTOSAVE  (0x01)
1516
1517/*==========================================================
1518**
1519**      Capability bits in Inquire response byte 7.
1520**
1521**==========================================================
1522*/
1523
1524#define INQ7_QUEUE      (0x02)
1525#define INQ7_SYNC       (0x10)
1526#define INQ7_WIDE16     (0x20)
1527
1528/*==========================================================
1529**
1530**      A CCB hashed table is used to retrieve CCB address 
1531**      from DSA value.
1532**
1533**==========================================================
1534*/
1535
1536#define CCB_HASH_SHIFT          8
1537#define CCB_HASH_SIZE           (1UL << CCB_HASH_SHIFT)
1538#define CCB_HASH_MASK           (CCB_HASH_SIZE-1)
1539#define CCB_HASH_CODE(dsa)      (((dsa) >> 11) & CCB_HASH_MASK)
1540
1541/*==========================================================
1542**
1543**      Declaration of structs.
1544**
1545**==========================================================
1546*/
1547
1548struct tcb;
1549struct lcb;
1550struct ccb;
1551struct ncb;
1552struct script;
1553
1554typedef struct ncb * ncb_p;
1555typedef struct tcb * tcb_p;
1556typedef struct lcb * lcb_p;
1557typedef struct ccb * ccb_p;
1558
1559struct link {
1560        ncrcmd  l_cmd;
1561        ncrcmd  l_paddr;
1562};
1563
1564struct  usrcmd {
1565        u_long  target;
1566        u_long  lun;
1567        u_long  data;
1568        u_long  cmd;
1569};
1570
1571#define UC_SETSYNC      10
1572#define UC_SETTAGS      11
1573#define UC_SETDEBUG     12
1574#define UC_SETORDER     13
1575#define UC_SETWIDE      14
1576#define UC_SETFLAG      15
1577#define UC_SETVERBOSE   17
1578#define UC_RESETDEV     18
1579#define UC_CLEARDEV     19
1580
1581#define UF_TRACE        (0x01)
1582#define UF_NODISC       (0x02)
1583#define UF_NOSCAN       (0x04)
1584
1585/*========================================================================
1586**
1587**      Declaration of structs:         target control block
1588**
1589**========================================================================
1590*/
1591struct tcb {
1592        /*----------------------------------------------------------------
1593        **      LUN tables.
1594        **      An array of bus addresses is used on reselection by 
1595        **      the SCRIPT.
1596        **----------------------------------------------------------------
1597        */
1598        u_int32         *luntbl;        /* lcbs bus address table       */
1599        u_int32         b_luntbl;       /* bus address of this table    */
1600        u_int32         b_lun0;         /* bus address of lun0          */
1601        lcb_p           l0p;            /* lcb of LUN #0 (normal case)  */
1602#if MAX_LUN > 1
1603        lcb_p           *lmp;           /* Other lcb's [1..MAX_LUN]     */
1604#endif
1605        /*----------------------------------------------------------------
1606        **      Target capabilities.
1607        **----------------------------------------------------------------
1608        */
1609        u_char          inq_done;       /* Target capabilities received */
1610        u_char          inq_byte7;      /* Contains these capabilities  */
1611
1612        /*----------------------------------------------------------------
1613        **      Some flags.
1614        **----------------------------------------------------------------
1615        */
1616        u_char          to_reset;       /* This target is to be reset   */
1617
1618        /*----------------------------------------------------------------
1619        **      Pointer to the ccb used for negotiation.
1620        **      Prevent from starting a negotiation for all queued commands 
1621        **      when tagged command queuing is enabled.
1622        **----------------------------------------------------------------
1623        */
1624        ccb_p   nego_cp;
1625
1626        /*----------------------------------------------------------------
1627        **      negotiation of wide and synch transfer and device quirks.
1628        **      sval, wval and uval are read from SCRIPTS and so have alignment 
1629        **      constraints.
1630        **----------------------------------------------------------------
1631        */
1632/*0*/   u_char  uval;
1633/*1*/   u_char  sval;
1634/*2*/   u_char  filler2;
1635/*3*/   u_char  wval;
1636        u_short period;
1637        u_char  minsync;
1638        u_char  maxoffs;
1639        u_char  quirks;
1640        u_char  widedone;
1641
1642#ifdef  SCSI_NCR_INTEGRITY_CHECKING
1643        u_char ic_min_sync;
1644        u_char ic_max_width;
1645        u_char ic_done;
1646#endif
1647        u_char ic_maximums_set;
1648        u_char ppr_negotiation;
1649
1650        /*----------------------------------------------------------------
1651        **      User settable limits and options.
1652        **      These limits are read from the NVRAM if present.
1653        **----------------------------------------------------------------
1654        */
1655        u_char  usrsync;
1656        u_char  usrwide;
1657        u_short usrtags;
1658        u_char  usrflag;
1659};
1660
1661/*========================================================================
1662**
1663**      Declaration of structs:         lun control block
1664**
1665**========================================================================
1666*/
1667struct lcb {
1668        /*----------------------------------------------------------------
1669        **      On reselection, SCRIPTS use this value as a JUMP address 
1670        **      after the IDENTIFY has been successfully received.
1671        **      This field is set to 'resel_tag' if TCQ is enabled and 
1672        **      to 'resel_notag' if TCQ is disabled.
1673        **      (Must be at zero due to bad lun handling on reselection)
1674        **----------------------------------------------------------------
1675        */
1676/*0*/   u_int32         resel_task;
1677
1678        /*----------------------------------------------------------------
1679        **      Task table used by the script processor to retrieve the 
1680        **      task corresponding to a reselected nexus. The TAG is used 
1681        **      as offset to determine the corresponding entry.
1682        **      Each entry contains the associated CCB bus address.
1683        **----------------------------------------------------------------
1684        */
1685        u_int32         tasktbl_0;      /* Used if TCQ not enabled      */
1686        u_int32         *tasktbl;
1687        u_int32         b_tasktbl;
1688
1689        /*----------------------------------------------------------------
1690        **      CCB queue management.
1691        **----------------------------------------------------------------
1692        */
1693        XPT_QUEHEAD     busy_ccbq;      /* Queue of busy CCBs           */
1694        XPT_QUEHEAD     wait_ccbq;      /* Queue of waiting for IO CCBs */
1695        u_short         busyccbs;       /* CCBs busy for this lun       */
1696        u_short         queuedccbs;     /* CCBs queued to the controller*/
1697        u_short         queuedepth;     /* Queue depth for this lun     */
1698        u_short         scdev_depth;    /* SCSI device queue depth      */
1699        u_short         maxnxs;         /* Max possible nexuses         */
1700
1701        /*----------------------------------------------------------------
1702        **      Control of tagged command queuing.
1703        **      Tags allocation is performed using a circular buffer.
1704        **      This avoids using a loop for tag allocation.
1705        **----------------------------------------------------------------
1706        */
1707        u_short         ia_tag;         /* Tag allocation index         */
1708        u_short         if_tag;         /* Tag release index            */
1709        u_char          *cb_tags;       /* Circular tags buffer         */
1710        u_char          inq_byte7;      /* Store unit CmdQ capability   */
1711        u_char          usetags;        /* Command queuing is active    */
1712        u_char          to_clear;       /* User wants to clear all tasks*/
1713        u_short         maxtags;        /* Max NR of tags asked by user */
1714        u_short         numtags;        /* Current number of tags       */
1715
1716        /*----------------------------------------------------------------
1717        **      QUEUE FULL and ORDERED tag control.
1718        **----------------------------------------------------------------
1719        */
1720        u_short         num_good;       /* Nr of GOOD since QUEUE FULL  */
1721        u_short         tags_sum[2];    /* Tags sum counters            */
1722        u_char          tags_si;        /* Current index to tags sum    */
1723        u_long          tags_stime;     /* Last time we switch tags_sum */
1724};
1725
1726/*========================================================================
1727**
1728**      Declaration of structs: actions for a task.
1729**
1730**========================================================================
1731**
1732**      It is part of the CCB and is called by the scripts processor to 
1733**      start or restart the data structure (nexus).
1734**
1735**------------------------------------------------------------------------
1736*/
1737struct action {
1738        u_int32         start;
1739        u_int32         restart;
1740};
1741
1742/*========================================================================
1743**
1744**      Declaration of structs: Phase mismatch context.
1745**
1746**========================================================================
1747**
1748**      It is part of the CCB and is used as parameters for the DATA 
1749**      pointer. We need two contexts to handle correctly the SAVED 
1750**      DATA POINTER.
1751**
1752**------------------------------------------------------------------------
1753*/
1754struct pm_ctx {
1755        struct scr_tblmove sg;  /* Updated interrupted SG block */
1756        u_int32 ret;            /* SCRIPT return address        */
1757};
1758
1759/*========================================================================
1760**
1761**      Declaration of structs:     global HEADER.
1762**
1763**========================================================================
1764**
1765**      In earlier driver versions, this substructure was copied from the 
1766**      ccb to a global address after selection (or reselection) and copied 
1767**      back before disconnect. Since we are now using LOAD/STORE DSA 
1768**      RELATIVE instructions, the script is able to access directly these 
1769**      fields, and so, this header is no more copied.
1770**
1771**------------------------------------------------------------------------
1772*/
1773
1774struct head {
1775        /*----------------------------------------------------------------
1776        **      Start and restart SCRIPTS addresses (must be at 0).
1777        **----------------------------------------------------------------
1778        */
1779        struct action   go;
1780
1781        /*----------------------------------------------------------------
1782        **      Saved data pointer.
1783        **      Points to the position in the script responsible for the
1784        **      actual transfer of data.
1785        **      It's written after reception of a SAVE_DATA_POINTER message.
1786        **      The goalpointer points after the last transfer command.
1787        **----------------------------------------------------------------
1788        */
1789        u_int32         savep;
1790        u_int32         lastp;
1791        u_int32         goalp;
1792
1793        /*----------------------------------------------------------------
1794        **      Alternate data pointer.
1795        **      They are copied back to savep/lastp/goalp by the SCRIPTS 
1796        **      when the direction is unknown and the device claims data out.
1797        **----------------------------------------------------------------
1798        */
1799        u_int32         wlastp;
1800        u_int32         wgoalp;
1801
1802        /*----------------------------------------------------------------
1803        **      Status fields.
1804        **----------------------------------------------------------------
1805        */
1806        u_char          status[4];      /* host status                  */
1807};
1808
1809/*
1810**      LUN control block lookup.
1811**      We use a direct pointer for LUN #0, and a table of pointers 
1812**      which is only allocated for devices that support LUN(s) > 0.
1813*/
1814#if MAX_LUN <= 1
1815#define ncr_lp(np, tp, lun) (!lun) ? (tp)->l0p : 0
1816#else
1817#define ncr_lp(np, tp, lun) \
1818        (!lun) ? (tp)->l0p : (tp)->lmp ? (tp)->lmp[(lun)] : 0
1819#endif
1820
1821/*
1822**      The status bytes are used by the host and the script processor.
1823**
1824**      The four bytes (status[4]) are copied to the scratchb register
1825**      (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
1826**      and copied back just after disconnecting.
1827**      Inside the script the XX_REG are used.
1828*/
1829
1830/*
1831**      Last four bytes (script)
1832*/
1833#define  QU_REG scr0
1834#define  HS_REG scr1
1835#define  HS_PRT nc_scr1
1836#define  SS_REG scr2
1837#define  SS_PRT nc_scr2
1838#define  HF_REG scr3
1839#define  HF_PRT nc_scr3
1840
1841/*
1842**      Last four bytes (host)
1843*/
1844#define  actualquirks  phys.header.status[0]
1845#define  host_status   phys.header.status[1]
1846#define  scsi_status   phys.header.status[2]
1847#define  host_flags    phys.header.status[3]
1848
1849/*
1850**      Host flags
1851*/
1852#define HF_IN_PM0       1u
1853#define HF_IN_PM1       (1u<<1)
1854#define HF_ACT_PM       (1u<<2)
1855#define HF_DP_SAVED     (1u<<3)
1856#define HF_AUTO_SENSE   (1u<<4)
1857#define HF_DATA_IN      (1u<<5)
1858#define HF_PM_TO_C      (1u<<6)
1859#define HF_EXT_ERR      (1u<<7)
1860
1861#ifdef SCSI_NCR_IARB_SUPPORT
1862#define HF_HINT_IARB    (1u<<7)
1863#endif
1864
1865/*
1866**      This one is stolen from QU_REG.:)
1867*/
1868#define HF_DATA_ST      (1u<<7)
1869
1870/*==========================================================
1871**
1872**      Declaration of structs:     Data structure block
1873**
1874**==========================================================
1875**
1876**      During execution of a ccb by the script processor,
1877**      the DSA (data structure address) register points
1878**      to this substructure of the ccb.
1879**      This substructure contains the header with
1880**      the script-processor-changable data and
1881**      data blocks for the indirect move commands.
1882**
1883**----------------------------------------------------------
1884*/
1885
1886struct dsb {
1887
1888        /*
1889        **      Header.
1890        */
1891
1892        struct head     header;
1893
1894        /*
1895        **      Table data for Script
1896        */
1897
1898        struct scr_tblsel  select;
1899        struct scr_tblmove smsg  ;
1900        struct scr_tblmove smsg_ext ;
1901        struct scr_tblmove cmd   ;
1902        struct scr_tblmove sense ;
1903        struct scr_tblmove wresid;
1904        struct scr_tblmove data [MAX_SCATTER];
1905
1906        /*
1907        **      Phase mismatch contexts.
1908        **      We need two to handle correctly the
1909        **      SAVED DATA POINTER.
1910        */
1911
1912        struct pm_ctx pm0;
1913        struct pm_ctx pm1;
1914};
1915
1916
1917/*========================================================================
1918**
1919**      Declaration of structs:     Command control block.
1920**
1921**========================================================================
1922*/
1923struct ccb {
1924        /*----------------------------------------------------------------
1925        **      This is the data structure which is pointed by the DSA 
1926        **      register when it is executed by the script processor.
1927        **      It must be the first entry.
1928        **----------------------------------------------------------------
1929        */
1930        struct dsb      phys;
1931
1932        /*----------------------------------------------------------------
1933        **      The general SCSI driver provides a
1934        **      pointer to a control block.
1935        **----------------------------------------------------------------
1936        */
1937        Scsi_Cmnd       *cmd;           /* SCSI command                 */
1938        u_char          cdb_buf[16];    /* Copy of CDB                  */
1939        u_char          sense_buf[64];
1940        int             data_len;       /* Total data length            */
1941        int             segments;       /* Number of SG segments        */
1942
1943        /*----------------------------------------------------------------
1944        **      Message areas.
1945        **      We prepare a message to be sent after selection.
1946        **      We may use a second one if the command is rescheduled 
1947        **      due to CHECK_CONDITION or QUEUE FULL status.
1948        **      Contents are IDENTIFY and SIMPLE_TAG.
1949        **      While negotiating sync or wide transfer,
1950        **      a SDTR or WDTR message is appended.
1951        **----------------------------------------------------------------
1952        */
1953        u_char          scsi_smsg [12];
1954        u_char          scsi_smsg2[12];
1955
1956        /*----------------------------------------------------------------
1957        **      Miscellaneous status'.
1958        **----------------------------------------------------------------
1959        */
1960        u_char          nego_status;    /* Negotiation status           */
1961        u_char          xerr_status;    /* Extended error flags         */
1962        u_int32         extra_bytes;    /* Extraneous bytes transferred */
1963
1964        /*----------------------------------------------------------------
1965        **      Saved info for auto-sense
1966        **----------------------------------------------------------------
1967        */
1968        u_char          sv_scsi_status;
1969        u_char          sv_xerr_status;
1970
1971        /*----------------------------------------------------------------
1972        **      Other fields.
1973        **----------------------------------------------------------------
1974        */
1975        u_long          p_ccb;          /* BUS address of this CCB      */
1976        u_char          sensecmd[6];    /* Sense command                */
1977        u_char          to_abort;       /* This CCB is to be aborted    */
1978        u_short         tag;            /* Tag for this transfer        */
1979                                        /*  NO_TAG means no tag         */
1980        u_char          tags_si;        /* Lun tags sum index (0,1)     */
1981
1982        u_char          target;
1983        u_char          lun;
1984        u_short         queued;
1985        ccb_p           link_ccb;       /* Host adapter CCB chain       */
1986        ccb_p           link_ccbh;      /* Host adapter CCB hash chain  */
1987        XPT_QUEHEAD     link_ccbq;      /* Link to unit CCB queue       */
1988        u_int32         startp;         /* Initial data pointer         */
1989        u_int32         lastp0;         /* Initial 'lastp'              */
1990        int             ext_sg;         /* Extreme data pointer, used   */
1991        int             ext_ofs;        /*  to calculate the residual.  */
1992        int             resid;
1993};
1994
1995#define CCB_PHYS(cp,lbl)        (cp->p_ccb + offsetof(struct ccb, lbl))
1996
1997
1998/*========================================================================
1999**
2000**      Declaration of structs:     NCR device descriptor
2001**
2002**========================================================================
2003*/
2004struct ncb {
2005        /*----------------------------------------------------------------
2006        **      Idle task and invalid task actions and their bus
2007        **      addresses.
2008        **----------------------------------------------------------------
2009        */
2010        struct action   idletask;
2011        struct action   notask;
2012        struct action   bad_i_t_l;
2013        struct action   bad_i_t_l_q;
2014        u_long          p_idletask;
2015        u_long          p_notask;
2016        u_long          p_bad_i_t_l;
2017        u_long          p_bad_i_t_l_q;
2018
2019        /*----------------------------------------------------------------
2020        **      Dummy lun table to protect us against target returning bad  
2021        **      lun number on reselection.
2022        **----------------------------------------------------------------
2023        */
2024        u_int32         *badluntbl;     /* Table physical address       */
2025        u_int32         resel_badlun;   /* SCRIPT handler BUS address   */
2026
2027        /*----------------------------------------------------------------
2028        **      Bit 32-63 of the on-chip RAM bus address in LE format.
2029        **      The START_RAM64 script loads the MMRS and MMWS from this 
2030        **      field.
2031        **----------------------------------------------------------------
2032        */
2033        u_int32         scr_ram_seg;
2034
2035        /*----------------------------------------------------------------
2036        **      CCBs management queues.
2037        **----------------------------------------------------------------
2038        */
2039        Scsi_Cmnd       *waiting_list;  /* Commands waiting for a CCB   */
2040                                        /*  when lcb is not allocated.  */
2041        Scsi_Cmnd       *done_list;     /* Commands waiting for done()  */
2042                                        /* callback to be invoked.      */ 
2043#if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,93)
2044        spinlock_t      smp_lock;       /* Lock for SMP threading       */
2045#endif
2046
2047        /*----------------------------------------------------------------
2048        **      Chip and controller indentification.
2049        **----------------------------------------------------------------
2050        */
2051        int             unit;           /* Unit number                  */
2052        char            chip_name[8];   /* Chip name                    */
2053        char            inst_name[16];  /* ncb instance name            */
2054
2055        /*----------------------------------------------------------------
2056        **      Initial value of some IO register bits.
2057        **      These values are assumed to have been set by BIOS, and may 
2058        **      be used for probing adapter implementation differences.
2059        **----------------------------------------------------------------
2060        */
2061        u_char  sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
2062                sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_stest1, sv_scntl4;
2063
2064        /*----------------------------------------------------------------
2065        **      Actual initial value of IO register bits used by the 
2066        **      driver. They are loaded at initialisation according to  
2067        **      features that are to be enabled.
2068        **----------------------------------------------------------------
2069        */
2070        u_char  rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4, 
2071                rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
2072
2073        /*----------------------------------------------------------------
2074        **      Target data.
2075        **      Target control block bus address array used by the SCRIPT 
2076        **      on reselection.
2077        **----------------------------------------------------------------
2078        */
2079        struct tcb      target[MAX_TARGET];
2080        u_int32         *targtbl;
2081
2082        /*----------------------------------------------------------------
2083        **      Virtual and physical bus addresses of the chip.
2084        **----------------------------------------------------------------
2085        */
2086#ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
2087        u_long          base_va;        /* MMIO base virtual address    */
2088        u_long          base2_va;       /* On-chip RAM virtual address  */
2089#endif
2090        u_long          base_ba;        /* MMIO base bus address        */
2091        u_long          base_io;        /* IO space base address        */
2092        u_long          base_ws;        /* (MM)IO window size           */
2093        u_long          base2_ba;       /* On-chip RAM bus address      */
2094        u_long          base2_ws;       /* On-chip RAM window size      */
2095        u_int           irq;            /* IRQ number                   */
2096        volatile                        /* Pointer to volatile for      */
2097        struct ncr_reg  *reg;           /*  memory mapped IO.           */
2098
2099        /*----------------------------------------------------------------
2100        **      SCRIPTS virtual and physical bus addresses.
2101        **      'script'  is loaded in the on-chip RAM if present.
2102        **      'scripth' stays in main memory for all chips except the 
2103        **      53C895A and 53C896 that provide 8K on-chip RAM.
2104        **----------------------------------------------------------------
2105        */
2106        struct script   *script0;       /* Copies of script and scripth */
2107        struct scripth  *scripth0;      /*  relocated for this ncb.     */
2108        u_long          p_script;       /* Actual script and scripth    */
2109        u_long          p_scripth;      /*  bus addresses.              */
2110        u_long          p_scripth0;
2111
2112        /*----------------------------------------------------------------
2113        **      General controller parameters and configuration.
2114        **----------------------------------------------------------------
2115        */
2116        pcidev_t        pdev;
2117        u_short         device_id;      /* PCI device id                */
2118        u_char          revision_id;    /* PCI device revision id       */
2119        u_char          bus;            /* PCI BUS number               */
2120        u_char          device_fn;      /* PCI BUS device and function  */
2121        u_char          myaddr;         /* SCSI id of the adapter       */
2122        u_char          maxburst;       /* log base 2 of dwords burst   */
2123        u_char          maxwide;        /* Maximum transfer width       */
2124        u_char          minsync;        /* Minimum sync period factor   */
2125        u_char          maxsync;        /* Maximum sync period factor   */
2126        u_char          maxoffs;        /* Max scsi offset              */
2127        u_char          maxoffs_st;     /* Max scsi offset in ST mode   */
2128        u_char          multiplier;     /* Clock multiplier (1,2,4)     */
2129        u_char          clock_divn;     /* Number of clock divisors     */
2130        u_long          clock_khz;      /* SCSI clock frequency in KHz  */
2131        u_int           features;       /* Chip features map            */
2132
2133        /*----------------------------------------------------------------
2134        **      Range for the PCI clock frequency measurement result
2135        **      that ensures the algorithm used by the driver can be 
2136        **      trusted for the SCSI clock frequency measurement.
2137        **      (Assuming a PCI clock frequency of 33 MHz).
2138        **----------------------------------------------------------------
2139        */
2140        u_int           pciclock_min;
2141        u_int           pciclock_max;
2142
2143        /*----------------------------------------------------------------
2144        **      Start queue management.
2145        **      It is filled up by the host processor and accessed by the 
2146        **      SCRIPTS processor in order to start SCSI commands.
2147        **----------------------------------------------------------------
2148        */
2149        u_long          p_squeue;       /* Start queue BUS address      */
2150        u_int32         *squeue;        /* Start queue virtual address  */
2151        u_short         squeueput;      /* Next free slot of the queue  */
2152        u_short         actccbs;        /* Number of allocated CCBs     */
2153        u_short         queuedepth;     /* Start queue depth            */
2154
2155        /*----------------------------------------------------------------
2156        **      Command completion queue.
2157        **      It is the same size as the start queue to avoid overflow.
2158        **----------------------------------------------------------------
2159        */
2160        u_short         dqueueget;      /* Next position to scan        */
2161        u_int32         *dqueue;        /* Completion (done) queue      */
2162
2163        /*----------------------------------------------------------------
2164        **      Timeout handler.
2165        **----------------------------------------------------------------
2166        */
2167        struct timer_list timer;        /* Timer handler link header    */
2168        u_long          lasttime;
2169        u_long          settle_time;    /* Resetting the SCSI BUS       */
2170
2171        /*----------------------------------------------------------------
2172        **      Debugging and profiling.
2173        **----------------------------------------------------------------
2174        */
2175        struct ncr_reg  regdump;        /* Register dump                */
2176        u_long          regtime;        /* Time it has been done        */
2177
2178        /*----------------------------------------------------------------
2179        **      Miscellaneous buffers accessed by the scripts-processor.
2180        **      They shall be DWORD aligned, because they may be read or 
2181        **      written with a script command.
2182        **----------------------------------------------------------------
2183        */
2184        u_char          msgout[12];     /* Buffer for MESSAGE OUT       */
2185        u_char          msgin [12];     /* Buffer for MESSAGE IN        */
2186        u_int32         lastmsg;        /* Last SCSI message sent       */
2187        u_char          scratch;        /* Scratch for SCSI receive     */
2188
2189        /*----------------------------------------------------------------
2190        **      Miscellaneous configuration and status parameters.
2191        **----------------------------------------------------------------
2192        */
2193        u_char          scsi_mode;      /* Current SCSI BUS mode        */
2194        u_char          order;          /* Tag order to use             */
2195        u_char          verbose;        /* Verbosity for this controller*/
2196        u_int32         ncr_cache;      /* Used for cache test at init. */
2197        u_long          p_ncb;          /* BUS address of this NCB      */
2198
2199        /*----------------------------------------------------------------
2200        **      CCB lists and queue.
2201        **----------------------------------------------------------------
2202        */
2203        ccb_p ccbh[CCB_HASH_SIZE];      /* CCB hashed by DSA value      */
2204        struct ccb      *ccbc;          /* CCB chain                    */
2205        XPT_QUEHEAD     free_ccbq;      /* Queue of available CCBs      */
2206
2207        /*----------------------------------------------------------------
2208        **      IMMEDIATE ARBITRATION (IARB) control.
2209        **      We keep track in 'last_cp' of the last CCB that has been 
2210        **      queued to the SCRIPTS processor and clear 'last_cp' when 
2211        **      this CCB completes. If last_cp is not zero at the moment 
2212        **      we queue a new CCB, we set a flag in 'last_cp' that is 
2213        **      used by the SCRIPTS as a hint for setting IARB.
2214        **      We donnot set more than 'iarb_max' consecutive hints for 
2215        **      IARB in order to leave devices a chance to reselect.
2216        **      By the way, any non zero value of 'iarb_max' is unfair. :)
2217        **----------------------------------------------------------------
2218        */
2219#ifdef SCSI_NCR_IARB_SUPPORT
2220        struct ccb      *last_cp;       /* Last queud CCB used for IARB */
2221        u_short         iarb_max;       /* Max. # consecutive IARB hints*/
2222        u_short         iarb_count;     /* Actual # of these hints      */
2223#endif
2224
2225        /*----------------------------------------------------------------
2226        **      We need the LCB in order to handle disconnections and 
2227        **      to count active CCBs for task management. So, we use 
2228        **      a unique CCB for LUNs we donnot have the LCB yet.
2229        **      This queue normally should have at most 1 element.
2230        **----------------------------------------------------------------
2231        */
2232        XPT_QUEHEAD     b0_ccbq;
2233
2234        /*----------------------------------------------------------------
2235        **      We use a different scatter function for 896 rev 1.
2236        **----------------------------------------------------------------
2237        */
2238        int (*scatter) (ncb_p, ccb_p, Scsi_Cmnd *);
2239
2240        /*----------------------------------------------------------------
2241        **      Command abort handling.
2242        **      We need to synchronize tightly with the SCRIPTS 
2243        **      processor in order to handle things correctly.
2244        **----------------------------------------------------------------
2245        */
2246        u_char          abrt_msg[4];    /* Message to send buffer       */
2247        struct scr_tblmove abrt_tbl;    /* Table for the MOV of it      */
2248        struct scr_tblsel  abrt_sel;    /* Sync params for selection    */
2249        u_char          istat_sem;      /* Tells the chip to stop (SEM) */
2250
2251        /*----------------------------------------------------------------
2252        **      Fields that should be removed or changed.
2253        **----------------------------------------------------------------
2254        */
2255        struct usrcmd   user;           /* Command from user            */
2256        volatile u_char release_stage;  /* Synchronisation stage on release  */
2257
2258        /*----------------------------------------------------------------
2259        **      Fields that are used (primarily) for integrity check
2260        **----------------------------------------------------------------
2261        */
2262        unsigned char  check_integrity; /* Enable midlayer integ. check on
2263                                         * bus scan. */
2264#ifdef  SCSI_NCR_INTEGRITY_CHECKING
2265        unsigned char check_integ_par;  /* Set if par or Init. Det. error
2266                                         * used only during integ check */
2267#endif
2268};
2269
2270#define NCB_PHYS(np, lbl)        (np->p_ncb + offsetof(struct ncb, lbl))
2271#define NCB_SCRIPT_PHYS(np,lbl)  (np->p_script  + offsetof (struct script, lbl))
2272#define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
2273#define NCB_SCRIPTH0_PHYS(np,lbl) (np->p_scripth0+offsetof (struct scripth,lbl))
2274
2275/*==========================================================
2276**
2277**
2278**      Script for NCR-Processor.
2279**
2280**      Use ncr_script_fill() to create the variable parts.
2281**      Use ncr_script_copy_and_bind() to make a copy and
2282**      bind to physical addresses.
2283**
2284**
2285**==========================================================
2286**
2287**      We have to know the offsets of all labels before
2288**      we reach them (for forward jumps).
2289**      Therefore we declare a struct here.
2290**      If you make changes inside the script,
2291**      DONT FORGET TO CHANGE THE LENGTHS HERE!
2292**
2293**----------------------------------------------------------
2294*/
2295
2296/*
2297**      Script fragments which are loaded into the on-chip RAM 
2298**      of 825A, 875, 876, 895, 895A and 896 chips.
2299*/
2300struct script {
2301        ncrcmd  start           [ 14];
2302        ncrcmd  getjob_begin    [  4];
2303        ncrcmd  getjob_end      [  4];
2304        ncrcmd  select          [  8];
2305        ncrcmd  wf_sel_done     [  2];
2306        ncrcmd  send_ident      [  2];
2307#ifdef SCSI_NCR_IARB_SUPPORT
2308        ncrcmd  select2         [  8];
2309#else
2310        ncrcmd  select2         [  2];
2311#endif
2312        ncrcmd  command         [  2];
2313        ncrcmd  dispatch        [ 28];
2314        ncrcmd  sel_no_cmd      [ 10];
2315        ncrcmd  init            [  6];
2316        ncrcmd  clrack          [  4];
2317        ncrcmd  disp_status     [  4];
2318        ncrcmd  datai_done      [ 26];
2319        ncrcmd  datao_done      [ 12];
2320        ncrcmd  ign_i_w_r_msg   [  4];
2321        ncrcmd  datai_phase     [  2];
2322        ncrcmd  datao_phase     [  4];
2323        ncrcmd  msg_in          [  2];
2324        ncrcmd  msg_in2         [ 10];
2325#ifdef SCSI_NCR_IARB_SUPPORT
2326        ncrcmd  status          [ 14];
2327#else
2328        ncrcmd  status          [ 10];
2329#endif
2330        ncrcmd  complete        [  8];
2331#ifdef SCSI_NCR_PCIQ_MAY_REORDER_WRITES
2332        ncrcmd  complete2       [ 12];
2333#else
2334        ncrcmd  complete2       [ 10];
2335#endif
2336#ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
2337        ncrcmd  done            [ 18];
2338#else
2339        ncrcmd  done            [ 14];
2340#endif
2341        ncrcmd  done_end        [  2];
2342        ncrcmd  save_dp         [  8];
2343        ncrcmd  restore_dp      [  4];
2344        ncrcmd  disconnect      [ 20];
2345#ifdef SCSI_NCR_IARB_SUPPORT
2346        ncrcmd  idle            [  4];
2347#else
2348        ncrcmd  idle            [  2];
2349#endif
2350#ifdef SCSI_NCR_IARB_SUPPORT
2351        ncrcmd  ungetjob        [  6];
2352#else
2353        ncrcmd  ungetjob        [  4];
2354#endif
2355        ncrcmd  reselect        [  4];
2356        ncrcmd  reselected      [ 20];
2357        ncrcmd  resel_scntl4    [ 30];
2358#if   MAX_TASKS*4 > 512
2359        ncrcmd  resel_tag       [ 18];
2360#elif MAX_TASKS*4 > 256
2361        ncrcmd  resel_tag       [ 12];
2362#else
2363        ncrcmd  resel_tag       [  8];
2364#endif
2365        ncrcmd  resel_go        [  6];
2366        ncrcmd  resel_notag     [  2];
2367        ncrcmd  resel_dsa       [  8];
2368        ncrcmd  data_in         [MAX_SCATTER * SCR_SG_SIZE];
2369        ncrcmd  data_in2        [  4];
2370        ncrcmd  data_out        [MAX_SCATTER * SCR_SG_SIZE];
2371        ncrcmd  data_out2       [  4];
2372        ncrcmd  pm0_data        [ 12];
2373        ncrcmd  pm0_data_out    [  6];
2374        ncrcmd  pm0_data_end    [  6];
2375        ncrcmd  pm1_data        [ 12];
2376        ncrcmd  pm1_data_out    [  6];
2377        ncrcmd  pm1_data_end    [  6];
2378};
2379
2380/*
2381**      Script fragments which stay in main memory for all chips 
2382**      except for the 895A and 896 that support 8K on-chip RAM.
2383*/
2384struct scripth {
2385        ncrcmd  start64         [  2];
2386        ncrcmd  no_data         [  2];
2387        ncrcmd  sel_for_abort   [ 18];
2388        ncrcmd  sel_for_abort_1 [  2];
2389        ncrcmd  select_no_atn   [  8];
2390        ncrcmd  wf_sel_done_no_atn [ 4];
2391
2392        ncrcmd  msg_in_etc      [ 14];
2393        ncrcmd  msg_received    [  4];
2394        ncrcmd  msg_weird_seen  [  4];
2395        ncrcmd  msg_extended    [ 20];
2396        ncrcmd  msg_bad         [  6];
2397        ncrcmd  msg_weird       [  4];
2398        ncrcmd  msg_weird1      [  8];
2399
2400        ncrcmd  wdtr_resp       [  6];
2401        ncrcmd  send_wdtr       [  4];
2402        ncrcmd  sdtr_resp       [  6];
2403        ncrcmd  send_sdtr       [  4];
2404        ncrcmd  ppr_resp        [  6];
2405        ncrcmd  send_ppr        [  4];
2406        ncrcmd  nego_bad_phase  [  4];
2407        ncrcmd  msg_out         [  4];
2408        ncrcmd  msg_out_done    [  4];
2409        ncrcmd  data_ovrun      [  2];
2410        ncrcmd  data_ovrun1     [ 22];
2411        ncrcmd  data_ovrun2     [  8];
2412        ncrcmd  abort_resel     [ 16];
2413        ncrcmd  resend_ident    [  4];
2414        ncrcmd  ident_break     [  4];
2415        ncrcmd  ident_break_atn [  4];
2416        ncrcmd  sdata_in        [  6];
2417        ncrcmd  data_io         [  2];
2418        ncrcmd  data_io_com     [  8];
2419        ncrcmd  data_io_out     [ 12];
2420        ncrcmd  resel_bad_lun   [  4];
2421        ncrcmd  bad_i_t_l       [  4];
2422        ncrcmd  bad_i_t_l_q     [  4];
2423        ncrcmd  bad_status      [  6];
2424        ncrcmd  tweak_pmj       [ 12];
2425        ncrcmd  pm_handle       [ 20];
2426        ncrcmd  pm_handle1      [  4];
2427        ncrcmd  pm_save         [  4];
2428        ncrcmd  pm0_save        [ 14];
2429        ncrcmd  pm1_save        [ 14];
2430
2431        /* WSR handling */
2432#ifdef SYM_DEBUG_PM_WITH_WSR
2433        ncrcmd  pm_wsr_handle   [ 44];
2434#else
2435        ncrcmd  pm_wsr_handle   [ 42];
2436#endif
2437        ncrcmd  wsr_ma_helper   [  4];
2438
2439        /* Data area */
2440        ncrcmd  zero            [  1];
2441        ncrcmd  scratch         [  1];
2442        ncrcmd  scratch1        [  1];
2443        ncrcmd  pm0_data_addr   [  1];
2444        ncrcmd  pm1_data_addr   [  1];
2445        ncrcmd  saved_dsa       [  1];
2446        ncrcmd  saved_drs       [  1];
2447        ncrcmd  done_pos        [  1];
2448        ncrcmd  startpos        [  1];
2449        ncrcmd  targtbl         [  1];
2450        /* End of data area */
2451
2452#ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
2453        ncrcmd  start_ram       [  1];
2454        ncrcmd  script0_ba      [  4];
2455        ncrcmd  start_ram64     [  3];
2456        ncrcmd  script0_ba64    [  3];
2457        ncrcmd  scripth0_ba64   [  6];
2458        ncrcmd  ram_seg64       [  1];
2459#endif
2460        ncrcmd  snooptest       [  6];
2461        ncrcmd  snoopend        [  2];
2462};
2463
2464/*==========================================================
2465**
2466**
2467**      Function headers.
2468**
2469**
2470**==========================================================
2471*/
2472
2473static  ccb_p   ncr_alloc_ccb   (ncb_p np);
2474static  void    ncr_complete    (ncb_p np, ccb_p cp);
2475static  void    ncr_exception   (ncb_p np);
2476static  void    ncr_free_ccb    (ncb_p np, ccb_p cp);
2477static  ccb_p   ncr_ccb_from_dsa(ncb_p np, u_long dsa);
2478static  void    ncr_init_tcb    (ncb_p np, u_char tn);
2479static  lcb_p   ncr_alloc_lcb   (ncb_p np, u_char tn, u_char ln);
2480static  lcb_p   ncr_setup_lcb   (ncb_p np, u_char tn, u_char ln,
2481                                 u_char *inq_data);
2482static  void    ncr_getclock    (ncb_p np, int mult);
2483static  u_int   ncr_getpciclock (ncb_p np);
2484static  void    ncr_selectclock (ncb_p np, u_char scntl3);
2485static  ccb_p   ncr_get_ccb     (ncb_p np, u_char tn, u_char ln);
2486static  void    ncr_init        (ncb_p np, int reset, char * msg, u_long code);
2487static  void    ncr_int_sbmc    (ncb_p np);
2488static  void    ncr_int_par     (ncb_p np, u_short sist);
2489static  void    ncr_int_ma      (ncb_p np);
2490static  void    ncr_int_sir     (ncb_p np);
2491static  void    ncr_int_sto     (ncb_p np);
2492static  void    ncr_int_udc     (ncb_p np);
2493static  void    ncr_negotiate   (ncb_p np, tcb_p tp);
2494static  int     ncr_prepare_nego(ncb_p np, ccb_p cp, u_char *msgptr);
2495#ifdef  SCSI_NCR_INTEGRITY_CHECKING
2496static  int     ncr_ic_nego(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd, u_char *msgptr);
2497#endif
2498static  void    ncr_script_copy_and_bind
2499                                (ncb_p np, ncrcmd *src, ncrcmd *dst, int len);
2500static  void    ncr_script_fill (struct script * scr, struct scripth * scripth);
2501static  int     ncr_scatter_896R1 (ncb_p np, ccb_p cp, Scsi_Cmnd *cmd);
2502static  int     ncr_scatter     (ncb_p np, ccb_p cp, Scsi_Cmnd *cmd);
2503static  void    ncr_getsync     (ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p);
2504static  void    ncr_get_xfer_info(ncb_p np, tcb_p tp, u_char *factor, u_char *offset, u_char *width);
2505static  void    ncr_setsync     (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer, u_char scntl4);
2506static void     ncr_set_sync_wide_status (ncb_p np, u_char target);
2507static  void    ncr_setup_tags  (ncb_p np, u_char tn, u_char ln);
2508static  void    ncr_setwide     (ncb_p np, ccb_p cp, u_char wide, u_char ack);
2509static  void    ncr_setsyncwide (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer, u_char scntl4, u_char wide);
2510static  int     ncr_show_msg    (u_char * msg);
2511static  void    ncr_print_msg   (ccb_p cp, char *label, u_char * msg);
2512static  int     ncr_snooptest   (ncb_p np);
2513static  void    ncr_timeout     (ncb_p np);
2514static  void    ncr_wakeup      (ncb_p np, u_long code);
2515static  int     ncr_wakeup_done (ncb_p np);
2516static  void    ncr_start_next_ccb (ncb_p np, lcb_p lp, int maxn);
2517static  void    ncr_put_start_queue(ncb_p np, ccb_p cp);
2518static  void    ncr_chip_reset  (ncb_p np);
2519static  void    ncr_soft_reset  (ncb_p np);
2520static  void    ncr_start_reset (ncb_p np);
2521static  int     ncr_reset_scsi_bus (ncb_p np, int enab_int, int settle_delay);
2522static  int     ncr_compute_residual (ncb_p np, ccb_p cp);
2523
2524#ifdef SCSI_NCR_USER_COMMAND_SUPPORT
2525static  void    ncr_usercmd     (ncb_p np);
2526#endif
2527
2528static int ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device);
2529static void ncr_free_resources(ncb_p np);
2530
2531static void insert_into_waiting_list(ncb_p np, Scsi_Cmnd *cmd);
2532static Scsi_Cmnd *retrieve_from_waiting_list(int to_remove, ncb_p np, Scsi_Cmnd *cmd);
2533static void process_waiting_list(ncb_p np, int sts);
2534
2535#define remove_from_waiting_list(np, cmd) \
2536                retrieve_from_waiting_list(1, (np), (cmd))
2537#define requeue_waiting_list(np) process_waiting_list((np), DID_OK)
2538#define reset_waiting_list(np) process_waiting_list((np), DID_RESET)
2539
2540#ifdef SCSI_NCR_NVRAM_SUPPORT
2541static  void    ncr_get_nvram          (ncr_device *devp, ncr_nvram *nvp);
2542static  int     sym_read_Tekram_nvram  (ncr_slot *np, u_short device_id,
2543                                        Tekram_nvram *nvram);
2544static  int     sym_read_Symbios_nvram (ncr_slot *np, Symbios_nvram *nvram);
2545#endif
2546
2547/*==========================================================
2548**
2549**
2550**      Global static data.
2551**
2552**
2553**==========================================================
2554*/
2555
2556static inline char *ncr_name (ncb_p np)
2557{
2558        return np->inst_name;
2559}
2560
2561
2562/*==========================================================
2563**
2564**
2565**      Scripts for NCR-Processor.
2566**
2567**      Use ncr_script_bind for binding to physical addresses.
2568**
2569**
2570**==========================================================
2571**
2572**      NADDR generates a reference to a field of the controller data.
2573**      PADDR generates a reference to another part of the script.
2574**      RADDR generates a reference to a script processor register.
2575**      FADDR generates a reference to a script processor register
2576**              with offset.
2577**
2578**----------------------------------------------------------
2579*/
2580
2581#define RELOC_SOFTC     0x40000000
2582#define RELOC_LABEL     0x50000000
2583#define RELOC_REGISTER  0x60000000
2584#if 0
2585#define RELOC_KVAR      0x70000000
2586#endif
2587#define RELOC_LABELH    0x80000000
2588#define RELOC_MASK      0xf0000000
2589
2590#define NADDR(label)    (RELOC_SOFTC | offsetof(struct ncb, label))
2591#define PADDR(label)    (RELOC_LABEL | offsetof(struct script, label))
2592#define PADDRH(label)   (RELOC_LABELH | offsetof(struct scripth, label))
2593#define RADDR(label)    (RELOC_REGISTER | REG(label))
2594#define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
2595#define KVAR(which)     (RELOC_KVAR | (which))
2596
2597#define SCR_DATA_ZERO   0xf00ff00f
2598
2599#ifdef  RELOC_KVAR
2600#define SCRIPT_KVAR_JIFFIES     (0)
2601#define SCRIPT_KVAR_FIRST       SCRIPT_KVAR_JIFFIES
2602#define SCRIPT_KVAR_LAST        SCRIPT_KVAR_JIFFIES
2603/*
2604 * Kernel variables referenced in the scripts.
2605 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
2606 */
2607static void *script_kvars[] __initdata =
2608        { (void *)&jiffies };
2609#endif
2610
2611static  struct script script0 __initdata = {
2612/*--------------------------< START >-----------------------*/ {
2613        /*
2614        **      This NOP will be patched with LED ON
2615        **      SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2616        */
2617        SCR_NO_OP,
2618                0,
2619        /*
2620        **      Clear SIGP.
2621        */
2622        SCR_FROM_REG (ctest2),
2623                0,
2624
2625        /*
2626        **      Stop here if the C code wants to perform 
2627        **      some error recovery procedure manually.
2628        **      (Indicate this by setting SEM in ISTAT)
2629        */
2630        SCR_FROM_REG (istat),
2631                0,
2632        /*
2633        **      Report to the C code the next position in 
2634        **      the start queue the SCRIPTS will schedule.
2635        **      The C code must not change SCRATCHA.
2636        */
2637        SCR_LOAD_ABS (scratcha, 4),
2638                PADDRH (startpos),
2639        SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
2640                SIR_SCRIPT_STOPPED,
2641
2642        /*
2643        **      Start the next job.
2644        **
2645        **      @DSA     = start point for this job.
2646        **      SCRATCHA = address of this job in the start queue.
2647        **
2648        **      We will restore startpos with SCRATCHA if we fails the 
2649        **      arbitration or if it is the idle job.
2650        **
2651        **      The below GETJOB_BEGIN to GETJOB_END section of SCRIPTS 
2652        **      is a critical path. If it is partially executed, it then 
2653        **      may happen that the job address is not yet in the DSA 
2654        **      and the next queue position points to the next JOB.
2655        */
2656        SCR_LOAD_ABS (dsa, 4),
2657                PADDRH (startpos),
2658        SCR_LOAD_REL (temp, 4),
2659                4,
2660}/*-------------------------< GETJOB_BEGIN >------------------*/,{
2661        SCR_STORE_ABS (temp, 4),
2662                PADDRH (startpos),
2663        SCR_LOAD_REL (dsa, 4),
2664                0,
2665}/*-------------------------< GETJOB_END >--------------------*/,{
2666        SCR_LOAD_REL (temp, 4),
2667                0,
2668        SCR_RETURN,
2669                0,
2670
2671}/*-------------------------< SELECT >----------------------*/,{
2672        /*
2673        **      DSA     contains the address of a scheduled
2674        **              data structure.
2675        **
2676        **      SCRATCHA contains the address of the start queue  
2677        **              entry which points to the next job.
2678        **
2679        **      Set Initiator mode.
2680        **
2681        **      (Target mode is left as an exercise for the reader)
2682        */
2683
2684        SCR_CLR (SCR_TRG),
2685                0,
2686        /*
2687        **      And try to select this target.
2688        */
2689        SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2690                PADDR (ungetjob),
2691        /*
2692        **      Now there are 4 possibilities:
2693        **
2694        **      (1) The ncr looses arbitration.
2695        **      This is ok, because it will try again,
2696        **      when the bus becomes idle.
2697        **      (But beware of the timeout function!)
2698        **
2699        **      (2) The ncr is reselected.
2700        **      Then the script processor takes the jump
2701        **      to the RESELECT label.
2702        **
2703        **      (3) The ncr wins arbitration.
2704        **      Then it will execute SCRIPTS instruction until 
2705        **      the next instruction that checks SCSI phase.
2706        **      Then will stop and wait for selection to be 
2707        **      complete or selection time-out to occur.
2708        **
2709        **      After having won arbitration, the ncr SCRIPTS  
2710        **      processor is able to execute instructions while 
2711        **      the SCSI core is performing SCSI selection. But 
2712        **      some script instruction that is not waiting for 
2713        **      a valid phase (or selection timeout) to occur 
2714        **      breaks the selection procedure, by probably 
2715        **      affecting timing requirements.
2716        **      So we have to wait immediately for the next phase 
2717        **      or the selection to complete or time-out.
2718        */
2719
2720        /*
2721        **      load the savep (saved pointer) into
2722        **      the actual data pointer.
2723        */
2724        SCR_LOAD_REL (temp, 4),
2725                offsetof (struct ccb, phys.header.savep),
2726        /*
2727        **      Initialize the status registers
2728        */
2729        SCR_LOAD_REL (scr0, 4),
2730                offsetof (struct ccb, phys.header.status),
2731
2732}/*-------------------------< WF_SEL_DONE >----------------------*/,{
2733        SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2734                SIR_SEL_ATN_NO_MSG_OUT,
2735}/*-------------------------< SEND_IDENT >----------------------*/,{
2736        /*
2737        **      Selection complete.
2738        **      Send the IDENTIFY and SIMPLE_TAG messages
2739        **      (and the M_X_SYNC_REQ / M_X_WIDE_REQ message)
2740        */
2741        SCR_MOVE_TBL ^ SCR_MSG_OUT,
2742                offsetof (struct dsb, smsg),
2743}/*-------------------------< SELECT2 >----------------------*/,{
2744#ifdef SCSI_NCR_IARB_SUPPORT
2745        /*
2746        **      Set IMMEDIATE ARBITRATION if we have been given 
2747        **      a hint to do so. (Some job to do after this one).
2748        */
2749        SCR_FROM_REG (HF_REG),
2750                0,
2751        SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
2752                8,
2753        SCR_REG_REG (scntl1, SCR_OR, IARB),
2754                0,
2755#endif
2756        /*
2757        **      Anticipate the COMMAND phase.
2758        **      This is the PHASE we expect at this point.
2759        */
2760        SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
2761                PADDR (sel_no_cmd),
2762
2763}/*-------------------------< COMMAND >--------------------*/,{
2764        /*
2765        **      ... and send the command
2766        */
2767        SCR_MOVE_TBL ^ SCR_COMMAND,
2768                offsetof (struct dsb, cmd),
2769
2770}/*-----------------------< DISPATCH >----------------------*/,{
2771        /*
2772        **      MSG_IN is the only phase that shall be 
2773        **      entered at least once for each (re)selection.
2774        **      So we test it first.
2775        */
2776        SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
2777                PADDR (msg_in),
2778        SCR_JUMP ^ IFTRUE (IF (SCR_DATA_OUT)),
2779                PADDR (datao_phase),
2780        SCR_JUMP ^ IFTRUE (IF (SCR_DATA_IN)),
2781                PADDR (datai_phase),
2782        SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
2783                PADDR (status),
2784        SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
2785                PADDR (command),
2786        SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
2787                PADDRH (msg_out),
2788        /*
2789         *  Discard as many illegal phases as 
2790         *  required and tell the C code about.
2791         */
2792        SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_OUT)),
2793                16,
2794        SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
2795                NADDR (scratch),
2796        SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_OUT)),
2797                -16,
2798        SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_IN)),
2799                16,
2800        SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
2801                NADDR (scratch),
2802        SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_IN)),
2803                -16,
2804        SCR_INT,
2805                SIR_BAD_PHASE,
2806        SCR_JUMP,
2807                PADDR (dispatch),
2808}/*---------------------< SEL_NO_CMD >----------------------*/,{
2809        /*
2810        **      The target does not switch to command 
2811        **      phase after IDENTIFY has been sent.
2812        **
2813        **      If it stays in MSG OUT phase send it 
2814        **      the IDENTIFY again.
2815        */
2816        SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2817                PADDRH (resend_ident),
2818        /*
2819        **      If target does not switch to MSG IN phase 
2820        **      and we sent a negotiation, assert the 
2821        **      failure immediately.
2822        */
2823        SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
2824                PADDR (dispatch),
2825        SCR_FROM_REG (HS_REG),
2826                0,
2827        SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2828                SIR_NEGO_FAILED,
2829        /*
2830        **      Jump to dispatcher.
2831        */
2832        SCR_JUMP,
2833                PADDR (dispatch),
2834
2835}/*-------------------------< INIT >------------------------*/,{
2836        /*
2837        **      Wait for the SCSI RESET signal to be 
2838        **      inactive before restarting operations, 
2839        **      since the chip may hang on SEL_ATN 
2840        **      if SCSI RESET is active.
2841        */
2842        SCR_FROM_REG (sstat0),
2843                0,
2844        SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
2845                -16,
2846        SCR_JUMP,
2847                PADDR (start),
2848}/*-------------------------< CLRACK >----------------------*/,{
2849        /*
2850        **      Terminate possible pending message phase.
2851        */
2852        SCR_CLR (SCR_ACK),
2853                0,
2854        SCR_JUMP,
2855                PADDR (dispatch),
2856
2857}/*-------------------------< DISP_STATUS >----------------------*/,{
2858        /*
2859        **      Anticipate STATUS phase.
2860        **
2861        **      Does spare 3 SCRIPTS instructions when we have 
2862        **      completed the INPUT of the data.
2863        */
2864        SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)),
2865                PADDR (status),
2866        SCR_JUMP,
2867                PADDR (dispatch),
2868
2869}/*-------------------------< DATAI_DONE >-------------------*/,{
2870        /*
2871         *  If the device wants us to send more data,
2872         *  we must count the extra bytes.
2873         */
2874        SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_IN)),
2875                PADDRH (data_ovrun),
2876        /*
2877        **      If the SWIDE is not full, jump to dispatcher.
2878        **      We anticipate a STATUS phase.
2879        **      If we get later an IGNORE WIDE RESIDUE, we 
2880        **      will alias it as a MODIFY DP (-1).
2881        */
2882        SCR_FROM_REG (scntl2),
2883                0,
2884        SCR_JUMP ^ IFFALSE (MASK (WSR, WSR)),
2885                PADDR (disp_status),
2886        /*
2887        **      The SWIDE is full.
2888        **      Clear this condition.
2889        */
2890        SCR_REG_REG (scntl2, SCR_OR, WSR),
2891                0,
2892        /*
2893         *      We are expecting an IGNORE RESIDUE message
2894         *      from the device, otherwise we are in data
2895         *      overrun condition. Check against MSG_IN phase.
2896        */
2897        SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
2898                SIR_SWIDE_OVERRUN,      
2899        SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2900                PADDR (disp_status),
2901        /*
2902         *      We are in MSG_IN phase,
2903         *      Read the first byte of the message.
2904         *      If it is not an IGNORE RESIDUE message,
2905         *      signal overrun and jump to message
2906         *      processing.
2907         */
2908        SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2909                NADDR (msgin[0]),
2910        SCR_INT ^ IFFALSE (DATA (M_IGN_RESIDUE)),
2911                SIR_SWIDE_OVERRUN,      
2912        SCR_JUMP ^ IFFALSE (DATA (M_IGN_RESIDUE)),
2913                PADDR (msg_in2),
2914
2915        /*
2916         *      We got the message we expected.
2917         *      Read the 2nd byte, and jump to dispatcher.
2918         */
2919        SCR_CLR (SCR_ACK),
2920                0,
2921        SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2922                NADDR (msgin[1]),
2923        SCR_CLR (SCR_ACK),
2924                0,
2925        SCR_JUMP,
2926                PADDR (disp_status),
2927
2928}/*-------------------------< DATAO_DONE >-------------------*/,{
2929        /*
2930         *  If the device wants us to send more data,
2931         *  we must count the extra bytes.
2932         */
2933        SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_OUT)),
2934                PADDRH (data_ovrun),
2935        /*
2936        **      If the SODL is not full jump to dispatcher.
2937        **      We anticipate a MSG IN phase or a STATUS phase.
2938        */
2939        SCR_FROM_REG (scntl2),
2940                0,
2941        SCR_JUMP ^ IFFALSE (MASK (WSS, WSS)),
2942                PADDR (disp_status),
2943        /*
2944        **      The SODL is full, clear this condition.
2945        */
2946        SCR_REG_REG (scntl2, SCR_OR, WSS),
2947                0,
2948        /*
2949        **      And signal a DATA UNDERRUN condition 
2950        **      to the C code.
2951        */
2952        SCR_INT,
2953                SIR_SODL_UNDERRUN,
2954        SCR_JUMP,
2955                PADDR (dispatch),
2956
2957}/*-------------------------< IGN_I_W_R_MSG >--------------*/,{
2958        /*
2959        **      We jump here from the phase mismatch interrupt, 
2960        **      When we have a SWIDE and the device has presented 
2961        **      a IGNORE WIDE RESIDUE message on the BUS.
2962        **      We just have to throw away this message and then 
2963        **      to jump to dispatcher.
2964        */
2965        SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
2966                NADDR (scratch),
2967        /*
2968        **      Clear ACK and jump to dispatcher.
2969        */
2970        SCR_JUMP,
2971                PADDR (clrack),
2972
2973}/*-------------------------< DATAI_PHASE >------------------*/,{
2974        SCR_RETURN,
2975                0,
2976}/*-------------------------< DATAO_PHASE >------------------*/,{
2977        /*
2978        **      Patch for 53c1010_66 only - to allow A0 part
2979        **      to operate properly in a 33MHz PCI bus.
2980        **
2981        **      SCR_REG_REG(scntl4, SCR_OR, 0x0c),
2982        **              0,
2983        */
2984        SCR_NO_OP,
2985                0,
2986        SCR_RETURN,
2987                0,
2988}/*-------------------------< MSG_IN >--------------------*/,{
2989        /*
2990        **      Get the first byte of the message.
2991        **
2992        **      The script processor doesn't negate the
2993        **      ACK signal after this transfer.
2994        */
2995        SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2996                NADDR (msgin[0]),
2997}/*-------------------------< MSG_IN2 >--------------------*/,{
2998        /*
2999        **      Check first against 1 byte messages 
3000        **      that we handle from SCRIPTS.
3001        */
3002        SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)),
3003                PADDR (complete),
3004        SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)),
3005                PADDR (disconnect),
3006        SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)),
3007                PADDR (save_dp),
3008        SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)),
3009                PADDR (restore_dp),
3010        /*
3011        **      We handle all other messages from the 
3012        **      C code, so no need to waste on-chip RAM 
3013        **      for those ones.
3014        */
3015        SCR_JUMP,
3016                PADDRH (msg_in_etc),
3017
3018}/*-------------------------< STATUS >--------------------*/,{
3019        /*
3020        **      get the status
3021        */
3022        SCR_MOVE_ABS (1) ^ SCR_STATUS,
3023                NADDR (scratch),
3024#ifdef SCSI_NCR_IARB_SUPPORT
3025        /*
3026        **      If STATUS is not GOOD, clear IMMEDIATE ARBITRATION, 
3027        **      since we may have to tamper the start queue from 
3028        **      the C code.
3029        */
3030        SCR_JUMPR ^ IFTRUE (DATA (S_GOOD)),
3031                8,
3032        SCR_REG_REG (scntl1, SCR_AND, ~IARB),
3033                0,
3034#endif
3035        /*
3036        **      save status to scsi_status.
3037        **      mark as complete.
3038        */
3039        SCR_TO_REG (SS_REG),
3040                0,
3041        SCR_LOAD_REG (HS_REG, HS_COMPLETE),
3042                0,
3043        /*
3044        **      Anticipate the MESSAGE PHASE for 
3045        **      the TASK COMPLETE message.
3046        */
3047        SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
3048                PADDR (msg_in),
3049        SCR_JUMP,
3050                PADDR (dispatch),
3051
3052}/*-------------------------< COMPLETE >-----------------*/,{
3053        /*
3054        **      Complete message.
3055        **
3056        **      Copy the data pointer to LASTP in header.
3057        */
3058        SCR_STORE_REL (temp, 4),
3059                offsetof (struct ccb, phys.header.lastp),
3060        /*
3061        **      When we terminate the cycle by clearing ACK,
3062        **      the target may disconnect immediately.
3063        **
3064        **      We don't want to be told of an
3065        **      "unexpected disconnect",
3066        **      so we disable this feature.
3067        */
3068        SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3069                0,
3070        /*
3071        **      Terminate cycle ...
3072        */
3073        SCR_CLR (SCR_ACK|SCR_ATN),
3074                0,
3075        /*
3076        **      ... and wait for the disconnect.
3077        */
3078        SCR_WAIT_DISC,
3079                0,
3080}/*-------------------------< COMPLETE2 >-----------------*/,{
3081        /*
3082        **      Save host status to header.
3083        */
3084        SCR_STORE_REL (scr0, 4),
3085                offsetof (struct ccb, phys.header.status),
3086
3087#ifdef SCSI_NCR_PCIQ_MAY_REORDER_WRITES
3088        /*
3089        **      Some bridges may reorder DMA writes to memory.
3090        **      We donnot want the CPU to deal with completions  
3091        **      without all the posted write having been flushed 
3092        **      to memory. This DUMMY READ should flush posted 
3093        **      buffers prior to the CPU having to deal with 
3094        **      completions.
3095        */
3096        SCR_LOAD_REL (scr0, 4), /* DUMMY READ */
3097                offsetof (struct ccb, phys.header.status),
3098#endif
3099        /*
3100        **      If command resulted in not GOOD status,
3101        **      call the C code if needed.
3102        */
3103        SCR_FROM_REG (SS_REG),
3104                0,
3105        SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
3106                PADDRH (bad_status),
3107
3108        /*
3109        **      If we performed an auto-sense, call 
3110        **      the C code to synchronyze task aborts 
3111        **      with UNIT ATTENTION conditions.
3112        */
3113        SCR_FROM_REG (HF_REG),
3114                0,
3115        SCR_INT ^ IFTRUE (MASK (HF_AUTO_SENSE, HF_AUTO_SENSE)),
3116                SIR_AUTO_SENSE_DONE,
3117
3118}/*------------------------< DONE >-----------------*/,{
3119#ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
3120        /*
3121        **      It seems that some bridges flush everything 
3122        **      when the INTR line is raised. For these ones, 
3123        **      we can just ensure that the INTR line will be 
3124        **      raised before each completion. So, if it happens 
3125        **      that we have been faster that the CPU, we just 
3126        **      have to synchronize with it. A dummy programmed 
3127        **      interrupt will do the trick.
3128        **      Note that we overlap at most 1 IO with the CPU 
3129        **      in this situation and that the IRQ line must not 
3130        **      be shared.
3131        */
3132        SCR_FROM_REG (istat),
3133                0,
3134        SCR_INT ^ IFTRUE (MASK (INTF, INTF)),
3135                SIR_DUMMY_INTERRUPT,
3136#endif
3137        /*
3138        **      Copy the DSA to the DONE QUEUE and 
3139        **      signal completion to the host.
3140        **      If we are interrupted between DONE 
3141        **      and DONE_END, we must reset, otherwise 
3142        **      the completed CCB will be lost.
3143        */
3144        SCR_STORE_ABS (dsa, 4),
3145                PADDRH (saved_dsa),
3146        SCR_LOAD_ABS (dsa, 4),
3147                PADDRH (done_pos),
3148        SCR_LOAD_ABS (scratcha, 4),
3149                PADDRH (saved_dsa),
3150        SCR_STORE_REL (scratcha, 4),
3151                0,
3152        /*
3153        **      The instruction below reads the DONE QUEUE next 
3154        **      free position from memory.
3155        **      In addition it ensures that all PCI posted writes  
3156        **      are flushed and so the DSA value of the done 
3157        **      CCB is visible by the CPU before INTFLY is raised.
3158        */
3159        SCR_LOAD_REL (temp, 4),
3160                4,
3161        SCR_INT_FLY,
3162                0,
3163        SCR_STORE_ABS (temp, 4),
3164                PADDRH (done_pos),
3165}/*------------------------< DONE_END >-----------------*/,{
3166        SCR_JUMP,
3167                PADDR (start),
3168
3169}/*-------------------------< SAVE_DP >------------------*/,{
3170        /*
3171        **      Clear ACK immediately.
3172        **      No need to delay it.
3173        */
3174        SCR_CLR (SCR_ACK),
3175                0,
3176        /*
3177        **      Keep track we received a SAVE DP, so 
3178        **      we will switch to the other PM context 
3179        **      on the next PM since the DP may point 
3180        **      to the current PM context.
3181        */
3182        SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
3183                0,
3184        /*
3185        **      SAVE_DP message:
3186        **      Copy the data pointer to SAVEP in header.
3187        */
3188        SCR_STORE_REL (temp, 4),
3189                offsetof (struct ccb, phys.header.savep),
3190        SCR_JUMP,
3191                PADDR (dispatch),
3192}/*-------------------------< RESTORE_DP >---------------*/,{
3193        /*
3194        **      RESTORE_DP message:
3195        **      Copy SAVEP in header to actual data pointer.
3196        */
3197        SCR_LOAD_REL  (temp, 4),
3198                offsetof (struct ccb, phys.header.savep),
3199        SCR_JUMP,
3200                PADDR (clrack),
3201
3202}/*-------------------------< DISCONNECT >---------------*/,{
3203        /*
3204        **      DISCONNECTing  ...
3205        **
3206        **      disable the "unexpected disconnect" feature,
3207        **      and remove the ACK signal.
3208        */
3209        SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3210                0,
3211        SCR_CLR (SCR_ACK|SCR_ATN),
3212                0,
3213        /*
3214        **      Wait for the disconnect.
3215        */
3216        SCR_WAIT_DISC,
3217                0,
3218        /*
3219        **      Status is: DISCONNECTED.
3220        */
3221        SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
3222                0,
3223        /*
3224        **      Save host status to header.
3225        */
3226        SCR_STORE_REL (scr0, 4),
3227                offsetof (struct ccb, phys.header.status),
3228        /*
3229        **      If QUIRK_AUTOSAVE is set,
3230        **      do an "save pointer" operation.
3231        */
3232        SCR_FROM_REG (QU_REG),
3233                0,
3234        SCR_JUMP ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)),
3235                PADDR (start),
3236        /*
3237        **      like SAVE_DP message:
3238        **      Remember we saved the data pointer.
3239        **      Copy data pointer to SAVEP in header.
3240        */
3241        SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
3242                0,
3243        SCR_STORE_REL (temp, 4),
3244                offsetof (struct ccb, phys.header.savep),
3245        SCR_JUMP,
3246                PADDR (start),
3247
3248}/*-------------------------< IDLE >------------------------*/,{
3249        /*
3250        **      Nothing to do?
3251        **      Wait for reselect.
3252        **      This NOP will be patched with LED OFF
3253        **      SCR_REG_REG (gpreg, SCR_OR, 0x01)
3254        */
3255        SCR_NO_OP,
3256                0,
3257#ifdef SCSI_NCR_IARB_SUPPORT
3258        SCR_JUMPR,
3259                8,
3260#endif
3261}/*-------------------------< UNGETJOB >-----------------*/,{
3262#ifdef SCSI_NCR_IARB_SUPPORT
3263        /*
3264        **      Set IMMEDIATE ARBITRATION, for the next time.
3265        **      This will give us better chance to win arbitration 
3266        **      for the job we just wanted to do.
3267        */
3268        SCR_REG_REG (scntl1, SCR_OR, IARB),
3269                0,
3270#endif
3271        /*
3272        **      We are not able to restart the SCRIPTS if we are 
3273        **      interrupted and these instruction haven't been 
3274        **      all executed. BTW, this is very unlikely to 
3275        **      happen, but we check that from the C code.
3276        */
3277        SCR_LOAD_REG (dsa, 0xff),
3278                0,
3279        SCR_STORE_ABS (scratcha, 4),
3280                PADDRH (startpos),
3281}/*-------------------------< RESELECT >--------------------*/,{
3282        /*
3283        **      make the host status invalid.
3284        */
3285        SCR_CLR (SCR_TRG),
3286                0,
3287        /*
3288        **      Sleep waiting for a reselection.
3289        **      If SIGP is set, special treatment.
3290        **
3291        **      Zu allem bereit ..
3292        */
3293        SCR_WAIT_RESEL,
3294                PADDR(start),
3295}/*-------------------------< RESELECTED >------------------*/,{
3296        /*
3297        **      This NOP will be patched with LED ON
3298        **      SCR_REG_REG (gpreg, SCR_AND, 0xfe)
3299        */
3300        SCR_NO_OP,
3301                0,
3302        /*
3303        **      load the target id into the sdid
3304        */
3305        SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
3306                0,
3307        SCR_TO_REG (sdid),
3308                0,
3309        /*
3310        **      load the target control block address
3311        */
3312        SCR_LOAD_ABS (dsa, 4),
3313                PADDRH (targtbl),
3314        SCR_SFBR_REG (dsa, SCR_SHL, 0),
3315                0,
3316        SCR_REG_REG (dsa, SCR_SHL, 0),
3317                0,
3318        SCR_REG_REG (dsa, SCR_AND, 0x3c),
3319                0,
3320        SCR_LOAD_REL (dsa, 4),
3321                0,
3322        /*
3323        **      Load the synchronous transfer registers.
3324        */
3325        SCR_LOAD_REL (scntl3, 1),
3326                offsetof(struct tcb, wval),
3327        SCR_LOAD_REL (sxfer, 1),
3328                offsetof(struct tcb, sval),
3329}/*-------------------------< RESEL_SCNTL4 >------------------*/,{
3330        /*
3331        **      Write with uval value. Patch if device
3332        **      does not support Ultra3.
3333        **      
3334        **      SCR_LOAD_REL (scntl4, 1),
3335        **              offsetof(struct tcb, uval),
3336        */
3337
3338        SCR_NO_OP,
3339                0,
3340        /*
3341         *  We expect MESSAGE IN phase.
3342         *  If not, get help from the C code.
3343         */
3344        SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
3345                SIR_RESEL_NO_MSG_IN,
3346        SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3347                NADDR (msgin),
3348
3349        /*
3350         *  If IDENTIFY LUN #0, use a faster path 
3351         *  to find the LCB structure.
3352         */
3353        SCR_JUMPR ^ IFTRUE (MASK (0x80, 0xbf)),
3354                56,
3355        /*
3356         *  If message isn't an IDENTIFY, 
3357         *  tell the C code about.
3358         */
3359        SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
3360                SIR_RESEL_NO_IDENTIFY,
3361        /*
3362         *  It is an IDENTIFY message,
3363         *  Load the LUN control block address.
3364         */
3365        SCR_LOAD_REL (dsa, 4),
3366                offsetof(struct tcb, b_luntbl),
3367        SCR_SFBR_REG (dsa, SCR_SHL, 0),
3368                0,
3369        SCR_REG_REG (dsa, SCR_SHL, 0),
3370                0,
3371        SCR_REG_REG (dsa, SCR_AND, 0xfc),
3372                0,
3373        SCR_LOAD_REL (dsa, 4),
3374                0,
3375        SCR_JUMPR,
3376                8,
3377        /*
3378        **      LUN 0 special case (but usual one :))
3379        */
3380        SCR_LOAD_REL (dsa, 4),
3381                offsetof(struct tcb, b_lun0),
3382
3383        /*
3384        **      Load the reselect task action for this LUN.
3385        **      Load the tasks DSA array for this LUN.
3386        **      Call the action.
3387        */
3388        SCR_LOAD_REL (temp, 4),
3389                offsetof(struct lcb, resel_task),
3390        SCR_LOAD_REL (dsa, 4),
3391                offsetof(struct lcb, b_tasktbl),
3392        SCR_RETURN,
3393                0,
3394}/*-------------------------< RESEL_TAG >-------------------*/,{
3395        /*
3396        **      ACK the IDENTIFY or TAG previously received
3397        */
3398
3399        SCR_CLR (SCR_ACK),
3400                0,
3401        /*
3402        **      Read IDENTIFY + SIMPLE + TAG using a single MOVE.
3403        **      Agressive optimization, is'nt it?
3404        **      No need to test the SIMPLE TAG message, since the 
3405        **      driver only supports conformant devices for tags. ;-)
3406        */
3407        SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
3408                NADDR (msgin),
3409        /*
3410        **      Read the TAG from the SIDL.
3411        **      Still an aggressive optimization. ;-)
3412        **      Compute the CCB indirect jump address which 
3413        **      is (#TAG*2 & 0xfc) due to tag numbering using 
3414        **      1,3,5..MAXTAGS*2+1 actual values.
3415        */
3416        SCR_REG_SFBR (sidl, SCR_SHL, 0),
3417                0,
3418#if MAX_TASKS*4 > 512
3419        SCR_JUMPR ^ IFFALSE (CARRYSET),
3420                8,
3421        SCR_REG_REG (dsa1, SCR_OR, 2),
3422                0,
3423        SCR_REG_REG (sfbr, SCR_SHL, 0),
3424                0,
3425        SCR_JUMPR ^ IFFALSE (CARRYSET),
3426                8,
3427        SCR_REG_REG (dsa1, SCR_OR, 1),
3428                0,
3429#elif MAX_TASKS*4 > 256
3430        SCR_JUMPR ^ IFFALSE (CARRYSET),
3431                8,
3432        SCR_REG_REG (dsa1, SCR_OR, 1),
3433                0,
3434#endif
3435        /*
3436        **      Retrieve the DSA of this task.
3437        **      JUMP indirectly to the restart point of the CCB.
3438        */
3439        SCR_SFBR_REG (dsa, SCR_AND, 0xfc),
3440                0,
3441}/*-------------------------< RESEL_GO >-------------------*/,{
3442        SCR_LOAD_REL (dsa, 4),
3443                0,
3444        SCR_LOAD_REL (temp, 4),
3445                offsetof(struct ccb, phys.header.go.restart),
3446        SCR_RETURN,
3447                0,
3448        /* In normal situations we branch to RESEL_DSA */
3449}/*-------------------------< RESEL_NOTAG >-------------------*/,{
3450        /*
3451        **      JUMP indirectly to the restart point of the CCB.
3452        */
3453        SCR_JUMP,
3454                PADDR (resel_go),
3455
3456}/*-------------------------< RESEL_DSA >-------------------*/,{
3457        /*
3458        **      Ack the IDENTIFY or TAG previously received.
3459        */
3460        SCR_CLR (SCR_ACK),
3461                0,
3462        /*
3463        **      load the savep (saved pointer) into
3464        **      the actual data pointer.
3465        */
3466        SCR_LOAD_REL (temp, 4),
3467                offsetof (struct ccb, phys.header.savep),
3468        /*
3469        **      Initialize the status registers
3470        */
3471        SCR_LOAD_REL (scr0, 4),
3472                offsetof (struct ccb, phys.header.status),
3473        /*
3474        **      Jump to dispatcher.
3475        */
3476        SCR_JUMP,
3477                PADDR (dispatch),
3478
3479}/*-------------------------< DATA_IN >--------------------*/,{
3480/*
3481**      Because the size depends on the
3482**      #define MAX_SCATTER parameter,
3483**      it is filled in at runtime.
3484**
3485**  ##===========< i=0; i<MAX_SCATTER >=========
3486**  ||  SCR_CHMOV_TBL ^ SCR_DATA_IN,
3487**  ||          offsetof (struct dsb, data[ i]),
3488**  ##==========================================
3489**
3490**---------------------------------------------------------
3491*/
34920
3493}/*-------------------------< DATA_IN2 >-------------------*/,{
3494        SCR_CALL,
3495                PADDR (datai_done),
3496        SCR_JUMP,
3497                PADDRH (data_ovrun),
3498}/*-------------------------< DATA_OUT >--------------------*/,{
3499/*
3500**      Because the size depends on the
3501**      #define MAX_SCATTER parameter,
3502**      it is filled in at runtime.
3503**
3504**  ##===========< i=0; i<MAX_SCATTER >=========
3505**  ||  SCR_CHMOV_TBL ^ SCR_DATA_OUT,
3506**  ||          offsetof (struct dsb, data[ i]),
3507**  ##==========================================
3508**
3509**---------------------------------------------------------
3510*/
35110
3512}/*-------------------------< DATA_OUT2 >-------------------*/,{
3513        SCR_CALL,
3514                PADDR (datao_done),
3515        SCR_JUMP,
3516                PADDRH (data_ovrun),
3517
3518}/*-------------------------< PM0_DATA >--------------------*/,{
3519        /*
3520        **      Read our host flags to SFBR, so we will be able 
3521        **      to check against the data direction we expect.
3522        */
3523        SCR_FROM_REG (HF_REG),
3524                0,
3525        /*
3526        **      Check against actual DATA PHASE.
3527        */
3528        SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
3529                PADDR (pm0_data_out),
3530        /*
3531        **      Actual phase is DATA IN.
3532        **      Check against expected direction.
3533        */
3534        SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
3535                PADDRH (data_ovrun),
3536        /*
3537        **      Keep track we are moving data from the 
3538        **      PM0 DATA mini-script.
3539        */
3540        SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
3541                0,
3542        /*
3543        **      Move the data to memory.
3544        */
3545        SCR_CHMOV_TBL ^ SCR_DATA_IN,
3546                offsetof (struct ccb, phys.pm0.sg),
3547        SCR_JUMP,
3548                PADDR (pm0_data_end),
3549}/*-------------------------< PM0_DATA_OUT >----------------*/,{
3550        /*
3551        **      Actual phase is DATA OUT.
3552        **      Check against expected direction.
3553        */
3554        SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
3555                PADDRH (data_ovrun),
3556        /*
3557        **      Keep track we are moving data from the 
3558        **      PM0 DATA mini-script.
3559        */
3560        SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
3561                0,
3562        /*
3563        **      Move the data from memory.
3564        */
3565        SCR_CHMOV_TBL ^ SCR_DATA_OUT,
3566                offsetof (struct ccb, phys.pm0.sg),
3567}/*-------------------------< PM0_DATA_END >----------------*/,{
3568        /*
3569        **      Clear the flag that told we were moving  
3570        **      data from the PM0 DATA mini-script.
3571        */
3572        SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM0)),
3573                0,
3574        /*
3575        **      Return to the previous DATA script which 
3576        **      is guaranteed by design (if no bug) to be 
3577        **      the main DATA script for this transfer.
3578        */
3579        SCR_LOAD_REL (temp, 4),
3580                offsetof (struct ccb, phys.pm0.ret),
3581        SCR_RETURN,
3582                0,
3583}/*-------------------------< PM1_DATA >--------------------*/,{
3584        /*
3585        **      Read our host flags to SFBR, so we will be able 
3586        **      to check against the data direction we expect.
3587        */
3588        SCR_FROM_REG (HF_REG),
3589                0,
3590        /*
3591        **      Check against actual DATA PHASE.
3592        */
3593        SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
3594                PADDR (pm1_data_out),
3595        /*
3596        **      Actual phase is DATA IN.
3597        **      Check against expected direction.
3598        */
3599        SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
3600                PADDRH (data_ovrun),
3601        /*
3602        **      Keep track we are moving data from the 
3603        **      PM1 DATA mini-script.
3604        */
3605        SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
3606                0,
3607        /*
3608        **      Move the data to memory.
3609        */
3610        SCR_CHMOV_TBL ^ SCR_DATA_IN,
3611                offsetof (struct ccb, phys.pm1.sg),
3612        SCR_JUMP,
3613                PADDR (pm1_data_end),
3614}/*-------------------------< PM1_DATA_OUT >----------------*/,{
3615        /*
3616        **      Actual phase is DATA OUT.
3617        **      Check against expected direction.
3618        */
3619        SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
3620                PADDRH (data_ovrun),
3621        /*
3622        **      Keep track we are moving data from the 
3623        **      PM1 DATA mini-script.
3624        */
3625        SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
3626                0,
3627        /*
3628        **      Move the data from memory.
3629        */
3630        SCR_CHMOV_TBL ^ SCR_DATA_OUT,
3631                offsetof (struct ccb, phys.pm1.sg),
3632}/*-------------------------< PM1_DATA_END >----------------*/,{
3633        /*
3634        **      Clear the flag that told we were moving  
3635        **      data from the PM1 DATA mini-script.
3636        */
3637        SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM1)),
3638                0,
3639        /*
3640        **      Return to the previous DATA script which 
3641        **      is guaranteed by design (if no bug) to be 
3642        **      the main DATA script for this transfer.
3643        */
3644        SCR_LOAD_REL (temp, 4),
3645                offsetof (struct ccb, phys.pm1.ret),
3646        SCR_RETURN,
3647                0,
3648}/*---------------------------------------------------------*/
3649};
3650
3651
3652static  struct scripth scripth0 __initdata = {
3653/*------------------------< START64 >-----------------------*/{
3654        /*
3655        **      SCRIPT entry point for the 895A and the 896.
3656        **      For now, there is no specific stuff for that 
3657        **      chip at this point, but this may come.
3658        */
3659        SCR_JUMP,
3660                PADDR (init),
3661}/*-------------------------< NO_DATA >-------------------*/,{
3662        SCR_JUMP,
3663                PADDRH (data_ovrun),
3664}/*-----------------------< SEL_FOR_ABORT >------------------*/,{
3665        /*
3666        **      We are jumped here by the C code, if we have 
3667        **      some target to reset or some disconnected 
3668        **      job to abort. Since error recovery is a serious 
3669        **      busyness, we will really reset the SCSI BUS, if 
3670        **      case of a SCSI interrupt occuring in this path.
3671        */
3672
3673        /*
3674        **      Set initiator mode.
3675        */
3676        SCR_CLR (SCR_TRG),
3677                0,
3678        /*
3679        **      And try to select this target.
3680        */
3681        SCR_SEL_TBL_ATN ^ offsetof (struct ncb, abrt_sel),
3682                PADDR (reselect),
3683
3684        /*
3685        **      Wait for the selection to complete or 
3686        **      the selection to time out.
3687        */
3688        SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3689                -8,
3690        /*
3691        **      Call the C code.
3692        */
3693        SCR_INT,
3694                SIR_TARGET_SELECTED,
3695        /*
3696        **      The C code should let us continue here. 
3697        **      Send the 'kiss of death' message.
3698        **      We expect an immediate disconnect once 
3699        **      the target has eaten the message.
3700        */
3701        SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3702                0,
3703        SCR_MOVE_TBL ^ SCR_MSG_OUT,
3704                offsetof (struct ncb, abrt_tbl),
3705        SCR_CLR (SCR_ACK|SCR_ATN),
3706                0,
3707        SCR_WAIT_DISC,
3708                0,
3709        /*
3710        **      Tell the C code that we are done.
3711        */
3712        SCR_INT,
3713                SIR_ABORT_SENT,
3714}/*-----------------------< SEL_FOR_ABORT_1 >--------------*/,{
3715        /*
3716        **      Jump at scheduler.
3717        */
3718        SCR_JUMP,
3719                PADDR (start),
3720
3721}/*------------------------< SELECT_NO_ATN >-----------------*/,{
3722        /*
3723        **      Set Initiator mode.
3724        **      And try to select this target without ATN.
3725        */
3726
3727        SCR_CLR (SCR_TRG),
3728                0,
3729        SCR_SEL_TBL ^ offsetof (struct dsb, select),
3730                PADDR (ungetjob),
3731        /*
3732        **      load the savep (saved pointer) into
3733        **      the actual data pointer.
3734        */
3735        SCR_LOAD_REL (temp, 4),
3736                offsetof (struct ccb, phys.header.savep),
3737        /*
3738        **      Initialize the status registers
3739        */
3740        SCR_LOAD_REL (scr0, 4),
3741                offsetof (struct ccb, phys.header.status),
3742
3743}/*------------------------< WF_SEL_DONE_NO_ATN >-----------------*/,{
3744        /*
3745        **      Wait immediately for the next phase or 
3746        **      the selection to complete or time-out.
3747        */
3748        SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3749                0,
3750        SCR_JUMP,
3751                PADDR (select2),
3752
3753}/*-------------------------< MSG_IN_ETC >--------------------*/,{
3754        /*
3755        **      If it is an EXTENDED (variable size message)
3756        **      Handle it.
3757        */
3758        SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)),
3759                PADDRH (msg_extended),
3760        /*
3761        **      Let the C code handle any other 
3762        **      1 byte message.
3763        */
3764        SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
3765                PADDRH (msg_received),
3766        SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
3767                PADDRH (msg_received),
3768        /*
3769        **      We donnot handle 2 bytes messages from SCRIPTS.
3770        **      So, let the C code deal with these ones too.
3771        */
3772        SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),
3773                PADDRH (msg_weird_seen),
3774        SCR_CLR (SCR_ACK),
3775                0,
3776        SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3777                NADDR (msgin[1]),
3778        SCR_JUMP,
3779                PADDRH (msg_received),
3780
3781}/*-------------------------< MSG_RECEIVED >--------------------*/,{
3782        SCR_LOAD_REL (scratcha, 4),     /* DUMMY READ */
3783                0,
3784        SCR_INT,
3785                SIR_MSG_RECEIVED,
3786
3787}/*-------------------------< MSG_WEIRD_SEEN >------------------*/,{
3788        SCR_LOAD_REL (scratcha, 4),     /* DUMMY READ */
3789                0,
3790        SCR_INT,
3791                SIR_MSG_WEIRD,
3792
3793}/*-------------------------< MSG_EXTENDED >--------------------*/,{
3794        /*
3795        **      Clear ACK and get the next byte 
3796        **      assumed to be the message length.
3797        */
3798        SCR_CLR (SCR_ACK),
3799                0,
3800        SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3801                NADDR (msgin[1]),
3802        /*
3803        **      Try to catch some unlikely situations as 0 length 
3804        **      or too large the length.
3805        */
3806        SCR_JUMP ^ IFTRUE (DATA (0)),
3807                PADDRH (msg_weird_seen),
3808        SCR_TO_REG (scratcha),
3809                0,
3810        SCR_REG_REG (sfbr, SCR_ADD, (256-8)),
3811                0,
3812        SCR_JUMP ^ IFTRUE (CARRYSET),
3813                PADDRH (msg_weird_seen),
3814        /*
3815        **      We donnot handle extended messages from SCRIPTS.
3816        **      Read the amount of data correponding to the 
3817        **      message length and call the C code.
3818        */
3819        SCR_STORE_REL (scratcha, 1),
3820                offsetof (struct dsb, smsg_ext.size),
3821        SCR_CLR (SCR_ACK),
3822                0,
3823        SCR_MOVE_TBL ^ SCR_MSG_IN,
3824                offsetof (struct dsb, smsg_ext),
3825        SCR_JUMP,
3826                PADDRH (msg_received),
3827
3828}/*-------------------------< MSG_BAD >------------------*/,{
3829        /*
3830        **      unimplemented message - reject it.
3831        */
3832        SCR_INT,
3833                SIR_REJECT_TO_SEND,
3834        SCR_SET (SCR_ATN),
3835                0,
3836        SCR_JUMP,
3837                PADDR (clrack),
3838
3839}/*-------------------------< MSG_WEIRD >--------------------*/,{
3840        /*
3841        **      weird message received
3842        **      ignore all MSG IN phases and reject it.
3843        */
3844        SCR_INT,
3845                SIR_REJECT_TO_SEND,
3846        SCR_SET (SCR_ATN),
3847                0,
3848}/*-------------------------< MSG_WEIRD1 >--------------------*/,{
3849        SCR_CLR (SCR_ACK),
3850                0,
3851        SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3852                PADDR (dispatch),
3853        SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3854                NADDR (scratch),
3855        SCR_JUMP,
3856                PADDRH (msg_weird1),
3857}/*-------------------------< WDTR_RESP >----------------*/,{
3858        /*
3859        **      let the target fetch our answer.
3860        */
3861        SCR_SET (SCR_ATN),
3862                0,
3863        SCR_CLR (SCR_ACK),
3864                0,
3865        SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3866                PADDRH (nego_bad_phase),
3867
3868}/*-------------------------< SEND_WDTR >----------------*/,{
3869        /*
3870        **      Send the M_X_WIDE_REQ
3871        */
3872        SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
3873                NADDR (msgout),
3874        SCR_JUMP,
3875                PADDRH (msg_out_done),
3876
3877}/*-------------------------< SDTR_RESP >-------------*/,{
3878        /*
3879        **      let the target fetch our answer.
3880        */
3881        SCR_SET (SCR_ATN),
3882                0,
3883        SCR_CLR (SCR_ACK),
3884                0,
3885        SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3886                PADDRH (nego_bad_phase),
3887
3888}/*-------------------------< SEND_SDTR >-------------*/,{
3889        /*
3890        **      Send the M_X_SYNC_REQ
3891        */
3892        SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
3893                NADDR (msgout),
3894        SCR_JUMP,
3895                PADDRH (msg_out_done),
3896
3897}/*-------------------------< PPR_RESP >-------------*/,{
3898        /*
3899        **      let the target fetch our answer.
3900        */
3901        SCR_SET (SCR_ATN),
3902                0,
3903        SCR_CLR (SCR_ACK),
3904                0,
3905        SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3906                PADDRH (nego_bad_phase),
3907
3908}/*-------------------------< SEND_PPR >-------------*/,{
3909        /*
3910        **      Send the M_X_PPR_REQ
3911        */
3912        SCR_MOVE_ABS (8) ^ SCR_MSG_OUT,
3913                NADDR (msgout),
3914        SCR_JUMP,
3915                PADDRH (msg_out_done),
3916
3917}/*-------------------------< NEGO_BAD_PHASE >------------*/,{
3918        SCR_INT,
3919                SIR_NEGO_PROTO,
3920        SCR_JUMP,
3921                PADDR (dispatch),
3922
3923}/*-------------------------< MSG_OUT >-------------------*/,{
3924        /*
3925        **      The target requests a message.
3926        */
3927        SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
3928                NADDR (msgout),
3929        /*
3930        **      ... wait for the next phase
3931        **      if it's a message out, send it again, ...
3932        */
3933        SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
3934                PADDRH (msg_out),
3935}/*-------------------------< MSG_OUT_DONE >--------------*/,{
3936        /*
3937        **      ... else clear the message ...
3938        */
3939        SCR_INT,
3940                SIR_MSG_OUT_DONE,
3941        /*
3942        **      ... and process the next phase
3943        */
3944        SCR_JUMP,
3945                PADDR (dispatch),
3946
3947}/*-------------------------< DATA_OVRUN >-----------------------*/,{
3948        /*
3949         *  Use scratcha to count the extra bytes.
3950         */
3951        SCR_LOAD_ABS (scratcha, 4),
3952                PADDRH (zero),
3953}/*-------------------------< DATA_OVRUN1 >----------------------*/,{
3954        /*
3955         *  The target may want to transfer too much data.
3956         *
3957         *  If phase is DATA OUT write 1 byte and count it.
3958         */
3959        SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
3960                16,
3961        SCR_CHMOV_ABS (1) ^ SCR_DATA_OUT,
3962                NADDR (scratch),
3963        SCR_JUMP,
3964                PADDRH (data_ovrun2),
3965        /*
3966         *  If WSR is set, clear this condition, and 
3967         *  count this byte.
3968         */
3969        SCR_FROM_REG (scntl2),
3970                0,
3971        SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
3972                16,
3973        SCR_REG_REG (scntl2, SCR_OR, WSR),
3974                0,
3975        SCR_JUMP,
3976                PADDRH (data_ovrun2),
3977        /*
3978         *  Finally check against DATA IN phase.
3979         *  Signal data overrun to the C code 
3980         *  and jump to dispatcher if not so.
3981         *  Read 1 byte otherwise and count it.
3982         */
3983        SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_IN)),
3984                16,
3985        SCR_INT,
3986                SIR_DATA_OVERRUN,
3987        SCR_JUMP,
3988                PADDR (dispatch),
3989        SCR_CHMOV_ABS (1) ^ SCR_DATA_IN,
3990                NADDR (scratch),
3991}/*-------------------------< DATA_OVRUN2 >----------------------*/,{
3992        /*
3993         *  Count this byte.
3994         *  This will allow to return a negative 
3995         *  residual to user.
3996         */
3997        SCR_REG_REG (scratcha,  SCR_ADD,  0x01),
3998                0,
3999        SCR_REG_REG (scratcha1, SCR_ADDC, 0),
4000                0,
4001        SCR_REG_REG (scratcha2, SCR_ADDC, 0),
4002                0,
4003        /*
4004         *  .. and repeat as required.
4005         */
4006        SCR_JUMP,
4007                PADDRH (data_ovrun1),
4008
4009}/*-------------------------< ABORT_RESEL >----------------*/,{
4010        SCR_SET (SCR_ATN),
4011                0,
4012        SCR_CLR (SCR_ACK),
4013                0,
4014        /*
4015        **      send the abort/abortag/reset message
4016        **      we expect an immediate disconnect
4017        */
4018        SCR_REG_REG (scntl2, SCR_AND, 0x7f),
4019                0,
4020        SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
4021                NADDR (msgout),
4022        SCR_CLR (SCR_ACK|SCR_ATN),
4023                0,
4024        SCR_WAIT_DISC,
4025                0,
4026        SCR_INT,
4027                SIR_RESEL_ABORTED,
4028        SCR_JUMP,
4029                PADDR (start),
4030}/*-------------------------< RESEND_IDENT >-------------------*/,{
4031        /*
4032        **      The target stays in MSG OUT phase after having acked 
4033        **      Identify [+ Tag [+ Extended message ]]. Targets shall
4034        **      behave this way on parity error.
4035        **      We must send it again all the messages.
4036        */
4037        SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the  */
4038                0,         /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */
4039        SCR_JUMP,
4040                PADDR (send_ident),
4041}/*-------------------------< IDENT_BREAK >-------------------*/,{
4042        SCR_CLR (SCR_ATN),
4043                0,
4044        SCR_JUMP,
4045                PADDR (select2),
4046}/*-------------------------< IDENT_BREAK_ATN >----------------*/,{
4047        SCR_SET (SCR_ATN),
4048                0,
4049        SCR_JUMP,
4050                PADDR (select2),
4051}/*-------------------------< SDATA_IN >-------------------*/,{
4052        SCR_CHMOV_TBL ^ SCR_DATA_IN,
4053                offsetof (struct dsb, sense),
4054        SCR_CALL,
4055                PADDR (datai_done),
4056        SCR_JUMP,
4057                PADDRH (data_ovrun),
4058}/*-------------------------< DATA_IO >--------------------*/,{
4059        /*
4060        **      We jump here if the data direction was unknown at the 
4061        **      time we had to queue the command to the scripts processor.
4062        **      Pointers had been set as follow in this situation:
4063        **        savep   -->   DATA_IO
4064        **        lastp   -->   start pointer when DATA_IN
4065        **        goalp   -->   goal  pointer when DATA_IN
4066        **        wlastp  -->   start pointer when DATA_OUT
4067        **        wgoalp  -->   goal  pointer when DATA_OUT
4068        **      This script sets savep/lastp/goalp according to the 
4069        **      direction chosen by the target.
4070        */
4071        SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_OUT)),
4072                PADDRH(data_io_out),
4073}/*-------------------------< DATA_IO_COM >-----------------*/,{
4074        /*
4075        **      Direction is DATA IN.
4076        **      Warning: we jump here, even when phase is DATA OUT.
4077        */
4078        SCR_LOAD_REL  (scratcha, 4),
4079                offsetof (struct ccb, phys.header.lastp),
4080        SCR_STORE_REL (scratcha, 4),
4081                offsetof (struct ccb, phys.header.savep),
4082
4083        /*
4084        **      Jump to the SCRIPTS according to actual direction.
4085        */
4086        SCR_LOAD_REL  (temp, 4),
4087                offsetof (struct ccb, phys.header.savep),
4088        SCR_RETURN,
4089                0,
4090}/*-------------------------< DATA_IO_OUT >-----------------*/,{
4091        /*
4092        **      Direction is DATA OUT.
4093        */
4094        SCR_REG_REG (HF_REG, SCR_AND, (~HF_DATA_IN)),
4095                0,
4096        SCR_LOAD_REL  (scratcha, 4),
4097                offsetof (struct ccb, phys.header.wlastp),
4098        SCR_STORE_REL (scratcha, 4),
4099                offsetof (struct ccb, phys.header.lastp),
4100        SCR_LOAD_REL  (scratcha, 4),
4101                offsetof (struct ccb, phys.header.wgoalp),
4102        SCR_STORE_REL (scratcha, 4),
4103                offsetof (struct ccb, phys.header.goalp),
4104        SCR_JUMP,
4105                PADDRH(data_io_com),
4106
4107}/*-------------------------< RESEL_BAD_LUN >---------------*/,{
4108        /*
4109        **      Message is an IDENTIFY, but lun is unknown.
4110        **      Signal problem to C code for logging the event.
4111        **      Send a M_ABORT to clear all pending tasks.
4112        */
4113        SCR_INT,
4114                SIR_RESEL_BAD_LUN,
4115        SCR_JUMP,
4116                PADDRH (abort_resel),
4117}/*-------------------------< BAD_I_T_L >------------------*/,{
4118        /*
4119        **      We donnot have a task for that I_T_L.
4120        **      Signal problem to C code for logging the event.
4121        **      Send a M_ABORT message.
4122        */
4123        SCR_INT,
4124                SIR_RESEL_BAD_I_T_L,
4125        SCR_JUMP,
4126                PADDRH (abort_resel),
4127}/*-------------------------< BAD_I_T_L_Q >----------------*/,{
4128        /*
4129        **      We donnot have a task that matches the tag.
4130        **      Signal problem to C code for logging the event.
4131        **      Send a M_ABORTTAG message.
4132        */
4133        SCR_INT,
4134                SIR_RESEL_BAD_I_T_L_Q,
4135        SCR_JUMP,
4136                PADDRH (abort_resel),
4137}/*-------------------------< BAD_STATUS >-----------------*/,{
4138        /*
4139        **      Anything different from INTERMEDIATE 
4140        **      CONDITION MET should be a bad SCSI status, 
4141        **      given that GOOD status has already been tested.
4142        **      Call the C code.
4143        */
4144        SCR_LOAD_ABS (scratcha, 4),
4145                PADDRH (startpos),
4146        SCR_INT ^ IFFALSE (DATA (S_COND_MET)),
4147                SIR_BAD_STATUS,
4148        SCR_RETURN,
4149                0,
4150
4151}/*-------------------------< TWEAK_PMJ >------------------*/,{
4152        /*
4153        **      Disable PM handling from SCRIPTS for the data phase 
4154        **      and so force PM to be handled from C code if HF_PM_TO_C 
4155        **      flag is set.
4156        */
4157        SCR_FROM_REG(HF_REG),
4158                0,
4159        SCR_JUMPR ^ IFTRUE (MASK (HF_PM_TO_C, HF_PM_TO_C)),
4160                16,
4161        SCR_REG_REG (ccntl0, SCR_OR, ENPMJ),
4162                0,
4163        SCR_RETURN,
4164                0,
4165        SCR_REG_REG (ccntl0, SCR_AND, (~ENPMJ)),
4166                0,
4167        SCR_RETURN,
4168                0,
4169
4170}/*-------------------------< PM_HANDLE >------------------*/,{
4171        /*
4172        **      Phase mismatch handling.
4173        **
4174        **      Since we have to deal with 2 SCSI data pointers  
4175        **      (current and saved), we need at least 2 contexts.
4176        **      Each context (pm0 and pm1) has a saved area, a 
4177        **      SAVE mini-script and a DATA phase mini-script.
4178        */
4179        /*
4180        **      Get the PM handling flags.
4181        */
4182        SCR_FROM_REG (HF_REG),
4183                0,
4184        /*
4185        **      If no flags (1rst PM for example), avoid 
4186        **      all the below heavy flags testing.
4187        **      This makes the normal case a bit faster.
4188        */
4189        SCR_JUMP ^ IFTRUE (MASK (0, (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED))),
4190                PADDRH (pm_handle1),
4191        /*
4192        **      If we received a SAVE DP, switch to the 
4193        **      other PM context since the savep may point 
4194        **      to the current PM context.
4195        */
4196        SCR_JUMPR ^ IFFALSE (MASK (HF_DP_SAVED, HF_DP_SAVED)),
4197                8,
4198        SCR_REG_REG (sfbr, SCR_XOR, HF_ACT_PM),
4199                0,
4200        /*
4201        **      If we have been interrupt in a PM DATA mini-script,
4202        **      we take the return address from the corresponding 
4203        **      saved area.
4204        **      This ensure the return address always points to the 
4205        **      main DATA script for this transfer.
4206        */
4207        SCR_JUMP ^ IFTRUE (MASK (0, (HF_IN_PM0 | HF_IN_PM1))),
4208                PADDRH (pm_handle1),
4209        SCR_JUMPR ^ IFFALSE (MASK (HF_IN_PM0, HF_IN_PM0)),
4210                16,
4211        SCR_LOAD_REL (ia, 4),
4212                offsetof(struct ccb, phys.pm0.ret),
4213        SCR_JUMP,
4214                PADDRH (pm_save),
4215        SCR_LOAD_REL (ia, 4),
4216                offsetof(struct ccb, phys.pm1.ret),
4217        SCR_JUMP,
4218                PADDRH (pm_save),
4219}/*-------------------------< PM_HANDLE1 >-----------------*/,{
4220        /*
4221        **      Normal case.
4222        **      Update the return address so that it 
4223        **      will point after the interrupted MOVE.
4224        */
4225        SCR_REG_REG (ia, SCR_ADD, 8),
4226                0,
4227        SCR_REG_REG (ia1, SCR_ADDC, 0),
4228                0,
4229}/*-------------------------< PM_SAVE >--------------------*/,{
4230        /*
4231        **      Clear all the flags that told us if we were 
4232        **      interrupted in a PM DATA mini-script and/or 
4233        **      we received a SAVE DP.
4234        */
4235        SCR_SFBR_REG (HF_REG, SCR_AND, (~(HF_IN_PM0|HF_IN_PM1|HF_DP_SAVED))),
4236                0,
4237        /*
4238        **      Choose the current PM context.
4239        */
4240        SCR_JUMP ^ IFTRUE (MASK (HF_ACT_PM, HF_ACT_PM)),
4241                PADDRH (pm1_save),
4242}/*-------------------------< PM0_SAVE >-------------------*/,{
4243        SCR_STORE_REL (ia, 4),
4244                offsetof(struct ccb, phys.pm0.ret),
4245        /*
4246        **      If WSR bit is set, either UA and RBC may 
4247        **      have to be changed whatever the device wants 
4248        **      to ignore this residue ot not.
4249        */
4250        SCR_FROM_REG (scntl2),
4251                0,
4252        SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),
4253                PADDRH (pm_wsr_handle),
4254        /*
4255        **      Save the remaining byte count, the updated 
4256        **      address and the return address.
4257        */
4258        SCR_STORE_REL (rbc, 4),
4259                offsetof(struct ccb, phys.pm0.sg.size),
4260        SCR_STORE_REL (ua, 4),
4261                offsetof(struct ccb, phys.pm0.sg.addr),
4262        /*
4263        **      Set the current pointer at the PM0 DATA mini-script.
4264        */
4265        SCR_LOAD_ABS (temp, 4),
4266                PADDRH (pm0_data_addr),
4267        SCR_JUMP,
4268                PADDR (dispatch),
4269}/*-------------------------< PM1_SAVE >-------------------*/,{
4270        SCR_STORE_REL (ia, 4),
4271                offsetof(struct ccb, phys.pm1.ret),
4272        /*
4273        **      If WSR bit is set, either UA and RBC may 
4274        **      have been changed whatever the device wants 
4275        **      to ignore this residue or not.
4276        */
4277        SCR_FROM_REG (scntl2),
4278                0,
4279        SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),
4280                PADDRH (pm_wsr_handle),
4281        /*
4282        **      Save the remaining byte count, the updated 
4283        **      address and the return address.
4284        */
4285        SCR_STORE_REL (rbc, 4),
4286                offsetof(struct ccb, phys.pm1.sg.size),
4287        SCR_STORE_REL (ua, 4),
4288                offsetof(struct ccb, phys.pm1.sg.addr),
4289        /*
4290        **      Set the current pointer at the PM1 DATA mini-script.
4291        */
4292        SCR_LOAD_ABS (temp, 4),
4293                PADDRH (pm1_data_addr),
4294        SCR_JUMP,
4295                PADDR (dispatch),
4296}/*--------------------------< PM_WSR_HANDLE >-----------------------*/,{
4297        /*
4298         *  Phase mismatch handling from SCRIPT with WSR set.
4299         *  Such a condition can occur if the chip wants to 
4300         *  execute a CHMOV(size > 1) when the WSR bit is 
4301         *  set and the target changes PHASE.
4302         */
4303#ifdef  SYM_DEBUG_PM_WITH_WSR
4304        /*
4305         *  Some debugging may still be needed.:)
4306         */ 
4307        SCR_INT,
4308                SIR_PM_WITH_WSR,
4309#endif
4310        /*
4311         *  We must move the residual byte to memory.
4312         *
4313         *  UA contains bit 0..31 of the address to 
4314         *  move the residual byte.
4315         *  Move it to the table indirect.
4316         */
4317        SCR_STORE_REL (ua, 4),
4318                offsetof (struct ccb, phys.wresid.addr),
4319        /*
4320         *  Increment UA (move address to next position).
4321         */
4322        SCR_REG_REG (ua, SCR_ADD, 1),
4323                0,
4324        SCR_REG_REG (ua1, SCR_ADDC, 0),
4325                0,
4326        SCR_REG_REG (ua2, SCR_ADDC, 0),
4327                0,
4328        SCR_REG_REG (ua3, SCR_ADDC, 0),
4329                0,
4330        /*
4331         *  Compute SCRATCHA as:
4332         *  - size to transfer = 1 byte.
4333         *  - bit 24..31 = high address bit [32...39].
4334         */
4335        SCR_LOAD_ABS (scratcha, 4),
4336                PADDRH (zero),
4337        SCR_REG_REG (scratcha, SCR_OR, 1),
4338                0,
4339        SCR_FROM_REG (rbc3),
4340                0,
4341        SCR_TO_REG (scratcha3),
4342                0,
4343        /*
4344         *  Move this value to the table indirect.
4345         */
4346        SCR_STORE_REL (scratcha, 4),
4347                offsetof (struct ccb, phys.wresid.size),
4348        /*
4349         *  Wait for a valid phase.
4350         *  While testing with bogus QUANTUM drives, the C1010 
4351         *  sometimes raised a spurious phase mismatch with 
4352         *  WSR and the CHMOV(1) triggered another PM.
4353         *  Waiting explicitely for the PHASE seemed to avoid 
4354         *  the nested phase mismatch. Btw, this didn't happen 
4355         *  using my IBM drives.
4356         */
4357        SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_IN)),
4358                0,
4359        /*
4360         *  Perform the move of the residual byte.
4361         */
4362        SCR_CHMOV_TBL ^ SCR_DATA_IN,
4363                offsetof (struct ccb, phys.wresid),
4364        /*
4365         *  We can now handle the phase mismatch with UA fixed.
4366         *  RBC[0..23]=0 is a special case that does not require 
4367         *  a PM context. The C code also checks against this.
4368         */
4369        SCR_FROM_REG (rbc),
4370                0,
4371        SCR_RETURN ^ IFFALSE (DATA (0)),
4372                0,
4373        SCR_FROM_REG (rbc1),
4374                0,
4375        SCR_RETURN ^ IFFALSE (DATA (0)),
4376                0,
4377        SCR_FROM_REG (rbc2),
4378                0,
4379        SCR_RETURN ^ IFFALSE (DATA (0)),
4380                0,
4381        /*
4382         *  RBC[0..23]=0.
4383         *  Not only we donnot need a PM context, but this would 
4384         *  lead to a bogus CHMOV(0). This condition means that 
4385         *  the residual was the last byte to move from this CHMOV.
4386         *  So, we just have to move the current data script pointer 
4387         *  (i.e. TEMP) to the SCRIPTS address following the 
4388         *  interrupted CHMOV and jump to dispatcher.
4389         */
4390        SCR_STORE_ABS (ia, 4),
4391                PADDRH (scratch),
4392        SCR_LOAD_ABS (temp, 4),
4393                PADDRH (scratch),
4394        SCR_JUMP,
4395                PADDR (dispatch),
4396}/*--------------------------< WSR_MA_HELPER >-----------------------*/,{
4397        /*
4398         *  Helper for the C code when WSR bit is set.
4399         *  Perform the move of the residual byte.
4400         */
4401        SCR_CHMOV_TBL ^ SCR_DATA_IN,
4402                offsetof (struct ccb, phys.wresid),
4403        SCR_JUMP,
4404                PADDR (dispatch),
4405}/*-------------------------< ZERO >------------------------*/,{
4406        SCR_DATA_ZERO,
4407}/*-------------------------< SCRATCH >---------------------*/,{
4408        SCR_DATA_ZERO,
4409}/*-------------------------< SCRATCH1 >--------------------*/,{
4410        SCR_DATA_ZERO,
4411}/*-------------------------< PM0_DATA_ADDR >---------------*/,{
4412        SCR_DATA_ZERO,
4413}/*-------------------------< PM1_DATA_ADDR >---------------*/,{
4414        SCR_DATA_ZERO,
4415}/*-------------------------< SAVED_DSA >-------------------*/,{
4416        SCR_DATA_ZERO,
4417}/*-------------------------< SAVED_DRS >-------------------*/,{
4418        SCR_DATA_ZERO,
4419}/*-------------------------< DONE_POS >--------------------*/,{
4420        SCR_DATA_ZERO,
4421}/*-------------------------< STARTPOS >--------------------*/,{
4422        SCR_DATA_ZERO,
4423}/*-------------------------< TARGTBL >---------------------*/,{
4424        SCR_DATA_ZERO,
4425
4426
4427/*
4428** We may use MEMORY MOVE instructions to load the on chip-RAM,
4429** if it happens that mapping PCI memory is not possible.
4430** But writing the RAM from the CPU is the preferred method, 
4431** since PCI 2.2 seems to disallow PCI self-mastering.
4432*/
4433
4434#ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
4435
4436}/*-------------------------< START_RAM >-------------------*/,{
4437        /*
4438        **      Load the script into on-chip RAM, 
4439        **      and jump to start point.
4440        */
4441        SCR_COPY (sizeof (struct script)),
4442}/*-------------------------< SCRIPT0_BA >--------------------*/,{
4443                0,
4444                PADDR (start),
4445        SCR_JUMP,
4446                PADDR (init),
4447
4448}/*-------------------------< START_RAM64 >--------------------*/,{
4449        /*
4450        **      Load the RAM and start for 64 bit PCI (895A,896).
4451        **      Both scripts (script and scripth) are loaded into 
4452        **      the RAM which is 8K (4K for 825A/875/895).
4453        **      We also need to load some 32-63 bit segments 
4454        **      address of the SCRIPTS processor.
4455        **      LOAD/STORE ABSOLUTE always refers to on-chip RAM 
4456        **      in our implementation. The main memory is 
4457        **      accessed using LOAD/STORE DSA RELATIVE.
4458        */
4459        SCR_LOAD_REL (mmws, 4),
4460                offsetof (struct ncb, scr_ram_seg),
4461        SCR_COPY (sizeof(struct script)),
4462}/*-------------------------< SCRIPT0_BA64 >--------------------*/,{
4463                0,
4464                PADDR (start),
4465        SCR_COPY (sizeof(struct scripth)),
4466}/*-------------------------< SCRIPTH0_BA64 >--------------------*/,{
4467                0,
4468                PADDRH  (start64),
4469        SCR_LOAD_REL  (mmrs, 4),
4470                offsetof (struct ncb, scr_ram_seg),
4471        SCR_JUMP64,
4472                PADDRH (start64),
4473}/*-------------------------< RAM_SEG64 >--------------------*/,{
4474                0,
4475
4476#endif /* SCSI_NCR_PCI_MEM_NOT_SUPPORTED */
4477
4478}/*-------------------------< SNOOPTEST >-------------------*/,{
4479        /*
4480        **      Read the variable.
4481        */
4482        SCR_LOAD_REL (scratcha, 4),
4483                offsetof(struct ncb, ncr_cache),
4484        SCR_STORE_REL (temp, 4),
4485                offsetof(struct ncb, ncr_cache),
4486        SCR_LOAD_REL (temp, 4),
4487                offsetof(struct ncb, ncr_cache),
4488}/*-------------------------< SNOOPEND >-------------------*/,{
4489        /*
4490        **      And stop.
4491        */
4492        SCR_INT,
4493                99,
4494}/*--------------------------------------------------------*/
4495};
4496
4497/*==========================================================
4498**
4499**
4500**      Fill in #define dependent parts of the script
4501**
4502**
4503**==========================================================
4504*/
4505
4506void __init ncr_script_fill (struct script * scr, struct scripth * scrh)
4507{
4508        int     i;
4509        ncrcmd  *p;
4510
4511        p = scr->data_in;
4512        for (i=0; i<MAX_SCATTER; i++) {
4513                *p++ =SCR_CHMOV_TBL ^ SCR_DATA_IN;
4514                *p++ =offsetof (struct dsb, data[i]);
4515        };
4516
4517        assert ((u_long)p == (u_long)&scr->data_in + sizeof (scr->data_in));
4518
4519        p = scr->data_out;
4520
4521        for (i=0; i<MAX_SCATTER; i++) {
4522                *p++ =SCR_CHMOV_TBL ^ SCR_DATA_OUT;
4523                *p++ =offsetof (struct dsb, data[i]);
4524        };
4525
4526        assert ((u_long)p == (u_long)&scr->data_out + sizeof (scr->data_out));
4527}
4528
4529/*==========================================================
4530**
4531**
4532**      Copy and rebind a script.
4533**
4534**
4535**==========================================================
4536*/
4537
4538static void __init 
4539ncr_script_copy_and_bind (ncb_p np,ncrcmd *src,ncrcmd *dst,int len)
4540{
4541        ncrcmd  opcode, new, old, tmp1, tmp2;
4542        ncrcmd  *start, *end;
4543        int relocs;
4544        int opchanged = 0;
4545
4546        start = src;
4547        end = src + len/4;
4548
4549        while (src < end) {
4550
4551                opcode = *src++;
4552                *dst++ = cpu_to_scr(opcode);
4553
4554                /*
4555                **      If we forget to change the length
4556                **      in struct script, a field will be
4557                **      padded with 0. This is an illegal
4558                **      command.
4559                */
4560
4561                if (opcode == 0) {
4562                        printk (KERN_INFO "%s: ERROR0 IN SCRIPT at %d.\n",
4563                                ncr_name(np), (int) (src-start-1));
4564                        MDELAY (10000);
4565                        continue;
4566                };
4567
4568                /*
4569                **      We use the bogus value 0xf00ff00f ;-)
4570                **      to reserve data area in SCRIPTS.
4571                */
4572                if (opcode == SCR_DATA_ZERO) {
4573                        dst[-1] = 0;
4574                        continue;
4575                }
4576
4577                if (DEBUG_FLAGS & DEBUG_SCRIPT)
4578                        printk (KERN_INFO "%p:  <%x>\n",
4579                                (src-1), (unsigned)opcode);
4580
4581                /*
4582                **      We don't have to decode ALL commands
4583                */
4584                switch (opcode >> 28) {
4585
4586                case 0xf:
4587                        /*
4588                        **      LOAD / STORE DSA relative, don't relocate.
4589                        */
4590                        relocs = 0;
4591                        break;
4592                case 0xe:
4593                        /*
4594                        **      LOAD / STORE absolute.
4595                        */
4596                        relocs = 1;
4597                        break;
4598                case 0xc:
4599                        /*
4600                        **      COPY has TWO arguments.
4601                        */
4602                        relocs = 2;
4603                        tmp1 = src[0];
4604                        tmp2 = src[1];
4605#ifdef  RELOC_KVAR
4606                        if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
4607                                tmp1 = 0;
4608                        if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
4609                                tmp2 = 0;
4610#endif
4611                        if ((tmp1 ^ tmp2) & 3) {
4612                                printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n",
4613                                        ncr_name(np), (int) (src-start-1));
4614                                MDELAY (1000);
4615                        }
4616                        /*
4617                        **      If PREFETCH feature not enabled, remove 
4618                        **      the NO FLUSH bit if present.
4619                        */
4620                        if ((opcode & SCR_NO_FLUSH) &&
4621                            !(np->features & FE_PFEN)) {
4622                                dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH);
4623                                ++opchanged;
4624                        }
4625                        break;
4626
4627                case 0x0:
4628                        /*
4629                        **      MOVE/CHMOV (absolute address)
4630                        */
4631                        if (!(np->features & FE_WIDE))
4632                                dst[-1] = cpu_to_scr(opcode | OPC_MOVE);
4633                        relocs = 1;
4634                        break;
4635
4636                case 0x1:
4637                        /*
4638                        **      MOVE/CHMOV (table indirect)
4639                        */
4640                        if (!(np->features & FE_WIDE))
4641                                dst[-1] = cpu_to_scr(opcode | OPC_MOVE);
4642                        relocs = 0;
4643                        break;
4644
4645                case 0x8:
4646                        /*
4647                        **      JUMP / CALL
4648                        **      dont't relocate if relative :-)
4649                        */
4650                        if (opcode & 0x00800000)
4651                                relocs = 0;
4652                        else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
4653                                relocs = 2;
4654                        else
4655                                relocs = 1;
4656                        break;
4657
4658                case 0x4:
4659                case 0x5:
4660                case 0x6:
4661                case 0x7:
4662                        relocs = 1;
4663                        break;
4664
4665                default:
4666                        relocs = 0;
4667                        break;
4668                };
4669
4670                if (!relocs) {
4671                        *dst++ = cpu_to_scr(*src++);
4672                        continue;
4673                }
4674                while (relocs--) {
4675                        old = *src++;
4676
4677                        switch (old & RELOC_MASK) {
4678                        case RELOC_REGISTER:
4679                                new = (old & ~RELOC_MASK) + np->base_ba;
4680                                break;
4681                        case RELOC_LABEL:
4682                                new = (old & ~RELOC_MASK) + np->p_script;
4683                                break;
4684                        case RELOC_LABELH:
4685                                new = (old & ~RELOC_MASK) + np->p_scripth;
4686                                break;
4687                        case RELOC_SOFTC:
4688                                new = (old & ~RELOC_MASK) + np->p_ncb;
4689                                break;
4690#ifdef  RELOC_KVAR
4691                        case RELOC_KVAR:
4692                                new=0;
4693                                if (((old & ~RELOC_MASK) < SCRIPT_KVAR_FIRST) ||
4694                                    ((old & ~RELOC_MASK) > SCRIPT_KVAR_LAST))
4695                                        panic("ncr KVAR out of range");
4696                                new = vtobus(script_kvars[old & ~RELOC_MASK]);
4697#endif
4698                                break;
4699                        case 0:
4700                                /* Don't relocate a 0 address. */
4701                                if (old == 0) {
4702                                        new = old;
4703                                        break;
4704                                }
4705                                /* fall through */
4706                        default:
4707                                new = 0;        /* For 'cc' not to complain */
4708                                panic("ncr_script_copy_and_bind: "
4709                                      "weird relocation %x\n", old);
4710                                break;
4711                        }
4712
4713                        *dst++ = cpu_to_scr(new);
4714                }
4715        };
4716}
4717
4718/*==========================================================
4719**
4720**
4721**      Auto configuration:  attach and init a host adapter.
4722**
4723**
4724**==========================================================
4725*/
4726
4727/*
4728**      Linux host data structure.
4729*/
4730
4731struct host_data {
4732     struct ncb *ncb;
4733};
4734
4735/*
4736**      Print something which allows to retrieve the controler type, unit,
4737**      target, lun concerned by a kernel message.
4738*/
4739
4740static void PRINT_TARGET(ncb_p np, int target)
4741{
4742        printk(KERN_INFO "%s-<%d,*>: ", ncr_name(np), target);
4743}
4744
4745static void PRINT_LUN(ncb_p np, int target, int lun)
4746{
4747        printk(KERN_INFO "%s-<%d,%d>: ", ncr_name(np), target, lun);
4748}
4749
4750static void PRINT_ADDR(Scsi_Cmnd *cmd)
4751{
4752        struct host_data *host_data = (struct host_data *) cmd->host->hostdata;
4753        PRINT_LUN(host_data->ncb, cmd->target, cmd->lun);
4754}
4755
4756/*==========================================================
4757**
4758**      NCR chip clock divisor table.
4759**      Divisors are multiplied by 10,000,000 in order to make 
4760**      calculations more simple.
4761**
4762**==========================================================
4763*/
4764
4765#define _5M 5000000
4766static u_long div_10M[] =
4767        {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
4768
4769
4770/*===============================================================
4771**
4772**      Prepare io register values used by ncr_init() according 
4773**      to selected and supported features.
4774**
4775**      NCR/SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
4776**      128 transfers. All chips support at least 16 transfers bursts. 
4777**      The 825A, 875 and 895 chips support bursts of up to 128 
4778**      transfers and the 895A and 896 support bursts of up to 64 
4779**      transfers. All other chips support up to 16 transfers bursts.
4780**
4781**      For PCI 32 bit data transfers each transfer is a DWORD (4 bytes).
4782**      It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
4783**      Only the 896 is able to perform 64 bit data transfers.
4784**
4785**      We use log base 2 (burst length) as internal code, with 
4786**      value 0 meaning "burst disabled".
4787**
4788**===============================================================
4789*/
4790
4791/*
4792 *      Burst length from burst code.
4793 */
4794#define burst_length(bc) (!(bc))? 0 : 1 << (bc)
4795
4796/*
4797 *      Burst code from io register bits.
4798 */
4799#define burst_code(dmode, ctest4, ctest5) \
4800        (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
4801
4802/*
4803 *      Set initial io register bits from burst code.
4804 */
4805static inline void ncr_init_burst(ncb_p np, u_char bc)
4806{
4807        np->rv_ctest4   &= ~0x80;
4808        np->rv_dmode    &= ~(0x3 << 6);
4809        np->rv_ctest5   &= ~0x4;
4810
4811        if (!bc) {
4812                np->rv_ctest4   |= 0x80;
4813        }
4814        else {
4815                --bc;
4816                np->rv_dmode    |= ((bc & 0x3) << 6);
4817                np->rv_ctest5   |= (bc & 0x4);
4818        }
4819}
4820
4821#ifdef SCSI_NCR_NVRAM_SUPPORT
4822
4823/*
4824**      Get target set-up from Symbios format NVRAM.
4825*/
4826
4827static void __init 
4828ncr_Symbios_setup_target(ncb_p np, int target, Symbios_nvram *nvram)
4829{
4830        tcb_p tp = &np->target[target];
4831        Symbios_target *tn = &nvram->target[target];
4832
4833        tp->usrsync = tn->sync_period ? (tn->sync_period + 3) / 4 : 255;
4834        tp->usrwide = tn->bus_width == 0x10 ? 1 : 0;
4835        tp->usrtags =
4836                (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? MAX_TAGS : 0;
4837
4838        if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
4839                tp->usrflag |= UF_NODISC;
4840        if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
4841                tp->usrflag |= UF_NOSCAN;
4842}
4843
4844/*
4845**      Get target set-up from Tekram format NVRAM.
4846*/
4847
4848static void __init
4849ncr_Tekram_setup_target(ncb_p np, int target, Tekram_nvram *nvram)
4850{
4851        tcb_p tp = &np->target[target];
4852        struct Tekram_target *tn = &nvram->target[target];
4853        int i;
4854
4855        if (tn->flags & TEKRAM_SYNC_NEGO) {
4856                i = tn->sync_index & 0xf;
4857                tp->usrsync = Tekram_sync[i];
4858        }
4859
4860        tp->usrwide = (tn->flags & TEKRAM_WIDE_NEGO) ? 1 : 0;
4861
4862        if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
4863                tp->usrtags = 2 << nvram->max_tags_index;
4864        }
4865
4866        if (!(tn->flags & TEKRAM_DISCONNECT_ENABLE))
4867                tp->usrflag = UF_NODISC;
4868 
4869        /* If any device does not support parity, we will not use this option */
4870        if (!(tn->flags & TEKRAM_PARITY_CHECK))
4871                np->rv_scntl0  &= ~0x0a; /* SCSI parity checking disabled */
4872}
4873#endif /* SCSI_NCR_NVRAM_SUPPORT */
4874
4875/*
4876**      Save initial settings of some IO registers.
4877**      Assumed to have been set by BIOS.
4878*/
4879static void __init ncr_save_initial_setting(ncb_p np)
4880{
4881        np->sv_scntl0   = INB(nc_scntl0) & 0x0a;
4882        np->sv_dmode    = INB(nc_dmode)  & 0xce;
4883        np->sv_dcntl    = INB(nc_dcntl)  & 0xa8;
4884        np->sv_ctest3   = INB(nc_ctest3) & 0x01;
4885        np->sv_ctest4   = INB(nc_ctest4) & 0x80;
4886        np->sv_gpcntl   = INB(nc_gpcntl);
4887        np->sv_stest2   = INB(nc_stest2) & 0x20;
4888        np->sv_stest4   = INB(nc_stest4);
4889        np->sv_stest1   = INB(nc_stest1);
4890
4891        np->sv_scntl3   = INB(nc_scntl3) & 0x07;
4892 
4893        if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
4894                (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66) ){
4895                /*
4896                ** C1010 always uses large fifo, bit 5 rsvd
4897                ** scntl4 used ONLY with C1010
4898                */
4899                np->sv_ctest5 = INB(nc_ctest5) & 0x04 ; 
4900                np->sv_scntl4 = INB(nc_scntl4); 
4901         }
4902         else {
4903                np->sv_ctest5 = INB(nc_ctest5) & 0x24 ; 
4904                np->sv_scntl4 = 0;
4905         }
4906}
4907
4908/*
4909**      Prepare io register values used by ncr_init() 
4910**      according to selected and supported features.
4911*/
4912static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
4913{
4914        u_char  burst_max;
4915        u_long  period;
4916        int i;
4917
4918        /*
4919        **      Wide ?
4920        */
4921
4922        np->maxwide     = (np->features & FE_WIDE)? 1 : 0;
4923
4924        /*
4925         *  Guess the frequency of the chip's clock.
4926         */
4927        if      (np->features & (FE_ULTRA3 | FE_ULTRA2))
4928                np->clock_khz = 160000;
4929        else if (np->features & FE_ULTRA)
4930                np->clock_khz = 80000;
4931        else
4932                np->clock_khz = 40000;
4933
4934        /*
4935         *  Get the clock multiplier factor.
4936         */
4937        if      (np->features & FE_QUAD)
4938                np->multiplier  = 4;
4939        else if (np->features & FE_DBLR)
4940                np->multiplier  = 2;
4941        else
4942                np->multiplier  = 1;
4943
4944        /*
4945         *  Measure SCSI clock frequency for chips 
4946         *  it may vary from assumed one.
4947         */
4948        if (np->features & FE_VARCLK)
4949                ncr_getclock(np, np->multiplier);
4950
4951        /*
4952         * Divisor to be used for async (timer pre-scaler).
4953         *
4954         * Note: For C1010 the async divisor is 2(8) if he
4955         * quadrupler is disabled (enabled).
4956         */
4957
4958        if ( (np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
4959                (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
4960
4961                np->rv_scntl3 = 0; 
4962        }
4963        else
4964        {
4965                i = np->clock_divn - 1;
4966                while (--i >= 0) {
4967                        if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz 
4968                                                        > div_10M[i]) {
4969                                ++i;
4970                                break;
4971                        }
4972                }
4973                np->rv_scntl3 = i+1;
4974        }
4975
4976
4977        /*
4978         * Save the ultra3 register for the C1010/C1010_66
4979         */
4980
4981        np->rv_scntl4 = np->sv_scntl4;
4982
4983        /*
4984         * Minimum synchronous period factor supported by the chip.
4985         * Btw, 'period' is in tenths of nanoseconds.
4986         */
4987
4988        period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
4989        if      (period <= 250)         np->minsync = 10;
4990        else if (period <= 303)         np->minsync = 11;
4991        else if (period <= 500)         np->minsync = 12;
4992        else                            np->minsync = (period + 40 - 1) / 40;
4993
4994        /*
4995         * Fix up. If sync. factor is 10 (160000Khz clock) and chip
4996         * supports ultra3, then min. sync. period 12.5ns and the factor is 9 
4997         * Also keep track of the maximum offset in ST mode which may differ  
4998         * from the maximum offset in DT mode. For now hardcoded to 31. 
4999         */
5000
5001        if (np->features & FE_ULTRA3) {
5002                if (np->minsync == 10)
5003                        np->minsync = 9;
5004                np->maxoffs_st = 31;
5005        }
5006        else
5007                np->maxoffs_st = np->maxoffs;
5008
5009        /*
5010         * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
5011         *
5012         * Transfer period minimums: SCSI-1 200 (50); Fast 100 (25)
5013         *                      Ultra 50 (12); Ultra2 (6); Ultra3 (3)           
5014         */
5015
5016        if      (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
5017                np->minsync = 25;
5018        else if (np->minsync < 12 && (np->features & FE_ULTRA))
5019                np->minsync = 12;
5020        else if (np->minsync < 10 && (np->features & FE_ULTRA2))
5021                np->minsync = 10;
5022        else if (np->minsync < 9 && (np->features & FE_ULTRA3))
5023                np->minsync = 9;
5024
5025        /*
5026         * Maximum synchronous period factor supported by the chip.
5027         */
5028
5029        period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
5030        np->maxsync = period > 2540 ? 254 : period / 10;
5031
5032        /*
5033        **      64 bit (53C895A or 53C896) ?
5034        */
5035        if (np->features & FE_DAC) {
5036                if (np->features & FE_DAC_IN_USE)
5037                        np->rv_ccntl1   |= (XTIMOD | EXTIBMV);
5038                else
5039                        np->rv_ccntl1   |= (DDAC);
5040        }
5041
5042        /*
5043        **      Phase mismatch handled by SCRIPTS (53C895A, 53C896 or C1010) ?
5044        */
5045        if (np->features & FE_NOPM)
5046                np->rv_ccntl0   |= (ENPMJ);
5047
5048        /*
5049        **      Prepare initial value of other IO registers
5050        */
5051#if defined SCSI_NCR_TRUST_BIOS_SETTING
5052        np->rv_scntl0   = np->sv_scntl0;
5053        np->rv_dmode    = np->sv_dmode;
5054        np->rv_dcntl    = np->sv_dcntl;
5055        np->rv_ctest3   = np->sv_ctest3;
5056        np->rv_ctest4   = np->sv_ctest4;
5057        np->rv_ctest5   = np->sv_ctest5;
5058        burst_max       = burst_code(np->sv_dmode, np->sv_ctest4, np->sv_ctest5);
5059#else
5060
5061        /*
5062        **      Select burst length (dwords)
5063        */
5064        burst_max       = driver_setup.burst_max;
5065        if (burst_max == 255)
5066                burst_max = burst_code(np->sv_dmode, np->sv_ctest4, np->sv_ctest5);
5067        if (burst_max > 7)
5068                burst_max = 7;
5069        if (burst_max > np->maxburst)
5070                burst_max = np->maxburst;
5071
5072        /*
5073        **      DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
5074        **      This chip and the 860 Rev 1 may wrongly use PCI cache line 
5075        **      based transactions on LOAD/STORE instructions. So we have 
5076        **      to prevent these chips from using such PCI transactions in 
5077        **      this driver. The generic sym53c8xx driver that does not use 
5078        **      LOAD/STORE instructions does not need this work-around.
5079        */
5080        if ((np->device_id == PCI_DEVICE_ID_NCR_53C810 &&
5081             np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
5082            (np->device_id == PCI_DEVICE_ID_NCR_53C860 &&
5083             np->revision_id <= 0x1))
5084                np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
5085
5086        /*
5087        **      DEL ? - 53C1010 Rev 1 - Part Number 609-0393638
5088        **      64-bit Slave Cycles must be disabled.
5089        */
5090        if ( ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) && (np->revision_id < 0x02) )
5091                || (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66 ) )
5092                np->rv_ccntl1  |=  0x10;
5093
5094        /*
5095        **      Select all supported special features.
5096        **      If we are using on-board RAM for scripts, prefetch (PFEN) 
5097        **      does not help, but burst op fetch (BOF) does.
5098        **      Disabling PFEN makes sure BOF will be used.
5099        */
5100        if (np->features & FE_ERL)
5101                np->rv_dmode    |= ERL;         /* Enable Read Line */
5102        if (np->features & FE_BOF)
5103                np->rv_dmode    |= BOF;         /* Burst Opcode Fetch */
5104        if (np->features & FE_ERMP)
5105                np->rv_dmode    |= ERMP;        /* Enable Read Multiple */
5106#if 1
5107        if ((np->features & FE_PFEN) && !np->base2_ba)
5108#else
5109        if (np->features & FE_PFEN)
5110#endif
5111                np->rv_dcntl    |= PFEN;        /* Prefetch Enable */
5112        if (np->features & FE_CLSE)
5113                np->rv_dcntl    |= CLSE;        /* Cache Line Size Enable */
5114        if (np->features & FE_WRIE)
5115                np->rv_ctest3   |= WRIE;        /* Write and Invalidate */
5116
5117
5118        if ( (np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
5119                        (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66) &&
5120                        (np->features & FE_DFS))
5121                np->rv_ctest5   |= DFS;         /* Dma Fifo Size */
5122                                                /* C1010/C1010_66 always large fifo */
5123
5124        /*
5125        **      Select some other
5126        */
5127        if (driver_setup.master_parity)
5128                np->rv_ctest4   |= MPEE;        /* Master parity checking */
5129        if (driver_setup.scsi_parity)
5130                np->rv_scntl0   |= 0x0a;        /*  full arb., ena parity, par->ATN  */
5131
5132#ifdef SCSI_NCR_NVRAM_SUPPORT
5133        /*
5134        **      Get parity checking, host ID and verbose mode from NVRAM
5135        **/
5136        if (nvram) {
5137                switch(nvram->type) {
5138                case SCSI_NCR_TEKRAM_NVRAM:
5139                        np->myaddr = nvram->data.Tekram.host_id & 0x0f;
5140                        break;
5141                case SCSI_NCR_SYMBIOS_NVRAM:
5142                        if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
5143                                np->rv_scntl0  &= ~0x0a;
5144                        np->myaddr = nvram->data.Symbios.host_id & 0x0f;
5145                        if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
5146                                np->verbose += 1;
5147                        break;
5148                }
5149        }
5150#endif
5151        /*
5152        **  Get SCSI addr of host adapter (set by bios?).
5153        */
5154        if (np->myaddr == 255) {
5155                np->myaddr = INB(nc_scid) & 0x07;
5156                if (!np->myaddr)
5157                        np->myaddr = SCSI_NCR_MYADDR;
5158        }
5159
5160#endif /* SCSI_NCR_TRUST_BIOS_SETTING */
5161
5162        /*
5163         *      Prepare initial io register bits for burst length
5164         */
5165        ncr_init_burst(np, burst_max);
5166
5167        /*
5168        **      Set SCSI BUS mode.
5169        **
5170        **      - ULTRA2 chips (895/895A/896) 
5171        **        and ULTRA 3 chips (1010) report the current 
5172        **        BUS mode through the STEST4 IO register.
5173        **      - For previous generation chips (825/825A/875), 
5174        **        user has to tell us how to check against HVD, 
5175        **        since a 100% safe algorithm is not possible.
5176        */
5177        np->scsi_mode = SMODE_SE;
5178        if      (np->features & (FE_ULTRA2 | FE_ULTRA3))
5179                np->scsi_mode = (np->sv_stest4 & SMODE);
5180        else if (np->features & FE_DIFF) {
5181                switch(driver_setup.diff_support) {
5182                case 4: /* Trust previous settings if present, then GPIO3 */
5183                        if (np->sv_scntl3) {
5184                                if (np->sv_stest2 & 0x20)
5185                                        np->scsi_mode = SMODE_HVD;
5186                                break;
5187                        }
5188                case 3: /* SYMBIOS controllers report HVD through GPIO3 */
5189                        if (nvram && nvram->type != SCSI_NCR_SYMBIOS_NVRAM)
5190                                break;
5191                        if (INB(nc_gpreg) & 0x08)
5192                                break;
5193                case 2: /* Set HVD unconditionally */
5194                        np->scsi_mode = SMODE_HVD;
5195                case 1: /* Trust previous settings for HVD */
5196                        if (np->sv_stest2 & 0x20)
5197                                np->scsi_mode = SMODE_HVD;
5198                        break;
5199                default:/* Don't care about HVD */      
5200                        break;
5201                }
5202        }
5203        if (np->scsi_mode == SMODE_HVD)
5204                np->rv_stest2 |= 0x20;
5205
5206        /*
5207        **      Set LED support from SCRIPTS.
5208        **      Ignore this feature for boards known to use a 
5209        **      specific GPIO wiring and for the 895A or 896 
5210        **      that drive the LED directly.
5211        **      Also probe initial setting of GPIO0 as output.
5212        */
5213        if ((driver_setup.led_pin ||
5214             (nvram && nvram->type == SCSI_NCR_SYMBIOS_NVRAM)) &&
5215            !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
5216                np->features |= FE_LED0;
5217
5218        /*
5219        **      Set irq mode.
5220        */
5221        switch(driver_setup.irqm & 3) {
5222        case 2:
5223                np->rv_dcntl    |= IRQM;
5224                break;
5225        case 1:
5226                np->rv_dcntl    |= (np->sv_dcntl & IRQM);
5227                break;
5228        default:
5229                break;
5230        }
5231
5232        /*
5233        **      Configure targets according to driver setup.
5234        **      If NVRAM present get targets setup from NVRAM.
5235        **      Allow to override sync, wide and NOSCAN from 
5236        **      boot command line.
5237        */
5238        for (i = 0 ; i < MAX_TARGET ; i++) {
5239                tcb_p tp = &np->target[i];
5240
5241                tp->usrsync = 255;
5242#ifdef SCSI_NCR_NVRAM_SUPPORT
5243                if (nvram) {
5244                        switch(nvram->type) {
5245                        case SCSI_NCR_TEKRAM_NVRAM:
5246                                ncr_Tekram_setup_target(np, i, &nvram->data.Tekram);
5247                                break;
5248                        case SCSI_NCR_SYMBIOS_NVRAM:
5249                                ncr_Symbios_setup_target(np, i, &nvram->data.Symbios);
5250                                break;
5251                        }
5252                        if (driver_setup.use_nvram & 0x2)
5253                                tp->usrsync = driver_setup.default_sync;
5254                        if (driver_setup.use_nvram & 0x4)
5255                                tp->usrwide = driver_setup.max_wide;
5256                        if (driver_setup.use_nvram & 0x8)
5257                                tp->usrflag &= ~UF_NOSCAN;
5258                }
5259                else {
5260#else
5261                if (1) {
5262#endif
5263                        tp->usrsync = driver_setup.default_sync;
5264                        tp->usrwide = driver_setup.max_wide;
5265                        tp->usrtags = MAX_TAGS;
5266                        if (!driver_setup.disconnection)
5267                                np->target[i].usrflag = UF_NODISC;
5268                }
5269        }
5270
5271        /*
5272        **      Announce all that stuff to user.
5273        */
5274
5275        i = nvram ? nvram->type : 0;
5276        printk(KERN_INFO "%s: %sID %d, Fast-%d%s%s\n", ncr_name(np),
5277                i  == SCSI_NCR_SYMBIOS_NVRAM ? "Symbios format NVRAM, " :
5278                (i == SCSI_NCR_TEKRAM_NVRAM  ? "Tekram format NVRAM, " : ""),
5279                np->myaddr,
5280                np->minsync < 10 ? 80 : 
5281                        (np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10) ),
5282                (np->rv_scntl0 & 0xa)   ? ", Parity Checking"   : ", NO Parity",
5283                (np->rv_stest2 & 0x20)  ? ", Differential"      : "");
5284
5285        if (bootverbose > 1) {
5286                printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
5287                        "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
5288                        ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
5289                        np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
5290
5291                printk (KERN_INFO "%s: final   SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
5292                        "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
5293                        ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
5294                        np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
5295        }
5296
5297        if (bootverbose && np->base2_ba)
5298                printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n",
5299                        ncr_name(np), np->base2_ba);
5300
5301        return 0;
5302}
5303
5304
5305#ifdef SCSI_NCR_DEBUG_NVRAM
5306
5307void __init ncr_display_Symbios_nvram(ncb_p np, Symbios_nvram *nvram)
5308{
5309        int i;
5310
5311        /* display Symbios nvram host data */
5312        printk(KERN_DEBUG "%s: HOST ID=%d%s%s%s%s%s\n",
5313                ncr_name(np), nvram->host_id & 0x0f,
5314                (nvram->flags  & SYMBIOS_SCAM_ENABLE)   ? " SCAM"       :"",
5315                (nvram->flags  & SYMBIOS_PARITY_ENABLE) ? " PARITY"     :"",
5316                (nvram->flags  & SYMBIOS_VERBOSE_MSGS)  ? " VERBOSE"    :"", 
5317                (nvram->flags  & SYMBIOS_CHS_MAPPING)   ? " CHS_ALT"    :"", 
5318                (nvram->flags1 & SYMBIOS_SCAN_HI_LO)    ? " HI_LO"      :"");
5319
5320        /* display Symbios nvram drive data */
5321        for (i = 0 ; i < 15 ; i++) {
5322                struct Symbios_target *tn = &nvram->target[i];
5323                printk(KERN_DEBUG "%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
5324                ncr_name(np), i,
5325                (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC"       : "",
5326                (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT"  : "",
5327                (tn->flags & SYMBIOS_SCAN_LUNS)         ? " SCAN_LUNS"  : "",
5328                (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ"        : "",
5329                tn->bus_width,
5330                tn->sync_period / 4,
5331                tn->timeout);
5332        }
5333}
5334
5335static u_char Tekram_boot_delay[7] __initdata = {3, 5, 10, 20, 30, 60, 120};
5336
5337void __init ncr_display_Tekram_nvram(ncb_p np, Tekram_nvram *nvram)
5338{
5339        int i, tags, boot_delay;
5340        char *rem;
5341
5342        /* display Tekram nvram host data */
5343        tags = 2 << nvram->max_tags_index;
5344        boot_delay = 0;
5345        if (nvram->boot_delay_index < 6)
5346                boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
5347        switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
5348        default:
5349        case 0: rem = "";                       break;
5350        case 1: rem = " REMOVABLE=boot device"; break;
5351        case 2: rem = " REMOVABLE=all";         break;
5352        }
5353
5354        printk(KERN_DEBUG
5355                "%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
5356                ncr_name(np), nvram->host_id & 0x0f,
5357                (nvram->flags1 & SYMBIOS_SCAM_ENABLE)   ? " SCAM"       :"",
5358                (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES"        :"",
5359                (nvram->flags & TEKRAM_DRIVES_SUP_1GB)  ? " >1GB"       :"",
5360                (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET"    :"",
5361                (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG"    :"",
5362                (nvram->flags & TEKRAM_IMMEDIATE_SEEK)  ? " IMM_SEEK"   :"",
5363                (nvram->flags & TEKRAM_SCAN_LUNS)       ? " SCAN_LUNS"  :"",
5364                (nvram->flags1 & TEKRAM_F2_F6_ENABLED)  ? " F2_F6"      :"",
5365                rem, boot_delay, tags);
5366
5367        /* display Tekram nvram drive data */
5368        for (i = 0; i <= 15; i++) {
5369                int sync, j;
5370                struct Tekram_target *tn = &nvram->target[i];
5371                j = tn->sync_index & 0xf;
5372                sync = Tekram_sync[j];
5373                printk(KERN_DEBUG "%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
5374                ncr_name(np), i,
5375                (tn->flags & TEKRAM_PARITY_CHECK)       ? " PARITY"     : "",
5376                (tn->flags & TEKRAM_SYNC_NEGO)          ? " SYNC"       : "",
5377                (tn->flags & TEKRAM_DISCONNECT_ENABLE)  ? " DISC"       : "",
5378                (tn->flags & TEKRAM_START_CMD)          ? " START"      : "",
5379                (tn->flags & TEKRAM_TAGGED_COMMANDS)    ? " TCQ"        : "",
5380                (tn->flags & TEKRAM_WIDE_NEGO)          ? " WIDE"       : "",
5381                sync);
5382        }
5383}
5384#endif /* SCSI_NCR_DEBUG_NVRAM */
5385
5386/*
5387**      Host attach and initialisations.
5388**
5389**      Allocate host data and ncb structure.
5390**      Request IO region and remap MMIO region.
5391**      Do chip initialization.
5392**      If all is OK, install interrupt handling and
5393**      start the timer daemon.
5394*/
5395
5396static int __init 
5397ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device)
5398{
5399        struct host_data *host_data;
5400        ncb_p np = 0;
5401        struct Scsi_Host *instance = 0;
5402        u_long flags = 0;
5403        ncr_nvram *nvram = device->nvram;
5404        int i;
5405
5406        printk(KERN_INFO NAME53C "%s-%d: rev 0x%x on pci bus %d device %d function %d "
5407#ifdef __sparc__
5408                "irq %s\n",
5409#else
5410                "irq %d\n",
5411#endif
5412                device->chip.name, unit, device->chip.revision_id,
5413                device->slot.bus, (device->slot.device_fn & 0xf8) >> 3,
5414                device->slot.device_fn & 7,
5415#ifdef __sparc__
5416                __irq_itoa(device->slot.irq));
5417#else
5418                device->slot.irq);
5419#endif
5420
5421        /*
5422        **      Allocate host_data structure
5423        */
5424        if (!(instance = scsi_register(tpnt, sizeof(*host_data))))
5425                goto attach_error;
5426        host_data = (struct host_data *) instance->hostdata;
5427
5428        /*
5429        **      Allocate the host control block.
5430        */
5431        np = __m_calloc_dma(device->pdev, sizeof(struct ncb), "NCB");
5432        if (!np)
5433                goto attach_error;
5434        NCR_INIT_LOCK_NCB(np);
5435        np->pdev  = device->pdev;
5436        np->p_ncb = vtobus(np);
5437        host_data->ncb = np;
5438
5439        /*
5440        **      Store input informations in the host data structure.
5441        */
5442        strncpy(np->chip_name, device->chip.name, sizeof(np->chip_name) - 1);
5443        np->unit        = unit;
5444        np->verbose     = driver_setup.verbose;
5445        sprintf(np->inst_name, NAME53C "%s-%d", np->chip_name, np->unit);
5446        np->device_id   = device->chip.device_id;
5447        np->revision_id = device->chip.revision_id;
5448        np->bus         = device->slot.bus;
5449        np->device_fn   = device->slot.device_fn;
5450        np->features    = device->chip.features;
5451        np->clock_divn  = device->chip.nr_divisor;
5452        np->maxoffs     = device->chip.offset_max;
5453        np->maxburst    = device->chip.burst_max;
5454        np->myaddr      = device->host_id;
5455
5456        /*
5457        **      Allocate the start queue.
5458        */
5459        np->squeue = (ncrcmd *)
5460                m_calloc_dma(sizeof(ncrcmd)*(MAX_START*2), "SQUEUE");
5461        if (!np->squeue)
5462                goto attach_error;
5463        np->p_squeue = vtobus(np->squeue);
5464
5465        /*
5466        **      Allocate the done queue.
5467        */
5468        np->dqueue = (ncrcmd *)
5469                m_calloc_dma(sizeof(ncrcmd)*(MAX_START*2), "DQUEUE");
5470        if (!np->dqueue)
5471                goto attach_error;
5472
5473        /*
5474        **      Allocate the target bus address array.
5475        */
5476        np->targtbl = (u_int32 *) m_calloc_dma(256, "TARGTBL");
5477        if (!np->targtbl)
5478                goto attach_error;
5479
5480        /*
5481        **      Allocate SCRIPTS areas
5482        */
5483        np->script0     = (struct script *) 
5484                m_calloc_dma(sizeof(struct script),  "SCRIPT");
5485        if (!np->script0)
5486                goto attach_error;
5487        np->scripth0    = (struct scripth *)
5488                m_calloc_dma(sizeof(struct scripth), "SCRIPTH");
5489        if (!np->scripth0)
5490                goto attach_error;
5491
5492        /*
5493        **      Initialyze the CCB free queue and,
5494        **      allocate some CCB. We need at least ONE.
5495        */
5496        xpt_que_init(&np->free_ccbq);
5497        xpt_que_init(&np->b0_ccbq);
5498        if (!ncr_alloc_ccb(np))
5499                goto attach_error;
5500
5501        /*
5502        **    Initialize timer structure
5503        **
5504        */
5505        init_timer(&np->timer);
5506        np->timer.data     = (unsigned long) np;
5507        np->timer.function = sym53c8xx_timeout;
5508
5509        /*
5510        **      Try to map the controller chip to
5511        **      virtual and physical memory.
5512        */
5513
5514        np->base_ba     = device->slot.base;
5515        np->base_ws     = (np->features & FE_IO256)? 256 : 128;
5516        np->base2_ba    = (np->features & FE_RAM)? device->slot.base_2 : 0;
5517
5518#ifndef SCSI_NCR_IOMAPPED
5519        np->base_va = remap_pci_mem(device->slot.base_c, np->base_ws);
5520        if (!np->base_va) {
5521                printk(KERN_ERR "%s: can't map PCI MMIO region\n",ncr_name(np));
5522                goto attach_error;
5523        }
5524        else if (bootverbose > 1)
5525                printk(KERN_INFO "%s: using memory mapped IO\n", ncr_name(np));
5526
5527        /*
5528        **      Make the controller's registers available.
5529        **      Now the INB INW INL OUTB OUTW OUTL macros
5530        **      can be used safely.
5531        */
5532
5533        np->reg = (struct ncr_reg *) np->base_va;
5534
5535#endif /* !defined SCSI_NCR_IOMAPPED */
5536
5537        /*
5538        **      If on-chip RAM is used, make sure SCRIPTS isn't too large.
5539        */
5540        if (np->base2_ba && sizeof(struct script) > 4096) {
5541                printk(KERN_ERR "%s: script too large.\n", ncr_name(np));
5542                goto attach_error;
5543        }
5544
5545        /*
5546        **      Try to map the controller chip into iospace.
5547        */
5548
5549        if (device->slot.io_port) {
5550                request_region(device->slot.io_port, np->base_ws, NAME53C8XX);
5551                np->base_io = device->slot.io_port;
5552        }
5553
5554#ifdef SCSI_NCR_NVRAM_SUPPORT
5555        if (nvram) {
5556                switch(nvram->type) {
5557                case SCSI_NCR_SYMBIOS_NVRAM:
5558#ifdef SCSI_NCR_DEBUG_NVRAM
5559                        ncr_display_Symbios_nvram(np, &nvram->data.Symbios);
5560#endif
5561                        break;
5562                case SCSI_NCR_TEKRAM_NVRAM:
5563#ifdef SCSI_NCR_DEBUG_NVRAM
5564                        ncr_display_Tekram_nvram(np, &nvram->data.Tekram);
5565#endif
5566                        break;
5567                default:
5568                        nvram = 0;
5569#ifdef SCSI_NCR_DEBUG_NVRAM
5570                        printk(KERN_DEBUG "%s: NVRAM: None or invalid data.\n", ncr_name(np));
5571#endif
5572                }
5573        }
5574#endif
5575
5576        /*
5577        **      Save setting of some IO registers, so we will 
5578        **      be able to probe specific implementations.
5579        */
5580        ncr_save_initial_setting (np);
5581
5582        /*
5583        **      Reset the chip now, since it has been reported 
5584        **      that SCSI clock calibration may not work properly 
5585        **      if the chip is currently active.
5586        */
5587        ncr_chip_reset (np);
5588
5589        /*
5590        **      Do chip dependent initialization.
5591        */
5592        (void) ncr_prepare_setting(np, nvram);
5593
5594        /*
5595        **      Check the PCI clock frequency if needed.
5596        **      
5597        **      Must be done after ncr_prepare_setting since it destroys 
5598        **      STEST1 that is used to probe for the clock multiplier.
5599        **
5600        **      The range is currently [22688 - 45375 Khz], given 
5601        **      the values used by ncr_getclock().
5602        **      This calibration of the frequecy measurement 
5603        **      algorithm against the PCI clock frequency is only 
5604        **      performed if the driver has had to measure the SCSI 
5605        **      clock due to other heuristics not having been enough 
5606        **      to deduce the SCSI clock frequency.
5607        **
5608        **      When the chip has been initialized correctly by the 
5609        **      SCSI BIOS, the driver deduces the presence of the 
5610        **      clock multiplier and the value of the SCSI clock from 
5611        **      initial values of IO registers, and therefore no 
5612        **      clock measurement is performed.
5613        **      Normally the driver should never have to measure any 
5614        **      clock, unless the controller may use a 80 MHz clock 
5615        **      or has a clock multiplier and any of the following 
5616        **      condition is met:
5617        **
5618        **      - No SCSI BIOS is present.
5619        **      - SCSI BIOS did'nt enable the multiplier for some reason.
5620        **      - User has disabled the controller from the SCSI BIOS.
5621        **      - User booted the O/S from another O/S that did'nt enable 
5622        **        the multiplier for some reason.
5623        **
5624        **      As a result, the driver may only have to measure some 
5625        **      frequency in very unusual situations.
5626        **
5627        **      For this reality test against the PCI clock to really 
5628        **      protect against flaws in the udelay() calibration or 
5629        **      driver problem that affect the clock measurement 
5630        **      algorithm, the actual PCI clock frequency must be 33 MHz.
5631        */
5632        i = np->pciclock_max ? ncr_getpciclock(np) : 0;
5633        if (i && (i < np->pciclock_min  || i > np->pciclock_max)) {
5634                printk(KERN_ERR "%s: PCI clock (%u KHz) is out of range "
5635                        "[%u KHz - %u KHz].\n",
5636                       ncr_name(np), i, np->pciclock_min, np->pciclock_max);
5637                goto attach_error;
5638        }
5639
5640        /*
5641        **      Patch script to physical addresses
5642        */
5643        ncr_script_fill (&script0, &scripth0);
5644
5645        np->p_script    = vtobus(np->script0);
5646        np->p_scripth   = vtobus(np->scripth0);
5647        np->p_scripth0  = np->p_scripth;
5648
5649        if (np->base2_ba) {
5650                np->p_script    = np->base2_ba;
5651                if (np->features & FE_RAM8K) {
5652                        np->base2_ws = 8192;
5653                        np->p_scripth = np->p_script + 4096;
5654#if BITS_PER_LONG > 32
5655                        np->scr_ram_seg = cpu_to_scr(np->base2_ba >> 32);
5656#endif
5657                }
5658                else
5659                        np->base2_ws = 4096;
5660#ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
5661                np->base2_va = 
5662                        remap_pci_mem(device->slot.base_2_c, np->base2_ws);
5663                if (!np->base2_va) {
5664                        printk(KERN_ERR "%s: can't map PCI MEMORY region\n",
5665                               ncr_name(np));
5666                        goto attach_error;
5667                }
5668#endif
5669        }
5670
5671        ncr_script_copy_and_bind (np, (ncrcmd *) &script0, (ncrcmd *) np->script0, sizeof(struct script));
5672        ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0, (ncrcmd *) np->scripth0, sizeof(struct scripth));
5673
5674        /*
5675        **      Patch some variables in SCRIPTS
5676        */
5677        np->scripth0->pm0_data_addr[0] = 
5678                        cpu_to_scr(NCB_SCRIPT_PHYS(np, pm0_data));
5679        np->scripth0->pm1_data_addr[0] = 
5680                        cpu_to_scr(NCB_SCRIPT_PHYS(np, pm1_data));
5681
5682        /*
5683        **      Patch if not Ultra 3 - Do not write to scntl4
5684        */
5685        if (np->features & FE_ULTRA3) {
5686                np->script0->resel_scntl4[0] = cpu_to_scr(SCR_LOAD_REL (scntl4, 1));
5687                np->script0->resel_scntl4[1] = cpu_to_scr(offsetof(struct tcb, uval));
5688        }
5689
5690
5691#ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
5692        np->scripth0->script0_ba[0]     = cpu_to_scr(vtobus(np->script0));
5693        np->scripth0->script0_ba64[0]   = cpu_to_scr(vtobus(np->script0));
5694        np->scripth0->scripth0_ba64[0]  = cpu_to_scr(vtobus(np->scripth0));
5695        np->scripth0->ram_seg64[0]      = np->scr_ram_seg;
5696#endif
5697        /*
5698        **      Prepare the idle and invalid task actions.
5699        */
5700        np->idletask.start      = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5701        np->idletask.restart    = cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l));
5702        np->p_idletask          = NCB_PHYS(np, idletask);
5703
5704        np->notask.start        = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5705        np->notask.restart      = cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l));
5706        np->p_notask            = NCB_PHYS(np, notask);
5707
5708        np->bad_i_t_l.start     = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5709        np->bad_i_t_l.restart   = cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l));
5710        np->p_bad_i_t_l         = NCB_PHYS(np, bad_i_t_l);
5711
5712        np->bad_i_t_l_q.start   = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5713        np->bad_i_t_l_q.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np,bad_i_t_l_q));
5714        np->p_bad_i_t_l_q       = NCB_PHYS(np, bad_i_t_l_q);
5715
5716        /*
5717        **      Allocate and prepare the bad lun table.
5718        */
5719        np->badluntbl = m_calloc_dma(256, "BADLUNTBL");
5720        if (!np->badluntbl)
5721                goto attach_error;
5722
5723        assert (offsetof(struct lcb, resel_task) == 0);
5724        np->resel_badlun = cpu_to_scr(NCB_SCRIPTH_PHYS(np, resel_bad_lun));
5725
5726        for (i = 0 ; i < 64 ; i++)
5727                np->badluntbl[i] = cpu_to_scr(NCB_PHYS(np, resel_badlun));
5728
5729        /*
5730        **      Prepare the target bus address array.
5731        */
5732        np->scripth0->targtbl[0] = cpu_to_scr(vtobus(np->targtbl));
5733        for (i = 0 ; i < MAX_TARGET ; i++) {
5734                np->targtbl[i] = cpu_to_scr(NCB_PHYS(np, target[i]));
5735                np->target[i].b_luntbl = cpu_to_scr(vtobus(np->badluntbl));
5736                np->target[i].b_lun0   = cpu_to_scr(NCB_PHYS(np, resel_badlun));
5737        }
5738
5739        /*
5740        **    Patch the script for LED support.
5741        */
5742
5743        if (np->features & FE_LED0) {
5744                np->script0->idle[0]  =
5745                                cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR,  0x01));
5746                np->script0->reselected[0] =
5747                                cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
5748                np->script0->start[0] =
5749                                cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
5750        }
5751
5752        /*
5753        **      Patch the script to provide an extra clock cycle on
5754        **      data out phase - 53C1010_66MHz part only.
5755        **      (Fixed in rev. 1 of the chip)
5756        */
5757        if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66 &&
5758            np->revision_id < 1){
5759                np->script0->datao_phase[0] =
5760                                cpu_to_scr(SCR_REG_REG(scntl4, SCR_OR, 0x0c));
5761        }
5762
5763#ifdef SCSI_NCR_IARB_SUPPORT
5764        /*
5765        **    If user does not want to use IMMEDIATE ARBITRATION
5766        **    when we are reselected while attempting to arbitrate,
5767        **    patch the SCRIPTS accordingly with a SCRIPT NO_OP.
5768        */
5769        if (!(driver_setup.iarb & 1))
5770                np->script0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
5771        /*
5772        **    If user wants IARB to be set when we win arbitration 
5773        **    and have other jobs, compute the max number of consecutive 
5774        **    settings of IARB hint before we leave devices a chance to 
5775        **    arbitrate for reselection.
5776        */
5777        np->iarb_max = (driver_setup.iarb >> 4);
5778#endif
5779
5780        /*
5781        **      DEL 472 - 53C896 Rev 1 - Part Number 609-0393055 - ITEM 5.
5782        */
5783        if (np->device_id == PCI_DEVICE_ID_NCR_53C896 &&
5784            np->revision_id <= 0x1 && (np->features & FE_NOPM)) {
5785                np->scatter = ncr_scatter_896R1;
5786                np->script0->datai_phase[0] = cpu_to_scr(SCR_JUMP);
5787                np->script0->datai_phase[1] = 
5788                                cpu_to_scr(NCB_SCRIPTH_PHYS (np, tweak_pmj));
5789                np->script0->datao_phase[0] = cpu_to_scr(SCR_JUMP);
5790                np->script0->datao_phase[1] = 
5791                                cpu_to_scr(NCB_SCRIPTH_PHYS (np, tweak_pmj));
5792        }
5793        else
5794#ifdef DEBUG_896R1
5795                np->scatter = ncr_scatter_896R1;
5796#else
5797                np->scatter = ncr_scatter;
5798#endif
5799
5800        /*
5801        **      Reset chip.
5802        **      We should use ncr_soft_reset(), but we donnot want to do 
5803        **      so, since we may not be safe if ABRT interrupt occurs due 
5804        **      to the BIOS or previous O/S having enable this interrupt.
5805        **
5806        **      For C1010 need to set ABRT bit prior to SRST if SCRIPTs
5807        **      are running. Not true in this case.
5808        */
5809        ncr_chip_reset(np);
5810
5811        /*
5812        **      Now check the cache handling of the pci chipset.
5813        */
5814
5815        if (ncr_snooptest (np)) {
5816                printk (KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n");
5817                goto attach_error;
5818        };
5819
5820        /*
5821        **      Install the interrupt handler.
5822        **      If we synchonize the C code with SCRIPTS on interrupt, 
5823        **      we donnot want to share the INTR line at all.
5824        */
5825        if (request_irq(device->slot.irq, sym53c8xx_intr,
5826#ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
5827                        ((driver_setup.irqm & 0x20) ? 0 : SA_INTERRUPT),
5828#else
5829                        ((driver_setup.irqm & 0x10) ? 0 : SA_SHIRQ) |
5830#if LINUX_VERSION_CODE < LinuxVersionCode(2,2,0)
5831                        ((driver_setup.irqm & 0x20) ? 0 : SA_INTERRUPT),
5832#else
5833                        0,
5834#endif
5835#endif
5836                        NAME53C8XX, np)) {
5837                printk(KERN_ERR "%s: request irq %d failure\n",
5838                        ncr_name(np), device->slot.irq);
5839                goto attach_error;
5840        }
5841        np->irq = device->slot.irq;
5842
5843        /*
5844        **      After SCSI devices have been opened, we cannot
5845        **      reset the bus safely, so we do it here.
5846        **      Interrupt handler does the real work.
5847        **      Process the reset exception,
5848        **      if interrupts are not enabled yet.
5849        **      Then enable disconnects.
5850        */
5851        NCR_LOCK_NCB(np, flags);
5852        if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) {
5853                printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np));
5854
5855                NCR_UNLOCK_NCB(np, flags);
5856                goto attach_error;
5857        }
5858        ncr_exception (np);
5859
5860        /*
5861        **      The middle-level SCSI driver does not
5862        **      wait for devices to settle.
5863        **      Wait synchronously if more than 2 seconds.
5864        */
5865        if (driver_setup.settle_delay > 2) {
5866                printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n",
5867                        ncr_name(np), driver_setup.settle_delay);
5868                MDELAY (1000 * driver_setup.settle_delay);
5869        }
5870
5871        /*
5872        **      start the timeout daemon
5873        */
5874        np->lasttime=0;
5875        ncr_timeout (np);
5876
5877        /*
5878        **  use SIMPLE TAG messages by default
5879        */
5880#ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG
5881        np->order = M_SIMPLE_TAG;
5882#endif
5883
5884        /*
5885        **  Done.
5886        */
5887        if (!first_host)
5888                first_host = instance;
5889
5890        /*
5891        **      Fill Linux host instance structure
5892        **      and return success.
5893        */
5894        instance->max_channel   = 0;
5895        instance->this_id       = np->myaddr;
5896        instance->max_id        = np->maxwide ? 16 : 8;
5897        instance->max_lun       = MAX_LUN;
5898#ifndef SCSI_NCR_IOMAPPED
5899#if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,29)
5900        instance->base          = (unsigned long) np->reg;
5901#else
5902        instance->base          = (char *) np->reg;
5903#endif
5904#endif
5905        instance->irq           = np->irq;
5906        instance->unique_id     = np->base_io;
5907        instance->io_port       = np->base_io;
5908        instance->n_io_port     = np->base_ws;
5909        instance->dma_channel   = 0;
5910        instance->cmd_per_lun   = MAX_TAGS;
5911        instance->can_queue     = (MAX_START-4);
5912        scsi_set_pci_device(instance, device->pdev);
5913
5914        np->check_integrity       = 0;
5915
5916#ifdef  SCSI_NCR_INTEGRITY_CHECKING
5917        instance->check_integrity = 0;
5918
5919#ifdef SCSI_NCR_ENABLE_INTEGRITY_CHECK
5920        if ( !(driver_setup.bus_check & 0x04) ) {
5921                np->check_integrity       = 1;
5922                instance->check_integrity = 1;
5923        }
5924#endif
5925#endif
5926        
5927        instance->select_queue_depths = sym53c8xx_select_queue_depths;
5928
5929        NCR_UNLOCK_NCB(np, flags);
5930
5931        /*
5932        **      Now let the generic SCSI driver
5933        **      look for the SCSI devices on the bus ..
5934        */
5935        return 0;
5936
5937attach_error:
5938        if (!instance) return -1;
5939        printk(KERN_INFO "%s: giving up ...\n", ncr_name(np));
5940        if (np)
5941                ncr_free_resources(np);
5942        scsi_unregister(instance);
5943
5944        return -1;
5945 }
5946
5947
5948/*
5949**      Free controller resources.
5950*/
5951static void ncr_free_resources(ncb_p np)
5952{
5953        ccb_p cp;
5954        tcb_p tp;
5955        lcb_p lp;
5956        int target, lun;
5957
5958        if (np->irq)
5959                free_irq(np->irq, np);
5960        if (np->base_io)
5961                release_region(np->base_io, np->base_ws);
5962#ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
5963        if (np->base_va)
5964                unmap_pci_mem(np->base_va, np->base_ws);
5965        if (np->base2_va)
5966                unmap_pci_mem(np->base2_va, np->base2_ws);
5967#endif
5968        if (np->scripth0)
5969                m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
5970        if (np->script0)
5971                m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
5972        if (np->squeue)
5973                m_free_dma(np->squeue, sizeof(ncrcmd)*(MAX_START*2), "SQUEUE");
5974        if (np->dqueue)
5975                m_free_dma(np->dqueue, sizeof(ncrcmd)*(MAX_START*2),"DQUEUE");
5976
5977        while ((cp = np->ccbc) != NULL) {
5978                np->ccbc = cp->link_ccb;
5979                m_free_dma(cp, sizeof(*cp), "CCB");
5980        }
5981
5982        if (np->badluntbl)
5983                m_free_dma(np->badluntbl, 256,"BADLUNTBL");
5984
5985        for (target = 0; target < MAX_TARGET ; target++) {
5986                tp = &np->target[target];
5987                for (lun = 0 ; lun < MAX_LUN ; lun++) {
5988                        lp = ncr_lp(np, tp, lun);
5989                        if (!lp)
5990                                continue;
5991                        if (lp->tasktbl != &lp->tasktbl_0)
5992                                m_free_dma(lp->tasktbl, MAX_TASKS*4, "TASKTBL");
5993                        if (lp->cb_tags)
5994                                m_free(lp->cb_tags, MAX_TAGS, "CB_TAGS");
5995                        m_free_dma(lp, sizeof(*lp), "LCB");
5996                }
5997#if MAX_LUN > 1
5998                if (tp->lmp)
5999                        m_free(tp->lmp, MAX_LUN * sizeof(lcb_p), "LMP");
6000                if (tp->luntbl)
6001                        m_free_dma(tp->luntbl, 256, "LUNTBL");
6002#endif 
6003        }
6004
6005        if (np->targtbl)
6006                m_free_dma(np->targtbl, 256, "TARGTBL");
6007
6008        m_free_dma(np, sizeof(*np), "NCB");
6009}
6010
6011
6012/*==========================================================
6013**
6014**
6015**      Done SCSI commands list management.
6016**
6017**      We donnot enter the scsi_done() callback immediately 
6018**      after a command has been seen as completed but we 
6019**      insert it into a list which is flushed outside any kind 
6020**      of driver critical section.
6021**      This allows to do minimal stuff under interrupt and 
6022**      inside critical sections and to also avoid locking up 
6023**      on recursive calls to driver entry points under SMP.
6024**      In fact, the only kernel point which is entered by the 
6025**      driver with a driver lock set is get_free_pages(GFP_ATOMIC...) 
6026**      that shall not reenter the driver under any circumstance.
6027**
6028**==========================================================
6029*/
6030static inline void ncr_queue_done_cmd(ncb_p np, Scsi_Cmnd *cmd)
6031{
6032        unmap_scsi_data(np, cmd);
6033        cmd->host_scribble = (char *) np->done_list;
6034        np->done_list = cmd;
6035}
6036
6037static inline void ncr_flush_done_cmds(Scsi_Cmnd *lcmd)
6038{
6039        Scsi_Cmnd *cmd;
6040
6041        while (lcmd) {
6042                cmd = lcmd;
6043                lcmd = (Scsi_Cmnd *) cmd->host_scribble;
6044                cmd->scsi_done(cmd);
6045        }
6046}
6047
6048/*==========================================================
6049**
6050**
6051**      Prepare the next negotiation message for integrity check,
6052**      if needed.
6053**
6054**      Fill in the part of message buffer that contains the 
6055**      negotiation and the nego_status field of the CCB.
6056**      Returns the size of the message in bytes.
6057**
6058**      If tp->ppr_negotiation is 1 and a M_REJECT occurs, then
6059**      we disable ppr_negotiation.  If the first ppr_negotiation is
6060**      successful, set this flag to 2.
6061**
6062**==========================================================
6063*/
6064#ifdef  SCSI_NCR_INTEGRITY_CHECKING
6065static int ncr_ic_nego(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd, u_char *msgptr)
6066{
6067        tcb_p tp = &np->target[cp->target];
6068        int msglen = 0;
6069        int nego = 0;
6070        u_char new_width, new_offset, new_period;
6071        u_char no_increase;
6072
6073        if (tp->ppr_negotiation == 1)   /* PPR message successful */
6074                tp->ppr_negotiation = 2;
6075
6076        if (tp->inq_done) {
6077
6078                if (!tp->ic_maximums_set) {
6079                        tp->ic_maximums_set = 1;
6080
6081                        /* 
6082                         * Check against target, host and user limits  
6083                         */
6084                        if ( (tp->inq_byte7 & INQ7_WIDE16) && 
6085                                        np->maxwide  && tp->usrwide) 
6086                                tp->ic_max_width = 1;
6087                        else
6088                                tp->ic_max_width = 0;
6089                        
6090
6091                        if ((tp->inq_byte7 & INQ7_SYNC) && tp->maxoffs)
6092                                tp->ic_min_sync = (tp->minsync < np->minsync) ?
6093                                                        np->minsync : tp->minsync;
6094                        else 
6095                                tp->ic_min_sync = 255;
6096                        
6097                        tp->period   = 1;
6098                        tp->widedone = 1;
6099
6100                        /*
6101                         * Enable PPR negotiation - only if Ultra3 support
6102                         * is accessible.
6103                         */
6104
6105#if 0
6106                        if (tp->ic_max_width && (tp->ic_min_sync != 255 ))
6107                                tp->ppr_negotiation = 1;
6108#endif
6109                        tp->ppr_negotiation = 0;
6110                        if (np->features & FE_ULTRA3) {
6111                            if (tp->ic_max_width && (tp->ic_min_sync == 0x09))
6112                                tp->ppr_negotiation = 1;
6113                        }
6114
6115                        if (!tp->ppr_negotiation)
6116                                cmd->ic_nego &= ~NS_PPR;
6117                }
6118
6119                if (DEBUG_FLAGS & DEBUG_IC) {
6120                        printk("%s: cmd->ic_nego %d, 1st byte 0x%2X\n",
6121                                ncr_name(np), cmd->ic_nego, cmd->cmnd[0]);
6122                }
6123
6124                /* Previous command recorded a parity or an initiator
6125                 * detected error condition. Force bus to narrow for this
6126                 * target. Clear flag. Negotation on request sense.
6127                 * Note: kernel forces 2 bus resets :o( but clears itself out. 
6128                 * Minor bug? in scsi_obsolete.c (ugly)
6129                 */
6130                if (np->check_integ_par) { 
6131                        printk("%s: Parity Error. Target set to narrow.\n",
6132                                ncr_name(np));
6133                        tp->ic_max_width = 0;
6134                        tp->widedone = tp->period = 0;
6135                }
6136
6137                /* Initializing:
6138                 * If ic_nego == NS_PPR, we are in the initial test for
6139                 * PPR messaging support. If driver flag is clear, then
6140                 * either we don't support PPR nego (narrow or async device)
6141                 * or this is the second TUR and we have had a M. REJECT 
6142                 * or unexpected disconnect on the first PPR negotiation.  
6143                 * Do not negotiate, reset nego flags (in case a reset has
6144                 * occurred), clear ic_nego and return.
6145                 * General case: Kernel will clear flag on a fallback. 
6146                 * Do only SDTR or WDTR in the future.
6147                 */
6148                if (!tp->ppr_negotiation &&  (cmd->ic_nego == NS_PPR )) {
6149                        tp->ppr_negotiation = 0;
6150                        cmd->ic_nego &= ~NS_PPR;
6151                        tp->widedone = tp->period = 1;
6152                        return msglen;
6153                }
6154                else if (( tp->ppr_negotiation && !(cmd->ic_nego & NS_PPR )) || 
6155                        (!tp->ppr_negotiation &&  (cmd->ic_nego & NS_PPR )) ) {
6156                        tp->ppr_negotiation = 0;
6157                        cmd->ic_nego &= ~NS_PPR;
6158                }
6159
6160                /*
6161                 * Always check the PPR nego. flag bit if ppr_negotiation
6162                 * is set.  If the ic_nego PPR bit is clear,
6163                 * there must have been a fallback. Do only
6164                 * WDTR / SDTR in the future.
6165                 */
6166                if ((tp->ppr_negotiation) && (!(cmd->ic_nego & NS_PPR)))
6167                        tp->ppr_negotiation = 0;
6168
6169                /* In case of a bus reset, ncr_negotiate will reset 
6170                 * the flags tp->widedone and tp->period to 0, forcing
6171                 * a new negotiation.  Do WDTR then SDTR. If PPR, do both.
6172                 * Do NOT increase the period.  It is possible for the Scsi_Cmnd
6173                 * flags to be set to increase the period when a bus reset 
6174                 * occurs - we don't want to change anything.
6175                 */
6176
6177                no_increase = 0;
6178
6179                if (tp->ppr_negotiation && (!tp->widedone) && (!tp->period) ) {
6180                        cmd->ic_nego = NS_PPR;
6181                        tp->widedone = tp->period = 1;
6182                        no_increase = 1;
6183                }
6184                else if (!tp->widedone) {
6185                        cmd->ic_nego = NS_WIDE;
6186                        tp->widedone = 1;
6187                        no_increase = 1;
6188                }
6189                else if (!tp->period) {
6190                        cmd->ic_nego = NS_SYNC;
6191                        tp->period = 1;
6192                        no_increase = 1;
6193                }
6194
6195                new_width = cmd->ic_nego_width & tp->ic_max_width;
6196
6197                switch (cmd->ic_nego_sync) {
6198                case 2: /* increase the period */
6199                        if (!no_increase) {
6200                            if (tp->ic_min_sync <= 0x09)      
6201                                tp->ic_min_sync = 0x0A;
6202                            else if (tp->ic_min_sync <= 0x0A) 
6203                                tp->ic_min_sync = 0x0C;
6204                            else if (tp->ic_min_sync <= 0x0C) 
6205                                tp->ic_min_sync = 0x19;
6206                            else if (tp->ic_min_sync <= 0x19) 
6207                                tp->ic_min_sync *= 2;
6208                            else  {
6209                                tp->ic_min_sync = 255;
6210                                cmd->ic_nego_sync = 0;
6211                                tp->maxoffs = 0;
6212                            }
6213                        }
6214                        new_period  = tp->maxoffs?tp->ic_min_sync:0;
6215                        new_offset  = tp->maxoffs;
6216                        break;
6217
6218                case 1: /* nego. to maximum */
6219                        new_period  = tp->maxoffs?tp->ic_min_sync:0;
6220                        new_offset  = tp->maxoffs;
6221                        break;
6222
6223                case 0: /* nego to async */
6224                default:
6225                        new_period = 0;
6226                        new_offset = 0;
6227                        break;
6228                };
6229                
6230
6231                nego = NS_NOCHANGE;
6232                if (tp->ppr_negotiation) { 
6233                        u_char options_byte = 0;
6234
6235                        /*
6236                        ** Must make sure data is consistent.
6237                        ** If period is 9 and sync, must be wide and DT bit set.
6238                        ** else period must be larger. If the width is 0, 
6239                        ** reset bus to wide but increase the period to 0x0A.
6240                        ** Note: The strange else clause is due to the integrity check.
6241                        ** If fails at 0x09, wide, the I.C. code will redo at the same
6242                        ** speed but a narrow bus. The driver must take care of slowing
6243                        ** the bus speed down.
6244                        **
6245                        ** The maximum offset in ST mode is 31, in DT mode 62 (1010/1010_66 only)
6246                        */
6247                        if ( (new_period==0x09) && new_offset) {
6248                                if (new_width) 
6249                                        options_byte = 0x02;
6250                                else {
6251                                        tp->ic_min_sync = 0x0A;
6252                                        new_period = 0x0A;
6253                                        cmd->ic_nego_width = 1;
6254                                        new_width = 1;
6255                                }
6256                        }
6257                        if (!options_byte && new_offset > np->maxoffs_st)
6258                                new_offset = np->maxoffs_st;
6259
6260                        nego = NS_PPR;
6261                        
6262                        msgptr[msglen++] = M_EXTENDED;
6263                        msgptr[msglen++] = 6;
6264                        msgptr[msglen++] = M_X_PPR_REQ;
6265                        msgptr[msglen++] = new_period;
6266                        msgptr[msglen++] = 0;
6267                        msgptr[msglen++] = new_offset;
6268                        msgptr[msglen++] = new_width;
6269                        msgptr[msglen++] = options_byte;
6270
6271                }
6272                else {
6273                        switch (cmd->ic_nego & ~NS_PPR) {
6274                        case NS_WIDE:
6275                            /*
6276                            **  WDTR negotiation on if device supports
6277                            **  wide or if wide device forced narrow
6278                            **  due to a parity error. 
6279                            */
6280
6281                            cmd->ic_nego_width &= tp->ic_max_width;
6282
6283                            if (tp->ic_max_width | np->check_integ_par) {
6284                                nego = NS_WIDE;
6285                                msgptr[msglen++] = M_EXTENDED;
6286                                msgptr[msglen++] = 2;
6287                                msgptr[msglen++] = M_X_WIDE_REQ;
6288                                msgptr[msglen++] = new_width;
6289                            }
6290                            break;
6291
6292                        case NS_SYNC:
6293                            /*
6294                            **  negotiate synchronous transfers
6295                            **  Target must support sync transfers.
6296                            **  Min. period = 0x0A, maximum offset of 31=0x1f.
6297                            */
6298
6299                            if (tp->inq_byte7 & INQ7_SYNC) {
6300
6301                                if (new_offset && (new_period < 0x0A)) {
6302                                        tp->ic_min_sync = 0x0A;
6303                                        new_period = 0x0A;
6304                                }
6305                                if (new_offset > np->maxoffs_st)
6306                                        new_offset = np->maxoffs_st;
6307                                nego = NS_SYNC;
6308                                msgptr[msglen++] = M_EXTENDED;
6309                                msgptr[msglen++] = 3;
6310                                msgptr[msglen++] = M_X_SYNC_REQ;
6311                                msgptr[msglen++] = new_period;
6312                                msgptr[msglen++] = new_offset;
6313                            }
6314                            else 
6315                                cmd->ic_nego_sync = 0;
6316                            break;
6317
6318                        case NS_NOCHANGE:
6319                            break;
6320                        }
6321                }
6322
6323        };
6324
6325        cp->nego_status = nego;
6326        np->check_integ_par = 0;
6327
6328        if (nego) {
6329                tp->nego_cp = cp;
6330                if (DEBUG_FLAGS & DEBUG_NEGO) {
6331                        ncr_print_msg(cp, nego == NS_WIDE ?
6332                                  "wide/narrow msgout":
6333                                (nego == NS_SYNC ? "sync/async msgout" : "ppr msgout"), 
6334                                msgptr);
6335                };
6336        };
6337
6338        return msglen;
6339}
6340#endif  /* SCSI_NCR_INTEGRITY_CHECKING */
6341
6342/*==========================================================
6343**
6344**
6345**      Prepare the next negotiation message if needed.
6346**
6347**      Fill in the part of message buffer that contains the 
6348**      negotiation and the nego_status field of the CCB.
6349**      Returns the size of the message in bytes.
6350**
6351**
6352**==========================================================
6353*/
6354
6355
6356static int ncr_prepare_nego(ncb_p np, ccb_p cp, u_char *msgptr)
6357{
6358        tcb_p tp = &np->target[cp->target];
6359        int msglen = 0;
6360        int nego = 0;
6361        u_char width, offset, factor, last_byte;
6362
6363        if (!np->check_integrity) {
6364                /* If integrity checking disabled, enable PPR messaging
6365                 * if device supports wide, sync and ultra 3
6366                 */
6367                if (tp->ppr_negotiation == 1) /* PPR message successful */
6368                        tp->ppr_negotiation = 2;
6369
6370                if ((tp->inq_done) && (!tp->ic_maximums_set)) {
6371                        tp->ic_maximums_set = 1;
6372
6373                        /*
6374                         * Issue PPR only if board is capable
6375                         * and set-up for Ultra3 transfers.
6376                         */
6377                        tp->ppr_negotiation = 0;
6378                        if ( (np->features & FE_ULTRA3) &&
6379                                (tp->usrwide) && (tp->maxoffs) &&
6380                                (tp->minsync == 0x09) )
6381                                        tp->ppr_negotiation = 1;
6382                }
6383        }
6384
6385        if (tp->inq_done) {
6386                /*
6387                 * Get the current width, offset and period
6388                 */
6389                ncr_get_xfer_info( np, tp, &factor,
6390                                                &offset, &width);
6391
6392                /*
6393                **      negotiate wide transfers ?
6394                */
6395
6396                if (!tp->widedone) {
6397                        if (tp->inq_byte7 & INQ7_WIDE16) {
6398                                if (tp->ppr_negotiation)
6399                                        nego = NS_PPR;
6400                                else
6401                                        nego = NS_WIDE;
6402
6403                                width = tp->usrwide;
6404#ifdef  SCSI_NCR_INTEGRITY_CHECKING
6405                                if (tp->ic_done)
6406                                         width &= tp->ic_max_width;
6407#endif
6408                        } else
6409                                tp->widedone=1;
6410
6411                };
6412
6413                /*
6414                **      negotiate synchronous transfers?
6415                */
6416
6417                if ((nego != NS_WIDE) && !tp->period) {
6418                        if (tp->inq_byte7 & INQ7_SYNC) {
6419                                if (tp->ppr_negotiation)
6420                                        nego = NS_PPR;
6421                                else
6422                                        nego = NS_SYNC;
6423                                
6424                                /* Check for async flag */
6425                                if (tp->maxoffs == 0) {
6426                                    offset = 0;
6427                                    factor = 0;
6428                                }
6429                                else {
6430                                    offset = tp->maxoffs;
6431                                    factor = tp->minsync;
6432#ifdef  SCSI_NCR_INTEGRITY_CHECKING
6433                                    if ((tp->ic_done) && 
6434                                                (factor < tp->ic_min_sync))
6435                                         factor = tp->ic_min_sync;
6436#endif
6437                                }
6438
6439                        } else {
6440                                offset = 0;
6441                                factor = 0;
6442                                tp->period  =0xffff;
6443                                PRINT_TARGET(np, cp->target);
6444                                printk ("target did not report SYNC.\n");
6445                        };
6446                };
6447        };
6448
6449        switch (nego) {
6450        case NS_PPR:
6451                /*
6452                ** Must make sure data is consistent.
6453                ** If period is 9 and sync, must be wide and DT bit set
6454                ** else period must be larger. 
6455                ** Maximum offset is 31=0x1f is ST mode, 62 if DT mode
6456                */
6457                last_byte = 0;
6458                if ( (factor==9) && offset) {
6459                        if (!width) {
6460                                factor = 0x0A;
6461                        }
6462                        else 
6463                                last_byte = 0x02;
6464                }
6465                if (!last_byte && offset > np->maxoffs_st)
6466                        offset = np->maxoffs_st;
6467
6468                msgptr[msglen++] = M_EXTENDED;
6469                msgptr[msglen++] = 6;
6470                msgptr[msglen++] = M_X_PPR_REQ;
6471                msgptr[msglen++] = factor;
6472                msgptr[msglen++] = 0;
6473                msgptr[msglen++] = offset;
6474                msgptr[msglen++] = width;
6475                msgptr[msglen++] = last_byte;
6476                break;
6477        case NS_SYNC:
6478                /*
6479                ** Never negotiate faster than Ultra 2 (25ns periods)
6480                */
6481                if (offset && (factor < 0x0A)) {
6482                        factor = 0x0A;
6483                        tp->minsync = 0x0A;
6484                }
6485                if (offset > np->maxoffs_st)
6486                        offset = np->maxoffs_st;
6487
6488                msgptr[msglen++] = M_EXTENDED;
6489                msgptr[msglen++] = 3;
6490                msgptr[msglen++] = M_X_SYNC_REQ;
6491                msgptr[msglen++] = factor;
6492                msgptr[msglen++] = offset;
6493                break;
6494        case NS_WIDE:
6495                msgptr[msglen++] = M_EXTENDED;
6496                msgptr[msglen++] = 2;
6497                msgptr[msglen++] = M_X_WIDE_REQ;
6498                msgptr[msglen++] = width;
6499                break;
6500        };
6501
6502        cp->nego_status = nego;
6503
6504        if (nego) {
6505                tp->nego_cp = cp;
6506                if (DEBUG_FLAGS & DEBUG_NEGO) {
6507                        ncr_print_msg(cp, nego == NS_WIDE ?
6508                                  "wide msgout":
6509                                (nego == NS_SYNC ? "sync msgout" : "ppr msgout"), 
6510                                msgptr);
6511                };
6512        };
6513
6514        return msglen;
6515}
6516
6517/*==========================================================
6518**
6519**
6520**      Start execution of a SCSI command.
6521**      This is called from the generic SCSI driver.
6522**
6523**
6524**==========================================================
6525*/
6526static int ncr_queue_command (ncb_p np, Scsi_Cmnd *cmd)
6527{
6528/*      Scsi_Device        *device    = cmd->device; */
6529        tcb_p tp                      = &np->target[cmd->target];
6530        lcb_p lp                      = ncr_lp(np, tp, cmd->lun);
6531        ccb_p cp;
6532
6533        u_char  idmsg, *msgptr;
6534        u_int   msglen;
6535        int     direction;
6536        u_int32 lastp, goalp;
6537
6538        /*---------------------------------------------
6539        **
6540        **      Some shortcuts ...
6541        **
6542        **---------------------------------------------
6543        */
6544        if ((cmd->target == np->myaddr    ) ||
6545                (cmd->target >= MAX_TARGET) ||
6546                (cmd->lun    >= MAX_LUN   )) {
6547                return(DID_BAD_TARGET);
6548        }
6549
6550        /*---------------------------------------------
6551        **
6552        **      Complete the 1st TEST UNIT READY command
6553        **      with error condition if the device is 
6554        **      flagged NOSCAN, in order to speed up 
6555        **      the boot.
6556        **
6557        **---------------------------------------------
6558        */
6559        if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) && 
6560            (tp->usrflag & UF_NOSCAN)) {
6561                tp->usrflag &= ~UF_NOSCAN;
6562                return DID_BAD_TARGET;
6563        }
6564
6565        if (DEBUG_FLAGS & DEBUG_TINY) {
6566                PRINT_ADDR(cmd);
6567                printk ("CMD=%x ", cmd->cmnd[0]);
6568        }
6569
6570        /*---------------------------------------------------
6571        **
6572        **      Assign a ccb / bind cmd.
6573        **      If resetting, shorten settle_time if necessary
6574        **      in order to avoid spurious timeouts.
6575        **      If resetting or no free ccb,
6576        **      insert cmd into the waiting list.
6577        **
6578        **----------------------------------------------------
6579        */
6580        if (np->settle_time && cmd->timeout_per_command >= HZ) {
6581                u_long tlimit = ktime_get(cmd->timeout_per_command - HZ);
6582                if (ktime_dif(np->settle_time, tlimit) > 0)
6583                        np->settle_time = tlimit;
6584        }
6585
6586        if (np->settle_time || !(cp=ncr_get_ccb (np, cmd->target, cmd->lun))) {
6587                insert_into_waiting_list(np, cmd);
6588                return(DID_OK);
6589        }
6590        cp->cmd = cmd;
6591
6592        /*---------------------------------------------------
6593        **
6594        **      Enable tagged queue if asked by scsi ioctl
6595        **
6596        **----------------------------------------------------
6597        */
6598#if 0   /* This stuff was only useful for linux-1.2.13 */
6599        if (lp && !lp->numtags && cmd->device && cmd->device->tagged_queue) {
6600                lp->numtags = tp->usrtags;
6601                ncr_setup_tags (np, cp->target, cp->lun);
6602        }
6603#endif
6604
6605        /*----------------------------------------------------
6606        **
6607        **      Build the identify / tag / sdtr message
6608        **
6609        **----------------------------------------------------
6610        */
6611
6612        idmsg = M_IDENTIFY | cp->lun;
6613
6614        if (cp ->tag != NO_TAG || (lp && !(tp->usrflag & UF_NODISC)))
6615                idmsg |= 0x40;
6616
6617        msgptr = cp->scsi_smsg;
6618        msglen = 0;
6619        msgptr[msglen++] = idmsg;
6620
6621        if (cp->tag != NO_TAG) {
6622                char order = np->order;
6623
6624                /*
6625                **      Force ordered tag if necessary to avoid timeouts 
6626                **      and to preserve interactivity.
6627                */
6628                if (lp && ktime_exp(lp->tags_stime)) {
6629                        lp->tags_si = !(lp->tags_si);
6630                        if (lp->tags_sum[lp->tags_si]) {
6631                                order = M_ORDERED_TAG;
6632                                if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>0){ 
6633                                        PRINT_ADDR(cmd);
6634                                        printk("ordered tag forced.\n");
6635                                }
6636                        }
6637                        lp->tags_stime = ktime_get(3*HZ);
6638                }
6639
6640                if (order == 0) {
6641                        /*
6642                        **      Ordered write ops, unordered read ops.
6643                        */
6644                        switch (cmd->cmnd[0]) {
6645                        case 0x08:  /* READ_SMALL (6) */
6646                        case 0x28:  /* READ_BIG  (10) */
6647                        case 0xa8:  /* READ_HUGE (12) */
6648                                order = M_SIMPLE_TAG;
6649                                break;
6650                        default:
6651                                order = M_ORDERED_TAG;
6652                        }
6653                }
6654                msgptr[msglen++] = order;
6655                /*
6656                **      For less than 128 tags, actual tags are numbered 
6657                **      1,3,5,..2*MAXTAGS+1,since we may have to deal 
6658                **      with devices that have problems with #TAG 0 or too 
6659                **      great #TAG numbers. For more tags (up to 256), 
6660                **      we use directly our tag number.
6661                */
6662#if MAX_TASKS > (512/4)
6663                msgptr[msglen++] = cp->tag;
6664#else
6665                msgptr[msglen++] = (cp->tag << 1) + 1;
6666#endif
6667        }
6668
6669        cp->host_flags  = 0;
6670
6671        /*----------------------------------------------------
6672        **
6673        **      Build the data descriptors
6674        **
6675        **----------------------------------------------------
6676        */
6677
6678        direction = scsi_data_direction(cmd);
6679        if (direction != SCSI_DATA_NONE) {
6680                cp->segments = np->scatter (np, cp, cp->cmd);
6681                if (cp->segments < 0) {
6682                        ncr_free_ccb(np, cp);
6683                        return(DID_ERROR);
6684                }
6685        }
6686        else {
6687                cp->data_len = 0;
6688                cp->segments = 0;
6689        }
6690
6691        /*---------------------------------------------------
6692        **
6693        **      negotiation required?
6694        **
6695        **      (nego_status is filled by ncr_prepare_nego())
6696        **
6697        **---------------------------------------------------
6698        */
6699
6700        cp->nego_status = 0;
6701
6702#ifdef  SCSI_NCR_INTEGRITY_CHECKING
6703        if ((np->check_integrity && tp->ic_done) || !np->check_integrity) {
6704                 if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) {
6705                        msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
6706                 }
6707        }
6708        else if (np->check_integrity && (cmd->ic_in_progress)) { 
6709                msglen += ncr_ic_nego (np, cp, cmd, msgptr + msglen);
6710        }
6711        else if (np->check_integrity && cmd->ic_complete) {
6712                u_long current_period;
6713                u_char current_offset, current_width, current_factor;
6714
6715                ncr_get_xfer_info (np, tp, &current_factor,
6716                                        &current_offset, &current_width);
6717
6718                tp->ic_max_width = current_width;
6719                tp->ic_min_sync  = current_factor;
6720
6721                if      (current_factor == 9)   current_period = 125;
6722                else if (current_factor == 10)  current_period = 250;
6723                else if (current_factor == 11)  current_period = 303;
6724                else if (current_factor == 12)  current_period = 500;
6725                else                    current_period = current_factor * 40;
6726
6727                /*
6728                 * Negotiation for this target is complete. Update flags.
6729                 */
6730                tp->period = current_period;
6731                tp->widedone = 1;
6732                tp->ic_done = 1;
6733
6734                printk("%s: Integrity Check Complete: \n", ncr_name(np)); 
6735
6736                printk("%s: %s %s SCSI", ncr_name(np), 
6737                                current_offset?"SYNC":"ASYNC",
6738                                tp->ic_max_width?"WIDE":"NARROW");
6739                if (current_offset) {
6740                        u_long mbs = 10000 * (tp->ic_max_width + 1); 
6741
6742                        printk(" %d.%d  MB/s", 
6743                                (int) (mbs / current_period), (int) (mbs % current_period));
6744
6745                        printk(" (%d ns, %d offset)\n", 
6746                                  (int) current_period/10, current_offset);
6747                }
6748                else 
6749                        printk(" %d MB/s. \n ", (tp->ic_max_width+1)*5);
6750        }
6751#else
6752        if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) {
6753                msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
6754        }
6755#endif  /* SCSI_NCR_INTEGRITY_CHECKING */
6756
6757
6758        /*----------------------------------------------------
6759        **
6760        **      Determine xfer direction.
6761        **
6762        **----------------------------------------------------
6763        */
6764        if (!cp->data_len)
6765                direction = SCSI_DATA_NONE;
6766
6767        /*
6768        **      If data direction is UNKNOWN, speculate DATA_READ 
6769        **      but prepare alternate pointers for WRITE in case 
6770        **      of our speculation will be just wrong.
6771        **      SCRIPTS will swap values if needed.
6772        */
6773        switch(direction) {
6774        case SCSI_DATA_UNKNOWN:
6775        case SCSI_DATA_WRITE:
6776                goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8;
6777                lastp = goalp - 8 - (cp->segments * (SCR_SG_SIZE*4));
6778                if (direction != SCSI_DATA_UNKNOWN)
6779                        break;
6780                cp->phys.header.wgoalp  = cpu_to_scr(goalp);
6781                cp->phys.header.wlastp  = cpu_to_scr(lastp);
6782                /* fall through */
6783        case SCSI_DATA_READ:
6784                cp->host_flags |= HF_DATA_IN;
6785                goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8;
6786                lastp = goalp - 8 - (cp->segments * (SCR_SG_SIZE*4));
6787                break;
6788        default:
6789        case SCSI_DATA_NONE:
6790                lastp = goalp = NCB_SCRIPTH_PHYS (np, no_data);
6791                break;
6792        }
6793
6794        /*
6795        **      Set all pointers values needed by SCRIPTS.
6796        **      If direction is unknown, start at data_io.
6797        */
6798        cp->phys.header.lastp = cpu_to_scr(lastp);
6799        cp->phys.header.goalp = cpu_to_scr(goalp);
6800
6801        if (direction == SCSI_DATA_UNKNOWN)
6802                cp->phys.header.savep = 
6803                        cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io));
6804        else
6805                cp->phys.header.savep= cpu_to_scr(lastp);
6806
6807        /*
6808        **      Save the initial data pointer in order to be able 
6809        **      to redo the command.
6810        **      We also have to save the initial lastp, since it 
6811        **      will be changed to DATA_IO if we don't know the data 
6812        **      direction and the device completes the command with 
6813        **      QUEUE FULL status (without entering the data phase).
6814        */
6815        cp->startp = cp->phys.header.savep;
6816        cp->lastp0 = cp->phys.header.lastp;
6817
6818        /*----------------------------------------------------
6819        **
6820        **      fill in ccb
6821        **
6822        **----------------------------------------------------
6823        **
6824        **
6825        **      physical -> virtual backlink
6826        **      Generic SCSI command
6827        */
6828
6829        /*
6830        **      Startqueue
6831        */
6832        cp->phys.header.go.start   = cpu_to_scr(NCB_SCRIPT_PHYS (np,select));
6833        cp->phys.header.go.restart = cpu_to_scr(NCB_SCRIPT_PHYS (np,resel_dsa));
6834        /*
6835        **      select
6836        */
6837        cp->phys.select.sel_id          = cp->target;
6838        cp->phys.select.sel_scntl3      = tp->wval;
6839        cp->phys.select.sel_sxfer       = tp->sval;
6840        cp->phys.select.sel_scntl4      = tp->uval;
6841        /*
6842        **      message
6843        */
6844        cp->phys.smsg.addr      = cpu_to_scr(CCB_PHYS (cp, scsi_smsg));
6845        cp->phys.smsg.size      = cpu_to_scr(msglen);
6846
6847        /*
6848        **      command
6849        */
6850        memcpy(cp->cdb_buf, cmd->cmnd, MIN(cmd->cmd_len, sizeof(cp->cdb_buf)));
6851        cp->phys.cmd.addr       = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0]));
6852        cp->phys.cmd.size       = cpu_to_scr(cmd->cmd_len);
6853
6854        /*
6855        **      status
6856        */
6857        cp->actualquirks        = tp->quirks;
6858        cp->host_status         = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
6859        cp->scsi_status         = S_ILLEGAL;
6860        cp->xerr_status         = 0;
6861        cp->extra_bytes         = 0;
6862
6863        /*
6864        **      extreme data pointer.
6865        **      shall be positive, so -1 is lower than lowest.:)
6866        */
6867        cp->ext_sg  = -1;
6868        cp->ext_ofs = 0;
6869
6870        /*----------------------------------------------------
6871        **
6872        **      Critical region: start this job.
6873        **
6874        **----------------------------------------------------
6875        */
6876
6877        /*
6878        **      activate this job.
6879        */
6880
6881        /*
6882        **      insert next CCBs into start queue.
6883        **      2 max at a time is enough to flush the CCB wait queue.
6884        */
6885        if (lp)
6886                ncr_start_next_ccb(np, lp, 2);
6887        else
6888                ncr_put_start_queue(np, cp);
6889
6890        /*
6891        **      Command is successfully queued.
6892        */
6893
6894        return(DID_OK);
6895}
6896
6897
6898/*==========================================================
6899**
6900**
6901**      Insert a CCB into the start queue and wake up the 
6902**      SCRIPTS processor.
6903**
6904**
6905**==========================================================
6906*/
6907
6908static void ncr_start_next_ccb(ncb_p np, lcb_p lp, int maxn)
6909{
6910        XPT_QUEHEAD *qp;
6911        ccb_p cp;
6912
6913        while (maxn-- && lp->queuedccbs < lp->queuedepth) {
6914                qp = xpt_remque_head(&lp->wait_ccbq);
6915                if (!qp)
6916                        break;
6917                ++lp->queuedccbs;
6918                cp = xpt_que_entry(qp, struct ccb, link_ccbq);
6919                xpt_insque_tail(qp, &lp->busy_ccbq);
6920                lp->tasktbl[cp->tag == NO_TAG ? 0 : cp->tag] =
6921                        cpu_to_scr(cp->p_ccb);
6922                ncr_put_start_queue(np, cp);
6923        }
6924}
6925
6926static void ncr_put_start_queue(ncb_p np, ccb_p cp)
6927{
6928        u_short qidx;
6929
6930#ifdef SCSI_NCR_IARB_SUPPORT
6931        /*
6932        **      If the previously queued CCB is not yet done, 
6933        **      set the IARB hint. The SCRIPTS will go with IARB 
6934        **      for this job when starting the previous one.
6935        **      We leave devices a chance to win arbitration by 
6936        **      not using more than 'iarb_max' consecutive 
6937        **      immediate arbitrations.
6938        */
6939        if (np->last_cp && np->iarb_count < np->iarb_max) {
6940                np->last_cp->host_flags |= HF_HINT_IARB;
6941                ++np->iarb_count;
6942        }
6943        else
6944                np->iarb_count = 0;
6945        np->last_cp = cp;
6946#endif
6947        
6948        /*
6949        **      insert into start queue.
6950        */
6951        qidx = np->squeueput + 2;
6952        if (qidx >= MAX_START*2) qidx = 0;
6953
6954        np->squeue [qidx]          = cpu_to_scr(np->p_idletask);
6955        MEMORY_BARRIER();
6956        np->squeue [np->squeueput] = cpu_to_scr(cp->p_ccb);
6957
6958        np->squeueput = qidx;
6959        cp->queued = 1;
6960
6961        if (DEBUG_FLAGS & DEBUG_QUEUE)
6962                printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput);
6963
6964        /*
6965        **      Script processor may be waiting for reselect.
6966        **      Wake it up.
6967        */
6968        MEMORY_BARRIER();
6969        OUTB (nc_istat, SIGP|np->istat_sem);
6970}
6971
6972
6973/*==========================================================
6974**
6975**      Soft reset the chip.
6976**
6977**      Some 896 and 876 chip revisions may hang-up if we set 
6978**      the SRST (soft reset) bit at the wrong time when SCRIPTS 
6979**      are running.
6980**      So, we need to abort the current operation prior to 
6981**      soft resetting the chip.
6982**
6983**==========================================================
6984*/
6985
6986static void ncr_chip_reset (ncb_p np)
6987{
6988        OUTB (nc_istat, SRST);
6989        UDELAY (10);
6990        OUTB (nc_istat, 0);
6991}
6992
6993static void ncr_soft_reset(ncb_p np)
6994{
6995        u_char istat;
6996        int i;
6997
6998        if (!(np->features & FE_ISTAT1) || !(INB (nc_istat1) & SRUN))
6999                goto do_chip_reset;
7000
7001        OUTB (nc_istat, CABRT);
7002        for (i = 100000 ; i ; --i) {
7003                istat = INB (nc_istat);
7004                if (istat & SIP) {
7005                        INW (nc_sist);
7006                }
7007                else if (istat & DIP) {
7008                        if (INB (nc_dstat) & ABRT)
7009                                break;
7010                }
7011                UDELAY(5);
7012        }
7013        OUTB (nc_istat, 0);
7014        if (!i)
7015                printk("%s: unable to abort current chip operation, "
7016                       "ISTAT=0x%02x.\n", ncr_name(np), istat);
7017do_chip_reset:
7018        ncr_chip_reset(np);
7019}
7020
7021/*==========================================================
7022**
7023**
7024**      Start reset process.
7025**      The interrupt handler will reinitialize the chip.
7026**      The timeout handler will wait for settle_time before 
7027**      clearing it and so resuming command processing.
7028**
7029**
7030**==========================================================
7031*/
7032static void ncr_start_reset(ncb_p np)
7033{
7034        (void) ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay);
7035}
7036 
7037static int ncr_reset_scsi_bus(ncb_p np, int enab_int, int settle_delay)
7038{
7039        u_int32 term;
7040        int retv = 0;
7041
7042        np->settle_time = ktime_get(settle_delay * HZ);
7043
7044        if (bootverbose > 1)
7045                printk("%s: resetting, "
7046                        "command processing suspended for %d seconds\n",
7047                        ncr_name(np), settle_delay);
7048
7049        ncr_soft_reset(np);     /* Soft reset the chip */
7050        UDELAY (2000);  /* The 895/6 need time for the bus mode to settle */
7051        if (enab_int)
7052                OUTW (nc_sien, RST);
7053        /*
7054        **      Enable Tolerant, reset IRQD if present and 
7055        **      properly set IRQ mode, prior to resetting the bus.
7056        */
7057        OUTB (nc_stest3, TE);
7058        OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
7059        OUTB (nc_scntl1, CRST);
7060        UDELAY (200);
7061
7062        if (!driver_setup.bus_check)
7063                goto out;
7064        /*
7065        **      Check for no terminators or SCSI bus shorts to ground.
7066        **      Read SCSI data bus, data parity bits and control signals.
7067        **      We are expecting RESET to be TRUE and other signals to be 
7068        **      FALSE.
7069        */
7070        term =  INB(nc_sstat0);
7071        term =  ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
7072        term |= ((INB(nc_sstat2) & 0x01) << 26) |       /* sdp1     */
7073                ((INW(nc_sbdl) & 0xff)   << 9)  |       /* d7-0     */
7074                ((INW(nc_sbdl) & 0xff00) << 10) |       /* d15-8    */
7075                INB(nc_sbcl);   /* req ack bsy sel atn msg cd io    */
7076
7077        if (!(np->features & FE_WIDE))
7078                term &= 0x3ffff;
7079
7080        if (term != (2<<7)) {
7081                printk("%s: suspicious SCSI data while resetting the BUS.\n",
7082                        ncr_name(np));
7083                printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
7084                        "0x%lx, expecting 0x%lx\n",
7085                        ncr_name(np),
7086                        (np->features & FE_WIDE) ? "dp1,d15-8," : "",
7087                        (u_long)term, (u_long)(2<<7));
7088                if (driver_setup.bus_check == 1)
7089                        retv = 1;
7090        }
7091out:
7092        OUTB (nc_scntl1, 0);
7093        return retv;
7094}
7095
7096/*==========================================================
7097**
7098**
7099**      Reset the SCSI BUS.
7100**      This is called from the generic SCSI driver.
7101**
7102**
7103**==========================================================
7104*/
7105static int ncr_reset_bus (ncb_p np, Scsi_Cmnd *cmd, int sync_reset)
7106{
7107/*      Scsi_Device        *device    = cmd->device; */
7108        ccb_p cp;
7109        int found;
7110
7111/*
7112 * Return immediately if reset is in progress.
7113 */
7114        if (np->settle_time) {
7115                return SCSI_RESET_PUNT;
7116        }
7117/*
7118 * Start the reset process.
7119 * The script processor is then assumed to be stopped.
7120 * Commands will now be queued in the waiting list until a settle 
7121 * delay of 2 seconds will be completed.
7122 */
7123        ncr_start_reset(np);
7124/*
7125 * First, look in the wakeup list
7126 */
7127        for (found=0, cp=np->ccbc; cp; cp=cp->link_ccb) {
7128                /*
7129                **      look for the ccb of this command.
7130                */
7131                if (cp->host_status == HS_IDLE) continue;
7132                if (cp->cmd == cmd) {
7133                        found = 1;
7134                        break;
7135                }
7136        }
7137/*
7138 * Then, look in the waiting list
7139 */
7140        if (!found && retrieve_from_waiting_list(0, np, cmd))
7141                found = 1;
7142/*
7143 * Wake-up all awaiting commands with DID_RESET.
7144 */
7145        reset_waiting_list(np);
7146/*
7147 * Wake-up all pending commands with HS_RESET -> DID_RESET.
7148 */
7149        ncr_wakeup(np, HS_RESET);
7150/*
7151 * If the involved command was not in a driver queue, and the 
7152 * scsi driver told us reset is synchronous, and the command is not 
7153 * currently in the waiting list, complete it with DID_RESET status,
7154 * in order to keep it alive.
7155 */
7156        if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) {
7157                SetScsiResult(cmd, DID_RESET, 0);
7158                ncr_queue_done_cmd(np, cmd);
7159        }
7160
7161        return SCSI_RESET_SUCCESS;
7162}
7163
7164/*==========================================================
7165**
7166**
7167**      Abort an SCSI command.
7168**      This is called from the generic SCSI driver.
7169**
7170**
7171**==========================================================
7172*/
7173static int ncr_abort_command (ncb_p np, Scsi_Cmnd *cmd)
7174{
7175/*      Scsi_Device        *device    = cmd->device; */
7176        ccb_p cp;
7177
7178/*
7179 * First, look for the scsi command in the waiting list
7180 */
7181        if (remove_from_waiting_list(np, cmd)) {
7182                SetScsiAbortResult(cmd);
7183                ncr_queue_done_cmd(np, cmd);
7184                return SCSI_ABORT_SUCCESS;
7185        }
7186
7187/*
7188 * Then, look in the wakeup list
7189 */
7190        for (cp=np->ccbc; cp; cp=cp->link_ccb) {
7191                /*
7192                **      look for the ccb of this command.
7193                */
7194                if (cp->host_status == HS_IDLE) continue;
7195                if (cp->cmd == cmd)
7196                        break;
7197        }
7198
7199        if (!cp) {
7200                return SCSI_ABORT_NOT_RUNNING;
7201        }
7202
7203        /*
7204        **      Keep track we have to abort this job.
7205        */
7206        cp->to_abort = 1;
7207
7208        /*
7209        **      Tell the SCRIPTS processor to stop 
7210        **      and synchronize with us.
7211        */
7212        np->istat_sem = SEM;
7213
7214        /*
7215        **      If there are no requests, the script
7216        **      processor will sleep on SEL_WAIT_RESEL.
7217        **      Let's wake it up, since it may have to work.
7218        */
7219        OUTB (nc_istat, SIGP|SEM);
7220
7221        /*
7222        **      Tell user we are working for him.
7223        */
7224        return SCSI_ABORT_PENDING;
7225}
7226
7227/*==========================================================
7228**
7229**      Linux release module stuff.
7230**
7231**      Called before unloading the module
7232**      Detach the host.
7233**      We have to free resources and halt the NCR chip
7234**
7235**==========================================================
7236*/
7237
7238#ifdef MODULE
7239static int ncr_detach(ncb_p np)
7240{
7241        int i;
7242
7243        printk("%s: detaching ...\n", ncr_name(np));
7244
7245/*
7246**      Stop the ncr_timeout process
7247**      Set release_stage to 1 and wait that ncr_timeout() set it to 2.
7248*/
7249        np->release_stage = 1;
7250        for (i = 50 ; i && np->release_stage != 2 ; i--) MDELAY (100);
7251        if (np->release_stage != 2)
7252                printk("%s: the timer seems to be already stopped\n",
7253                        ncr_name(np));
7254        else np->release_stage = 2;
7255
7256/*
7257**      Reset NCR chip.
7258**      We should use ncr_soft_reset(), but we donnot want to do 
7259**      so, since we may not be safe if interrupts occur.
7260*/
7261
7262        printk("%s: resetting chip\n", ncr_name(np));
7263        ncr_chip_reset(np);
7264
7265/*
7266**      Restore bios setting for automatic clock detection.
7267*/
7268        OUTB(nc_dmode,  np->sv_dmode);
7269        OUTB(nc_dcntl,  np->sv_dcntl);
7270        OUTB(nc_ctest3, np->sv_ctest3);
7271        OUTB(nc_ctest4, np->sv_ctest4);
7272        OUTB(nc_ctest5, np->sv_ctest5);
7273        OUTB(nc_gpcntl, np->sv_gpcntl);
7274        OUTB(nc_stest2, np->sv_stest2);
7275
7276        ncr_selectclock(np, np->sv_scntl3);
7277/*
7278**      Free host resources
7279*/
7280        ncr_free_resources(np);
7281
7282        return 1;
7283}
7284#endif
7285
7286/*==========================================================
7287**
7288**
7289**      Complete execution of a SCSI command.
7290**      Signal completion to the generic SCSI driver.
7291**
7292**
7293**==========================================================
7294*/
7295
7296void ncr_complete (ncb_p np, ccb_p cp)
7297{
7298        Scsi_Cmnd *cmd;
7299        tcb_p tp;
7300        lcb_p lp;
7301
7302        /*
7303        **      Sanity check
7304        */
7305        if (!cp || !cp->cmd)
7306                return;
7307
7308        /*
7309        **      Print some debugging info.
7310        */
7311
7312        if (DEBUG_FLAGS & DEBUG_TINY)
7313                printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp,
7314                        cp->host_status,cp->scsi_status);
7315
7316        /*
7317        **      Get command, target and lun pointers.
7318        */
7319
7320        cmd = cp->cmd;
7321        cp->cmd = NULL;
7322        tp = &np->target[cp->target];
7323        lp = ncr_lp(np, tp, cp->lun);
7324
7325        /*
7326        **      We donnot queue more than 1 ccb per target 
7327        **      with negotiation at any time. If this ccb was 
7328        **      used for negotiation, clear this info in the tcb.
7329        */
7330
7331        if (cp == tp->nego_cp)
7332                tp->nego_cp = 0;
7333
7334#ifdef SCSI_NCR_IARB_SUPPORT
7335        /*
7336        **      We just complete the last queued CCB.
7337        **      Clear this info that is no more relevant.
7338        */
7339        if (cp == np->last_cp)
7340                np->last_cp = 0;
7341#endif
7342
7343        /*
7344        **      If auto-sense performed, change scsi status, 
7345        **      Otherwise, compute the residual.
7346        */
7347        if (cp->host_flags & HF_AUTO_SENSE) {
7348                cp->scsi_status = cp->sv_scsi_status;
7349                cp->xerr_status = cp->sv_xerr_status;
7350        }
7351        else {
7352                cp->resid = 0;
7353                if (cp->xerr_status ||
7354                    cp->phys.header.lastp != cp->phys.header.goalp)
7355                        cp->resid = ncr_compute_residual(np, cp);
7356        }
7357
7358        /*
7359        **      Check for extended errors.
7360        */
7361
7362        if (cp->xerr_status) {
7363                if (cp->xerr_status & XE_PARITY_ERR) {
7364                        PRINT_ADDR(cmd);
7365                        printk ("unrecovered SCSI parity error.\n");
7366                }
7367                if (cp->xerr_status & XE_EXTRA_DATA) {
7368                        PRINT_ADDR(cmd);
7369                        printk ("extraneous data discarded.\n");
7370                }
7371                if (cp->xerr_status & XE_BAD_PHASE) {
7372                        PRINT_ADDR(cmd);
7373                        printk ("illegal scsi phase (4/5).\n");
7374                }
7375                if (cp->xerr_status & XE_SODL_UNRUN) {
7376                        PRINT_ADDR(cmd);
7377                        printk ("ODD transfer in DATA OUT phase.\n");
7378                }
7379                if (cp->xerr_status & XE_SWIDE_OVRUN){
7380                        PRINT_ADDR(cmd);
7381                        printk ("ODD transfer in DATA IN phase.\n");
7382                }
7383
7384                if (cp->host_status==HS_COMPLETE)
7385                        cp->host_status = HS_FAIL;
7386        }
7387
7388        /*
7389        **      Print out any error for debugging purpose.
7390        */
7391        if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
7392                if (cp->host_status!=HS_COMPLETE || cp->scsi_status!=S_GOOD ||
7393                    cp->resid) {
7394                        PRINT_ADDR(cmd);
7395                        printk ("ERROR: cmd=%x host_status=%x scsi_status=%x "
7396                                "data_len=%d residual=%d\n",
7397                                cmd->cmnd[0], cp->host_status, cp->scsi_status,
7398                                cp->data_len, cp->resid);
7399                }
7400        }
7401
7402#if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,99)
7403        /*
7404        **      Move residual byte count to user structure.
7405        */
7406        cmd->resid = cp->resid;
7407#endif
7408        /*
7409        **      Check the status.
7410        */
7411        if (   (cp->host_status == HS_COMPLETE)
7412                && (cp->scsi_status == S_GOOD ||
7413                    cp->scsi_status == S_COND_MET)) {
7414                /*
7415                **      All went well (GOOD status).
7416                **      CONDITION MET status is returned on 
7417                **      `Pre-Fetch' or `Search data' success.
7418                */
7419                SetScsiResult(cmd, DID_OK, cp->scsi_status);
7420
7421                /*
7422                **      Allocate the lcb if not yet.
7423                */
7424                if (!lp)
7425                        ncr_alloc_lcb (np, cp->target, cp->lun);
7426
7427                /*
7428                **      On standard INQUIRY response (EVPD and CmDt 
7429                **      not set), setup logical unit according to 
7430                **      announced capabilities (we need the 1rst 8 bytes).
7431                */
7432                if (cmd->cmnd[0] == 0x12 && !(cmd->cmnd[1] & 0x3) &&
7433                    cmd->request_bufflen - cp->resid > 7 && !cmd->use_sg) {
7434                        sync_scsi_data(np, cmd);        /* SYNC the data */
7435                        ncr_setup_lcb (np, cp->target, cp->lun,
7436                                       (char *) cmd->request_buffer);
7437                }
7438
7439                /*
7440                **      If tags was reduced due to queue full,
7441                **      increase tags if 1000 good status received.
7442                */
7443                if (lp && lp->usetags && lp->numtags < lp->maxtags) {
7444                        ++lp->num_good;
7445                        if (lp->num_good >= 1000) {
7446                                lp->num_good = 0;
7447                                ++lp->numtags;
7448                                ncr_setup_tags (np, cp->target, cp->lun);
7449                        }
7450                }
7451        } else if ((cp->host_status == HS_COMPLETE)
7452                && (cp->scsi_status == S_CHECK_COND)) {
7453                /*
7454                **   Check condition code
7455                */
7456                SetScsiResult(cmd, DID_OK, S_CHECK_COND);
7457
7458                if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
7459                        PRINT_ADDR(cmd);
7460                        ncr_printl_hex("sense data:", cmd->sense_buffer, 14);
7461                }
7462        } else if ((cp->host_status == HS_COMPLETE)
7463                && (cp->scsi_status == S_CONFLICT)) {
7464                /*
7465                **   Reservation Conflict condition code
7466                */
7467                SetScsiResult(cmd, DID_OK, S_CONFLICT);
7468
7469        } else if ((cp->host_status == HS_COMPLETE)
7470                && (cp->scsi_status == S_BUSY ||
7471                    cp->scsi_status == S_QUEUE_FULL)) {
7472
7473                /*
7474                **   Target is busy.
7475                */
7476                SetScsiResult(cmd, DID_OK, cp->scsi_status);
7477
7478        } else if ((cp->host_status == HS_SEL_TIMEOUT)
7479                || (cp->host_status == HS_TIMEOUT)) {
7480
7481                /*
7482                **   No response
7483                */
7484                SetScsiResult(cmd, DID_TIME_OUT, cp->scsi_status);
7485
7486        } else if (cp->host_status == HS_RESET) {
7487
7488                /*
7489                **   SCSI bus reset
7490                */
7491                SetScsiResult(cmd, DID_RESET, cp->scsi_status);
7492
7493        } else if (cp->host_status == HS_ABORTED) {
7494
7495                /*
7496                **   Transfer aborted
7497                */
7498                SetScsiAbortResult(cmd);
7499
7500        } else {
7501                int did_status;
7502
7503                /*
7504                **  Other protocol messes
7505                */
7506                PRINT_ADDR(cmd);
7507                printk ("COMMAND FAILED (%x %x) @%p.\n",
7508                        cp->host_status, cp->scsi_status, cp);
7509
7510                did_status = DID_ERROR;
7511                if (cp->xerr_status & XE_PARITY_ERR)
7512                        did_status = DID_PARITY;
7513
7514                SetScsiResult(cmd, did_status, cp->scsi_status);
7515        }
7516
7517        /*
7518        **      trace output
7519        */
7520
7521        if (tp->usrflag & UF_TRACE) {
7522                PRINT_ADDR(cmd);
7523                printk (" CMD:");
7524                ncr_print_hex(cmd->cmnd, cmd->cmd_len);
7525
7526                if (cp->host_status==HS_COMPLETE) {
7527                        switch (cp->scsi_status) {
7528                        case S_GOOD:
7529                                printk ("  GOOD");
7530                                break;
7531                        case S_CHECK_COND:
7532                                printk ("  SENSE:");
7533                                ncr_print_hex(cmd->sense_buffer, 14);
7534                                break;
7535                        default:
7536                                printk ("  STAT: %x\n", cp->scsi_status);
7537                                break;
7538                        }
7539                } else printk ("  HOSTERROR: %x", cp->host_status);
7540                printk ("\n");
7541        }
7542
7543        /*
7544        **      Free this ccb
7545        */
7546        ncr_free_ccb (np, cp);
7547
7548        /*
7549        **      requeue awaiting scsi commands for this lun.
7550        */
7551        if (lp && lp->queuedccbs < lp->queuedepth &&
7552            !xpt_que_empty(&lp->wait_ccbq))
7553                ncr_start_next_ccb(np, lp, 2);
7554
7555        /*
7556        **      requeue awaiting scsi commands for this controller.
7557        */
7558        if (np->waiting_list)
7559                requeue_waiting_list(np);
7560
7561        /*
7562        **      signal completion to generic driver.
7563        */
7564        ncr_queue_done_cmd(np, cmd);
7565}
7566
7567/*==========================================================
7568**
7569**
7570**      Signal all (or one) control block done.
7571**
7572**
7573**==========================================================
7574*/
7575
7576/*
7577**      The NCR has completed CCBs.
7578**      Look at the DONE QUEUE.
7579**
7580**      On architectures that may reorder LOAD/STORE operations, 
7581**      a memory barrier may be needed after the reading of the 
7582**      so-called `flag' and prior to dealing with the data.
7583*/
7584int ncr_wakeup_done (ncb_p np)
7585{
7586        ccb_p cp;
7587        int i, n;
7588        u_long dsa;
7589
7590        n = 0;
7591        i = np->dqueueget;
7592        while (1) {
7593                dsa = scr_to_cpu(np->dqueue[i]);
7594                if (!dsa)
7595                        break;
7596                np->dqueue[i] = 0;
7597                if ((i = i+2) >= MAX_START*2)
7598                        i = 0;
7599
7600                cp = ncr_ccb_from_dsa(np, dsa);
7601                if (cp) {
7602                        MEMORY_BARRIER();
7603                        ncr_complete (np, cp);
7604                        ++n;
7605                }
7606                else
7607                        printk (KERN_ERR "%s: bad DSA (%lx) in done queue.\n",
7608                                ncr_name(np), dsa);
7609        }
7610        np->dqueueget = i;
7611
7612        return n;
7613}
7614
7615/*
7616**      Complete all active CCBs.
7617*/
7618void ncr_wakeup (ncb_p np, u_long code)
7619{
7620        ccb_p cp = np->ccbc;
7621
7622        while (cp) {
7623                if (cp->host_status != HS_IDLE) {
7624                        cp->host_status = code;
7625                        ncr_complete (np, cp);
7626                }
7627                cp = cp->link_ccb;
7628        }
7629}
7630
7631/*==========================================================
7632**
7633**
7634**      Start NCR chip.
7635**
7636**
7637**==========================================================
7638*/
7639
7640void ncr_init (ncb_p np, int reset, char * msg, u_long code)
7641{
7642        int     i;
7643        u_long  phys;
7644
7645        /*
7646        **      Reset chip if asked, otherwise just clear fifos.
7647        */
7648
7649        if (reset)
7650                ncr_soft_reset(np);
7651        else {
7652                OUTB (nc_stest3, TE|CSF);
7653                OUTONB (nc_ctest3, CLF);
7654        }
7655 
7656        /*
7657        **      Message.
7658        */
7659
7660        if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg);
7661
7662        /*
7663        **      Clear Start Queue
7664        */
7665        phys = np->p_squeue;
7666        np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */
7667        for (i = 0; i < MAX_START*2; i += 2) {
7668                np->squeue[i]   = cpu_to_scr(np->p_idletask);
7669                np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
7670        }
7671        np->squeue[MAX_START*2-1] = cpu_to_scr(phys);
7672
7673
7674        /*
7675        **      Start at first entry.
7676        */
7677        np->squeueput = 0;
7678        np->scripth0->startpos[0] = cpu_to_scr(phys);
7679
7680        /*
7681        **      Clear Done Queue
7682        */
7683        phys = vtobus(np->dqueue);
7684        for (i = 0; i < MAX_START*2; i += 2) {
7685                np->dqueue[i]   = 0;
7686                np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
7687        }
7688        np->dqueue[MAX_START*2-1] = cpu_to_scr(phys);
7689
7690        /*
7691        **      Start at first entry.
7692        */
7693        np->scripth0->done_pos[0] = cpu_to_scr(phys);
7694        np->dqueueget = 0;
7695
7696        /*
7697        **      Wakeup all pending jobs.
7698        */
7699        ncr_wakeup (np, code);
7700
7701        /*
7702        **      Init chip.
7703        */
7704
7705        OUTB (nc_istat,  0x00   );      /*  Remove Reset, abort */
7706        UDELAY (2000);  /* The 895 needs time for the bus mode to settle */
7707
7708        OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
7709                                        /*  full arb., ena parity, par->ATN  */
7710        OUTB (nc_scntl1, 0x00);         /*  odd parity, and remove CRST!! */
7711
7712        ncr_selectclock(np, np->rv_scntl3);     /* Select SCSI clock */
7713
7714        OUTB (nc_scid  , RRE|np->myaddr);       /* Adapter SCSI address */
7715        OUTW (nc_respid, 1ul<<np->myaddr);      /* Id to respond to */
7716        OUTB (nc_istat , SIGP   );              /*  Signal Process */
7717        OUTB (nc_dmode , np->rv_dmode);         /* Burst length, dma mode */
7718        OUTB (nc_ctest5, np->rv_ctest5);        /* Large fifo + large burst */
7719
7720        OUTB (nc_dcntl , NOCOM|np->rv_dcntl);   /* Protect SFBR */
7721        OUTB (nc_ctest3, np->rv_ctest3);        /* Write and invalidate */
7722        OUTB (nc_ctest4, np->rv_ctest4);        /* Master parity checking */
7723
7724        if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
7725                (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66)){
7726                OUTB (nc_stest2, EXT|np->rv_stest2); 
7727                /* Extended Sreq/Sack filtering, not supported in C1010/C1010_66 */
7728        }
7729        OUTB (nc_stest3, TE);                   /* TolerANT enable */
7730        OUTB (nc_stime0, 0x0c);                 /* HTH disabled  STO 0.25 sec */
7731
7732        /*
7733        **      DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
7734        **      Disable overlapped arbitration for all dual-function 
7735        **      devices, regardless revision id.
7736        **      We may consider it is a post-chip-design feature. ;-)
7737        **
7738        **      Errata applies to all 896 and 1010 parts.
7739        */
7740        if (np->device_id == PCI_DEVICE_ID_NCR_53C875)
7741                OUTB (nc_ctest0, (1<<5));
7742        else if (np->device_id == PCI_DEVICE_ID_NCR_53C896  ||
7743                 np->device_id == PCI_DEVICE_ID_LSI_53C1010 ||
7744                 np->device_id == PCI_DEVICE_ID_LSI_53C1010_66 )
7745                np->rv_ccntl0 |= DPR;
7746
7747        /*
7748        **      C1010_66MHz rev 0 part requies AIPCNTL1 bit 3 to be set.
7749        */
7750        if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)
7751                OUTB(nc_aipcntl1, (1<<3));
7752
7753        /*
7754        **  Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing 
7755        **  and/or hardware phase mismatch, since only such chips 
7756        **  seem to support those IO registers.
7757        */
7758        if (np->features & (FE_DAC | FE_NOPM)) {
7759                OUTB (nc_ccntl0, np->rv_ccntl0);
7760                OUTB (nc_ccntl1, np->rv_ccntl1);
7761        }
7762
7763        /*
7764        **      If phase mismatch handled by scripts (53C895A or 53C896 
7765        **      or 53C1010 or 53C1010_66), set PM jump addresses. 
7766        */
7767
7768        if (np->features & FE_NOPM) {
7769                printk(KERN_INFO "%s: handling phase mismatch from SCRIPTS.\n", 
7770                       ncr_name(np));
7771                OUTL (nc_pmjad1, NCB_SCRIPTH_PHYS (np, pm_handle));
7772                OUTL (nc_pmjad2, NCB_SCRIPTH_PHYS (np, pm_handle));
7773        }
7774
7775        /*
7776        **    Enable GPIO0 pin for writing if LED support from SCRIPTS.
7777        **    Also set GPIO5 and clear GPIO6 if hardware LED control.
7778        */
7779
7780        if (np->features & FE_LED0)
7781                OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
7782        else if (np->features & FE_LEDC)
7783                OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
7784
7785
7786        /*
7787        **      enable ints
7788        */
7789
7790        OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
7791        OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
7792
7793        /*
7794        **      For 895/895A/896/c1010
7795        **      Enable SBMC interrupt and save current SCSI bus mode.
7796        */
7797        if ( (np->features & FE_ULTRA2) || (np->features & FE_ULTRA3) ) {
7798                OUTONW (nc_sien, SBMC);
7799                np->scsi_mode = INB (nc_stest4) & SMODE;
7800        }
7801
7802        /*
7803        **      Fill in target structure.
7804        **      Reinitialize usrsync.
7805        **      Reinitialize usrwide.
7806        **      Prepare sync negotiation according to actual SCSI bus mode.
7807        */
7808
7809        for (i=0;i<MAX_TARGET;i++) {
7810                tcb_p tp = &np->target[i];
7811
7812                tp->to_reset = 0;
7813
7814                tp->sval    = 0;
7815                tp->wval    = np->rv_scntl3;
7816                tp->uval    = np->rv_scntl4;
7817
7818                if (tp->usrsync != 255) {
7819                        if (tp->usrsync <= np->maxsync) {
7820                                if (tp->usrsync < np->minsync) {
7821                                        tp->usrsync = np->minsync;
7822                                }
7823                        }
7824                        else
7825                                tp->usrsync = 255;
7826                };
7827
7828                if (tp->usrwide > np->maxwide)
7829                        tp->usrwide = np->maxwide;
7830
7831                ncr_negotiate (np, tp);
7832        }
7833
7834        /*
7835        **    Download SCSI SCRIPTS to on-chip RAM if present,
7836        **    and start script processor.
7837        **    We do the download preferently from the CPU.
7838        **    For platforms that may not support PCI memory mapping,
7839        **    we use a simple SCRIPTS that performs MEMORY MOVEs.
7840        */
7841        if (np->base2_ba) {
7842                if (bootverbose)
7843                        printk ("%s: Downloading SCSI SCRIPTS.\n",
7844                                ncr_name(np));
7845#ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
7846                if (np->base2_ws == 8192)
7847                        phys = NCB_SCRIPTH0_PHYS (np, start_ram64);
7848                else
7849                        phys = NCB_SCRIPTH_PHYS (np, start_ram);
7850#else
7851                if (np->base2_ws == 8192) {
7852                        memcpy_to_pci(np->base2_va + 4096,
7853                                        np->scripth0, sizeof(struct scripth));
7854                        OUTL (nc_mmws, np->scr_ram_seg);
7855                        OUTL (nc_mmrs, np->scr_ram_seg);
7856                        OUTL (nc_sfs,  np->scr_ram_seg);
7857                        phys = NCB_SCRIPTH_PHYS (np, start64);
7858                }
7859                else
7860                        phys = NCB_SCRIPT_PHYS (np, init);
7861                memcpy_to_pci(np->base2_va, np->script0, sizeof(struct script));
7862#endif /* SCSI_NCR_PCI_MEM_NOT_SUPPORTED */
7863        }
7864        else
7865                phys = NCB_SCRIPT_PHYS (np, init);
7866
7867        np->istat_sem = 0;
7868
7869        OUTL (nc_dsa, np->p_ncb);
7870        OUTL_DSP (phys);
7871}
7872
7873/*==========================================================
7874**
7875**      Prepare the negotiation values for wide and
7876**      synchronous transfers.
7877**
7878**==========================================================
7879*/
7880
7881static void ncr_negotiate (struct ncb* np, struct tcb* tp)
7882{
7883        /*
7884        **      minsync unit is 4ns !
7885        */
7886
7887        u_long minsync = tp->usrsync;
7888
7889        /*
7890        **      SCSI bus mode limit
7891        */
7892
7893        if (np->scsi_mode && np->scsi_mode == SMODE_SE) {
7894                if (minsync < 12) minsync = 12;
7895        }
7896
7897        /*
7898        **      our limit ..
7899        */
7900
7901        if (minsync < np->minsync)
7902                minsync = np->minsync;
7903
7904        /*
7905        **      divider limit
7906        */
7907
7908        if (minsync > np->maxsync)
7909                minsync = 255;
7910
7911        tp->minsync = minsync;
7912        tp->maxoffs = (minsync<255 ? np->maxoffs : 0);
7913
7914        /*
7915        **      period=0: has to negotiate sync transfer
7916        */
7917
7918        tp->period=0;
7919
7920        /*
7921        **      widedone=0: has to negotiate wide transfer
7922        */
7923        tp->widedone=0;
7924}
7925
7926/*==========================================================
7927**
7928**      Get clock factor and sync divisor for a given 
7929**      synchronous factor period.
7930**      Returns the clock factor (in sxfer) and scntl3 
7931**      synchronous divisor field.
7932**
7933**==========================================================
7934*/
7935
7936static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
7937{
7938        u_long  clk = np->clock_khz;    /* SCSI clock frequency in kHz  */
7939        int     div = np->clock_divn;   /* Number of divisors supported */
7940        u_long  fak;                    /* Sync factor in sxfer         */
7941        u_long  per;                    /* Period in tenths of ns       */
7942        u_long  kpc;                    /* (per * clk)                  */
7943
7944        /*
7945        **      Compute the synchronous period in tenths of nano-seconds
7946        **      from sfac.
7947        **
7948        **      Note, if sfac == 9, DT is being used. Double the period of 125
7949        **      to 250. 
7950        */
7951        if      (sfac <= 10)    per = 250;
7952        else if (sfac == 11)    per = 303;
7953        else if (sfac == 12)    per = 500;
7954        else                    per = 40 * sfac;
7955
7956        /*
7957        **      Look for the greatest clock divisor that allows an 
7958        **      input speed faster than the period.
7959        */
7960        kpc = per * clk;
7961        while (--div >= 0)
7962                if (kpc >= (div_10M[div] << 2)) break;
7963
7964        /*
7965        **      Calculate the lowest clock factor that allows an output 
7966        **      speed not faster than the period.
7967        */
7968        fak = (kpc - 1) / div_10M[div] + 1;
7969
7970#if 0   /* This optimization does not seem very useful */
7971
7972        per = (fak * div_10M[div]) / clk;
7973
7974        /*
7975        **      Why not to try the immediate lower divisor and to choose 
7976        **      the one that allows the fastest output speed ?
7977        **      We dont want input speed too much greater than output speed.
7978        */
7979        if (div >= 1 && fak < 8) {
7980                u_long fak2, per2;
7981                fak2 = (kpc - 1) / div_10M[div-1] + 1;
7982                per2 = (fak2 * div_10M[div-1]) / clk;
7983                if (per2 < per && fak2 <= 8) {
7984                        fak = fak2;
7985                        per = per2;
7986                        --div;
7987                }
7988        }
7989#endif
7990
7991        if (fak < 4) fak = 4;   /* Should never happen, too bad ... */
7992
7993        /*
7994        **      Compute and return sync parameters for the ncr
7995        */
7996        *fakp           = fak - 4;
7997
7998        /*
7999        ** If sfac < 25, and 8xx parts, desire that the chip operate at 
8000        ** least at Ultra speeds.  Must set bit 7 of scntl3.
8001        ** For C1010, do not set this bit. If operating at Ultra3 speeds,
8002        **      set the U3EN bit instead.
8003        */ 
8004        if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010)  ||
8005                        (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
8006                *scntl3p        = (div+1) << 4;
8007                *fakp           = 0;
8008        }
8009        else {
8010                *scntl3p        = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
8011                *fakp           = fak - 4;
8012        }
8013}
8014
8015/*==========================================================
8016**
8017**      Utility routine to return the current bus width 
8018**      synchronous period and offset.
8019**      Utilizes target sval, wval and uval  
8020**
8021**==========================================================
8022*/
8023static void ncr_get_xfer_info(ncb_p np, tcb_p tp, u_char *factor, 
8024                        u_char *offset, u_char *width)
8025{
8026
8027        u_char idiv;
8028        u_long period;
8029
8030        *width = (tp->wval & EWS) ? 1 : 0;
8031
8032        if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8033                (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
8034                *offset  = (tp->sval & 0x3f);
8035        else
8036                *offset  = (tp->sval & 0x1f);
8037
8038        /*
8039         * Midlayer signal to the driver that all of the scsi commands
8040         * for the integrity check have completed. Save the negotiated
8041         * parameters (extracted from sval, wval and uval). 
8042         * See ncr_setsync for alg. details.
8043         */
8044
8045        idiv = (tp->wval>>4) & 0x07;
8046
8047        if ( *offset && idiv ) {
8048                if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) || 
8049                        (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)){
8050                    if (tp->uval & 0x80)
8051                        period = (2*div_10M[idiv-1])/np->clock_khz;
8052                    else 
8053                        period = (4*div_10M[idiv-1])/np->clock_khz;
8054                }
8055                else
8056                    period = (((tp->sval>>5)+4)*div_10M[idiv-1])/np->clock_khz;
8057        }
8058        else
8059                period = 0xffff;
8060
8061        if      (period <= 125)         *factor =   9;
8062        else if (period <= 250)         *factor =  10;
8063        else if (period <= 303)         *factor  = 11;
8064        else if (period <= 500)         *factor  = 12;
8065        else                            *factor  = (period + 40 - 1) / 40;
8066
8067}
8068
8069
8070/*==========================================================
8071**
8072**      Set actual values, sync status and patch all ccbs of 
8073**      a target according to new sync/wide agreement.
8074**
8075**==========================================================
8076*/
8077
8078static void ncr_set_sync_wide_status (ncb_p np, u_char target)
8079{
8080        ccb_p cp = np->ccbc;
8081        tcb_p tp = &np->target[target];
8082
8083        /*
8084        **      set actual value and sync_status
8085        **
8086        **      TEMP register contains current scripts address
8087        **      which is data type/direction/dependent.
8088        */
8089        OUTB (nc_sxfer, tp->sval);
8090        OUTB (nc_scntl3, tp->wval);
8091        if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010)  ||
8092                        (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) 
8093                OUTB (nc_scntl4, tp->uval); 
8094
8095        /*
8096        **      patch ALL ccbs of this target.
8097        */
8098        for (cp = np->ccbc; cp; cp = cp->link_ccb) {
8099                if (cp->host_status == HS_IDLE)
8100                        continue;
8101                if (cp->target != target)
8102                        continue;
8103                cp->phys.select.sel_scntl3 = tp->wval;
8104                cp->phys.select.sel_sxfer  = tp->sval;
8105                if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8106                                (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
8107                        cp->phys.select.sel_scntl4 = tp->uval;
8108        };
8109}
8110
8111/*==========================================================
8112**
8113**      Switch sync mode for current job and it's target
8114**
8115**==========================================================
8116*/
8117
8118static void ncr_setsync (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer, 
8119                                        u_char scntl4)
8120{
8121        tcb_p tp;
8122        u_char target = INB (nc_sdid) & 0x0f;
8123        u_char idiv;
8124        u_char offset;
8125
8126        assert (cp);
8127        if (!cp) return;
8128
8129        assert (target == (cp->target & 0xf));
8130
8131        tp = &np->target[target];
8132
8133        if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8134                        (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
8135                offset = sxfer & 0x3f; /* bits 5-0 */
8136                scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS);
8137                scntl4 = (scntl4 & 0x80);
8138        }
8139        else {
8140                offset = sxfer & 0x1f; /* bits 4-0 */
8141                if (!scntl3 || !offset)
8142                        scntl3 = np->rv_scntl3;
8143
8144                scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | 
8145                                (np->rv_scntl3 & 0x07);
8146        }
8147        
8148
8149        /*
8150        **      Deduce the value of controller sync period from scntl3.
8151        **      period is in tenths of nano-seconds.
8152        */
8153
8154        idiv = ((scntl3 >> 4) & 0x7);
8155        if ( offset && idiv) {
8156                if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8157                        (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
8158                        /* Note: If extra data hold clocks are used,
8159                         * the formulas below must be modified.
8160                         * When scntl4 == 0, ST mode.
8161                         */
8162                        if (scntl4 & 0x80)
8163                                tp->period = (2*div_10M[idiv-1])/np->clock_khz;
8164                        else
8165                                tp->period = (4*div_10M[idiv-1])/np->clock_khz;
8166                }
8167                else 
8168                        tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
8169        }
8170        else
8171                tp->period = 0xffff;
8172
8173
8174        /*
8175        **       Stop there if sync parameters are unchanged
8176        */
8177        if (tp->sval == sxfer && tp->wval == scntl3 && tp->uval == scntl4) return;
8178        tp->sval = sxfer;
8179        tp->wval = scntl3;
8180        tp->uval = scntl4;
8181
8182        /*
8183        **      Bells and whistles   ;-)
8184        **      Donnot announce negotiations due to auto-sense, 
8185        **      unless user really want us to be verbose. :)
8186        */
8187        if ( bootverbose < 2 && (cp->host_flags & HF_AUTO_SENSE))
8188                goto next;
8189        PRINT_TARGET(np, target);
8190        if (offset) {
8191                unsigned f10 = 100000 << (tp->widedone ? tp->widedone -1 : 0);
8192                unsigned mb10 = (f10 + tp->period/2) / tp->period;
8193                char *scsi;
8194
8195                /*
8196                **  Disable extended Sreq/Sack filtering
8197                */
8198                if ((tp->period <= 2000) && 
8199                        (np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
8200                        (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
8201                                OUTOFFB (nc_stest2, EXT);
8202
8203                /*
8204                **      Bells and whistles   ;-)
8205                */
8206                if      (tp->period < 250)      scsi = "FAST-80";
8207                else if (tp->period < 500)      scsi = "FAST-40";
8208                else if (tp->period < 1000)     scsi = "FAST-20";
8209                else if (tp->period < 2000)     scsi = "FAST-10";
8210                else                            scsi = "FAST-5";
8211
8212                printk ("%s %sSCSI %d.%d MB/s (%d.%d ns, offset %d)\n", scsi,
8213                        tp->widedone > 1 ? "WIDE " : "",
8214                        mb10 / 10, mb10 % 10, tp->period / 10, tp->period % 10,
8215                        offset);
8216        } else
8217                printk ("%sasynchronous.\n", tp->widedone > 1 ? "wide " : "");
8218next:
8219        /*
8220        **      set actual value and sync_status
8221        **      patch ALL ccbs of this target.
8222        */
8223        ncr_set_sync_wide_status(np, target);
8224}
8225
8226
8227/*==========================================================
8228**
8229**      Switch wide mode for current job and it's target
8230**      SCSI specs say: a SCSI device that accepts a WDTR 
8231**      message shall reset the synchronous agreement to 
8232**      asynchronous mode.
8233**
8234**==========================================================
8235*/
8236
8237static void ncr_setwide (ncb_p np, ccb_p cp, u_char wide, u_char ack)
8238{
8239        u_short target = INB (nc_sdid) & 0x0f;
8240        tcb_p tp;
8241        u_char  scntl3;
8242        u_char  sxfer;
8243
8244        assert (cp);
8245        if (!cp) return;
8246
8247        assert (target == (cp->target & 0xf));
8248
8249        tp = &np->target[target];
8250        tp->widedone  =  wide+1;
8251        scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0);
8252
8253        sxfer = ack ? 0 : tp->sval;
8254
8255        /*
8256        **       Stop there if sync/wide parameters are unchanged
8257        */
8258        if (tp->sval == sxfer && tp->wval == scntl3) return;
8259        tp->sval = sxfer;
8260        tp->wval = scntl3;
8261
8262        /*
8263        **      Bells and whistles   ;-)
8264        */
8265        if (bootverbose >= 2) {
8266                PRINT_TARGET(np, target);
8267                if (scntl3 & EWS)
8268                        printk ("WIDE SCSI (16 bit) enabled.\n");
8269                else
8270                        printk ("WIDE SCSI disabled.\n");
8271        }
8272
8273        /*
8274        **      set actual value and sync_status
8275        **      patch ALL ccbs of this target.
8276        */
8277        ncr_set_sync_wide_status(np, target);
8278}
8279
8280
8281/*==========================================================
8282**
8283**      Switch sync/wide mode for current job and it's target
8284**      PPR negotiations only
8285**
8286**==========================================================
8287*/
8288
8289static void ncr_setsyncwide (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer, 
8290                                u_char scntl4, u_char wide)
8291{
8292        tcb_p tp;
8293        u_char target = INB (nc_sdid) & 0x0f;
8294        u_char idiv;
8295        u_char offset;
8296
8297        assert (cp);
8298        if (!cp) return;
8299
8300        assert (target == (cp->target & 0xf));
8301
8302        tp = &np->target[target];
8303        tp->widedone  =  wide+1;
8304
8305        if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8306                        (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
8307                offset = sxfer & 0x3f; /* bits 5-0 */
8308                scntl3 = (scntl3 & 0xf0) | (wide ? EWS : 0);
8309                scntl4 = (scntl4 & 0x80);
8310        }
8311        else {
8312                offset = sxfer & 0x1f; /* bits 4-0 */
8313                if (!scntl3 || !offset)
8314                        scntl3 = np->rv_scntl3;
8315
8316                scntl3 = (scntl3 & 0xf0) | (wide ? EWS : 0) | 
8317                                (np->rv_scntl3 & 0x07);
8318        }
8319        
8320
8321        /*
8322        **      Deduce the value of controller sync period from scntl3.
8323        **      period is in tenths of nano-seconds.
8324        */
8325
8326        idiv = ((scntl3 >> 4) & 0x7);
8327        if ( offset && idiv) {
8328                if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8329                        (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
8330                        /* Note: If extra data hold clocks are used,
8331                         * the formulas below must be modified.
8332                         * When scntl4 == 0, ST mode.
8333                         */
8334                        if (scntl4 & 0x80)
8335                                tp->period = (2*div_10M[idiv-1])/np->clock_khz;
8336                        else
8337                                tp->period = (4*div_10M[idiv-1])/np->clock_khz;
8338                }
8339                else 
8340                        tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
8341        }
8342        else
8343                tp->period = 0xffff;
8344
8345
8346        /*
8347        **       Stop there if sync parameters are unchanged
8348        */
8349        if (tp->sval == sxfer && tp->wval == scntl3 && tp->uval == scntl4) return;
8350        tp->sval = sxfer;
8351        tp->wval = scntl3;
8352        tp->uval = scntl4;
8353
8354        /*
8355        **      Bells and whistles   ;-)
8356        **      Donnot announce negotiations due to auto-sense, 
8357        **      unless user really want us to be verbose. :)
8358        */
8359        if ( bootverbose < 2 && (cp->host_flags & HF_AUTO_SENSE))
8360                goto next;
8361        PRINT_TARGET(np, target);
8362        if (offset) {
8363                unsigned f10 = 100000 << (tp->widedone ? tp->widedone -1 : 0);
8364                unsigned mb10 = (f10 + tp->period/2) / tp->period;
8365                char *scsi;
8366
8367                /*
8368                **  Disable extended Sreq/Sack filtering
8369                */
8370                if ((tp->period <= 2000) && 
8371                        (np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
8372                        (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
8373                                OUTOFFB (nc_stest2, EXT);
8374
8375                /*
8376                **      Bells and whistles   ;-)
8377                */
8378                if      (tp->period < 250)      scsi = "FAST-80";
8379                else if (tp->period < 500)      scsi = "FAST-40";
8380                else if (tp->period < 1000)     scsi = "FAST-20";
8381                else if (tp->period < 2000)     scsi = "FAST-10";
8382                else                            scsi = "FAST-5";
8383
8384                printk ("%s %sSCSI %d.%d MB/s (%d.%d ns, offset %d)\n", scsi,
8385                        tp->widedone > 1 ? "WIDE " : "",
8386                        mb10 / 10, mb10 % 10, tp->period / 10, tp->period % 10,
8387                        offset);
8388        } else
8389                printk ("%sasynchronous.\n", tp->widedone > 1 ? "wide " : "");
8390next:
8391        /*
8392        **      set actual value and sync_status
8393        **      patch ALL ccbs of this target.
8394        */
8395        ncr_set_sync_wide_status(np, target);
8396}
8397
8398
8399
8400
8401/*==========================================================
8402**
8403**      Switch tagged mode for a target.
8404**
8405**==========================================================
8406*/
8407
8408static void ncr_setup_tags (ncb_p np, u_char tn, u_char ln)
8409{
8410        tcb_p tp = &np->target[tn];
8411        lcb_p lp = ncr_lp(np, tp, ln);
8412        u_short reqtags, maxdepth;
8413
8414        /*
8415        **      Just in case ...
8416        */
8417        if ((!tp) || (!lp))
8418                return;
8419
8420        /*
8421        **      If SCSI device queue depth is not yet set, leave here.
8422        */
8423        if (!lp->scdev_depth)
8424                return;
8425
8426        /*
8427        **      Donnot allow more tags than the SCSI driver can queue 
8428        **      for this device.
8429        **      Donnot allow more tags than we can handle.
8430        */
8431        maxdepth = lp->scdev_depth;
8432        if (maxdepth > lp->maxnxs)      maxdepth    = lp->maxnxs;
8433        if (lp->maxtags > maxdepth)     lp->maxtags = maxdepth;
8434        if (lp->numtags > maxdepth)     lp->numtags = maxdepth;
8435
8436        /*
8437        **      only devices conformant to ANSI Version >= 2
8438        **      only devices capable of tagged commands
8439        **      only if enabled by user ..
8440        */
8441        if ((lp->inq_byte7 & INQ7_QUEUE) && lp->numtags > 1) {
8442                reqtags = lp->numtags;
8443        } else {
8444                reqtags = 1;
8445        };
8446
8447        /*
8448        **      Update max number of tags
8449        */
8450        lp->numtags = reqtags;
8451        if (lp->numtags > lp->maxtags)
8452                lp->maxtags = lp->numtags;
8453
8454        /*
8455        **      If we want to switch tag mode, we must wait 
8456        **      for no CCB to be active.
8457        */
8458        if      (reqtags > 1 && lp->usetags) {   /* Stay in tagged mode    */
8459                if (lp->queuedepth == reqtags)   /* Already announced      */
8460                        return;
8461                lp->queuedepth  = reqtags;
8462        }
8463        else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode  */
8464                lp->queuedepth  = reqtags;
8465                return;
8466        }
8467        else {                                   /* Want to switch tag mode */
8468                if (lp->busyccbs)                /* If not yet safe, return */
8469                        return;
8470                lp->queuedepth  = reqtags;
8471                lp->usetags     = reqtags > 1 ? 1 : 0;
8472        }
8473
8474        /*
8475        **      Patch the lun mini-script, according to tag mode.
8476        */
8477        lp->resel_task = lp->usetags?
8478                        cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) :
8479                        cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
8480
8481        /*
8482        **      Announce change to user.
8483        */
8484        if (bootverbose) {
8485                PRINT_LUN(np, tn, ln);
8486                if (lp->usetags)
8487                        printk("tagged command queue depth set to %d\n", reqtags);
8488                else
8489                        printk("tagged command queueing disabled\n");
8490        }
8491}
8492
8493/*----------------------------------------------------
8494**
8495**      handle user commands
8496**
8497**----------------------------------------------------
8498*/
8499
8500#ifdef SCSI_NCR_USER_COMMAND_SUPPORT
8501
8502static void ncr_usercmd (ncb_p np)
8503{
8504        u_char t;
8505        tcb_p tp;
8506        int ln;
8507        u_long size;
8508
8509        switch (np->user.cmd) {
8510        case 0: return;
8511
8512        case UC_SETDEBUG:
8513#ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
8514                ncr_debug = np->user.data;
8515#endif
8516                break;
8517
8518        case UC_SETORDER:
8519                np->order = np->user.data;
8520                break;
8521
8522        case UC_SETVERBOSE:
8523                np->verbose = np->user.data;
8524                break;
8525
8526        default:
8527                /*
8528                **      We assume that other commands apply to targets.
8529                **      This should always be the case and avoid the below 
8530                **      4 lines to be repeated 5 times.
8531                */
8532                for (t = 0; t < MAX_TARGET; t++) {
8533                        if (!((np->user.target >> t) & 1))
8534                                continue;
8535                        tp = &np->target[t];
8536
8537                        switch (np->user.cmd) {
8538
8539                        case UC_SETSYNC:
8540                                tp->usrsync = np->user.data;
8541                                ncr_negotiate (np, tp);
8542                                break;
8543
8544                        case UC_SETWIDE:
8545                                size = np->user.data;
8546                                if (size > np->maxwide)
8547                                        size=np->maxwide;
8548                                tp->usrwide = size;
8549                                ncr_negotiate (np, tp);
8550                                break;
8551
8552                        case UC_SETTAGS:
8553                                tp->usrtags = np->user.data;
8554                                for (ln = 0; ln < MAX_LUN; ln++) {
8555                                        lcb_p lp;
8556                                        lp = ncr_lp(np, tp, ln);
8557                                        if (!lp)
8558                                                continue;
8559                                        lp->numtags = np->user.data;
8560                                        lp->maxtags = lp->numtags;
8561                                        ncr_setup_tags (np, t, ln);
8562                                }
8563                                break;
8564
8565                        case UC_RESETDEV:
8566                                tp->to_reset = 1;
8567                                np->istat_sem = SEM;
8568                                OUTB (nc_istat, SIGP|SEM);
8569                                break;
8570
8571                        case UC_CLEARDEV:
8572                                for (ln = 0; ln < MAX_LUN; ln++) {
8573                                        lcb_p lp;
8574                                        lp = ncr_lp(np, tp, ln);
8575                                        if (lp)
8576                                                lp->to_clear = 1;
8577                                }
8578                                np->istat_sem = SEM;
8579                                OUTB (nc_istat, SIGP|SEM);
8580                                break;
8581
8582                        case UC_SETFLAG:
8583                                tp->usrflag = np->user.data;
8584                                break;
8585                        }
8586                }
8587                break;
8588        }
8589        np->user.cmd=0;
8590}
8591#endif
8592
8593/*==========================================================
8594**
8595**
8596**      ncr timeout handler.
8597**
8598**
8599**==========================================================
8600**
8601**      Misused to keep the driver running when
8602**      interrupts are not configured correctly.
8603**
8604**----------------------------------------------------------
8605*/
8606
8607static void ncr_timeout (ncb_p np)
8608{
8609        u_long  thistime = ktime_get(0);
8610
8611        /*
8612        **      If release process in progress, let's go
8613        **      Set the release stage from 1 to 2 to synchronize
8614        **      with the release process.
8615        */
8616
8617        if (np->release_stage) {
8618                if (np->release_stage == 1) np->release_stage = 2;
8619                return;
8620        }
8621
8622#ifdef SCSI_NCR_PCIQ_BROKEN_INTR
8623        np->timer.expires = ktime_get((HZ+9)/10);
8624#else
8625        np->timer.expires = ktime_get(SCSI_NCR_TIMER_INTERVAL);
8626#endif
8627        add_timer(&np->timer);
8628
8629        /*
8630        **      If we are resetting the ncr, wait for settle_time before 
8631        **      clearing it. Then command processing will be resumed.
8632        */
8633        if (np->settle_time) {
8634                if (np->settle_time <= thistime) {
8635                        if (bootverbose > 1)
8636                                printk("%s: command processing resumed\n", ncr_name(np));
8637                        np->settle_time = 0;
8638                        requeue_waiting_list(np);
8639                }
8640                return;
8641        }
8642
8643        /*
8644        **      Nothing to do for now, but that may come.
8645        */
8646        if (np->lasttime + 4*HZ < thistime) {
8647                np->lasttime = thistime;
8648        }
8649
8650#ifdef SCSI_NCR_PCIQ_MAY_MISS_COMPLETIONS
8651        /*
8652        **      Some way-broken PCI bridges may lead to 
8653        **      completions being lost when the clearing 
8654        **      of the INTFLY flag by the CPU occurs 
8655        **      concurrently with the chip raising this flag.
8656        **      If this ever happen, lost completions will 
8657        **      be reaped here.
8658        */
8659        ncr_wakeup_done(np);
8660#endif
8661
8662#ifdef SCSI_NCR_PCIQ_BROKEN_INTR
8663        if (INB(nc_istat) & (INTF|SIP|DIP)) {
8664
8665                /*
8666                **      Process pending interrupts.
8667                */
8668                if (DEBUG_FLAGS & DEBUG_TINY) printk ("{");
8669                ncr_exception (np);
8670                if (DEBUG_FLAGS & DEBUG_TINY) printk ("}");
8671        }
8672#endif /* SCSI_NCR_PCIQ_BROKEN_INTR */
8673}
8674
8675/*==========================================================
8676**
8677**      log message for real hard errors
8678**
8679**      "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
8680**      "             reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
8681**
8682**      exception register:
8683**              ds:     dstat
8684**              si:     sist
8685**
8686**      SCSI bus lines:
8687**              so:     control lines as driver by NCR.
8688**              si:     control lines as seen by NCR.
8689**              sd:     scsi data lines as seen by NCR.
8690**
8691**      wide/fastmode:
8692**              sxfer:  (see the manual)
8693**              scntl3: (see the manual)
8694**
8695**      current script command:
8696**              dsp:    script address (relative to start of script).
8697**              dbc:    first word of script command.
8698**
8699**      First 24 register of the chip:
8700**              r0..rf
8701**
8702**==========================================================
8703*/
8704
8705static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
8706{
8707        u_int32 dsp;
8708        int     script_ofs;
8709        int     script_size;
8710        char    *script_name;
8711        u_char  *script_base;
8712        int     i;
8713
8714        dsp     = INL (nc_dsp);
8715
8716        if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) {
8717                script_ofs      = dsp - np->p_script;
8718                script_size     = sizeof(struct script);
8719                script_base     = (u_char *) np->script0;
8720                script_name     = "script";
8721        }
8722        else if (np->p_scripth < dsp && 
8723                 dsp <= np->p_scripth + sizeof(struct scripth)) {
8724                script_ofs      = dsp - np->p_scripth;
8725                script_size     = sizeof(struct scripth);
8726                script_base     = (u_char *) np->scripth0;
8727                script_name     = "scripth";
8728        } else {
8729                script_ofs      = dsp;
8730                script_size     = 0;
8731                script_base     = 0;
8732                script_name     = "mem";
8733        }
8734
8735        printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
8736                ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
8737                (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
8738                (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
8739                (unsigned)INL (nc_dbc));
8740
8741        if (((script_ofs & 3) == 0) &&
8742            (unsigned)script_ofs < script_size) {
8743                printk ("%s: script cmd = %08x\n", ncr_name(np),
8744                        scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs)));
8745        }
8746
8747        printk ("%s: regdump:", ncr_name(np));
8748        for (i=0; i<24;i++)
8749            printk (" %02x", (unsigned)INB_OFF(i));
8750        printk (".\n");
8751}
8752
8753/*============================================================
8754**
8755**      ncr chip exception handler.
8756**
8757**============================================================
8758**
8759**      In normal situations, interrupt conditions occur one at 
8760**      a time. But when something bad happens on the SCSI BUS, 
8761**      the chip may raise several interrupt flags before 
8762**      stopping and interrupting the CPU. The additionnal 
8763**      interrupt flags are stacked in some extra registers 
8764**      after the SIP and/or DIP flag has been raised in the 
8765**      ISTAT. After the CPU has read the interrupt condition 
8766**      flag from SIST or DSTAT, the chip unstacks the other 
8767**      interrupt flags and sets the corresponding bits in 
8768**      SIST or DSTAT. Since the chip starts stacking once the 
8769**      SIP or DIP flag is set, there is a small window of time 
8770**      where the stacking does not occur.
8771**
8772**      Typically, multiple interrupt conditions may happen in 
8773**      the following situations:
8774**
8775**      - SCSI parity error + Phase mismatch  (PAR|MA)
8776**        When an parity error is detected in input phase 
8777**        and the device switches to msg-in phase inside a 
8778**        block MOV.
8779**      - SCSI parity error + Unexpected disconnect (PAR|UDC)
8780**        When a stupid device does not want to handle the 
8781**        recovery of an SCSI parity error.
8782**      - Some combinations of STO, PAR, UDC, ...
8783**        When using non compliant SCSI stuff, when user is 
8784**        doing non compliant hot tampering on the BUS, when 
8785**        something really bad happens to a device, etc ...
8786**
8787**      The heuristic suggested by SYMBIOS to handle 
8788**      multiple interrupts is to try unstacking all 
8789**      interrupts conditions and to handle them on some 
8790**      priority based on error severity.
8791**      This will work when the unstacking has been 
8792**      successful, but we cannot be 100 % sure of that, 
8793**      since the CPU may have been faster to unstack than 
8794**      the chip is able to stack. Hmmm ... But it seems that 
8795**      such a situation is very unlikely to happen.
8796**
8797**      If this happen, for example STO catched by the CPU 
8798**      then UDC happenning before the CPU have restarted 
8799**      the SCRIPTS, the driver may wrongly complete the 
8800**      same command on UDC, since the SCRIPTS didn't restart 
8801**      and the DSA still points to the same command.
8802**      We avoid this situation by setting the DSA to an 
8803**      invalid value when the CCB is completed and before 
8804**      restarting the SCRIPTS.
8805**
8806**      Another issue is that we need some section of our 
8807**      recovery procedures to be somehow uninterruptible and 
8808**      that the SCRIPTS processor does not provides such a 
8809**      feature. For this reason, we handle recovery preferently 
8810**      from the C code and check against some SCRIPTS 
8811**      critical sections from the C code.
8812**
8813**      Hopefully, the interrupt handling of the driver is now 
8814**      able to resist to weird BUS error conditions, but donnot 
8815**      ask me for any guarantee that it will never fail. :-)
8816**      Use at your own decision and risk.
8817**
8818**============================================================
8819*/
8820
8821void ncr_exception (ncb_p np)
8822{
8823        u_char  istat, istatc;
8824        u_char  dstat;
8825        u_short sist;
8826        int     i;
8827
8828        /*
8829        **      interrupt on the fly ?
8830        **
8831        **      A `dummy read' is needed to ensure that the 
8832        **      clear of the INTF flag reaches the device 
8833        **      before the scanning of the DONE queue.
8834        */
8835        istat = INB (nc_istat);
8836        if (istat & INTF) {
8837                OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
8838                istat = INB (nc_istat);         /* DUMMY READ */
8839                if (DEBUG_FLAGS & DEBUG_TINY) printk ("F ");
8840                (void)ncr_wakeup_done (np);
8841        };
8842
8843        if (!(istat & (SIP|DIP)))
8844                return;
8845
8846#if 0   /* We should never get this one */
8847        if (istat & CABRT)
8848                OUTB (nc_istat, CABRT);
8849#endif
8850
8851        /*
8852        **      Steinbach's Guideline for Systems Programming:
8853        **      Never test for an error condition you don't know how to handle.
8854        */
8855
8856        /*========================================================
8857        **      PAR and MA interrupts may occur at the same time,
8858        **      and we need to know of both in order to handle 
8859        **      this situation properly. We try to unstack SCSI 
8860        **      interrupts for that reason. BTW, I dislike a LOT 
8861        **      such a loop inside the interrupt routine.
8862        **      Even if DMA interrupt stacking is very unlikely to 
8863        **      happen, we also try unstacking these ones, since 
8864        **      this has no performance impact.
8865        **=========================================================
8866        */
8867        sist    = 0;
8868        dstat   = 0;
8869        istatc  = istat;
8870        do {
8871                if (istatc & SIP)
8872                        sist  |= INW (nc_sist);
8873                if (istatc & DIP)
8874                        dstat |= INB (nc_dstat);
8875                istatc = INB (nc_istat);
8876                istat |= istatc;
8877        } while (istatc & (SIP|DIP));
8878
8879        if (DEBUG_FLAGS & DEBUG_TINY)
8880                printk ("<%d|%x:%x|%x:%x>",
8881                        (int)INB(nc_scr0),
8882                        dstat,sist,
8883                        (unsigned)INL(nc_dsp),
8884                        (unsigned)INL(nc_dbc));
8885
8886        /*
8887        **      On paper, a memory barrier may be needed here.
8888        **      And since we are paranoid ... :)
8889        */
8890        MEMORY_BARRIER();
8891
8892        /*========================================================
8893        **      First, interrupts we want to service cleanly.
8894        **
8895        **      Phase mismatch (MA) is the most frequent interrupt 
8896        **      for chip earlier than the 896 and so we have to service 
8897        **      it as quickly as possible.
8898        **      A SCSI parity error (PAR) may be combined with a phase 
8899        **      mismatch condition (MA).
8900        **      Programmed interrupts (SIR) are used to call the C code 
8901        **      from SCRIPTS.
8902        **      The single step interrupt (SSI) is not used in this 
8903        **      driver.
8904        **=========================================================
8905        */
8906
8907        if (!(sist  & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
8908            !(dstat & (MDPE|BF|ABRT|IID))) {
8909                if      (sist & PAR)    ncr_int_par (np, sist);
8910                else if (sist & MA)     ncr_int_ma (np);
8911                else if (dstat & SIR)   ncr_int_sir (np);
8912                else if (dstat & SSI)   OUTONB_STD ();
8913                else                    goto unknown_int;
8914                return;
8915        };
8916
8917        /*========================================================
8918        **      Now, interrupts that donnot happen in normal 
8919        **      situations and that we may need to recover from.
8920        **
8921        **      On SCSI RESET (RST), we reset everything.
8922        **      On SCSI BUS MODE CHANGE (SBMC), we complete all 
8923        **      active CCBs with RESET status, prepare all devices 
8924        **      for negotiating again and restart the SCRIPTS.
8925        **      On STO and UDC, we complete the CCB with the corres- 
8926        **      ponding status and restart the SCRIPTS.
8927        **=========================================================
8928        */
8929
8930        if (sist & RST) {
8931                ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET);
8932                return;
8933        };
8934
8935        OUTB (nc_ctest3, np->rv_ctest3 | CLF);  /* clear dma fifo  */
8936        OUTB (nc_stest3, TE|CSF);               /* clear scsi fifo */
8937
8938        if (!(sist  & (GEN|HTH|SGE)) &&
8939            !(dstat & (MDPE|BF|ABRT|IID))) {
8940                if      (sist & SBMC)   ncr_int_sbmc (np);
8941                else if (sist & STO)    ncr_int_sto (np);
8942                else if (sist & UDC)    ncr_int_udc (np);
8943                else                    goto unknown_int;
8944                return;
8945        };
8946
8947        /*=========================================================
8948        **      Now, interrupts we are not able to recover cleanly.
8949        **
8950        **      Do the register dump.
8951        **      Log message for hard errors.
8952        **      Reset everything.
8953        **=========================================================
8954        */
8955        if (ktime_exp(np->regtime)) {
8956                np->regtime = ktime_get(10*HZ);
8957                for (i = 0; i<sizeof(np->regdump); i++)
8958                        ((char*)&np->regdump)[i] = INB_OFF(i);
8959                np->regdump.nc_dstat = dstat;
8960                np->regdump.nc_sist  = sist;
8961        };
8962
8963        ncr_log_hard_error(np, sist, dstat);
8964
8965        if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8966                (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
8967                u_char ctest4_o, ctest4_m;
8968                u_char shadow;
8969
8970                /* 
8971                 * Get shadow register data 
8972                 * Write 1 to ctest4
8973                 */
8974                ctest4_o = INB(nc_ctest4);
8975
8976                OUTB(nc_ctest4, ctest4_o | 0x10);
8977                
8978                ctest4_m = INB(nc_ctest4);
8979                shadow = INW_OFF(0x42);
8980
8981                OUTB(nc_ctest4, ctest4_o);
8982
8983                printk("%s: ctest4/sist original 0x%x/0x%X  mod: 0x%X/0x%x\n", 
8984                        ncr_name(np), ctest4_o, sist, ctest4_m, shadow);
8985        }
8986
8987        if ((sist & (GEN|HTH|SGE)) ||
8988                (dstat & (MDPE|BF|ABRT|IID))) {
8989                ncr_start_reset(np);
8990                return;
8991        };
8992
8993unknown_int:
8994        /*=========================================================
8995        **      We just miss the cause of the interrupt. :(
8996        **      Print a message. The timeout will do the real work.
8997        **=========================================================
8998        */
8999        printk( "%s: unknown interrupt(s) ignored, "
9000                "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
9001                ncr_name(np), istat, dstat, sist);
9002}
9003
9004
9005/*==========================================================
9006**
9007**      generic recovery from scsi interrupt
9008**
9009**==========================================================
9010**
9011**      The doc says that when the chip gets an SCSI interrupt,
9012**      it tries to stop in an orderly fashion, by completing 
9013**      an instruction fetch that had started or by flushing 
9014**      the DMA fifo for a write to memory that was executing.
9015**      Such a fashion is not enough to know if the instruction 
9016**      that was just before the current DSP value has been 
9017**      executed or not.
9018**
9019**      There are 3 small SCRIPTS sections that deal with the 
9020**      start queue and the done queue that may break any 
9021**      assomption from the C code if we are interrupted 
9022**      inside, so we reset if it happens. Btw, since these 
9023**      SCRIPTS sections are executed while the SCRIPTS hasn't 
9024**      started SCSI operations, it is very unlikely to happen.
9025**
9026**      All the driver data structures are supposed to be 
9027**      allocated from the same 4 GB memory window, so there 
9028**      is a 1 to 1 relationship between DSA and driver data 
9029**      structures. Since we are careful :) to invalidate the 
9030**      DSA when we complete a command or when the SCRIPTS 
9031**      pushes a DSA into a queue, we can trust it when it 
9032**      points to a CCB.
9033**
9034**----------------------------------------------------------
9035*/
9036static void ncr_recover_scsi_int (ncb_p np, u_char hsts)
9037{
9038        u_int32 dsp     = INL (nc_dsp);
9039        u_int32 dsa     = INL (nc_dsa);
9040        ccb_p cp        = ncr_ccb_from_dsa(np, dsa);
9041
9042        /*
9043        **      If we haven't been interrupted inside the SCRIPTS 
9044        **      critical pathes, we can safely restart the SCRIPTS 
9045        **      and trust the DSA value if it matches a CCB.
9046        */
9047        if ((!(dsp > NCB_SCRIPT_PHYS (np, getjob_begin) &&
9048               dsp < NCB_SCRIPT_PHYS (np, getjob_end) + 1)) &&
9049            (!(dsp > NCB_SCRIPT_PHYS (np, ungetjob) &&
9050               dsp < NCB_SCRIPT_PHYS (np, reselect) + 1)) &&
9051            (!(dsp > NCB_SCRIPTH_PHYS (np, sel_for_abort) &&
9052               dsp < NCB_SCRIPTH_PHYS (np, sel_for_abort_1) + 1)) &&
9053            (!(dsp > NCB_SCRIPT_PHYS (np, done) &&
9054               dsp < NCB_SCRIPT_PHYS (np, done_end) + 1))) {
9055                if (cp) {
9056                        cp->host_status = hsts;
9057                        ncr_complete (np, cp);
9058                }
9059                OUTL (nc_dsa, DSA_INVALID);
9060                OUTB (nc_ctest3, np->rv_ctest3 | CLF);  /* clear dma fifo  */
9061                OUTB (nc_stest3, TE|CSF);               /* clear scsi fifo */
9062                OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
9063        }
9064        else
9065                goto reset_all;
9066
9067        return;
9068
9069reset_all:
9070        ncr_start_reset(np);
9071}
9072
9073/*==========================================================
9074**
9075**      ncr chip exception handler for selection timeout
9076**
9077**==========================================================
9078**
9079**      There seems to be a bug in the 53c810.
9080**      Although a STO-Interrupt is pending,
9081**      it continues executing script commands.
9082**      But it will fail and interrupt (IID) on
9083**      the next instruction where it's looking
9084**      for a valid phase.
9085**
9086**----------------------------------------------------------
9087*/
9088
9089void ncr_int_sto (ncb_p np)
9090{
9091        u_int32 dsp     = INL (nc_dsp);
9092
9093        if (DEBUG_FLAGS & DEBUG_TINY) printk ("T");
9094
9095        if (dsp == NCB_SCRIPT_PHYS (np, wf_sel_done) + 8 ||
9096            !(driver_setup.recovery & 1))
9097                ncr_recover_scsi_int(np, HS_SEL_TIMEOUT);
9098        else
9099                ncr_start_reset(np);
9100}
9101
9102/*==========================================================
9103**
9104**      ncr chip exception handler for unexpected disconnect
9105**
9106**==========================================================
9107**
9108**----------------------------------------------------------
9109*/
9110void ncr_int_udc (ncb_p np)
9111{
9112        u_int32 dsa = INL (nc_dsa);
9113        ccb_p   cp  = ncr_ccb_from_dsa(np, dsa);
9114
9115        /*
9116         * Fix Up. Some disks respond to a PPR negotation with
9117         * a bus free instead of a message reject. 
9118         * Disable ppr negotiation if this is first time
9119         * tried ppr negotiation.
9120         */
9121        if (cp) {
9122                tcb_p tp = &np->target[cp->target];
9123                if (tp->ppr_negotiation == 1)
9124                        tp->ppr_negotiation = 0;
9125        }
9126        
9127        printk ("%s: unexpected disconnect\n", ncr_name(np));
9128        ncr_recover_scsi_int(np, HS_UNEXPECTED);
9129}
9130
9131/*==========================================================
9132**
9133**      ncr chip exception handler for SCSI bus mode change
9134**
9135**==========================================================
9136**
9137**      spi2-r12 11.2.3 says a transceiver mode change must 
9138**      generate a reset event and a device that detects a reset 
9139**      event shall initiate a hard reset. It says also that a
9140**      device that detects a mode change shall set data transfer 
9141**      mode to eight bit asynchronous, etc...
9142**      So, just resetting should be enough.
9143**       
9144**
9145**----------------------------------------------------------
9146*/
9147
9148static void ncr_int_sbmc (ncb_p np)
9149{
9150        u_char scsi_mode = INB (nc_stest4) & SMODE;
9151
9152        printk("%s: SCSI bus mode change from %x to %x.\n",
9153                ncr_name(np), np->scsi_mode, scsi_mode);
9154
9155        np->scsi_mode = scsi_mode;
9156
9157
9158        /*
9159        **      Suspend command processing for 1 second and 
9160        **      reinitialize all except the chip.
9161        */
9162        np->settle_time = ktime_get(1*HZ);
9163        ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET);
9164}
9165
9166/*==========================================================
9167**
9168**      ncr chip exception handler for SCSI parity error.
9169**
9170**==========================================================
9171**
9172**      When the chip detects a SCSI parity error and is 
9173**      currently executing a (CH)MOV instruction, it does 
9174**      not interrupt immediately, but tries to finish the 
9175**      transfer of the current scatter entry before 
9176**      interrupting. The following situations may occur:
9177**
9178**      - The complete scatter entry has been transferred 
9179**        without the device having changed phase.
9180**        The chip will then interrupt with the DSP pointing 
9181**        to the instruction that follows the MOV.
9182**
9183**      - A phase mismatch occurs before the MOV finished 
9184**        and phase errors are to be handled by the C code.
9185**        The chip will then interrupt with both PAR and MA 
9186**        conditions set.
9187**
9188**      - A phase mismatch occurs before the MOV finished and 
9189**        phase errors are to be handled by SCRIPTS (895A or 896).
9190**        The chip will load the DSP with the phase mismatch 
9191**        JUMP address and interrupt the host processor.
9192**
9193**----------------------------------------------------------
9194*/
9195
9196static void ncr_int_par (ncb_p np, u_short sist)
9197{
9198        u_char  hsts    = INB (HS_PRT);
9199        u_int32 dsp     = INL (nc_dsp);
9200        u_int32 dbc     = INL (nc_dbc);
9201        u_int32 dsa     = INL (nc_dsa);
9202        u_char  sbcl    = INB (nc_sbcl);
9203        u_char  cmd     = dbc >> 24;
9204        int phase       = cmd & 7;
9205        ccb_p   cp      = ncr_ccb_from_dsa(np, dsa);
9206
9207        printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
9208                ncr_name(np), hsts, dbc, sbcl);
9209
9210        /*
9211        **      Check that the chip is connected to the SCSI BUS.
9212        */
9213        if (!(INB (nc_scntl1) & ISCON)) {
9214                if (!(driver_setup.recovery & 1)) {
9215                        ncr_recover_scsi_int(np, HS_FAIL);
9216                        return;
9217                }
9218                goto reset_all;
9219        }
9220
9221        /*
9222        **      If the nexus is not clearly identified, reset the bus.
9223        **      We will try to do better later.
9224        */
9225        if (!cp)
9226                goto reset_all;
9227
9228        /*
9229        **      Check instruction was a MOV, direction was INPUT and 
9230        **      ATN is asserted.
9231        */
9232        if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
9233                goto reset_all;
9234
9235        /*
9236        **      Keep track of the parity error.
9237        */
9238        OUTONB (HF_PRT, HF_EXT_ERR);
9239        cp->xerr_status |= XE_PARITY_ERR;
9240
9241        /*
9242        **      Prepare the message to send to the device.
9243        */
9244        np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
9245
9246#ifdef  SCSI_NCR_INTEGRITY_CHECKING
9247        /*
9248        **      Save error message. For integrity check use only.
9249        */
9250        if (np->check_integrity) 
9251                np->check_integ_par = np->msgout[0];
9252#endif
9253
9254        /*
9255        **      If the old phase was DATA IN or DT DATA IN phase, 
9256        **      we have to deal with the 3 situations described above.
9257        **      For other input phases (MSG IN and STATUS), the device 
9258        **      must resend the whole thing that failed parity checking 
9259        **      or signal error. So, jumping to dispatcher should be OK.
9260        */
9261        if ((phase == 1) || (phase == 5)) {
9262                /* Phase mismatch handled by SCRIPTS */
9263                if (dsp == NCB_SCRIPTH_PHYS (np, pm_handle))
9264                        OUTL_DSP (dsp);
9265                /* Phase mismatch handled by the C code */
9266                else if (sist & MA)
9267                        ncr_int_ma (np);
9268                /* No phase mismatch occurred */
9269                else {
9270                        OUTL (nc_temp, dsp);
9271                        OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch));
9272                }
9273        }
9274        else 
9275                OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
9276        return;
9277
9278reset_all:
9279        ncr_start_reset(np);
9280        return;
9281}
9282
9283/*==========================================================
9284**
9285**
9286**      ncr chip exception handler for phase errors.
9287**
9288**
9289**==========================================================
9290**
9291**      We have to construct a new transfer descriptor,
9292**      to transfer the rest of the current block.
9293**
9294**----------------------------------------------------------
9295*/
9296
9297static void ncr_int_ma (ncb_p np)
9298{
9299        u_int32 dbc;
9300        u_int32 rest;
9301        u_int32 dsp;
9302        u_int32 dsa;
9303        u_int32 nxtdsp;
9304        u_int32 *vdsp;
9305        u_int32 oadr, olen;
9306        u_int32 *tblp;
9307        u_int32 newcmd;
9308        u_int   delta;
9309        u_char  cmd;
9310        u_char  hflags, hflags0;
9311        struct pm_ctx *pm;
9312        ccb_p   cp;
9313
9314        dsp     = INL (nc_dsp);
9315        dbc     = INL (nc_dbc);
9316        dsa     = INL (nc_dsa);
9317
9318        cmd     = dbc >> 24;
9319        rest    = dbc & 0xffffff;
9320        delta   = 0;
9321
9322        /*
9323        **      locate matching cp.
9324        */
9325        cp = ncr_ccb_from_dsa(np, dsa);
9326
9327        if (DEBUG_FLAGS & DEBUG_PHASE)
9328                printk("CCB = %2x %2x %2x %2x %2x %2x\n", 
9329                        cp->cmd->cmnd[0], cp->cmd->cmnd[1], cp->cmd->cmnd[2],
9330                        cp->cmd->cmnd[3], cp->cmd->cmnd[4], cp->cmd->cmnd[5]);
9331
9332        /*
9333        **      Donnot take into account dma fifo and various buffers in 
9334        **      INPUT phase since the chip flushes everything before 
9335        **      raising the MA interrupt for interrupted INPUT phases.
9336        **      For DATA IN phase, we will check for the SWIDE later.
9337        */
9338        if ((cmd & 7) != 1 && (cmd & 7) != 5) {
9339                u_int32 dfifo;
9340                u_char ss0, ss2;
9341
9342                /*
9343                **  If C1010, DFBC contains number of bytes in DMA fifo.
9344                **  else read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
9345                */
9346                if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
9347                                (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) 
9348                        delta = INL(nc_dfbc) & 0xffff;
9349                else {
9350                        dfifo = INL(nc_dfifo);
9351
9352                        /*
9353                        **      Calculate remaining bytes in DMA fifo.
9354                        **      C1010 - always large fifo, value in dfbc
9355                        **      Otherwise, (CTEST5 = dfifo >> 16)
9356                        */
9357                        if (dfifo & (DFS << 16))
9358                                delta = ((((dfifo >> 8) & 0x300) |
9359                                          (dfifo & 0xff)) - rest) & 0x3ff;
9360                        else
9361                                delta = ((dfifo & 0xff) - rest) & 0x7f;
9362
9363                        /*
9364                        **      The data in the dma fifo has not been 
9365                        **      transferred to the target -> add the amount 
9366                        **      to the rest and clear the data.
9367                        **      Check the sstat2 register in case of wide
9368                        **      transfer.
9369                        */
9370
9371                }
9372                
9373                rest += delta;
9374                ss0  = INB (nc_sstat0);
9375                if (ss0 & OLF) rest++;
9376                if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) && 
9377                                (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66) && (ss0 & ORF)) 
9378                        rest++;
9379                if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
9380                        ss2 = INB (nc_sstat2);
9381                        if (ss2 & OLF1) rest++;
9382                        if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
9383                                        (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66) && (ss2 & ORF)) 
9384                                rest++;
9385                };
9386
9387                /*
9388                **      Clear fifos.
9389                */
9390                OUTB (nc_ctest3, np->rv_ctest3 | CLF);  /* dma fifo  */
9391                OUTB (nc_stest3, TE|CSF);               /* scsi fifo */
9392        }
9393
9394        /*
9395        **      log the information
9396        */
9397
9398        if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
9399                printk ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
9400                        (unsigned) rest, (unsigned) delta);
9401
9402        /*
9403        **      try to find the interrupted script command,
9404        **      and the address at which to continue.
9405        */
9406        vdsp    = 0;
9407        nxtdsp  = 0;
9408        if      (dsp >  np->p_script &&
9409                 dsp <= np->p_script + sizeof(struct script)) {
9410                vdsp = (u_int32 *)((char*)np->script0 + (dsp-np->p_script-8));
9411                nxtdsp = dsp;
9412        }
9413        else if (dsp >  np->p_scripth &&
9414                 dsp <= np->p_scripth + sizeof(struct scripth)) {
9415                vdsp = (u_int32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8));
9416                nxtdsp = dsp;
9417        }
9418
9419        /*
9420        **      log the information
9421        */
9422        if (DEBUG_FLAGS & DEBUG_PHASE) {
9423                printk ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
9424                        cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
9425        };
9426
9427        if (!vdsp) {
9428                printk ("%s: interrupted SCRIPT address not found.\n", 
9429                        ncr_name (np));
9430                goto reset_all;
9431        }
9432
9433        if (!cp) {
9434                printk ("%s: SCSI phase error fixup: CCB already dequeued.\n", 
9435                        ncr_name (np));
9436                goto reset_all;
9437        }
9438
9439        /*
9440        **      get old startaddress and old length.
9441        */
9442
9443        oadr = scr_to_cpu(vdsp[1]);
9444
9445        if (cmd & 0x10) {       /* Table indirect */
9446                tblp = (u_int32 *) ((char*) &cp->phys + oadr);
9447                olen = scr_to_cpu(tblp[0]);
9448                oadr = scr_to_cpu(tblp[1]);
9449        } else {
9450                tblp = (u_int32 *) 0;
9451                olen = scr_to_cpu(vdsp[0]) & 0xffffff;
9452        };
9453
9454        if (DEBUG_FLAGS & DEBUG_PHASE) {
9455                printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
9456                        (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
9457                        tblp,
9458                        (unsigned) olen,
9459                        (unsigned) oadr);
9460        };
9461
9462        /*
9463        **      check cmd against assumed interrupted script command.
9464        **      If dt data phase, the MOVE instruction hasn't bit 4 of 
9465        **      the phase.
9466        */
9467
9468        if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
9469                PRINT_ADDR(cp->cmd);
9470                printk ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
9471                        (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
9472
9473                goto reset_all;
9474        };
9475
9476        /*
9477        **      if old phase not dataphase, leave here.
9478        **      C/D line is low if data.
9479        */
9480
9481        if (cmd & 0x02) {
9482                PRINT_ADDR(cp->cmd);
9483                printk ("phase change %x-%x %d@%08x resid=%d.\n",
9484                        cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
9485                        (unsigned)oadr, (unsigned)rest);
9486                goto unexpected_phase;
9487        };
9488
9489        /*
9490        **      Choose the correct PM save area.
9491        **
9492        **      Look at the PM_SAVE SCRIPT if you want to understand 
9493        **      this stuff. The equivalent code is implemented in 
9494        **      SCRIPTS for the 895A and 896 that are able to handle 
9495        **      PM from the SCRIPTS processor.
9496        */
9497
9498        hflags0 = INB (HF_PRT);
9499        hflags = hflags0;
9500
9501        if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
9502                if (hflags & HF_IN_PM0)
9503                        nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
9504                else if (hflags & HF_IN_PM1)
9505                        nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
9506
9507                if (hflags & HF_DP_SAVED)
9508                        hflags ^= HF_ACT_PM;
9509        }
9510
9511        if (!(hflags & HF_ACT_PM)) {
9512                pm = &cp->phys.pm0;
9513                newcmd = NCB_SCRIPT_PHYS(np, pm0_data);
9514        }
9515        else {
9516                pm = &cp->phys.pm1;
9517                newcmd = NCB_SCRIPT_PHYS(np, pm1_data);
9518        }
9519
9520        hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
9521        if (hflags != hflags0)
9522                OUTB (HF_PRT, hflags);
9523
9524        /*
9525        **      fillin the phase mismatch context
9526        */
9527
9528        pm->sg.addr = cpu_to_scr(oadr + olen - rest);
9529        pm->sg.size = cpu_to_scr(rest);
9530        pm->ret     = cpu_to_scr(nxtdsp);
9531
9532        /*
9533        **      If we have a SWIDE,
9534        **      - prepare the address to write the SWIDE from SCRIPTS,
9535        **      - compute the SCRIPTS address to restart from,
9536        **      - move current data pointer context by one byte.
9537        */
9538        nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
9539        if ( ((cmd & 7) == 1  || (cmd & 7) == 5)  
9540                && cp && (cp->phys.select.sel_scntl3 & EWS) &&
9541            (INB (nc_scntl2) & WSR)) {
9542                u32 tmp;
9543
9544#ifdef  SYM_DEBUG_PM_WITH_WSR
9545                PRINT_ADDR(cp);
9546                printk ("MA interrupt with WSR set - "
9547                        "pm->sg.addr=%x - pm->sg.size=%d\n",
9548                        pm->sg.addr, pm->sg.size);
9549#endif
9550                /*
9551                 *  Set up the table indirect for the MOVE
9552                 *  of the residual byte and adjust the data
9553                 *  pointer context.
9554                 */
9555                tmp = scr_to_cpu(pm->sg.addr);
9556                cp->phys.wresid.addr = cpu_to_scr(tmp);
9557                pm->sg.addr = cpu_to_scr(tmp + 1);
9558                tmp = scr_to_cpu(pm->sg.size);
9559                cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
9560                pm->sg.size = cpu_to_scr(tmp - 1);
9561
9562                /*
9563                 *  If only the residual byte is to be moved,
9564                 *  no PM context is needed.
9565                 */
9566                if ((tmp&0xffffff) == 1)
9567                        newcmd = pm->ret;
9568
9569                /*
9570                 *  Prepare the address of SCRIPTS that will
9571                 *  move the residual byte to memory.
9572                 */
9573                nxtdsp = NCB_SCRIPTH_PHYS (np, wsr_ma_helper);
9574        }
9575
9576        if (DEBUG_FLAGS & DEBUG_PHASE) {
9577                PRINT_ADDR(cp->cmd);
9578                printk ("PM %x %x %x / %x %x %x.\n",
9579                        hflags0, hflags, newcmd,
9580                        (unsigned)scr_to_cpu(pm->sg.addr),
9581                        (unsigned)scr_to_cpu(pm->sg.size),
9582                        (unsigned)scr_to_cpu(pm->ret));
9583        }
9584
9585        /*
9586        **      Restart the SCRIPTS processor.
9587        */
9588
9589        OUTL (nc_temp, newcmd);
9590        OUTL_DSP (nxtdsp);
9591        return;
9592
9593        /*
9594        **      Unexpected phase changes that occurs when the current phase 
9595        **      is not a DATA IN or DATA OUT phase are due to error conditions.
9596        **      Such event may only happen when the SCRIPTS is using a 
9597        **      multibyte SCSI MOVE.
9598        **
9599        **      Phase change            Some possible cause
9600        **
9601        **      COMMAND  --> MSG IN     SCSI parity error detected by target.
9602        **      COMMAND  --> STATUS     Bad command or refused by target.
9603        **      MSG OUT  --> MSG IN     Message rejected by target.
9604        **      MSG OUT  --> COMMAND    Bogus target that discards extended
9605        **                              negotiation messages.
9606        **
9607        **      The code below does not care of the new phase and so 
9608        **      trusts the target. Why to annoy it ?
9609        **      If the interrupted phase is COMMAND phase, we restart at
9610        **      dispatcher.
9611        **      If a target does not get all the messages after selection, 
9612        **      the code assumes blindly that the target discards extended 
9613        **      messages and clears the negotiation status.
9614        **      If the target does not want all our response to negotiation,
9615        **      we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids 
9616        **      bloat for such a should_not_happen situation).
9617        **      In all other situation, we reset the BUS.
9618        **      Are these assumptions reasonnable ? (Wait and see ...)
9619        */
9620unexpected_phase:
9621        dsp -= 8;
9622        nxtdsp = 0;
9623
9624        switch (cmd & 7) {
9625        case 2: /* COMMAND phase */
9626                nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
9627                break;
9628#if 0
9629        case 3: /* STATUS  phase */
9630                nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
9631                break;
9632#endif
9633        case 6: /* MSG OUT phase */
9634                /*
9635                **      If the device may want to use untagged when we want 
9636                **      tagged, we prepare an IDENTIFY without disc. granted, 
9637                **      since we will not be able to handle reselect.
9638                **      Otherwise, we just don't care.
9639                */
9640                if      (dsp == NCB_SCRIPT_PHYS (np, send_ident)) {
9641                        if (cp->tag != NO_TAG && olen - rest <= 3) {
9642                                cp->host_status = HS_BUSY;
9643                                np->msgout[0] = M_IDENTIFY | cp->lun;
9644                                nxtdsp = NCB_SCRIPTH_PHYS (np, ident_break_atn);
9645                        }
9646                        else
9647                                nxtdsp = NCB_SCRIPTH_PHYS (np, ident_break);
9648                }
9649                else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) ||
9650                         dsp == NCB_SCRIPTH_PHYS (np, send_sdtr) ||
9651                         dsp == NCB_SCRIPTH_PHYS (np, send_ppr)) {
9652                        nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase);
9653                }
9654                break;
9655#if 0
9656        case 7: /* MSG IN  phase */
9657                nxtdsp = NCB_SCRIPT_PHYS (np, clrack);
9658                break;
9659#endif
9660        }
9661
9662        if (nxtdsp) {
9663                OUTL_DSP (nxtdsp);
9664                return;
9665        }
9666
9667reset_all:
9668        ncr_start_reset(np);
9669}
9670
9671/*==========================================================
9672**
9673**      ncr chip handler for QUEUE FULL and CHECK CONDITION
9674**
9675**==========================================================
9676**
9677**      On QUEUE FULL status, we set the actual tagged command 
9678**      queue depth to the number of disconnected CCBs that is 
9679**      hopefully a good value to avoid further QUEUE FULL.
9680**
9681**      On CHECK CONDITION or COMMAND TERMINATED, we use the  
9682**      CCB of the failed command for performing a REQUEST 
9683**      SENSE SCSI command.
9684**
9685**      We do not want to change the order commands will be 
9686**      actually queued to the device after we received a 
9687**      QUEUE FULL status. We also want to properly deal with 
9688**      contingent allegiance condition. For these reasons, 
9689**      we remove from the start queue all commands for this 
9690**      LUN that haven't been yet queued to the device and 
9691**      put them back in the correponding LUN queue, then  
9692**      requeue the CCB that failed in front of the LUN queue.
9693**      I just hope this not to be performed too often. :)
9694**
9695**      If we are using IMMEDIATE ARBITRATION, we clear the 
9696**      IARB hint for every commands we encounter in order not 
9697**      to be stuck with a won arbitration and no job to queue 
9698**      to a device.
9699**----------------------------------------------------------
9700*/
9701
9702static void ncr_sir_to_redo(ncb_p np, int num, ccb_p cp)
9703{
9704        Scsi_Cmnd *cmd  = cp->cmd;
9705        tcb_p tp        = &np->target[cp->target];
9706        lcb_p lp        = ncr_lp(np, tp, cp->lun);
9707        ccb_p           cp2;
9708        int             busyccbs = 1;
9709        u_int32         startp;
9710        u_char          s_status = INB (SS_PRT);
9711        int             msglen;
9712        int             i, j;
9713
9714
9715        /*
9716        **      If the LCB is not yet available, then only 
9717        **      1 IO is accepted, so we should have it.
9718        */
9719        if (!lp)
9720                goto next;      
9721        /*
9722        **      Remove all CCBs queued to the chip for that LUN and put 
9723        **      them back in the LUN CCB wait queue.
9724        */
9725        busyccbs = lp->queuedccbs;
9726        i = (INL (nc_scratcha) - np->p_squeue) / 4;
9727        j = i;
9728        while (i != np->squeueput) {
9729                cp2 = ncr_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
9730                assert(cp2);
9731#ifdef SCSI_NCR_IARB_SUPPORT
9732                /* IARB hints may not be relevant any more. Forget them. */
9733                cp2->host_flags &= ~HF_HINT_IARB;
9734#endif
9735                if (cp2 && cp2->target == cp->target && cp2->lun == cp->lun) {
9736                        xpt_remque(&cp2->link_ccbq);
9737                        xpt_insque_head(&cp2->link_ccbq, &lp->wait_ccbq);
9738                        --lp->queuedccbs;
9739                        cp2->queued = 0;
9740                }
9741                else {
9742                        if (i != j)
9743                                np->squeue[j] = np->squeue[i];
9744                        if ((j += 2) >= MAX_START*2) j = 0;
9745                }
9746                if ((i += 2) >= MAX_START*2) i = 0;
9747        }
9748        if (i != j)             /* Copy back the idle task if needed */
9749                np->squeue[j] = np->squeue[i];
9750        np->squeueput = j;      /* Update our current start queue pointer */
9751
9752        /*
9753        **      Requeue the interrupted CCB in front of the 
9754        **      LUN CCB wait queue to preserve ordering.
9755        */
9756        xpt_remque(&cp->link_ccbq);
9757        xpt_insque_head(&cp->link_ccbq, &lp->wait_ccbq);
9758        --lp->queuedccbs;
9759        cp->queued = 0;
9760
9761next:
9762
9763#ifdef SCSI_NCR_IARB_SUPPORT
9764        /* IARB hint may not be relevant any more. Forget it. */
9765        cp->host_flags &= ~HF_HINT_IARB;
9766        if (np->last_cp)
9767                np->last_cp = 0;
9768#endif
9769
9770        /*
9771        **      Now we can restart the SCRIPTS processor safely.
9772        */
9773        OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
9774
9775        switch(s_status) {
9776        default:
9777        case S_BUSY:
9778                ncr_complete(np, cp);
9779                break;
9780        case S_QUEUE_FULL:
9781                if (!lp || !lp->queuedccbs) {
9782                        ncr_complete(np, cp);
9783                        break;
9784                }
9785                if (bootverbose >= 1) {
9786                        PRINT_ADDR(cmd);
9787                        printk ("QUEUE FULL! %d busy, %d disconnected CCBs\n",
9788                                busyccbs, lp->queuedccbs);
9789                }
9790                /*
9791                **      Decrease number of tags to the number of 
9792                **      disconnected commands.
9793                */
9794                if (lp->queuedccbs < lp->numtags) {
9795                        lp->numtags     = lp->queuedccbs;
9796                        lp->num_good    = 0;
9797                        ncr_setup_tags (np, cp->target, cp->lun);
9798                }
9799                /*
9800                **      Repair the offending CCB.
9801                */
9802                cp->phys.header.savep   = cp->startp;
9803                cp->phys.header.lastp   = cp->lastp0;
9804                cp->host_status         = HS_BUSY;
9805                cp->scsi_status         = S_ILLEGAL;
9806                cp->xerr_status         = 0;
9807                cp->extra_bytes         = 0;
9808                cp->host_flags          &= (HF_PM_TO_C|HF_DATA_IN);
9809
9810                break;
9811
9812        case S_TERMINATED:
9813        case S_CHECK_COND:
9814                /*
9815                **      If we were requesting sense, give up.
9816                */
9817                if (cp->host_flags & HF_AUTO_SENSE) {
9818                        ncr_complete(np, cp);
9819                        break;
9820                }
9821
9822                /*
9823                **      Save SCSI status and extended error.
9824                **      Compute the data residual now.
9825                */
9826                cp->sv_scsi_status = cp->scsi_status;
9827                cp->sv_xerr_status = cp->xerr_status;
9828                cp->resid = ncr_compute_residual(np, cp);
9829
9830                /*
9831                **      Device returned CHECK CONDITION status.
9832                **      Prepare all needed data strutures for getting 
9833                **      sense data.
9834                */
9835
9836                /*
9837                **      identify message
9838                */
9839                cp->scsi_smsg2[0]       = M_IDENTIFY | cp->lun;
9840                msglen = 1;
9841
9842                /*
9843                **      If we are currently using anything different from 
9844                **      async. 8 bit data transfers with that target,
9845                **      start a negotiation, since the device may want 
9846                **      to report us a UNIT ATTENTION condition due to 
9847                **      a cause we currently ignore, and we donnot want 
9848                **      to be stuck with WIDE and/or SYNC data transfer.
9849                **
9850                **      cp->nego_status is filled by ncr_prepare_nego().
9851                **
9852                **      Do NOT negotiate if performing integrity check
9853                **      or if integrity check has completed, all check
9854                **      conditions will have been cleared.
9855                */
9856
9857#ifdef  SCSI_NCR_INTEGRITY_CHECKING
9858                if (DEBUG_FLAGS & DEBUG_IC) {
9859                printk("%s: ncr_sir_to_redo: ic_done %2X, in_progress %2X\n",
9860                        ncr_name(np), tp->ic_done, cp->cmd->ic_in_progress);
9861                }
9862
9863                /*
9864                **      If parity error during integrity check,
9865                **      set the target width to narrow. Otherwise,
9866                **      do not negotiate on a request sense.
9867                */
9868                if ( np->check_integ_par && np->check_integrity 
9869                                                && cp->cmd->ic_in_progress ) { 
9870                        cp->nego_status = 0;
9871                        msglen +=
9872                            ncr_ic_nego (np, cp, cmd ,&cp->scsi_smsg2[msglen]);
9873                }
9874
9875                if (!np->check_integrity || 
9876                        (np->check_integrity && 
9877                                (!cp->cmd->ic_in_progress && !tp->ic_done)) ) { 
9878                    ncr_negotiate(np, tp);
9879                    cp->nego_status = 0;
9880                    {
9881                        u_char sync_offset;
9882                        if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
9883                                        (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
9884                                sync_offset = tp->sval & 0x3f;
9885                        else
9886                                sync_offset = tp->sval & 0x1f;
9887
9888                        if ((tp->wval & EWS) || sync_offset)
9889                          msglen +=
9890                            ncr_prepare_nego (np, cp, &cp->scsi_smsg2[msglen]);
9891                    }
9892
9893                }
9894#else
9895                ncr_negotiate(np, tp);
9896                cp->nego_status = 0;
9897                if ((tp->wval & EWS) || (tp->sval & 0x1f))
9898                        msglen +=
9899                            ncr_prepare_nego (np, cp, &cp->scsi_smsg2[msglen]);
9900#endif  /* SCSI_NCR_INTEGRITY_CHECKING */
9901
9902                /*
9903                **      Message table indirect structure.
9904                */
9905                cp->phys.smsg.addr      = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2));
9906                cp->phys.smsg.size      = cpu_to_scr(msglen);
9907
9908                /*
9909                **      sense command
9910                */
9911                cp->phys.cmd.addr       = cpu_to_scr(CCB_PHYS (cp, sensecmd));
9912                cp->phys.cmd.size       = cpu_to_scr(6);
9913
9914                /*
9915                **      patch requested size into sense command
9916                */
9917                cp->sensecmd[0]         = 0x03;
9918                cp->sensecmd[1]         = cp->lun << 5;
9919                cp->sensecmd[4]         = sizeof(cp->sense_buf);
9920
9921                /*
9922                **      sense data
9923                */
9924                bzero(cp->sense_buf, sizeof(cp->sense_buf));
9925                cp->phys.sense.addr     = cpu_to_scr(CCB_PHYS(cp,sense_buf[0]));
9926                cp->phys.sense.size     = cpu_to_scr(sizeof(cp->sense_buf));
9927
9928                /*
9929                **      requeue the command.
9930                */
9931                startp = NCB_SCRIPTH_PHYS (np, sdata_in);
9932
9933                cp->phys.header.savep   = cpu_to_scr(startp);
9934                cp->phys.header.goalp   = cpu_to_scr(startp + 16);
9935                cp->phys.header.lastp   = cpu_to_scr(startp);
9936                cp->phys.header.wgoalp  = cpu_to_scr(startp + 16);
9937                cp->phys.header.wlastp  = cpu_to_scr(startp);
9938
9939                cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
9940                cp->scsi_status = S_ILLEGAL;
9941                cp->host_flags  = (HF_AUTO_SENSE|HF_DATA_IN);
9942
9943                cp->phys.header.go.start =
9944                        cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
9945
9946                /*
9947                **      If lp not yet allocated, requeue the command.
9948                */
9949                if (!lp)
9950                        ncr_put_start_queue(np, cp);
9951                break;
9952        }
9953
9954        /*
9955        **      requeue awaiting scsi commands for this lun.
9956        */
9957        if (lp)
9958                ncr_start_next_ccb(np, lp, 1);
9959
9960        return;
9961}
9962
9963/*----------------------------------------------------------
9964**
9965**      After a device has accepted some management message 
9966**      as BUS DEVICE RESET, ABORT TASK, etc ..., or when 
9967**      a device signals a UNIT ATTENTION condition, some 
9968**      tasks are thrown away by the device. We are required 
9969**      to reflect that on our tasks list since the device 
9970**      will never complete these tasks.
9971**
9972**      This function completes all disconnected CCBs for a 
9973**      given target that matches the following criteria:
9974**      - lun=-1  means any logical UNIT otherwise a given one.
9975**      - task=-1 means any task, otherwise a given one.
9976**----------------------------------------------------------
9977*/
9978static int ncr_clear_tasks(ncb_p np, u_char hsts, 
9979                           int target, int lun, int task)
9980{
9981        int i = 0;
9982        ccb_p cp;
9983
9984        for (cp = np->ccbc; cp; cp = cp->link_ccb) {
9985                if (cp->host_status != HS_DISCONNECT)
9986                        continue;
9987                if (cp->target != target)
9988                        continue;
9989                if (lun != -1 && cp->lun != lun)
9990                        continue;
9991                if (task != -1 && cp->tag != NO_TAG && cp->scsi_smsg[2] != task)
9992                        continue;
9993                cp->host_status = hsts;
9994                cp->scsi_status = S_ILLEGAL;
9995                ncr_complete(np, cp);
9996                ++i;
9997        }
9998        return i;
9999}
10000
10001/*==========================================================
10002**
10003**      ncr chip handler for TASKS recovery.
10004**
10005**==========================================================
10006**
10007**      We cannot safely abort a command, while the SCRIPTS 
10008**      processor is running, since we just would be in race 
10009**      with it.
10010**
10011**      As long as we have tasks to abort, we keep the SEM 
10012**      bit set in the ISTAT. When this bit is set, the 
10013**      SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED) 
10014**      each time it enters the scheduler.
10015**
10016**      If we have to reset a target, clear tasks of a unit,
10017**      or to perform the abort of a disconnected job, we 
10018**      restart the SCRIPTS for selecting the target. Once 
10019**      selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
10020**      If it loses arbitration, the SCRIPTS will interrupt again 
10021**      the next time it will enter its scheduler, and so on ...
10022**
10023**      On SIR_TARGET_SELECTED, we scan for the more 
10024**      appropriate thing to do:
10025**
10026**      - If nothing, we just sent a M_ABORT message to the 
10027**        target to get rid of the useless SCSI bus ownership.
10028**        According to the specs, no tasks shall be affected.
10029**      - If the target is to be reset, we send it a M_RESET 
10030**        message.
10031**      - If a logical UNIT is to be cleared , we send the 
10032**        IDENTIFY(lun) + M_ABORT.
10033**      - If an untagged task is to be aborted, we send the 
10034**        IDENTIFY(lun) + M_ABORT.
10035**      - If a tagged task is to be aborted, we send the 
10036**        IDENTIFY(lun) + task attributes + M_ABORT_TAG.
10037**
10038**      Once our 'kiss of death' :) message has been accepted 
10039**      by the target, the SCRIPTS interrupts again 
10040**      (SIR_ABORT_SENT). On this interrupt, we complete 
10041**      all the CCBs that should have been aborted by the 
10042**      target according to our message.
10043**      
10044**----------------------------------------------------------
10045*/
10046static void ncr_sir_task_recovery(ncb_p np, int num)
10047{
10048        ccb_p cp;
10049        tcb_p tp;
10050        int target=-1, lun=-1, task;
10051        int i, k;
10052        u_char *p;
10053
10054        switch(num) {
10055        /*
10056        **      The SCRIPTS processor stopped before starting
10057        **      the next command in order to allow us to perform 
10058        **      some task recovery.
10059        */
10060        case SIR_SCRIPT_STOPPED:
10061
10062                /*
10063                **      Do we have any target to reset or unit to clear ?
10064                */
10065                for (i = 0 ; i < MAX_TARGET ; i++) {
10066                        tp = &np->target[i];
10067                        if (tp->to_reset || (tp->l0p && tp->l0p->to_clear)) {
10068                                target = i;
10069                                break;
10070                        }
10071                        if (!tp->lmp)
10072                                continue;
10073                        for (k = 1 ; k < MAX_LUN ; k++) {
10074                                if (tp->lmp[k] && tp->lmp[k]->to_clear) {
10075                                        target  = i;
10076                                        break;
10077                                }
10078                        }
10079                        if (target != -1)
10080                                break;
10081                }
10082
10083                /*
10084                **      If not, look at the CCB list for any 
10085                **      disconnected CCB to be aborted.
10086                */
10087                if (target == -1) {
10088                        for (cp = np->ccbc; cp; cp = cp->link_ccb) {
10089                                if (cp->host_status != HS_DISCONNECT)
10090                                        continue;
10091                                if (cp->to_abort) {
10092                                        target = cp->target;
10093                                        break;
10094                                }
10095                        }
10096                }
10097
10098                /*
10099                **      If some target is to be selected, 
10100                **      prepare and start the selection.
10101                */
10102                if (target != -1) {
10103                        tp = &np->target[target];
10104                        np->abrt_sel.sel_id     = target;
10105                        np->abrt_sel.sel_scntl3 = tp->wval;
10106                        np->abrt_sel.sel_sxfer  = tp->sval;
10107                        np->abrt_sel.sel_scntl4 = tp->uval;
10108                        OUTL(nc_dsa, np->p_ncb);
10109                        OUTL_DSP (NCB_SCRIPTH_PHYS (np, sel_for_abort));
10110                        return;
10111                }
10112
10113                /*
10114                **      Nothing is to be selected, so we donnot need 
10115                **      to synchronize with the SCRIPTS anymore.
10116                **      Remove the SEM flag from the ISTAT.
10117                */
10118                np->istat_sem = 0;
10119                OUTB (nc_istat, SIGP);
10120
10121                /*
10122                **      Now look at CCBs to abort that haven't started yet.
10123                **      Remove all those CCBs from the start queue and 
10124                **      complete them with appropriate status.
10125                **      Btw, the SCRIPTS processor is still stopped, so 
10126                **      we are not in race.
10127                */
10128                for (cp = np->ccbc; cp; cp = cp->link_ccb) {
10129                        if (cp->host_status != HS_BUSY &&
10130                            cp->host_status != HS_NEGOTIATE)
10131                                continue;
10132                        if (!cp->to_abort)
10133                                continue;
10134#ifdef SCSI_NCR_IARB_SUPPORT
10135                        /*
10136                        **    If we are using IMMEDIATE ARBITRATION, we donnot 
10137                        **    want to cancel the last queued CCB, since the 
10138                        **    SCRIPTS may have anticipated the selection.
10139                        */
10140                        if (cp == np->last_cp) {
10141                                cp->to_abort = 0;
10142                                continue;
10143                        }
10144#endif
10145                        /*
10146                        **      Compute index of next position in the start 
10147                        **      queue the SCRIPTS will schedule.
10148                        */
10149                        i = (INL (nc_scratcha) - np->p_squeue) / 4;
10150
10151                        /*
10152                        **      Remove the job from the start queue.
10153                        */
10154                        k = -1;
10155                        while (1) {
10156                                if (i == np->squeueput)
10157                                        break;
10158                                if (k == -1) {          /* Not found yet */
10159                                        if (cp == ncr_ccb_from_dsa(np,
10160                                                     scr_to_cpu(np->squeue[i])))
10161                                                k = i;  /* Found */
10162                                }
10163                                else {
10164                                        /*
10165                                        **    Once found, we have to move 
10166                                        **    back all jobs by 1 position.
10167                                        */
10168                                        np->squeue[k] = np->squeue[i];
10169                                        k += 2;
10170                                        if (k >= MAX_START*2)
10171                                                k = 0;
10172                                }
10173
10174                                i += 2;
10175                                if (i >= MAX_START*2)
10176                                        i = 0;
10177                        }
10178                        /*
10179                        **      If job removed, repair the start queue.
10180                        */
10181                        if (k != -1) {
10182                                np->squeue[k] = np->squeue[i]; /* Idle task */
10183                                np->squeueput = k; /* Start queue pointer */
10184                        }
10185                        cp->host_status = HS_ABORTED;
10186                        cp->scsi_status = S_ILLEGAL;
10187                        ncr_complete(np, cp);
10188                }
10189                break;
10190        /*
10191        **      The SCRIPTS processor has selected a target 
10192        **      we may have some manual recovery to perform for.
10193        */
10194        case SIR_TARGET_SELECTED:
10195                target = (INB (nc_sdid) & 0xf);
10196                tp = &np->target[target];
10197
10198                np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
10199
10200                /*
10201                **      If the target is to be reset, prepare a 
10202                **      M_RESET message and clear the to_reset flag 
10203                **      since we donnot expect this operation to fail.
10204                */
10205                if (tp->to_reset) {
10206                        np->abrt_msg[0] = M_RESET;
10207                        np->abrt_tbl.size = 1;
10208                        tp->to_reset = 0;
10209                        break;
10210                }
10211
10212                /*
10213                **      Otherwise, look for some logical unit to be cleared.
10214                */
10215                if (tp->l0p && tp->l0p->to_clear)
10216                        lun = 0;
10217                else if (tp->lmp) {
10218                        for (k = 1 ; k < MAX_LUN ; k++) {
10219                                if (tp->lmp[k] && tp->lmp[k]->to_clear) {
10220                                        lun = k;
10221                                        break;
10222                                }
10223                        }
10224                }
10225
10226                /*
10227                **      If a logical unit is to be cleared, prepare 
10228                **      an IDENTIFY(lun) + ABORT MESSAGE.
10229                */
10230                if (lun != -1) {
10231                        lcb_p lp = ncr_lp(np, tp, lun);
10232                        lp->to_clear = 0; /* We donnot expect to fail here */
10233                        np->abrt_msg[0] = M_IDENTIFY | lun;
10234                        np->abrt_msg[1] = M_ABORT;
10235                        np->abrt_tbl.size = 2;
10236                        break;
10237                }
10238
10239                /*
10240                **      Otherwise, look for some disconnected job to 
10241                **      abort for this target.
10242                */
10243                for (cp = np->ccbc; cp; cp = cp->link_ccb) {
10244                        if (cp->host_status != HS_DISCONNECT)
10245                                continue;
10246                        if (cp->target != target)
10247                                continue;
10248                        if (cp->to_abort)
10249                                break;
10250                }
10251
10252                /*
10253                **      If we have none, probably since the device has 
10254                **      completed the command before we won abitration,
10255                **      send a M_ABORT message without IDENTIFY.
10256                **      According to the specs, the device must just 
10257                **      disconnect the BUS and not abort any task.
10258                */
10259                if (!cp) {
10260                        np->abrt_msg[0] = M_ABORT;
10261                        np->abrt_tbl.size = 1;
10262                        break;
10263                }
10264
10265                /*
10266                **      We have some task to abort.
10267                **      Set the IDENTIFY(lun)
10268                */
10269                np->abrt_msg[0] = M_IDENTIFY | cp->lun;
10270
10271                /*
10272                **      If we want to abort an untagged command, we 
10273                **      will send a IDENTIFY + M_ABORT.
10274                **      Otherwise (tagged command), we will send 
10275                **      a IDENTITFY + task attributes + ABORT TAG.
10276                */
10277                if (cp->tag == NO_TAG) {
10278                        np->abrt_msg[1] = M_ABORT;
10279                        np->abrt_tbl.size = 2;
10280                }
10281                else {
10282                        np->abrt_msg[1] = cp->scsi_smsg[1];
10283                        np->abrt_msg[2] = cp->scsi_smsg[2];
10284                        np->abrt_msg[3] = M_ABORT_TAG;
10285                        np->abrt_tbl.size = 4;
10286                }
10287                cp->to_abort = 0; /* We donnot expect to fail here */
10288                break;
10289
10290        /*
10291        **      The target has accepted our message and switched 
10292        **      to BUS FREE phase as we expected.
10293        */
10294        case SIR_ABORT_SENT:
10295                target = (INB (nc_sdid) & 0xf);
10296                tp = &np->target[target];
10297                
10298                /*
10299                **      If we didn't abort anything, leave here.
10300                */
10301                if (np->abrt_msg[0] == M_ABORT)
10302                        break;
10303
10304                /*
10305                **      If we sent a M_RESET, then a hardware reset has 
10306                **      been performed by the target.
10307                **      - Reset everything to async 8 bit
10308                **      - Tell ourself to negotiate next time :-)
10309                **      - Prepare to clear all disconnected CCBs for 
10310                **        this target from our task list (lun=task=-1)
10311                */
10312                lun = -1;
10313                task = -1;
10314                if (np->abrt_msg[0] == M_RESET) {
10315                        tp->sval = 0;
10316                        tp->wval = np->rv_scntl3;
10317                        tp->uval = np->rv_scntl4; 
10318                        ncr_set_sync_wide_status(np, target);
10319                        ncr_negotiate(np, tp);
10320                }
10321
10322                /*
10323                **      Otherwise, check for the LUN and TASK(s) 
10324                **      concerned by the cancelation.
10325                **      If it is not ABORT_TAG then it is CLEAR_QUEUE 
10326                **      or an ABORT message :-)
10327                */
10328                else {
10329                        lun = np->abrt_msg[0] & 0x3f;
10330                        if (np->abrt_msg[1] == M_ABORT_TAG)
10331                                task = np->abrt_msg[2];
10332                }
10333
10334                /*
10335                **      Complete all the CCBs the device should have 
10336                **      aborted due to our 'kiss of death' message.
10337                */
10338                (void) ncr_clear_tasks(np, HS_ABORTED, target, lun, task);
10339                break;
10340
10341        /*
10342        **      We have performed a auto-sense that succeeded.
10343        **      If the device reports a UNIT ATTENTION condition 
10344        **      due to a RESET condition, we must complete all 
10345        **      disconnect CCBs for this unit since the device 
10346        **      shall have thrown them away.
10347        **      Since I haven't time to guess what the specs are 
10348        **      expecting for other UNIT ATTENTION conditions, I 
10349        **      decided to only care about RESET conditions. :)
10350        */
10351        case SIR_AUTO_SENSE_DONE:
10352                cp = ncr_ccb_from_dsa(np, INL (nc_dsa));
10353                if (!cp)
10354                        break;
10355                memcpy(cp->cmd->sense_buffer, cp->sense_buf,
10356                       sizeof(cp->cmd->sense_buffer));
10357                p  = &cp->cmd->sense_buffer[0];
10358
10359                if (p[0] != 0x70 || p[2] != 0x6 || p[12] != 0x29)
10360                        break;
10361#if 0
10362                (void) ncr_clear_tasks(np, HS_RESET, cp->target, cp->lun, -1);
10363#endif
10364                break;
10365        }
10366
10367        /*
10368        **      Print to the log the message we intend to send.
10369        */
10370        if (num == SIR_TARGET_SELECTED) {
10371                PRINT_TARGET(np, target);
10372                ncr_printl_hex("control msgout:", np->abrt_msg,
10373                              np->abrt_tbl.size);
10374                np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
10375        }
10376
10377        /*
10378        **      Let the SCRIPTS processor continue.
10379        */
10380        OUTONB_STD ();
10381}
10382
10383
10384/*==========================================================
10385**
10386**      Gérard's alchemy:) that deals with with the data 
10387**      pointer for both MDP and the residual calculation.
10388**
10389**==========================================================
10390**
10391**      I didn't want to bloat the code by more than 200 
10392**      lignes for the handling of both MDP and the residual.
10393**      This has been achieved by using a data pointer 
10394**      representation consisting in an index in the data 
10395**      array (dp_sg) and a negative offset (dp_ofs) that 
10396**      have the following meaning:
10397**
10398**      - dp_sg = MAX_SCATTER
10399**        we are at the end of the data script.
10400**      - dp_sg < MAX_SCATTER
10401**        dp_sg points to the next entry of the scatter array 
10402**        we want to transfer.
10403**      - dp_ofs < 0
10404**        dp_ofs represents the residual of bytes of the 
10405**        previous entry scatter entry we will send first.
10406**      - dp_ofs = 0
10407**        no residual to send first.
10408**
10409**      The function ncr_evaluate_dp() accepts an arbitray 
10410**      offset (basically from the MDP message) and returns 
10411**      the corresponding values of dp_sg and dp_ofs.
10412**
10413**----------------------------------------------------------
10414*/
10415
10416static int ncr_evaluate_dp(ncb_p np, ccb_p cp, u_int32 scr, int *ofs)
10417{
10418        u_int32 dp_scr;
10419        int     dp_ofs, dp_sg, dp_sgmin;
10420        int     tmp;
10421        struct pm_ctx *pm;
10422
10423        /*
10424        **      Compute the resulted data pointer in term of a script 
10425        **      address within some DATA script and a signed byte offset.
10426        */
10427        dp_scr = scr;
10428        dp_ofs = *ofs;
10429        if      (dp_scr == NCB_SCRIPT_PHYS (np, pm0_data))
10430                pm = &cp->phys.pm0;
10431        else if (dp_scr == NCB_SCRIPT_PHYS (np, pm1_data))
10432                pm = &cp->phys.pm1;
10433        else
10434                pm = 0;
10435
10436        if (pm) {
10437                dp_scr  = scr_to_cpu(pm->ret);
10438                dp_ofs -= scr_to_cpu(pm->sg.size);
10439        }
10440
10441        /*
10442        **      Deduce the index of the sg entry.
10443        **      Keep track of the index of the first valid entry.
10444        **      If result is dp_sg = MAX_SCATTER, then we are at the 
10445        **      end of the data and vice-versa.
10446        */
10447        tmp = scr_to_cpu(cp->phys.header.goalp);
10448        dp_sg = MAX_SCATTER;
10449        if (dp_scr != tmp)
10450                dp_sg -= (tmp - 8 - (int)dp_scr) / (SCR_SG_SIZE*4);
10451        dp_sgmin = MAX_SCATTER - cp->segments;
10452
10453        /*
10454        **      Move to the sg entry the data pointer belongs to.
10455        **
10456        **      If we are inside the data area, we expect result to be:
10457        **
10458        **      Either,
10459        **          dp_ofs = 0 and dp_sg is the index of the sg entry
10460        **          the data pointer belongs to (or the end of the data)
10461        **      Or,
10462        **          dp_ofs < 0 and dp_sg is the index of the sg entry 
10463        **          the data pointer belongs to + 1.
10464        */
10465        if (dp_ofs < 0) {
10466                int n;
10467                while (dp_sg > dp_sgmin) {
10468                        --dp_sg;
10469                        tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
10470                        n = dp_ofs + (tmp & 0xffffff);
10471                        if (n > 0) {
10472                                ++dp_sg;
10473                                break;
10474                        }
10475                        dp_ofs = n;
10476                }
10477        }
10478        else if (dp_ofs > 0) {
10479                while (dp_sg < MAX_SCATTER) {
10480                        tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
10481                        dp_ofs -= (tmp & 0xffffff);
10482                        ++dp_sg;
10483                        if (dp_ofs <= 0)
10484                                break;
10485                }
10486        }
10487
10488        /*
10489        **      Make sure the data pointer is inside the data area.
10490        **      If not, return some error.
10491        */
10492        if      (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
10493                goto out_err;
10494        else if (dp_sg > MAX_SCATTER || (dp_sg == MAX_SCATTER && dp_ofs > 0))
10495                goto out_err;
10496
10497        /*
10498        **      Save the extreme pointer if needed.
10499        */
10500        if (dp_sg > cp->ext_sg ||
10501            (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
10502                cp->ext_sg  = dp_sg;
10503                cp->ext_ofs = dp_ofs;
10504        }
10505
10506        /*
10507        **      Return data.
10508        */
10509        *ofs = dp_ofs;
10510        return dp_sg;
10511
10512out_err:
10513        return -1;
10514}
10515
10516/*==========================================================
10517**
10518**      ncr chip handler for MODIFY DATA POINTER MESSAGE
10519**
10520**==========================================================
10521**
10522**      We also call this function on IGNORE WIDE RESIDUE 
10523**      messages that do not match a SWIDE full condition.
10524**      Btw, we assume in that situation that such a message 
10525**      is equivalent to a MODIFY DATA POINTER (offset=-1).
10526**
10527**----------------------------------------------------------
10528*/
10529
10530static void ncr_modify_dp(ncb_p np, tcb_p tp, ccb_p cp, int ofs)
10531{
10532        int dp_ofs      = ofs;
10533        u_int32 dp_scr  = INL (nc_temp);
10534        u_int32 dp_ret;
10535        u_int32 tmp;
10536        u_char  hflags;
10537        int     dp_sg;
10538        struct pm_ctx *pm;
10539
10540        /*
10541        **      Not supported for auto_sense;
10542        */
10543        if (cp->host_flags & HF_AUTO_SENSE)
10544                goto out_reject;
10545
10546        /*
10547        **      Apply our alchemy:) (see comments in ncr_evaluate_dp()), 
10548        **      to the resulted data pointer.
10549        */
10550        dp_sg = ncr_evaluate_dp(np, cp, dp_scr, &dp_ofs);
10551        if (dp_sg < 0)
10552                goto out_reject;
10553
10554        /*
10555        **      And our alchemy:) allows to easily calculate the data 
10556        **      script address we want to return for the next data phase.
10557        */
10558        dp_ret = cpu_to_scr(cp->phys.header.goalp);
10559        dp_ret = dp_ret - 8 - (MAX_SCATTER - dp_sg) * (SCR_SG_SIZE*4);
10560
10561        /*
10562        **      If offset / scatter entry is zero we donnot need 
10563        **      a context for the new current data pointer.
10564        */
10565        if (dp_ofs == 0) {
10566                dp_scr = dp_ret;
10567                goto out_ok;
10568        }
10569
10570        /*
10571        **      Get a context for the new current data pointer.
10572        */
10573        hflags = INB (HF_PRT);
10574
10575        if (hflags & HF_DP_SAVED)
10576                hflags ^= HF_ACT_PM;
10577
10578        if (!(hflags & HF_ACT_PM)) {
10579                pm  = &cp->phys.pm0;
10580                dp_scr = NCB_SCRIPT_PHYS (np, pm0_data);
10581        }
10582        else {
10583                pm = &cp->phys.pm1;
10584                dp_scr = NCB_SCRIPT_PHYS (np, pm1_data);
10585        }
10586
10587        hflags &= ~(HF_DP_SAVED);
10588
10589        OUTB (HF_PRT, hflags);
10590
10591        /*
10592        **      Set up the new current data pointer.
10593        **      ofs < 0 there, and for the next data phase, we 
10594        **      want to transfer part of the data of the sg entry 
10595        **      corresponding to index dp_sg-1 prior to returning 
10596        **      to the main data script.
10597        */
10598        pm->ret = cpu_to_scr(dp_ret);
10599        tmp  = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
10600        tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
10601        pm->sg.addr = cpu_to_scr(tmp);
10602        pm->sg.size = cpu_to_scr(-dp_ofs);
10603
10604out_ok:
10605        OUTL (nc_temp, dp_scr);
10606        OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
10607        return;
10608
10609out_reject:
10610        OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
10611}
10612
10613
10614/*==========================================================
10615**
10616**      ncr chip calculation of the data residual.
10617**
10618**==========================================================
10619**
10620**      As I used to say, the requirement of data residual 
10621**      in SCSI is broken, useless and cannot be achieved 
10622**      without huge complexity.
10623**      But most OSes and even the official CAM require it.
10624**      When stupidity happens to be so widely spread inside 
10625**      a community, it gets hard to convince.
10626**
10627**      Anyway, I don't care, since I am not going to use 
10628**      any software that considers this data residual as 
10629**      a relevant information. :)
10630**      
10631**----------------------------------------------------------
10632*/
10633
10634static int ncr_compute_residual(ncb_p np, ccb_p cp)
10635{
10636        int dp_sg, dp_sgmin, tmp;
10637        int resid=0;
10638        int dp_ofs = 0;
10639
10640        /*
10641         *      Check for some data lost or just thrown away.
10642         *      We are not required to be quite accurate in this
10643         *      situation. Btw, if we are odd for output and the
10644         *      device claims some more data, it may well happen
10645         *      than our residual be zero. :-)
10646         */
10647        if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
10648                if (cp->xerr_status & XE_EXTRA_DATA)
10649                        resid -= cp->extra_bytes;
10650                if (cp->xerr_status & XE_SODL_UNRUN)
10651                        ++resid;
10652                if (cp->xerr_status & XE_SWIDE_OVRUN)
10653                        --resid;
10654        }
10655
10656
10657        /*
10658        **      If SCRIPTS reaches its goal point, then 
10659        **      there is no additionnal residual.
10660        */
10661        if (cp->phys.header.lastp == cp->phys.header.goalp)
10662                return resid;
10663
10664        /*
10665        **      If the last data pointer is data_io (direction 
10666        **      unknown), then no data transfer should have 
10667        **      taken place.
10668        */
10669        if (cp->phys.header.lastp == NCB_SCRIPTH_PHYS (np, data_io))
10670                return cp->data_len;
10671
10672        /*
10673        **      If no data transfer occurs, or if the data
10674        **      pointer is weird, return full residual.
10675        */
10676        if (cp->startp == cp->phys.header.lastp ||
10677            ncr_evaluate_dp(np, cp, scr_to_cpu(cp->phys.header.lastp),
10678                            &dp_ofs) < 0) {
10679                return cp->data_len;
10680        }
10681
10682        /*
10683        **      We are now full comfortable in the computation 
10684        **      of the data residual (2's complement).
10685        */
10686        dp_sgmin = MAX_SCATTER - cp->segments;
10687        resid = -cp->ext_ofs;
10688        for (dp_sg = cp->ext_sg; dp_sg < MAX_SCATTER; ++dp_sg) {
10689                tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
10690                resid += (tmp & 0xffffff);
10691        }
10692
10693        /*
10694        **      Hopefully, the result is not too wrong.
10695        */
10696        return resid;
10697}
10698
10699/*==========================================================
10700**
10701**      Print out the containt of a SCSI message.
10702**
10703**==========================================================
10704*/
10705
10706static int ncr_show_msg (u_char * msg)
10707{
10708        u_char i;
10709        printk ("%x",*msg);
10710        if (*msg==M_EXTENDED) {
10711                for (i=1;i<8;i++) {
10712                        if (i-1>msg[1]) break;
10713                        printk ("-%x",msg[i]);
10714                };
10715                return (i+1);
10716        } else if ((*msg & 0xf0) == 0x20) {
10717                printk ("-%x",msg[1]);
10718                return (2);
10719        };
10720        return (1);
10721}
10722
10723static void ncr_print_msg (ccb_p cp, char *label, u_char *msg)
10724{
10725        if (cp)
10726                PRINT_ADDR(cp->cmd);
10727        if (label)
10728                printk ("%s: ", label);
10729
10730        (void) ncr_show_msg (msg);
10731        printk (".\n");
10732}
10733
10734/*===================================================================
10735**
10736**      Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
10737**
10738**===================================================================
10739**
10740**      Was Sie schon immer ueber transfermode negotiation wissen wollten ...
10741**
10742**      We try to negotiate sync and wide transfer only after
10743**      a successful inquire command. We look at byte 7 of the
10744**      inquire data to determine the capabilities of the target.
10745**
10746**      When we try to negotiate, we append the negotiation message
10747**      to the identify and (maybe) simple tag message.
10748**      The host status field is set to HS_NEGOTIATE to mark this
10749**      situation.
10750**
10751**      If the target doesn't answer this message immediately
10752**      (as required by the standard), the SIR_NEGO_FAILED interrupt
10753**      will be raised eventually.
10754**      The handler removes the HS_NEGOTIATE status, and sets the
10755**      negotiated value to the default (async / nowide).
10756**
10757**      If we receive a matching answer immediately, we check it
10758**      for validity, and set the values.
10759**
10760**      If we receive a Reject message immediately, we assume the
10761**      negotiation has failed, and fall back to standard values.
10762**
10763**      If we receive a negotiation message while not in HS_NEGOTIATE
10764**      state, it's a target initiated negotiation. We prepare a
10765**      (hopefully) valid answer, set our parameters, and send back 
10766**      this answer to the target.
10767**
10768**      If the target doesn't fetch the answer (no message out phase),
10769**      we assume the negotiation has failed, and fall back to default
10770**      settings (SIR_NEGO_PROTO interrupt).
10771**
10772**      When we set the values, we adjust them in all ccbs belonging 
10773**      to this target, in the controller's register, and in the "phys"
10774**      field of the controller's struct ncb.
10775**
10776**---------------------------------------------------------------------
10777*/
10778
10779/*==========================================================
10780**
10781**      ncr chip handler for SYNCHRONOUS DATA TRANSFER 
10782**      REQUEST (SDTR) message.
10783**
10784**==========================================================
10785**
10786**      Read comments above.
10787**
10788**----------------------------------------------------------
10789*/
10790static void ncr_sync_nego(ncb_p np, tcb_p tp, ccb_p cp)
10791{
10792        u_char  scntl3, scntl4;
10793        u_char  chg, ofs, per, fak;
10794
10795        /*
10796        **      Synchronous request message received.
10797        */
10798
10799        if (DEBUG_FLAGS & DEBUG_NEGO) {
10800                ncr_print_msg(cp, "sync msg in", np->msgin);
10801        };
10802
10803        /*
10804        **      get requested values.
10805        */
10806
10807        chg = 0;
10808        per = np->msgin[3];
10809        ofs = np->msgin[4];
10810        if (ofs==0) per=255;
10811
10812        /*
10813        **      if target sends SDTR message,
10814        **            it CAN transfer synch.
10815        */
10816
10817        if (ofs)
10818                tp->inq_byte7 |= INQ7_SYNC;
10819
10820        /*
10821        **      check values against driver limits.
10822        */
10823
10824        if (per < np->minsync)
10825                {chg = 1; per = np->minsync;}
10826        if (per < tp->minsync)
10827                {chg = 1; per = tp->minsync;}
10828        if (ofs > np->maxoffs_st)
10829                {chg = 1; ofs = np->maxoffs_st;}
10830        if (ofs > tp->maxoffs)
10831                {chg = 1; ofs = tp->maxoffs;}
10832
10833        /*
10834        **      Check against controller limits.
10835        */
10836        fak     = 7;
10837        scntl3  = 0;
10838        scntl4  = 0;
10839        if (ofs != 0) {
10840                ncr_getsync(np, per, &fak, &scntl3);
10841                if (fak > 7) {
10842                        chg = 1;
10843                        ofs = 0;
10844                }
10845        }
10846        if (ofs == 0) {
10847                fak     = 7;
10848                per     = 0;
10849                scntl3  = 0;
10850                scntl4  = 0;
10851                tp->minsync = 0;
10852        }
10853
10854        if (DEBUG_FLAGS & DEBUG_NEGO) {
10855                PRINT_ADDR(cp->cmd);
10856                printk ("sync: per=%d scntl3=0x%x scntl4=0x%x ofs=%d fak=%d chg=%d.\n",
10857                        per, scntl3, scntl4, ofs, fak, chg);
10858        }
10859
10860        if (INB (HS_PRT) == HS_NEGOTIATE) {
10861                OUTB (HS_PRT, HS_BUSY);
10862                switch (cp->nego_status) {
10863                case NS_SYNC:
10864                        /*
10865                        **      This was an answer message
10866                        */
10867                        if (chg) {
10868                                /*
10869                                **      Answer wasn't acceptable.
10870                                */
10871                                ncr_setsync (np, cp, 0, 0xe0, 0);
10872                                OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
10873                        } else {
10874                                /*
10875                                **      Answer is ok.
10876                                */
10877                                if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
10878                                        (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
10879                                  ncr_setsync (np, cp, scntl3, (fak<<5)|ofs,0);
10880                                else
10881                                  ncr_setsync (np, cp, scntl3, ofs, scntl4);
10882
10883                                OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
10884                        };
10885                        return;
10886
10887                case NS_WIDE:
10888                        ncr_setwide (np, cp, 0, 0);
10889                        break;
10890                };
10891        };
10892
10893        /*
10894        **      It was a request. Set value and
10895        **      prepare an answer message
10896        */
10897
10898        if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
10899                        (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
10900                ncr_setsync (np, cp, scntl3, (fak<<5)|ofs,0);
10901        else
10902                ncr_setsync (np, cp, scntl3, ofs, scntl4);
10903
10904        np->msgout[0] = M_EXTENDED;
10905        np->msgout[1] = 3;
10906        np->msgout[2] = M_X_SYNC_REQ;
10907        np->msgout[3] = per;
10908        np->msgout[4] = ofs;
10909
10910        cp->nego_status = NS_SYNC;
10911
10912        if (DEBUG_FLAGS & DEBUG_NEGO) {
10913                ncr_print_msg(cp, "sync msgout", np->msgout);
10914        }
10915
10916        np->msgin [0] = M_NOOP;
10917
10918        if (!ofs)
10919                OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
10920        else
10921                OUTL_DSP (NCB_SCRIPTH_PHYS (np, sdtr_resp));
10922}
10923
10924/*==========================================================
10925**
10926**      ncr chip handler for WIDE DATA TRANSFER REQUEST 
10927**      (WDTR) message.
10928**
10929**==========================================================
10930**
10931**      Read comments above.
10932**
10933**----------------------------------------------------------
10934*/
10935static void ncr_wide_nego(ncb_p np, tcb_p tp, ccb_p cp)
10936{
10937        u_char  chg, wide;
10938
10939        /*
10940        **      Wide request message received.
10941        */
10942        if (DEBUG_FLAGS & DEBUG_NEGO) {
10943                ncr_print_msg(cp, "wide msgin", np->msgin);
10944        };
10945
10946        /*
10947        **      get requested values.
10948        */
10949
10950        chg  = 0;
10951        wide = np->msgin[3];
10952
10953        /*
10954        **      if target sends WDTR message,
10955        **            it CAN transfer wide.
10956        */
10957
10958        if (wide)
10959                tp->inq_byte7 |= INQ7_WIDE16;
10960
10961        /*
10962        **      check values against driver limits.
10963        */
10964
10965        if (wide > tp->usrwide)
10966                {chg = 1; wide = tp->usrwide;}
10967
10968        if (DEBUG_FLAGS & DEBUG_NEGO) {
10969                PRINT_ADDR(cp->cmd);
10970                printk ("wide: wide=%d chg=%d.\n", wide, chg);
10971        }
10972
10973        if (INB (HS_PRT) == HS_NEGOTIATE) {
10974                OUTB (HS_PRT, HS_BUSY);
10975                switch (cp->nego_status) {
10976                case NS_WIDE:
10977                        /*
10978                        **      This was an answer message
10979                        */
10980                        if (chg) {
10981                                /*
10982                                **      Answer wasn't acceptable.
10983                                */
10984                                ncr_setwide (np, cp, 0, 1);
10985                                OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
10986                        } else {
10987                                /*
10988                                **      Answer is ok.
10989                                */
10990                                ncr_setwide (np, cp, wide, 1);
10991                                OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
10992                        };
10993                        return;
10994
10995                case NS_SYNC:
10996                        ncr_setsync (np, cp, 0, 0xe0, 0);
10997                        break;
10998                };
10999        };
11000
11001        /*
11002        **      It was a request, set value and
11003        **      prepare an answer message
11004        */
11005
11006        ncr_setwide (np, cp, wide, 1);
11007
11008        np->msgout[0] = M_EXTENDED;
11009        np->msgout[1] = 2;
11010        np->msgout[2] = M_X_WIDE_REQ;
11011        np->msgout[3] = wide;
11012
11013        np->msgin [0] = M_NOOP;
11014
11015        cp->nego_status = NS_WIDE;
11016
11017        if (DEBUG_FLAGS & DEBUG_NEGO) {
11018                ncr_print_msg(cp, "wide msgout", np->msgout);
11019        }
11020
11021        OUTL_DSP (NCB_SCRIPTH_PHYS (np, wdtr_resp));
11022}
11023/*==========================================================
11024**
11025**      ncr chip handler for PARALLEL PROTOCOL REQUEST 
11026**      (PPR) message.
11027**
11028**==========================================================
11029**
11030**      Read comments above.
11031**
11032**----------------------------------------------------------
11033*/
11034static void ncr_ppr_nego(ncb_p np, tcb_p tp, ccb_p cp)
11035{
11036        u_char  scntl3, scntl4;
11037        u_char  chg, ofs, per, fak, wth, dt;
11038
11039        /*
11040        **      PPR message received.
11041        */
11042
11043        if (DEBUG_FLAGS & DEBUG_NEGO) {
11044                ncr_print_msg(cp, "ppr msg in", np->msgin);
11045        };
11046
11047        /*
11048        **      get requested values.
11049        */
11050
11051        chg = 0;
11052        per = np->msgin[3];
11053        ofs = np->msgin[5];
11054        wth = np->msgin[6];
11055        dt  = np->msgin[7];
11056        if (ofs==0) per=255;
11057
11058        /*
11059        **      if target sends sync (wide),
11060        **            it CAN transfer synch (wide).
11061        */
11062
11063        if (ofs)
11064                tp->inq_byte7 |= INQ7_SYNC;
11065
11066        if (wth)
11067                tp->inq_byte7 |= INQ7_WIDE16;
11068
11069        /*
11070        **      check values against driver limits.
11071        */
11072
11073        if (wth > tp->usrwide)
11074                {chg = 1; wth = tp->usrwide;}
11075        if (per < np->minsync)
11076                {chg = 1; per = np->minsync;}
11077        if (per < tp->minsync)
11078                {chg = 1; per = tp->minsync;}
11079        if (ofs > tp->maxoffs)
11080                {chg = 1; ofs = tp->maxoffs;}
11081
11082        /*
11083        **      Check against controller limits.
11084        */
11085        fak     = 7;
11086        scntl3  = 0;
11087        scntl4  = 0;
11088        if (ofs != 0) {
11089                scntl4 = dt ? 0x80 : 0;
11090                ncr_getsync(np, per, &fak, &scntl3);
11091                if (fak > 7) {
11092                        chg = 1;
11093                        ofs = 0;
11094                }
11095        }
11096        if (ofs == 0) {
11097                fak     = 7;
11098                per     = 0;
11099                scntl3  = 0;
11100                scntl4  = 0;
11101                tp->minsync = 0;
11102        }
11103
11104        /*
11105        **      If target responds with Ultra 3 speed
11106        **      but narrow or not DT, reject.
11107        **      If target responds with DT request 
11108        **      but not Ultra3 speeds, reject message,
11109        **      reset min sync for target to 0x0A and
11110        **      set flags to re-negotiate.
11111        */
11112
11113        if   ((per == 0x09) && ofs && (!wth || !dt))  
11114                chg = 1;
11115        else if (( (per > 0x09) && dt) ) 
11116                chg = 2;
11117
11118        /* Not acceptable since beyond controller limit */
11119        if (!dt && ofs > np->maxoffs_st)
11120                {chg = 2; ofs = np->maxoffs_st;}
11121
11122        if (DEBUG_FLAGS & DEBUG_NEGO) {
11123                PRINT_ADDR(cp->cmd);
11124                printk ("ppr: wth=%d per=%d scntl3=0x%x scntl4=0x%x ofs=%d fak=%d chg=%d.\n",
11125                        wth, per, scntl3, scntl4, ofs, fak, chg);
11126        }
11127
11128        if (INB (HS_PRT) == HS_NEGOTIATE) {
11129                OUTB (HS_PRT, HS_BUSY);
11130                switch (cp->nego_status) {
11131                case NS_PPR:
11132                        /*
11133                        **      This was an answer message
11134                        */
11135                        if (chg) {
11136                                /*
11137                                **      Answer wasn't acceptable.
11138                                */
11139                                if (chg == 2) {
11140                                        /* Send message reject and reset flags for
11141                                        ** host to re-negotiate with min period 0x0A.
11142                                        */
11143                                        tp->minsync = 0x0A;
11144                                        tp->period = 0;
11145                                        tp->widedone = 0;
11146                                }
11147                                ncr_setsyncwide (np, cp, 0, 0xe0, 0, 0);
11148                                OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
11149                        } else {
11150                                /*
11151                                **      Answer is ok.
11152                                */
11153
11154                                if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
11155                                        (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
11156                                  ncr_setsyncwide (np, cp, scntl3, (fak<<5)|ofs,0, wth);
11157                                else
11158                                  ncr_setsyncwide (np, cp, scntl3, ofs, scntl4, wth);
11159
11160                                OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
11161                                
11162                        };
11163                        return;
11164
11165                case NS_SYNC:
11166                        ncr_setsync (np, cp, 0, 0xe0, 0);
11167                        break;
11168
11169                case NS_WIDE:
11170                        ncr_setwide (np, cp, 0, 0);
11171                        break;
11172                };
11173        };
11174
11175        /*
11176        **      It was a request. Set value and
11177        **      prepare an answer message
11178        **
11179        **      If narrow or not DT and requesting Ultra3
11180        **      slow the bus down and force ST. If not
11181        **      requesting Ultra3, force ST.
11182        **      Max offset is 31=0x1f if ST mode.
11183        */
11184
11185        if  ((per == 0x09) && ofs && (!wth || !dt)) {
11186                per = 0x0A;
11187                dt = 0;
11188        }
11189        else if ( (per > 0x09) && dt) {
11190                dt = 0;
11191        }
11192        if (!dt && ofs > np->maxoffs_st)
11193                ofs = np->maxoffs_st;
11194
11195        if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
11196                        (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
11197                ncr_setsyncwide (np, cp, scntl3, (fak<<5)|ofs,0, wth);
11198        else
11199                ncr_setsyncwide (np, cp, scntl3, ofs, scntl4, wth);
11200
11201        np->msgout[0] = M_EXTENDED;
11202        np->msgout[1] = 6;
11203        np->msgout[2] = M_X_PPR_REQ;
11204        np->msgout[3] = per;
11205        np->msgout[4] = 0;              
11206        np->msgout[5] = ofs;
11207        np->msgout[6] = wth;
11208        np->msgout[7] = dt;
11209
11210        cp->nego_status = NS_PPR;
11211
11212        if (DEBUG_FLAGS & DEBUG_NEGO) {
11213                ncr_print_msg(cp, "ppr msgout", np->msgout);
11214        }
11215
11216        np->msgin [0] = M_NOOP;
11217
11218        if (!ofs)
11219                OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
11220        else
11221                OUTL_DSP (NCB_SCRIPTH_PHYS (np, ppr_resp));
11222}
11223
11224
11225
11226/*
11227**      Reset SYNC or WIDE to default settings.
11228**      Called when a negotiation does not succeed either 
11229**      on rejection or on protocol error.
11230*/
11231static void ncr_nego_default(ncb_p np, tcb_p tp, ccb_p cp)
11232{
11233        /*
11234        **      any error in negotiation:
11235        **      fall back to default mode.
11236        */
11237        switch (cp->nego_status) {
11238
11239        case NS_SYNC:
11240                ncr_setsync (np, cp, 0, 0xe0, 0);
11241                break;
11242
11243        case NS_WIDE:
11244                ncr_setwide (np, cp, 0, 0);
11245                break;
11246
11247        case NS_PPR:
11248                /*
11249                 * ppr_negotiation is set to 1 on the first ppr nego command.
11250                 * If ppr is successful, it is reset to 2.
11251                 * If unsuccessful it is reset to 0.
11252                 */
11253                if (DEBUG_FLAGS & DEBUG_NEGO) {
11254                        tcb_p tp=&np->target[cp->target];
11255                        u_char factor, offset, width;
11256
11257                        ncr_get_xfer_info ( np, tp, &factor, &offset, &width);
11258
11259                        printk("Current factor %d offset %d width %d\n",
11260                                factor, offset, width); 
11261                }
11262                if (tp->ppr_negotiation == 2)
11263                        ncr_setsyncwide (np, cp, 0, 0xe0, 0, 0);
11264                else if (tp->ppr_negotiation == 1) {
11265
11266                        /* First ppr command has received a  M REJECT.
11267                         * Do not change the existing wide/sync parameter
11268                         * values (asyn/narrow if this as the first nego;
11269                         * may be different if target initiates nego.).
11270                         */
11271                        tp->ppr_negotiation = 0;
11272                }
11273                else
11274                {
11275                        tp->ppr_negotiation = 0;
11276                        ncr_setwide (np, cp, 0, 0);
11277                }
11278                break;
11279        };
11280        np->msgin [0] = M_NOOP;
11281        np->msgout[0] = M_NOOP;
11282        cp->nego_status = 0;
11283}
11284
11285/*==========================================================
11286**
11287**      ncr chip handler for MESSAGE REJECT received for 
11288**      a WIDE or SYNCHRONOUS negotiation.
11289**
11290**      clear the PPR negotiation flag, all future nego.
11291**      will be SDTR and WDTR
11292**
11293**==========================================================
11294**
11295**      Read comments above.
11296**
11297**----------------------------------------------------------
11298*/
11299static void ncr_nego_rejected(ncb_p np, tcb_p tp, ccb_p cp)
11300{
11301        ncr_nego_default(np, tp, cp);
11302        OUTB (HS_PRT, HS_BUSY);
11303}
11304
11305
11306/*==========================================================
11307**
11308**
11309**      ncr chip exception handler for programmed interrupts.
11310**
11311**
11312**==========================================================
11313*/
11314
11315void ncr_int_sir (ncb_p np)
11316{
11317        u_char  num     = INB (nc_dsps);
11318        u_long  dsa     = INL (nc_dsa);
11319        ccb_p   cp      = ncr_ccb_from_dsa(np, dsa);
11320        u_char  target  = INB (nc_sdid) & 0x0f;
11321        tcb_p   tp      = &np->target[target];
11322        int     tmp;
11323
11324        if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num);
11325
11326        switch (num) {
11327        /*
11328        **      See comments in the SCRIPTS code.
11329        */
11330#ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
11331        case SIR_DUMMY_INTERRUPT:
11332                goto out;
11333#endif
11334
11335        /*
11336        **      The C code is currently trying to recover from something.
11337        **      Typically, user want to abort some command.
11338        */
11339        case SIR_SCRIPT_STOPPED:
11340        case SIR_TARGET_SELECTED:
11341        case SIR_ABORT_SENT:
11342        case SIR_AUTO_SENSE_DONE:
11343                ncr_sir_task_recovery(np, num);
11344                return;
11345        /*
11346        **      The device didn't go to MSG OUT phase after having 
11347        **      been selected with ATN. We donnot want to handle 
11348        **      that.
11349        */
11350        case SIR_SEL_ATN_NO_MSG_OUT:
11351                printk ("%s:%d: No MSG OUT phase after selection with ATN.\n",
11352                        ncr_name (np), target);
11353                goto out_stuck;
11354        /*
11355        **      The device didn't switch to MSG IN phase after 
11356        **      having reseleted the initiator.
11357        */
11358        case SIR_RESEL_NO_MSG_IN:
11359        /*
11360        **      After reselection, the device sent a message that wasn't 
11361        **      an IDENTIFY.
11362        */
11363        case SIR_RESEL_NO_IDENTIFY:
11364                /*
11365                **      If devices reselecting without sending an IDENTIFY 
11366                **      message still exist, this should help.
11367                **      We just assume lun=0, 1 CCB, no tag.
11368                */
11369                if (tp->l0p) { 
11370                        OUTL (nc_dsa, scr_to_cpu(tp->l0p->tasktbl[0]));
11371                        OUTL_DSP (NCB_SCRIPT_PHYS (np, resel_go));
11372                        return;
11373                }
11374        /*
11375        **      The device reselected a LUN we donnot know of.
11376        */
11377        case SIR_RESEL_BAD_LUN:
11378                np->msgout[0] = M_RESET;
11379                goto out;
11380        /*
11381        **      The device reselected for an untagged nexus and we 
11382        **      haven't any.
11383        */
11384        case SIR_RESEL_BAD_I_T_L:
11385                np->msgout[0] = M_ABORT;
11386                goto out;
11387        /*
11388        **      The device reselected for a tagged nexus that we donnot 
11389        **      have.
11390        */
11391        case SIR_RESEL_BAD_I_T_L_Q:
11392                np->msgout[0] = M_ABORT_TAG;
11393                goto out;
11394        /*
11395        **      The SCRIPTS let us know that the device has grabbed 
11396        **      our message and will abort the job.
11397        */
11398        case SIR_RESEL_ABORTED:
11399                np->lastmsg = np->msgout[0];
11400                np->msgout[0] = M_NOOP;
11401                printk ("%s:%d: message %x sent on bad reselection.\n",
11402                        ncr_name (np), target, np->lastmsg);
11403                goto out;
11404        /*
11405        **      The SCRIPTS let us know that a message has been 
11406        **      successfully sent to the device.
11407        */
11408        case SIR_MSG_OUT_DONE:
11409                np->lastmsg = np->msgout[0];
11410                np->msgout[0] = M_NOOP;
11411                /* Should we really care of that */
11412                if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
11413                        if (cp) {
11414                                cp->xerr_status &= ~XE_PARITY_ERR;
11415                                if (!cp->xerr_status)
11416                                        OUTOFFB (HF_PRT, HF_EXT_ERR);
11417                        }
11418                }
11419                goto out;
11420        /*
11421        **      The device didn't send a GOOD SCSI status.
11422        **      We may have some work to do prior to allow 
11423        **      the SCRIPTS processor to continue.
11424        */
11425        case SIR_BAD_STATUS:
11426                if (!cp)
11427                        goto out;
11428                ncr_sir_to_redo(np, num, cp);
11429                return;
11430        /*
11431        **      We are asked by the SCRIPTS to prepare a 
11432        **      REJECT message.
11433        */
11434        case SIR_REJECT_TO_SEND:
11435                ncr_print_msg(cp, "M_REJECT to send for ", np->msgin);
11436                np->msgout[0] = M_REJECT;
11437                goto out;
11438        /*
11439        **      We have been ODD at the end of a DATA IN 
11440        **      transfer and the device didn't send a 
11441        **      IGNORE WIDE RESIDUE message.
11442        **      It is a data overrun condition.
11443        */
11444        case SIR_SWIDE_OVERRUN:
11445                if (cp) {
11446                        OUTONB (HF_PRT, HF_EXT_ERR);
11447                        cp->xerr_status |= XE_SWIDE_OVRUN;
11448                }
11449                goto out;
11450        /*
11451        **      We have been ODD at the end of a DATA OUT 
11452        **      transfer.
11453        **      It is a data underrun condition.
11454        */
11455        case SIR_SODL_UNDERRUN:
11456                if (cp) {
11457                        OUTONB (HF_PRT, HF_EXT_ERR);
11458                        cp->xerr_status |= XE_SODL_UNRUN;
11459                }
11460                goto out;
11461        /*
11462        **      The device wants us to tranfer more data than 
11463        **      expected or in the wrong direction.
11464        **      The number of extra bytes is in scratcha.
11465        **      It is a data overrun condition.
11466        */
11467        case SIR_DATA_OVERRUN:
11468                if (cp) {
11469                        OUTONB (HF_PRT, HF_EXT_ERR);
11470                        cp->xerr_status |= XE_EXTRA_DATA;
11471                        cp->extra_bytes += INL (nc_scratcha);
11472                }
11473                goto out;
11474        /*
11475        **      The device switched to an illegal phase (4/5).
11476        */
11477        case SIR_BAD_PHASE:
11478                if (cp) {
11479                        OUTONB (HF_PRT, HF_EXT_ERR);
11480                        cp->xerr_status |= XE_BAD_PHASE;
11481                }
11482                goto out;
11483        /*
11484        **      We received a message.
11485        */
11486        case SIR_MSG_RECEIVED:
11487                if (!cp)
11488                        goto out_stuck;
11489                switch (np->msgin [0]) {
11490                /*
11491                **      We received an extended message.
11492                **      We handle MODIFY DATA POINTER, SDTR, WDTR 
11493                **      and reject all other extended messages.
11494                */
11495                case M_EXTENDED:
11496                        switch (np->msgin [2]) {
11497                        case M_X_MODIFY_DP:
11498                                if (DEBUG_FLAGS & DEBUG_POINTER)
11499                                        ncr_print_msg(cp,"modify DP",np->msgin);
11500                                tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) + 
11501                                      (np->msgin[5]<<8)  + (np->msgin[6]);
11502                                ncr_modify_dp(np, tp, cp, tmp);
11503                                return;
11504                        case M_X_SYNC_REQ:
11505                                ncr_sync_nego(np, tp, cp);
11506                                return;
11507                        case M_X_WIDE_REQ:
11508                                ncr_wide_nego(np, tp, cp);
11509                                return;
11510                        case M_X_PPR_REQ:
11511                                ncr_ppr_nego(np, tp, cp);
11512                                return;
11513                        default:
11514                                goto out_reject;
11515                        }
11516                        break;
11517                /*
11518                **      We received a 1/2 byte message not handled from SCRIPTS.
11519                **      We are only expecting MESSAGE REJECT and IGNORE WIDE 
11520                **      RESIDUE messages that haven't been anticipated by 
11521                **      SCRIPTS on SWIDE full condition. Unanticipated IGNORE 
11522                **      WIDE RESIDUE messages are aliased as MODIFY DP (-1).
11523                */
11524                case M_IGN_RESIDUE:
11525                        if (DEBUG_FLAGS & DEBUG_POINTER)
11526                                ncr_print_msg(cp,"ign wide residue", np->msgin);
11527                        ncr_modify_dp(np, tp, cp, -1);
11528                        return;
11529                case M_REJECT:
11530                        if (INB (HS_PRT) == HS_NEGOTIATE)
11531                                ncr_nego_rejected(np, tp, cp);
11532                        else {
11533                                PRINT_ADDR(cp->cmd);
11534                                printk ("M_REJECT received (%x:%x).\n",
11535                                        scr_to_cpu(np->lastmsg), np->msgout[0]);
11536                        }
11537                        goto out_clrack;
11538                        break;
11539                default:
11540                        goto out_reject;
11541                }
11542                break;
11543        /*
11544        **      We received an unknown message.
11545        **      Ignore all MSG IN phases and reject it.
11546        */
11547        case SIR_MSG_WEIRD:
11548                ncr_print_msg(cp, "WEIRD message received", np->msgin);
11549                OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_weird));
11550                return;
11551        /*
11552        **      Negotiation failed.
11553        **      Target does not send us the reply.
11554        **      Remove the HS_NEGOTIATE status.
11555        */
11556        case SIR_NEGO_FAILED:
11557                OUTB (HS_PRT, HS_BUSY);
11558        /*
11559        **      Negotiation failed.
11560        **      Target does not want answer message.
11561        */
11562        case SIR_NEGO_PROTO:
11563                ncr_nego_default(np, tp, cp);
11564                goto out;
11565        };
11566
11567out:
11568        OUTONB_STD ();
11569        return;
11570out_reject:
11571        OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
11572        return;
11573out_clrack:
11574        OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
11575        return;
11576out_stuck:
11577        return;
11578}
11579
11580
11581/*==========================================================
11582**
11583**
11584**      Acquire a control block
11585**
11586**
11587**==========================================================
11588*/
11589
11590static  ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln)
11591{
11592        tcb_p tp = &np->target[tn];
11593        lcb_p lp = ncr_lp(np, tp, ln);
11594        u_short tag = NO_TAG;
11595        XPT_QUEHEAD *qp;
11596        ccb_p cp = (ccb_p) 0;
11597
11598        /*
11599        **      Allocate a new CCB if needed.
11600        */
11601        if (xpt_que_empty(&np->free_ccbq))
11602                (void) ncr_alloc_ccb(np);
11603
11604        /*
11605        **      Look for a free CCB
11606        */
11607        qp = xpt_remque_head(&np->free_ccbq);
11608        if (!qp)
11609                goto out;
11610        cp = xpt_que_entry(qp, struct ccb, link_ccbq);
11611
11612        /*
11613        **      If the LCB is not yet available and we already 
11614        **      have queued a CCB for a LUN without LCB,
11615        **      give up. Otherwise all is fine. :-)
11616        */
11617        if (!lp) {
11618                if (xpt_que_empty(&np->b0_ccbq))
11619                        xpt_insque_head(&cp->link_ccbq, &np->b0_ccbq);
11620                else
11621                        goto out_free;
11622        } else {
11623                /*
11624                **      Tune tag mode if asked by user.
11625                */
11626                if (lp->queuedepth != lp->numtags) {
11627                        ncr_setup_tags(np, tn, ln);
11628                }
11629
11630                /*
11631                **      Get a tag for this nexus if required.
11632                **      Keep from using more tags than we can handle.
11633                */
11634                if (lp->usetags) {
11635                        if (lp->busyccbs < lp->maxnxs) {
11636                                tag = lp->cb_tags[lp->ia_tag];
11637                                ++lp->ia_tag;
11638                                if (lp->ia_tag == MAX_TAGS)
11639                                        lp->ia_tag = 0;
11640                                cp->tags_si = lp->tags_si;
11641                                ++lp->tags_sum[cp->tags_si];
11642                        }
11643                        else
11644                                goto out_free;
11645                }
11646
11647                /*
11648                **      Put the CCB in the LUN wait queue and 
11649                **      count it as busy.
11650                */
11651                xpt_insque_tail(&cp->link_ccbq, &lp->wait_ccbq);
11652                ++lp->busyccbs;
11653        }
11654
11655        /*
11656        **      Remember all informations needed to free this CCB.
11657        */
11658        cp->to_abort = 0;
11659        cp->tag    = tag;
11660        cp->target = tn;
11661        cp->lun    = ln;
11662
11663        if (DEBUG_FLAGS & DEBUG_TAGS) {
11664                PRINT_LUN(np, tn, ln);
11665                printk ("ccb @%p using tag %d.\n", cp, tag);
11666        }
11667
11668out:
11669        return cp;
11670out_free:
11671        xpt_insque_head(&cp->link_ccbq, &np->free_ccbq);
11672        return (ccb_p) 0;
11673}
11674
11675/*==========================================================
11676**
11677**
11678**      Release one control block
11679**
11680**
11681**==========================================================
11682*/
11683
11684static void ncr_free_ccb (ncb_p np, ccb_p cp)
11685{
11686        tcb_p tp = &np->target[cp->target];
11687        lcb_p lp = ncr_lp(np, tp, cp->lun);
11688
11689        if (DEBUG_FLAGS & DEBUG_TAGS) {
11690                PRINT_LUN(np, cp->target, cp->lun);
11691                printk ("ccb @%p freeing tag %d.\n", cp, cp->tag);
11692        }
11693
11694        /*
11695        **      If lun control block available, make available 
11696        **      the task slot and the tag if any.
11697        **      Decrement counters.
11698        */
11699        if (lp) {
11700                if (cp->tag != NO_TAG) {
11701                        lp->cb_tags[lp->if_tag++] = cp->tag;
11702                        if (lp->if_tag == MAX_TAGS)
11703                                lp->if_tag = 0;
11704                        --lp->tags_sum[cp->tags_si];
11705                        lp->tasktbl[cp->tag] = cpu_to_scr(np->p_bad_i_t_l_q);
11706                } else {
11707                        lp->tasktbl[0] = cpu_to_scr(np->p_bad_i_t_l);
11708                }
11709                --lp->busyccbs;
11710                if (cp->queued) {
11711                        --lp->queuedccbs;
11712                }
11713        }
11714
11715        /*
11716        **      Make this CCB available.
11717        */
11718        xpt_remque(&cp->link_ccbq);
11719        xpt_insque_head(&cp->link_ccbq, &np->free_ccbq);
11720        cp -> host_status = HS_IDLE;
11721        cp -> queued = 0;
11722}
11723
11724/*------------------------------------------------------------------------
11725**      Allocate a CCB and initialize its fixed part.
11726**------------------------------------------------------------------------
11727**------------------------------------------------------------------------
11728*/
11729static ccb_p ncr_alloc_ccb(ncb_p np)
11730{
11731        ccb_p cp = 0;
11732        int hcode;
11733
11734        /*
11735        **      Allocate memory for this CCB.
11736        */
11737        cp = m_calloc_dma(sizeof(struct ccb), "CCB");
11738        if (!cp)
11739                return 0;
11740
11741        /*
11742        **      Count it and initialyze it.
11743        */
11744        np->actccbs++;
11745
11746        /*
11747        **      Remember virtual and bus address of this ccb.
11748        */
11749        cp->p_ccb          = vtobus(cp);
11750
11751        /*
11752        **      Insert this ccb into the hashed list.
11753        */
11754        hcode = CCB_HASH_CODE(cp->p_ccb);
11755        cp->link_ccbh = np->ccbh[hcode];
11756        np->ccbh[hcode] = cp;
11757
11758        /*
11759        **      Initialyze the start and restart actions.
11760        */
11761        cp->phys.header.go.start   = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
11762        cp->phys.header.go.restart = cpu_to_scr(NCB_SCRIPTH_PHYS(np,bad_i_t_l));
11763
11764        /*
11765        **      Initilialyze some other fields.
11766        */
11767        cp->phys.smsg_ext.addr = cpu_to_scr(NCB_PHYS(np, msgin[2]));
11768
11769        /*
11770        **      Chain into wakeup list and free ccb queue.
11771        */
11772        cp->link_ccb    = np->ccbc;
11773        np->ccbc        = cp;
11774
11775        xpt_insque_head(&cp->link_ccbq, &np->free_ccbq);
11776
11777        return cp;
11778}
11779
11780/*------------------------------------------------------------------------
11781**      Look up a CCB from a DSA value.
11782**------------------------------------------------------------------------
11783**------------------------------------------------------------------------
11784*/
11785static ccb_p ncr_ccb_from_dsa(ncb_p np, u_long dsa)
11786{
11787        int hcode;
11788        ccb_p cp;
11789
11790        hcode = CCB_HASH_CODE(dsa);
11791        cp = np->ccbh[hcode];
11792        while (cp) {
11793                if (cp->p_ccb == dsa)
11794                        break;
11795                cp = cp->link_ccbh;
11796        }
11797
11798        return cp;
11799}
11800
11801/*==========================================================
11802**
11803**
11804**      Allocation of resources for Targets/Luns/Tags.
11805**
11806**
11807**==========================================================
11808*/
11809
11810
11811/*------------------------------------------------------------------------
11812**      Target control block initialisation.
11813**------------------------------------------------------------------------
11814**      This data structure is fully initialized after a SCSI command 
11815**      has been successfully completed for this target.
11816**------------------------------------------------------------------------
11817*/
11818static void ncr_init_tcb (ncb_p np, u_char tn)
11819{
11820        /*
11821        **      Check some alignments required by the chip.
11822        */      
11823        assert (( (offsetof(struct ncr_reg, nc_sxfer) ^
11824                offsetof(struct tcb    , sval    )) &3) == 0);
11825        assert (( (offsetof(struct ncr_reg, nc_scntl3) ^
11826                offsetof(struct tcb    , wval    )) &3) == 0);
11827        if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
11828                (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)){
11829                assert (( (offsetof(struct ncr_reg, nc_scntl4) ^
11830                        offsetof(struct tcb    , uval    )) &3) == 0);
11831        }
11832}
11833
11834/*------------------------------------------------------------------------
11835**      Lun control block allocation and initialization.
11836**------------------------------------------------------------------------
11837**      This data structure is allocated and initialized after a SCSI 
11838**      command has been successfully completed for this target/lun.
11839**------------------------------------------------------------------------
11840*/
11841static lcb_p ncr_alloc_lcb (ncb_p np, u_char tn, u_char ln)
11842{
11843        tcb_p tp = &np->target[tn];
11844        lcb_p lp = ncr_lp(np, tp, ln);
11845
11846        /*
11847        **      Already done, return.
11848        */
11849        if (lp)
11850                return lp;
11851
11852        /*
11853        **      Initialize the target control block if not yet.
11854        */
11855        ncr_init_tcb(np, tn);
11856
11857        /*
11858        **      Allocate the lcb bus address array.
11859        **      Compute the bus address of this table.
11860        */
11861        if (ln && !tp->luntbl) {
11862                int i;
11863
11864                tp->luntbl = m_calloc_dma(256, "LUNTBL");
11865                if (!tp->luntbl)
11866                        goto fail;
11867                for (i = 0 ; i < 64 ; i++)
11868                        tp->luntbl[i] = cpu_to_scr(NCB_PHYS(np, resel_badlun));
11869                tp->b_luntbl = cpu_to_scr(vtobus(tp->luntbl));
11870        }
11871
11872        /*
11873        **      Allocate the table of pointers for LUN(s) > 0, if needed.
11874        */
11875        if (ln && !tp->lmp) {
11876                tp->lmp = m_calloc(MAX_LUN * sizeof(lcb_p), "LMP");
11877                if (!tp->lmp)
11878                        goto fail;
11879        }
11880
11881        /*
11882        **      Allocate the lcb.
11883        **      Make it available to the chip.
11884        */
11885        lp = m_calloc_dma(sizeof(struct lcb), "LCB");
11886        if (!lp)
11887                goto fail;
11888        if (ln) {
11889                tp->lmp[ln] = lp;
11890                tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
11891        }
11892        else {
11893                tp->l0p = lp;
11894                tp->b_lun0 = cpu_to_scr(vtobus(lp));
11895        }
11896
11897        /*
11898        **      Initialize the CCB queue headers.
11899        */
11900        xpt_que_init(&lp->busy_ccbq);
11901        xpt_que_init(&lp->wait_ccbq);
11902
11903        /*
11904        **      Set max CCBs to 1 and use the default task array 
11905        **      by default.
11906        */
11907        lp->maxnxs      = 1;
11908        lp->tasktbl     = &lp->tasktbl_0;
11909        lp->b_tasktbl   = cpu_to_scr(vtobus(lp->tasktbl));
11910        lp->tasktbl[0]  = cpu_to_scr(np->p_notask);
11911        lp->resel_task  = cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
11912
11913        /*
11914        **      Initialize command queuing control.
11915        */
11916        lp->busyccbs    = 1;
11917        lp->queuedccbs  = 1;
11918        lp->queuedepth  = 1;
11919fail:
11920        return lp;
11921}
11922
11923
11924/*------------------------------------------------------------------------
11925**      Lun control block setup on INQUIRY data received.
11926**------------------------------------------------------------------------
11927**      We only support WIDE, SYNC for targets and CMDQ for logical units.
11928**      This setup is done on each INQUIRY since we are expecting user 
11929**      will play with CHANGE DEFINITION commands. :-)
11930**------------------------------------------------------------------------
11931*/
11932static lcb_p ncr_setup_lcb (ncb_p np, u_char tn, u_char ln, u_char *inq_data)
11933{
11934        tcb_p tp = &np->target[tn];
11935        lcb_p lp = ncr_lp(np, tp, ln);
11936        u_char inq_byte7;
11937        int i;
11938
11939        /*
11940        **      If no lcb, try to allocate it.
11941        */
11942        if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln)))
11943                goto fail;
11944
11945#if 0   /* No more used. Left here as provision */
11946        /*
11947        **      Get device quirks.
11948        */
11949        tp->quirks = 0;
11950        if (tp->quirks && bootverbose) {
11951                PRINT_LUN(np, tn, ln);
11952                printk ("quirks=%x.\n", tp->quirks);
11953        }
11954#endif
11955
11956        /*
11957        **      Evaluate trustable target/unit capabilities.
11958        **      We only believe device version >= SCSI-2 that 
11959        **      use appropriate response data format (2).
11960        **      But it seems that some CCS devices also 
11961        **      support SYNC and I donnot want to frustrate 
11962        **      anybody. ;-)
11963        */
11964        inq_byte7 = 0;
11965        if      ((inq_data[2] & 0x7) >= 2 && (inq_data[3] & 0xf) == 2)
11966                inq_byte7 = inq_data[7];
11967        else if ((inq_data[2] & 0x7) == 1 && (inq_data[3] & 0xf) == 1)
11968                inq_byte7 = INQ7_SYNC;
11969
11970        /*
11971        **      Throw away announced LUN capabilities if we are told 
11972        **      that there is no real device supported by the logical unit.
11973        */
11974        if ((inq_data[0] & 0xe0) > 0x20 || (inq_data[0] & 0x1f) == 0x1f)
11975                inq_byte7 &= (INQ7_SYNC | INQ7_WIDE16);
11976
11977        /*
11978        **      If user is wanting SYNC, force this feature.
11979        */
11980        if (driver_setup.force_sync_nego)
11981                inq_byte7 |= INQ7_SYNC;
11982
11983        /*
11984        **      Prepare negotiation if SIP capabilities have changed.
11985        */
11986        tp->inq_done = 1;
11987        if ((inq_byte7 ^ tp->inq_byte7) & (INQ7_SYNC | INQ7_WIDE16)) {
11988                tp->inq_byte7 = inq_byte7;
11989                ncr_negotiate(np, tp);
11990        }
11991
11992        /*
11993        **      If unit supports tagged commands, allocate and 
11994        **      initialyze the task table if not yet.
11995        */
11996        if ((inq_byte7 & INQ7_QUEUE) && lp->tasktbl == &lp->tasktbl_0) {
11997                lp->tasktbl = m_calloc_dma(MAX_TASKS*4, "TASKTBL");
11998                if (!lp->tasktbl) {
11999                        lp->tasktbl = &lp->tasktbl_0;
12000                        goto fail;
12001                }
12002                lp->b_tasktbl = cpu_to_scr(vtobus(lp->tasktbl));
12003                for (i = 0 ; i < MAX_TASKS ; i++)
12004                        lp->tasktbl[i] = cpu_to_scr(np->p_notask);
12005
12006                lp->cb_tags = m_calloc(MAX_TAGS, "CB_TAGS");
12007                if (!lp->cb_tags)
12008                        goto fail;
12009                for (i = 0 ; i < MAX_TAGS ; i++)
12010                        lp->cb_tags[i] = i;
12011
12012                lp->maxnxs = MAX_TAGS;
12013                lp->tags_stime = ktime_get(3*HZ);
12014        }
12015
12016        /*
12017        **      Adjust tagged queueing status if needed.
12018        */
12019        if ((inq_byte7 ^ lp->inq_byte7) & INQ7_QUEUE) {
12020                lp->inq_byte7 = inq_byte7;
12021                lp->numtags   = lp->maxtags;
12022                ncr_setup_tags (np, tn, ln);
12023        }
12024
12025fail:
12026        return lp;
12027}
12028
12029/*==========================================================
12030**
12031**
12032**      Build Scatter Gather Block
12033**
12034**
12035**==========================================================
12036**
12037**      The transfer area may be scattered among
12038**      several non adjacent physical pages.
12039**
12040**      We may use MAX_SCATTER blocks.
12041**
12042**----------------------------------------------------------
12043*/
12044
12045/*
12046**      We try to reduce the number of interrupts caused
12047**      by unexpected phase changes due to disconnects.
12048**      A typical harddisk may disconnect before ANY block.
12049**      If we wanted to avoid unexpected phase changes at all
12050**      we had to use a break point every 512 bytes.
12051**      Of course the number of scatter/gather blocks is
12052**      limited.
12053**      Under Linux, the scatter/gatter blocks are provided by 
12054**      the generic driver. We just have to copy addresses and 
12055**      sizes to the data segment array.
12056*/
12057
12058/*
12059**      For 64 bit systems, we use the 8 upper bits of the size field 
12060**      to provide bus address bits 32-39 to the SCRIPTS processor.
12061**      This allows the 895A and 896 to address up to 1 TB of memory.
12062**      For 32 bit chips on 64 bit systems, we must be provided with 
12063**      memory addresses that fit into the first 32 bit bus address 
12064**      range and so, this does not matter and we expect an error from 
12065**      the chip if this ever happen.
12066**
12067**      We use a separate function for the case Linux does not provide 
12068**      a scatter list in order to allow better code optimization 
12069**      for the case we have a scatter list (BTW, for now this just wastes  
12070**      about 40 bytes of code for x86, but my guess is that the scatter 
12071**      code will get more complex later).
12072*/
12073
12074#define SCATTER_ONE(data, badd, len)                                    \
12075        (data)->addr = cpu_to_scr(badd);                                \
12076        (data)->size = cpu_to_scr((((badd) >> 8) & 0xff000000) + len);
12077
12078#define CROSS_16MB(p, n) (((((u_long) p) + n - 1) ^ ((u_long) p)) & ~0xffffff)
12079
12080static  int ncr_scatter_no_sglist(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
12081{
12082        struct scr_tblmove *data = &cp->phys.data[MAX_SCATTER-1];
12083        int segment;
12084
12085        cp->data_len = cmd->request_bufflen;
12086
12087        if (cmd->request_bufflen) {
12088                dma_addr_t baddr = map_scsi_single_data(np, cmd);
12089
12090                SCATTER_ONE(data, baddr, cmd->request_bufflen);
12091                if (CROSS_16MB(baddr, cmd->request_bufflen)) {
12092                        cp->host_flags |= HF_PM_TO_C;
12093#ifdef DEBUG_896R1
12094printk("He! we are crossing a 16 MB boundary (0x%lx, 0x%x)\n",
12095        baddr, cmd->request_bufflen);
12096#endif
12097                }
12098                segment = 1;
12099        }
12100        else
12101                segment = 0;
12102
12103        return segment;
12104}
12105
12106/*
12107**      DEL 472 - 53C896 Rev 1 - Part Number 609-0393055 - ITEM 5.
12108**
12109**      We disable data phase mismatch handling from SCRIPTS for data 
12110**      transfers that contains scatter/gather entries that cross  
12111**      a 16 MB boundary.
12112**      We use a different scatter function for 896 rev. 1 that needs 
12113**      such a work-around. Doing so, we do not affect performance for 
12114**      other chips.
12115**      This problem should not be triggered for disk IOs under Linux, 
12116**      since such IOs are performed using pages and buffers that are 
12117**      nicely power-of-two sized and aligned. But, since this may change 
12118**      at any time, a work-around was required.
12119*/
12120static int ncr_scatter_896R1(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
12121{
12122        int segn;
12123        int use_sg = (int) cmd->use_sg;
12124
12125        cp->data_len = 0;
12126
12127        if (!use_sg)
12128                segn = ncr_scatter_no_sglist(np, cp, cmd);
12129        else if (use_sg > MAX_SCATTER)
12130                segn = -1;
12131        else {
12132                struct scatterlist *scatter = (struct scatterlist *)cmd->buffer;
12133                struct scr_tblmove *data;
12134
12135                use_sg = map_scsi_sg_data(np, cmd);
12136                data = &cp->phys.data[MAX_SCATTER - use_sg];
12137
12138                for (segn = 0; segn < use_sg; segn++) {
12139                        dma_addr_t baddr = scsi_sg_dma_address(&scatter[segn]);
12140                        unsigned int len = scsi_sg_dma_len(&scatter[segn]);
12141
12142                        SCATTER_ONE(&data[segn],
12143                                    baddr,
12144                                    len);
12145                        if (CROSS_16MB(baddr, scatter[segn].length)) {
12146                                cp->host_flags |= HF_PM_TO_C;
12147#ifdef DEBUG_896R1
12148printk("He! we are crossing a 16 MB boundary (0x%lx, 0x%x)\n",
12149        baddr, scatter[segn].length);
12150#endif
12151                        }
12152                        cp->data_len += len;
12153                }
12154        }
12155
12156        return segn;
12157}
12158
12159static int ncr_scatter(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
12160{
12161        int segment;
12162        int use_sg = (int) cmd->use_sg;
12163
12164        cp->data_len = 0;
12165
12166        if (!use_sg)
12167                segment = ncr_scatter_no_sglist(np, cp, cmd);
12168        else if (use_sg > MAX_SCATTER)
12169                segment = -1;
12170        else {
12171                struct scatterlist *scatter = (struct scatterlist *)cmd->buffer;
12172                struct scr_tblmove *data;
12173
12174                use_sg = map_scsi_sg_data(np, cmd);
12175                data = &cp->phys.data[MAX_SCATTER - use_sg];
12176
12177                for (segment = 0; segment < use_sg; segment++) {
12178                        dma_addr_t baddr = scsi_sg_dma_address(&scatter[segment]);
12179                        unsigned int len = scsi_sg_dma_len(&scatter[segment]);
12180
12181                        SCATTER_ONE(&data[segment],
12182                                    baddr,
12183                                    len);
12184                        cp->data_len += len;
12185                }
12186        }
12187
12188        return segment;
12189}
12190
12191/*==========================================================
12192**
12193**
12194**      Test the pci bus snoop logic :-(
12195**
12196**      Has to be called with interrupts disabled.
12197**
12198**
12199**==========================================================
12200*/
12201
12202#ifndef SCSI_NCR_IOMAPPED
12203static int __init ncr_regtest (struct ncb* np)
12204{
12205        register volatile u_int32 data;
12206        /*
12207        **      ncr registers may NOT be cached.
12208        **      write 0xffffffff to a read only register area,
12209        **      and try to read it back.
12210        */
12211        data = 0xffffffff;
12212        OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
12213        data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
12214#if 1
12215        if (data == 0xffffffff) {
12216#else
12217        if ((data & 0xe2f0fffd) != 0x02000080) {
12218#endif
12219                printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
12220                        (unsigned) data);
12221                return (0x10);
12222        };
12223        return (0);
12224}
12225#endif
12226
12227static int __init ncr_snooptest (struct ncb* np)
12228{
12229        u_int32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
12230        u_char  dstat;
12231        int     i, err=0;
12232#ifndef SCSI_NCR_IOMAPPED
12233        if (np->reg) {
12234            err |= ncr_regtest (np);
12235            if (err) return (err);
12236        }
12237#endif
12238restart_test:
12239        /*
12240        **      Enable Master Parity Checking as we intend 
12241        **      to enable it for normal operations.
12242        */
12243        OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
12244        /*
12245        **      init
12246        */
12247        pc  = NCB_SCRIPTH0_PHYS (np, snooptest);
12248        host_wr = 1;
12249        ncr_wr  = 2;
12250        /*
12251        **      Set memory and register.
12252        */
12253        np->ncr_cache = cpu_to_scr(host_wr);
12254        OUTL (nc_temp, ncr_wr);
12255        /*
12256        **      Start script (exchange values)
12257        */
12258        OUTL (nc_dsa, np->p_ncb);
12259        OUTL_DSP (pc);
12260        /*
12261        **      Wait 'til done (with timeout)
12262        */
12263        for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
12264                if (INB(nc_istat) & (INTF|SIP|DIP))
12265                        break;
12266        if (i>=NCR_SNOOP_TIMEOUT) {
12267                printk ("CACHE TEST FAILED: timeout.\n");
12268                return (0x20);
12269        };
12270        /*
12271        **      Check for fatal DMA errors.
12272        */
12273        dstat = INB (nc_dstat);
12274#if 1   /* Band aiding for broken hardwares that fail PCI parity */
12275        if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
12276                printk ("%s: PCI DATA PARITY ERROR DETECTED - "
12277                        "DISABLING MASTER DATA PARITY CHECKING.\n",
12278                        ncr_name(np));
12279                np->rv_ctest4 &= ~MPEE;
12280                goto restart_test;
12281        }
12282#endif
12283        if (dstat & (MDPE|BF|IID)) {
12284                printk ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
12285                return (0x80);
12286        }
12287        /*
12288        **      Save termination position.
12289        */
12290        pc = INL (nc_dsp);
12291        /*
12292        **      Read memory and register.
12293        */
12294        host_rd = scr_to_cpu(np->ncr_cache);
12295        ncr_rd  = INL (nc_scratcha);
12296        ncr_bk  = INL (nc_temp);
12297        /*
12298        **      Check termination position.
12299        */
12300        if (pc != NCB_SCRIPTH0_PHYS (np, snoopend)+8) {
12301                printk ("CACHE TEST FAILED: script execution failed.\n");
12302                printk ("start=%08lx, pc=%08lx, end=%08lx\n", 
12303                        (u_long) NCB_SCRIPTH0_PHYS (np, snooptest), (u_long) pc,
12304                        (u_long) NCB_SCRIPTH0_PHYS (np, snoopend) +8);
12305                return (0x40);
12306        };
12307        /*
12308        **      Show results.
12309        */
12310        if (host_wr != ncr_rd) {
12311                printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
12312                        (int) host_wr, (int) ncr_rd);
12313                err |= 1;
12314        };
12315        if (host_rd != ncr_wr) {
12316                printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
12317                        (int) ncr_wr, (int) host_rd);
12318                err |= 2;
12319        };
12320        if (ncr_bk != ncr_wr) {
12321                printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
12322                        (int) ncr_wr, (int) ncr_bk);
12323                err |= 4;
12324        };
12325        return (err);
12326}
12327
12328/*==========================================================
12329**
12330**      Determine the ncr's clock frequency.
12331**      This is essential for the negotiation
12332**      of the synchronous transfer rate.
12333**
12334**==========================================================
12335**
12336**      Note: we have to return the correct value.
12337**      THERE IS NO SAFE DEFAULT VALUE.
12338**
12339**      Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
12340**      53C860 and 53C875 rev. 1 support fast20 transfers but 
12341**      do not have a clock doubler and so are provided with a 
12342**      80 MHz clock. All other fast20 boards incorporate a doubler 
12343**      and so should be delivered with a 40 MHz clock.
12344**      The recent fast40 chips  (895/896/895A) and the
12345**      fast80 chip (C1010) use a 40 Mhz base clock 
12346**      and provide a clock quadrupler (160 Mhz). The code below 
12347**      tries to deal as cleverly as possible with all this stuff.
12348**
12349**----------------------------------------------------------
12350*/
12351
12352/*
12353 *      Select NCR SCSI clock frequency
12354 */
12355static void ncr_selectclock(ncb_p np, u_char scntl3)
12356{
12357        if (np->multiplier < 2) {
12358                OUTB(nc_scntl3, scntl3);
12359                return;
12360        }
12361
12362        if (bootverbose >= 2)
12363                printk ("%s: enabling clock multiplier\n", ncr_name(np));
12364
12365        OUTB(nc_stest1, DBLEN);    /* Enable clock multiplier             */
12366
12367        if ( (np->device_id != PCI_DEVICE_ID_LSI_53C1010) && 
12368                        (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66) && 
12369                                                (np->multiplier > 2)) {  
12370                int i = 20;      /* Poll bit 5 of stest4 for quadrupler */
12371                while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
12372                        UDELAY (20);
12373                if (!i)
12374                    printk("%s: the chip cannot lock the frequency\n",
12375                                                 ncr_name(np));
12376
12377        } else                  /* Wait 120 micro-seconds for multiplier*/
12378                UDELAY (120);
12379
12380        OUTB(nc_stest3, HSC);           /* Halt the scsi clock          */
12381        OUTB(nc_scntl3, scntl3);
12382        OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier      */
12383        OUTB(nc_stest3, 0x00);          /* Restart scsi clock           */
12384}
12385
12386
12387/*
12388 *      calculate NCR SCSI clock frequency (in KHz)
12389 */
12390static unsigned __init ncrgetfreq (ncb_p np, int gen)
12391{
12392        unsigned int ms = 0;
12393        unsigned int f;
12394        int count;
12395
12396        /*
12397         * Measure GEN timer delay in order 
12398         * to calculate SCSI clock frequency
12399         *
12400         * This code will never execute too
12401         * many loop iterations (if DELAY is 
12402         * reasonably correct). It could get
12403         * too low a delay (too high a freq.)
12404         * if the CPU is slow executing the 
12405         * loop for some reason (an NMI, for
12406         * example). For this reason we will
12407         * if multiple measurements are to be 
12408         * performed trust the higher delay 
12409         * (lower frequency returned).
12410         */
12411        OUTW (nc_sien , 0x0);/* mask all scsi interrupts */
12412                                /* enable general purpose timer */
12413        (void) INW (nc_sist);   /* clear pending scsi interrupt */
12414        OUTB (nc_dien , 0);     /* mask all dma interrupts */
12415        (void) INW (nc_sist);   /* another one, just to be sure :) */
12416        OUTB (nc_scntl3, 4);    /* set pre-scaler to divide by 3 */
12417        OUTB (nc_stime1, 0);    /* disable general purpose timer */
12418        OUTB (nc_stime1, gen);  /* set to nominal delay of 1<<gen * 125us */
12419                                /* Temporary fix for udelay issue with Alpha
12420                                        platform */
12421        while (!(INW(nc_sist) & GEN) && ms++ < 100000) {
12422                /* count 1ms */
12423                for (count = 0; count < 10; count++)
12424                        UDELAY (100);   
12425        }
12426        OUTB (nc_stime1, 0);    /* disable general purpose timer */
12427        /*
12428         * set prescaler to divide by whatever 0 means
12429         * 0 ought to choose divide by 2, but appears
12430         * to set divide by 3.5 mode in my 53c810 ...
12431         */
12432        OUTB (nc_scntl3, 0);
12433
12434        /*
12435         * adjust for prescaler, and convert into KHz 
12436         * scale values derived empirically.
12437         */
12438        f = ms ? ((1 << gen) * 4340) / ms : 0;
12439
12440        if (bootverbose >= 2)
12441                printk ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
12442                        ncr_name(np), gen, ms, f);
12443
12444        return f;
12445}
12446
12447static unsigned __init ncr_getfreq (ncb_p np)
12448{
12449        u_int f1, f2;
12450        int gen = 11;
12451
12452        (void) ncrgetfreq (np, gen);    /* throw away first result */
12453        f1 = ncrgetfreq (np, gen);
12454        f2 = ncrgetfreq (np, gen);
12455        if (f1 > f2) f1 = f2;           /* trust lower result   */
12456        return f1;
12457}
12458
12459/*
12460 *      Get/probe NCR SCSI clock frequency
12461 */
12462static void __init ncr_getclock (ncb_p np, int mult)
12463{
12464        unsigned char scntl3 = np->sv_scntl3;
12465        unsigned char stest1 = np->sv_stest1;
12466        unsigned f1;
12467
12468        np->multiplier = 1;
12469        f1 = 40000;
12470
12471        /*
12472        **      True with 875/895/896/895A with clock multiplier selected
12473        */
12474        if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
12475                if (bootverbose >= 2)
12476                        printk ("%s: clock multiplier found\n", ncr_name(np));
12477                np->multiplier = mult;
12478        }
12479
12480        /*
12481        **      If multiplier not found or scntl3 not 7,5,3,
12482        **      reset chip and get frequency from general purpose timer.
12483        **      Otherwise trust scntl3 BIOS setting.
12484        */
12485        if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
12486                OUTB (nc_stest1, 0);            /* make sure doubler is OFF */
12487                f1 = ncr_getfreq (np);
12488
12489                if (bootverbose)
12490                        printk ("%s: NCR clock is %uKHz\n", ncr_name(np), f1);
12491
12492                if      (f1 < 55000)            f1 =  40000;
12493                else                            f1 =  80000;
12494
12495                /*
12496                **      Suggest to also check the PCI clock frequency 
12497                **      to make sure our frequency calculation algorithm 
12498                **      is not too biased.
12499                */
12500                if (np->features & FE_66MHZ) {
12501                        np->pciclock_min = (66000*55+80-1)/80;
12502                        np->pciclock_max = (66000*55)/40;
12503                }
12504                else {
12505                        np->pciclock_min = (33000*55+80-1)/80;
12506                        np->pciclock_max = (33000*55)/40;
12507                }
12508
12509                if (f1 == 40000 && mult > 1) {
12510                        if (bootverbose >= 2)
12511                                printk ("%s: clock multiplier assumed\n", ncr_name(np));
12512                        np->multiplier  = mult;
12513                }
12514        } else {
12515                if      ((scntl3 & 7) == 3)     f1 =  40000;
12516                else if ((scntl3 & 7) == 5)     f1 =  80000;
12517                else                            f1 = 160000;
12518
12519                f1 /= np->multiplier;
12520        }
12521
12522        /*
12523        **      Compute controller synchronous parameters.
12524        */
12525        f1              *= np->multiplier;
12526        np->clock_khz   = f1;
12527}
12528
12529/*
12530 *      Get/probe PCI clock frequency
12531 */
12532static u_int __init ncr_getpciclock (ncb_p np)
12533{
12534        static u_int f;
12535
12536        OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
12537        f = ncr_getfreq (np);
12538        OUTB (nc_stest1, 0);
12539
12540        return f;
12541}
12542
12543/*===================== LINUX ENTRY POINTS SECTION ==========================*/
12544
12545#ifndef uchar
12546#define uchar unsigned char
12547#endif
12548
12549#ifndef ushort
12550#define ushort unsigned short
12551#endif
12552
12553#ifndef ulong
12554#define ulong unsigned long
12555#endif
12556
12557/* ---------------------------------------------------------------------
12558**
12559**      Driver setup from the boot command line
12560**
12561** ---------------------------------------------------------------------
12562*/
12563
12564#ifdef MODULE
12565#define ARG_SEP ' '
12566#else
12567#define ARG_SEP ','
12568#endif
12569
12570#define OPT_TAGS                1
12571#define OPT_MASTER_PARITY       2
12572#define OPT_SCSI_PARITY         3
12573#define OPT_DISCONNECTION       4
12574#define OPT_SPECIAL_FEATURES    5
12575#define OPT_RESERVED_1          6
12576#define OPT_FORCE_SYNC_NEGO     7
12577#define OPT_REVERSE_PROBE       8
12578#define OPT_DEFAULT_SYNC        9
12579#define OPT_VERBOSE             10
12580#define OPT_DEBUG               11
12581#define OPT_BURST_MAX           12
12582#define OPT_LED_PIN             13
12583#define OPT_MAX_WIDE            14
12584#define OPT_SETTLE_DELAY        15
12585#define OPT_DIFF_SUPPORT        16
12586#define OPT_IRQM                17
12587#define OPT_PCI_FIX_UP          18
12588#define OPT_BUS_CHECK           19
12589#define OPT_OPTIMIZE            20
12590#define OPT_RECOVERY            21
12591#define OPT_SAFE_SETUP          22
12592#define OPT_USE_NVRAM           23
12593#define OPT_EXCLUDE             24
12594#define OPT_HOST_ID             25
12595
12596#ifdef SCSI_NCR_IARB_SUPPORT
12597#define OPT_IARB                26
12598#endif
12599
12600static char setup_token[] __initdata = 
12601        "tags:"   "mpar:"
12602        "spar:"   "disc:"
12603        "specf:"  "_rsvd1:"
12604        "fsn:"    "revprob:"
12605        "sync:"   "verb:"
12606        "debug:"  "burst:"
12607        "led:"    "wide:"
12608        "settle:" "diff:"
12609        "irqm:"   "pcifix:"
12610        "buschk:" "optim:"
12611        "recovery:"
12612        "safe:"   "nvram:"
12613        "excl:"   "hostid:"
12614#ifdef SCSI_NCR_IARB_SUPPORT
12615        "iarb:"
12616#endif
12617        ;       /* DONNOT REMOVE THIS ';' */
12618
12619#ifdef MODULE
12620#define ARG_SEP ' '
12621#else
12622#define ARG_SEP ','
12623#endif
12624
12625static int __init get_setup_token(char *p)
12626{
12627        char *cur = setup_token;
12628        char *pc;
12629        int i = 0;
12630
12631        while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
12632                ++pc;
12633                ++i;
12634                if (!strncmp(p, cur, pc - cur))
12635                        return i;
12636                cur = pc;
12637        }
12638        return 0;
12639}
12640
12641
12642int __init sym53c8xx_setup(char *str)
12643{
12644#ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
12645        char *cur = str;
12646        char *pc, *pv;
12647        unsigned long val;
12648        int i,  c;
12649        int xi = 0;
12650
12651        while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
12652                char *pe;
12653
12654                val = 0;
12655                pv = pc;
12656                c = *++pv;
12657
12658                if      (c == 'n')
12659                        val = 0;
12660                else if (c == 'y')
12661                        val = 1;
12662                else
12663                        val = (int) simple_strtoul(pv, &pe, 0);
12664
12665                switch (get_setup_token(cur)) {
12666                case OPT_TAGS:
12667                        driver_setup.default_tags = val;
12668                        if (pe && *pe == '/') {
12669                                i = 0;
12670                                while (*pe && *pe != ARG_SEP && 
12671                                        i < sizeof(driver_setup.tag_ctrl)-1) {
12672                                        driver_setup.tag_ctrl[i++] = *pe++;
12673                                }
12674                                driver_setup.tag_ctrl[i] = '\0';
12675                        }
12676                        break;
12677                case OPT_MASTER_PARITY:
12678                        driver_setup.master_parity = val;
12679                        break;
12680                case OPT_SCSI_PARITY:
12681                        driver_setup.scsi_parity = val;
12682                        break;
12683                case OPT_DISCONNECTION:
12684                        driver_setup.disconnection = val;
12685                        break;
12686                case OPT_SPECIAL_FEATURES:
12687                        driver_setup.special_features = val;
12688                        break;
12689                case OPT_FORCE_SYNC_NEGO:
12690                        driver_setup.force_sync_nego = val;
12691                        break;
12692                case OPT_REVERSE_PROBE:
12693                        driver_setup.reverse_probe = val;
12694                        break;
12695                case OPT_DEFAULT_SYNC:
12696                        driver_setup.default_sync = val;
12697                        break;
12698                case OPT_VERBOSE:
12699                        driver_setup.verbose = val;
12700                        break;
12701                case OPT_DEBUG:
12702                        driver_setup.debug = val;
12703                        break;
12704                case OPT_BURST_MAX:
12705                        driver_setup.burst_max = val;
12706                        break;
12707                case OPT_LED_PIN:
12708                        driver_setup.led_pin = val;
12709                        break;
12710                case OPT_MAX_WIDE:
12711                        driver_setup.max_wide = val? 1:0;
12712                        break;
12713                case OPT_SETTLE_DELAY:
12714                        driver_setup.settle_delay = val;
12715                        break;
12716                case OPT_DIFF_SUPPORT:
12717                        driver_setup.diff_support = val;
12718                        break;
12719                case OPT_IRQM:
12720                        driver_setup.irqm = val;
12721                        break;
12722                case OPT_PCI_FIX_UP:
12723                        driver_setup.pci_fix_up = val;
12724                        break;
12725                case OPT_BUS_CHECK:
12726                        driver_setup.bus_check = val;
12727                        break;
12728                case OPT_OPTIMIZE:
12729                        driver_setup.optimize = val;
12730                        break;
12731                case OPT_RECOVERY:
12732                        driver_setup.recovery = val;
12733                        break;
12734                case OPT_USE_NVRAM:
12735                        driver_setup.use_nvram = val;
12736                        break;
12737                case OPT_SAFE_SETUP:
12738                        memcpy(&driver_setup, &driver_safe_setup,
12739                                sizeof(driver_setup));
12740                        break;
12741                case OPT_EXCLUDE:
12742                        if (xi < SCSI_NCR_MAX_EXCLUDES)
12743                                driver_setup.excludes[xi++] = val;
12744                        break;
12745                case OPT_HOST_ID:
12746                        driver_setup.host_id = val;
12747                        break;
12748#ifdef SCSI_NCR_IARB_SUPPORT
12749                case OPT_IARB:
12750                        driver_setup.iarb = val;
12751                        break;
12752#endif
12753                default:
12754                        printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur);
12755                        break;
12756                }
12757
12758                if ((cur = strchr(cur, ARG_SEP)) != NULL)
12759                        ++cur;
12760        }
12761#endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */
12762        return 1;
12763}
12764
12765#if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,13)
12766#ifndef MODULE
12767__setup("sym53c8xx=", sym53c8xx_setup);
12768#endif
12769#endif
12770
12771static int 
12772sym53c8xx_pci_init(Scsi_Host_Template *tpnt, pcidev_t pdev, ncr_device *device);
12773
12774/*
12775**   Linux entry point for SYM53C8XX devices detection routine.
12776**
12777**   Called by the middle-level scsi drivers at initialization time,
12778**   or at module installation.
12779**
12780**   Read the PCI configuration and try to attach each
12781**   detected NCR board.
12782**
12783**   If NVRAM is present, try to attach boards according to 
12784**   the used defined boot order.
12785**
12786**   Returns the number of boards successfully attached.
12787*/
12788
12789static void __init ncr_print_driver_setup(void)
12790{
12791#define YesNo(y)        y ? 'y' : 'n'
12792        printk (NAME53C8XX ": setup=disc:%c,specf:%d,tags:%d,sync:%d,"
12793                "burst:%d,wide:%c,diff:%d,revprob:%c,buschk:0x%x\n",
12794                YesNo(driver_setup.disconnection),
12795                driver_setup.special_features,
12796                driver_setup.default_tags,
12797                driver_setup.default_sync,
12798                driver_setup.burst_max,
12799                YesNo(driver_setup.max_wide),
12800                driver_setup.diff_support,
12801                YesNo(driver_setup.reverse_probe),
12802                driver_setup.bus_check);
12803
12804        printk (NAME53C8XX ": setup=mpar:%c,spar:%c,fsn=%c,verb:%d,debug:0x%x,"
12805                "led:%c,settle:%d,irqm:0x%x,nvram:0x%x,pcifix:0x%x\n",
12806                YesNo(driver_setup.master_parity),
12807                YesNo(driver_setup.scsi_parity),
12808                YesNo(driver_setup.force_sync_nego),
12809                driver_setup.verbose,
12810                driver_setup.debug,
12811                YesNo(driver_setup.led_pin),
12812                driver_setup.settle_delay,
12813                driver_setup.irqm,
12814                driver_setup.use_nvram,
12815                driver_setup.pci_fix_up);
12816#undef YesNo
12817}
12818
12819/*===================================================================
12820**   SYM53C8XX devices description table and chip ids list.
12821**===================================================================
12822*/
12823
12824static ncr_chip ncr_chip_table[] __initdata     = SCSI_NCR_CHIP_TABLE;
12825static ushort   ncr_chip_ids[]   __initdata     = SCSI_NCR_CHIP_IDS;
12826
12827#ifdef  SCSI_NCR_PQS_PDS_SUPPORT
12828/*===================================================================
12829**    Detect all NCR PQS/PDS boards and keep track of their bus nr.
12830**
12831**    The NCR PQS or PDS card is constructed as a DEC bridge
12832**    behind which sit a proprietary NCR memory controller and
12833**    four or two 53c875s as separate devices.  In its usual mode
12834**    of operation, the 875s are slaved to the memory controller
12835**    for all transfers.  We can tell if an 875 is part of a
12836**    PQS/PDS or not since if it is, it will be on the same bus
12837**    as the memory controller.  To operate with the Linux
12838**    driver, the memory controller is disabled and the 875s
12839**    freed to function independently.  The only wrinkle is that
12840**    the preset SCSI ID (which may be zero) must be read in from
12841**    a special configuration space register of the 875
12842**===================================================================
12843*/
12844#define SCSI_NCR_MAX_PQS_BUS    16
12845static int pqs_bus[SCSI_NCR_MAX_PQS_BUS] __initdata = { 0 };
12846
12847static void __init ncr_detect_pqs_pds(void)
12848{
12849        short index;
12850        pcidev_t dev = PCIDEV_NULL;
12851
12852        for(index=0; index < SCSI_NCR_MAX_PQS_BUS; index++) {
12853                u_char tmp;
12854
12855                dev = pci_find_device(0x101a, 0x0009, dev);
12856                if (dev == PCIDEV_NULL) {
12857                        pqs_bus[index] = -1;
12858                        break;
12859                }
12860                printk(KERN_INFO NAME53C8XX ": NCR PQS/PDS memory controller detected on bus %d\n", PciBusNumber(dev));
12861                pci_read_config_byte(dev, 0x44, &tmp);
12862                /* bit 1: allow individual 875 configuration */
12863                tmp |= 0x2;
12864                pci_write_config_byte(dev, 0x44, tmp);
12865                pci_read_config_byte(dev, 0x45, &tmp);
12866                /* bit 2: drive individual 875 interrupts to the bus */
12867                tmp |= 0x4;
12868                pci_write_config_byte(dev, 0x45, tmp);
12869
12870                pqs_bus[index] = PciBusNumber(dev);
12871        }
12872}
12873#endif /* SCSI_NCR_PQS_PDS_SUPPORT */
12874
12875/*===================================================================
12876**    Detect all 53c8xx hosts and then attach them.
12877**
12878**    If we are using NVRAM, once all hosts are detected, we need to 
12879**    check any NVRAM for boot order in case detect and boot order 
12880**    differ and attach them using the order in the NVRAM.
12881**
12882**    If no NVRAM is found or data appears invalid attach boards in 
12883**    the order they are detected.
12884**===================================================================
12885*/
12886int __init sym53c8xx_detect(Scsi_Host_Template *tpnt)
12887{
12888        pcidev_t pcidev;
12889        int i, j, chips, hosts, count;
12890        int attach_count = 0;
12891        ncr_device *devtbl, *devp;
12892#ifdef SCSI_NCR_NVRAM_SUPPORT
12893        ncr_nvram  nvram0, nvram, *nvp;
12894#endif
12895
12896        /*
12897        **    PCI is required.
12898        */
12899        if (!pci_present())
12900                return 0;
12901
12902        /*
12903        **    Initialize driver general stuff.
12904        */
12905#ifdef SCSI_NCR_PROC_INFO_SUPPORT
12906#if LINUX_VERSION_CODE < LinuxVersionCode(2,3,27)
12907     tpnt->proc_dir  = &proc_scsi_sym53c8xx;
12908#else
12909     tpnt->proc_name = NAME53C8XX;
12910#endif
12911     tpnt->proc_info = sym53c8xx_proc_info;
12912#endif
12913
12914#if     defined(SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT) && defined(MODULE)
12915if (sym53c8xx)
12916        sym53c8xx_setup(sym53c8xx);
12917#endif
12918#ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
12919        ncr_debug = driver_setup.debug;
12920#endif
12921
12922        if (initverbose >= 2)
12923                ncr_print_driver_setup();
12924
12925        /*
12926        **      Allocate the device table since we donnot want to 
12927        **      overflow the kernel stack.
12928        **      1 x 4K PAGE is enough for more than 40 devices for i386.
12929        */
12930        devtbl = m_calloc(PAGE_SIZE, "devtbl");
12931        if (!devtbl)
12932                return 0;
12933
12934        /*
12935        **    Detect all NCR PQS/PDS memory controllers.
12936        */
12937#ifdef  SCSI_NCR_PQS_PDS_SUPPORT
12938        ncr_detect_pqs_pds();
12939#endif
12940
12941        /* 
12942        **    Detect all 53c8xx hosts.
12943        **    Save the first Symbios NVRAM content if any 
12944        **    for the boot order.
12945        */
12946        chips   = sizeof(ncr_chip_ids)  / sizeof(ncr_chip_ids[0]);
12947        hosts   = PAGE_SIZE             / sizeof(*devtbl);
12948#ifdef SCSI_NCR_NVRAM_SUPPORT
12949        nvp = (driver_setup.use_nvram & 0x1) ? &nvram0 : 0;
12950#endif
12951        j = 0;
12952        count = 0;
12953        pcidev = PCIDEV_NULL;
12954        while (1) {
12955                char *msg = "";
12956                if (count >= hosts)
12957                        break;
12958                if (j >= chips)
12959                        break;
12960                i = driver_setup.reverse_probe ? chips - 1 - j : j;
12961                pcidev = pci_find_device(PCI_VENDOR_ID_NCR, ncr_chip_ids[i],
12962                                         pcidev);
12963                if (pcidev == PCIDEV_NULL) {
12964                        ++j;
12965                        continue;
12966                }
12967                if (pci_enable_device(pcidev)) /* @!*!$&*!%-*#;! */
12968                        continue;
12969                /* Some HW as the HP LH4 may report twice PCI devices */
12970                for (i = 0; i < count ; i++) {
12971                        if (devtbl[i].slot.bus       == PciBusNumber(pcidev) && 
12972                            devtbl[i].slot.device_fn == PciDeviceFn(pcidev))
12973                                break;
12974                }
12975                if (i != count) /* Ignore this device if we already have it */
12976                        continue;
12977                devp = &devtbl[count];
12978                devp->host_id = driver_setup.host_id;
12979                devp->attach_done = 0;
12980                if (sym53c8xx_pci_init(tpnt, pcidev, devp)) {
12981                        continue;
12982                }
12983                ++count;
12984#ifdef SCSI_NCR_NVRAM_SUPPORT
12985                if (nvp) {
12986                        ncr_get_nvram(devp, nvp);
12987                        switch(nvp->type) {
12988                        case SCSI_NCR_SYMBIOS_NVRAM:
12989                                /*
12990                                 *   Switch to the other nvram buffer, so that 
12991                                 *   nvram0 will contain the first Symbios 
12992                                 *   format NVRAM content with boot order.
12993                                 */
12994                                nvp = &nvram;
12995                                msg = "with Symbios NVRAM";
12996                                break;
12997                        case SCSI_NCR_TEKRAM_NVRAM:
12998                                msg = "with Tekram NVRAM";
12999                                break;
13000                        }
13001                }
13002#endif
13003#ifdef  SCSI_NCR_PQS_PDS_SUPPORT
13004                if (devp->pqs_pds)
13005                        msg = "(NCR PQS/PDS)";
13006#endif
13007                printk(KERN_INFO NAME53C8XX ": 53c%s detected %s\n",
13008                       devp->chip.name, msg);
13009        }
13010
13011        /*
13012        **    If we have found a SYMBIOS NVRAM, use first the NVRAM boot 
13013        **    sequence as device boot order.
13014        **    check devices in the boot record against devices detected. 
13015        **    attach devices if we find a match. boot table records that 
13016        **    do not match any detected devices will be ignored. 
13017        **    devices that do not match any boot table will not be attached
13018        **    here but will attempt to be attached during the device table 
13019        **    rescan.
13020        */
13021#ifdef SCSI_NCR_NVRAM_SUPPORT
13022        if (!nvp || nvram0.type != SCSI_NCR_SYMBIOS_NVRAM)
13023                goto next;
13024        for (i = 0; i < 4; i++) {
13025                Symbios_host *h = &nvram0.data.Symbios.host[i];
13026                for (j = 0 ; j < count ; j++) {
13027                        devp = &devtbl[j];
13028                        if (h->device_fn != devp->slot.device_fn ||
13029                            h->bus_nr    != devp->slot.bus       ||
13030                            h->device_id != devp->chip.device_id)
13031                                continue;
13032                        if (devp->attach_done)
13033                                continue;
13034                        if (h->flags & SYMBIOS_INIT_SCAN_AT_BOOT) {
13035                                ncr_get_nvram(devp, nvp);
13036                                if (!ncr_attach (tpnt, attach_count, devp))
13037                                        attach_count++;
13038                        }
13039                        else if (!(driver_setup.use_nvram & 0x80))
13040                                printk(KERN_INFO NAME53C8XX
13041                                       ": 53c%s state OFF thus not attached\n",
13042                                       devp->chip.name);
13043                        else
13044                                continue;
13045
13046                        devp->attach_done = 1;
13047                        break;
13048                }
13049        }
13050next:
13051#endif
13052
13053        /* 
13054        **    Rescan device list to make sure all boards attached.
13055        **    Devices without boot records will not be attached yet
13056        **    so try to attach them here.
13057        */
13058        for (i= 0; i < count; i++) {
13059                devp = &devtbl[i];
13060                if (!devp->attach_done) {
13061#ifdef SCSI_NCR_NVRAM_SUPPORT
13062                        ncr_get_nvram(devp, nvp);
13063#endif
13064                        if (!ncr_attach (tpnt, attach_count, devp))
13065                                attach_count++;
13066                }
13067        }
13068
13069        m_free(devtbl, PAGE_SIZE, "devtbl");
13070
13071        return attach_count;
13072}
13073
13074/*===================================================================
13075**   Read and check the PCI configuration for any detected NCR 
13076**   boards and save data for attaching after all boards have 
13077**   been detected.
13078**===================================================================
13079*/
13080static int __init
13081sym53c8xx_pci_init(Scsi_Host_Template *tpnt, pcidev_t pdev, ncr_device *device)
13082{
13083        u_short vendor_id, device_id, command, status_reg;
13084        u_char cache_line_size, latency_timer;
13085        u_char suggested_cache_line_size = 0;
13086        u_char pci_fix_up = driver_setup.pci_fix_up;
13087        u_char revision;
13088        u_int irq;
13089        u_long base, base_c, base_2, base_2_c, io_port; 
13090        int i;
13091        ncr_chip *chip;
13092
13093        printk(KERN_INFO NAME53C8XX ": at PCI bus %d, device %d, function %d\n",
13094                PciBusNumber(pdev),
13095                (int) (PciDeviceFn(pdev) & 0xf8) >> 3,
13096                (int) (PciDeviceFn(pdev) & 7));
13097
13098        /*
13099        **    Read info from the PCI config space.
13100        **    pci_read_config_xxx() functions are assumed to be used for 
13101        **    successfully detected PCI devices.
13102        */
13103        vendor_id = PciVendorId(pdev);
13104        device_id = PciDeviceId(pdev);
13105        irq       = PciIrqLine(pdev);
13106
13107        i = pci_get_base_address(pdev, 0, &io_port);
13108        io_port = pci_get_base_cookie(pdev, 0);
13109
13110        base_c = pci_get_base_cookie(pdev, i);
13111        i = pci_get_base_address(pdev, i, &base);
13112
13113        base_2_c = pci_get_base_cookie(pdev, i);
13114        (void) pci_get_base_address(pdev, i, &base_2);
13115
13116        pci_read_config_word(pdev, PCI_COMMAND,         &command);
13117        pci_read_config_byte(pdev, PCI_CLASS_REVISION,  &revision);
13118        pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
13119        pci_read_config_byte(pdev, PCI_LATENCY_TIMER,   &latency_timer);
13120        pci_read_config_word(pdev, PCI_STATUS,          &status_reg);
13121
13122#ifdef SCSI_NCR_PQS_PDS_SUPPORT
13123        /*
13124        **    Match the BUS number for PQS/PDS devices.
13125        **    Read the SCSI ID from a special register mapped
13126        **    into the configuration space of the individual
13127        **    875s.  This register is set up by the PQS bios
13128        */
13129        for(i = 0; i < SCSI_NCR_MAX_PQS_BUS && pqs_bus[i] != -1; i++) {
13130                u_char tmp;
13131                if (pqs_bus[i] == PciBusNumber(pdev)) {
13132                        pci_read_config_byte(pdev, 0x84, &tmp);
13133                        device->pqs_pds = 1;
13134                        device->host_id = tmp;
13135                        break;
13136                }
13137        }
13138#endif /* SCSI_NCR_PQS_PDS_SUPPORT */
13139
13140        /*
13141        **      If user excludes this chip, donnot initialize it.
13142        */
13143        for (i = 0 ; i < SCSI_NCR_MAX_EXCLUDES ; i++) {
13144                if (driver_setup.excludes[i] ==
13145                                (io_port & PCI_BASE_ADDRESS_IO_MASK))
13146                        return -1;
13147        }
13148        /*
13149        **    Check if the chip is supported
13150        */
13151        chip = 0;
13152        for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) {
13153                if (device_id != ncr_chip_table[i].device_id)
13154                        continue;
13155                if (revision > ncr_chip_table[i].revision_id)
13156                        continue;
13157                if (!(ncr_chip_table[i].features & FE_LDSTR))
13158                        break;
13159                chip = &device->chip;
13160                memcpy(chip, &ncr_chip_table[i], sizeof(*chip));
13161                chip->revision_id = revision;
13162                break;
13163        }
13164
13165#ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
13166        /* Configure DMA attributes.  For DAC capable boards, we can encode
13167        ** 32+8 bits for SCSI DMA data addresses with the extra bits used
13168        ** in the size field.  We use normal 32-bit PCI addresses for
13169        ** descriptors.
13170        */
13171        if (chip && (chip->features & FE_DAC)) {
13172                if (pci_set_dma_mask(pdev, (u64) 0xffffffffff))
13173                        chip->features &= ~FE_DAC_IN_USE;
13174                else
13175                        chip->features |= FE_DAC_IN_USE;
13176        }
13177
13178        if (chip && !(chip->features & FE_DAC_IN_USE)) {
13179                if (pci_set_dma_mask(pdev, (u64) 0xffffffff)) {
13180                        printk(KERN_WARNING NAME53C8XX
13181                               "32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n");
13182                        return -1;
13183                }
13184        }
13185#endif
13186
13187        /*
13188        **      Ignore Symbios chips controlled by SISL RAID controller.
13189        **      This controller sets value 0x52414944 at RAM end - 16.
13190        */
13191#if defined(__i386__) && !defined(SCSI_NCR_PCI_MEM_NOT_SUPPORTED)
13192        if (chip && (base_2_c & PCI_BASE_ADDRESS_MEM_MASK)) {
13193                unsigned int ram_size, ram_val;
13194                u_long ram_ptr;
13195
13196                if (chip->features & FE_RAM8K)
13197                        ram_size = 8192;
13198                else
13199                        ram_size = 4096;
13200
13201                ram_ptr = remap_pci_mem(base_2_c & PCI_BASE_ADDRESS_MEM_MASK,
13202                                        ram_size);
13203                if (ram_ptr) {
13204                        ram_val = readl_raw(ram_ptr + ram_size - 16);
13205                        unmap_pci_mem(ram_ptr, ram_size);
13206                        if (ram_val == 0x52414944) {
13207                                printk(NAME53C8XX": not initializing, "
13208                                       "driven by SISL RAID controller.\n");
13209                                return -1;
13210                        }
13211                }
13212        }
13213#endif /* i386 and PCI MEMORY accessible */
13214
13215        if (!chip) {
13216                printk(NAME53C8XX ": not initializing, device not supported\n");
13217                return -1;
13218        }
13219
13220#ifdef __powerpc__
13221        /*
13222        **      Fix-up for power/pc.
13223        **      Should not be performed by the driver.
13224        */
13225        if ((command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
13226                    != (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
13227                printk(NAME53C8XX ": setting%s%s...\n",
13228                (command & PCI_COMMAND_IO)     ? "" : " PCI_COMMAND_IO",
13229                (command & PCI_COMMAND_MEMORY) ? "" : " PCI_COMMAND_MEMORY");
13230                command |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
13231                pci_write_config_word(pdev, PCI_COMMAND, command);
13232        }
13233
13234#if LINUX_VERSION_CODE < LinuxVersionCode(2,2,0)
13235        if ( is_prep ) {
13236                if (io_port >= 0x10000000) {
13237                        printk(NAME53C8XX ": reallocating io_port (Wacky IBM)");
13238                        io_port = (io_port & 0x00FFFFFF) | 0x01000000;
13239                        pci_write_config_dword(pdev,
13240                                               PCI_BASE_ADDRESS_0, io_port);
13241                }
13242                if (base >= 0x10000000) {
13243                        printk(NAME53C8XX ": reallocating base (Wacky IBM)");
13244                        base = (base & 0x00FFFFFF) | 0x01000000;
13245                        pci_write_config_dword(pdev,
13246                                               PCI_BASE_ADDRESS_1, base);
13247                }
13248                if (base_2 >= 0x10000000) {
13249                        printk(NAME53C8XX ": reallocating base2 (Wacky IBM)");
13250                        base_2 = (base_2 & 0x00FFFFFF) | 0x01000000;
13251                        pci_write_config_dword(pdev,
13252                                               PCI_BASE_ADDRESS_2, base_2);
13253                }
13254        }
13255#endif
13256#endif  /* __powerpc__ */
13257
13258#if defined(__i386__) && !defined(MODULE)
13259        if (!cache_line_size) {
13260#if LINUX_VERSION_CODE < LinuxVersionCode(2,1,75)
13261                extern char x86;
13262                switch(x86) {
13263#else
13264                switch(boot_cpu_data.x86) {
13265#endif
13266                case 4: suggested_cache_line_size = 4; break;
13267                case 6:
13268                case 5: suggested_cache_line_size = 8; break;
13269                }
13270        }
13271#endif  /* __i386__ */
13272
13273        /*
13274        **    Check availability of IO space, memory space.
13275        **    Enable master capability if not yet.
13276        **
13277        **    We shouldn't have to care about the IO region when 
13278        **    we are using MMIO. But calling check_region() from 
13279        **    both the ncr53c8xx and the sym53c8xx drivers prevents 
13280        **    from attaching devices from the both drivers.
13281        **    If you have a better idea, let me know.
13282        */
13283/* #ifdef SCSI_NCR_IOMAPPED */
13284#if 1
13285        if (!(command & PCI_COMMAND_IO)) { 
13286                printk(NAME53C8XX ": I/O base address (0x%lx) disabled.\n",
13287                        (long) io_port);
13288                io_port = 0;
13289        }
13290#endif
13291        if (!(command & PCI_COMMAND_MEMORY)) {
13292                printk(NAME53C8XX ": PCI_COMMAND_MEMORY not set.\n");
13293                base    = 0;
13294                base_2  = 0;
13295        }
13296        io_port &= PCI_BASE_ADDRESS_IO_MASK;
13297        base    &= PCI_BASE_ADDRESS_MEM_MASK;
13298        base_2  &= PCI_BASE_ADDRESS_MEM_MASK;
13299
13300/* #ifdef SCSI_NCR_IOMAPPED */
13301#if 1
13302        if (io_port && check_region (io_port, 128)) {
13303                printk(NAME53C8XX ": IO region 0x%lx[0..127] is in use\n",
13304                        (long) io_port);
13305                io_port = 0;
13306        }
13307        if (!io_port)
13308                return -1;
13309#endif
13310#ifndef SCSI_NCR_IOMAPPED
13311        if (!base) {
13312                printk(NAME53C8XX ": MMIO base address disabled.\n");
13313                return -1;
13314        }
13315#endif
13316
13317        /*
13318        **    Set MASTER capable and PARITY bit, if not yet.
13319        */
13320        if ((command & (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY))
13321                     != (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY)) {
13322                printk(NAME53C8XX ": setting%s%s...(fix-up)\n",
13323                (command & PCI_COMMAND_MASTER) ? "" : " PCI_COMMAND_MASTER",
13324                (command & PCI_COMMAND_PARITY) ? "" : " PCI_COMMAND_PARITY");
13325                command |= (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY);
13326                pci_write_config_word(pdev, PCI_COMMAND, command);
13327        }
13328
13329        /*
13330        **    Fix some features according to driver setup.
13331        */
13332        if (!(driver_setup.special_features & 1))
13333                chip->features &= ~FE_SPECIAL_SET;
13334        else {
13335                if (driver_setup.special_features & 2)
13336                        chip->features &= ~FE_WRIE;
13337                if (driver_setup.special_features & 4)
13338                        chip->features &= ~FE_NOPM;
13339        }
13340
13341        /*
13342        ** Work around for errant bit in 895A. The 66Mhz
13343        ** capable bit is set erroneously. Clear this bit.
13344        ** (Item 1 DEL 533)
13345        **
13346        ** Make sure Config space and Features agree.
13347        **
13348        ** Recall: writes are not normal to status register -
13349        ** write a 1 to clear and a 0 to leave unchanged.
13350        ** Can only reset bits.
13351        */
13352        if (chip->features & FE_66MHZ) {
13353                if (!(status_reg & PCI_STATUS_66MHZ))
13354                        chip->features &= ~FE_66MHZ;
13355        }
13356        else {
13357                if (status_reg & PCI_STATUS_66MHZ) {
13358                        status_reg = PCI_STATUS_66MHZ;
13359                        pci_write_config_word(pdev, PCI_STATUS, status_reg);
13360                        pci_read_config_word(pdev, PCI_STATUS, &status_reg);
13361                }
13362        }
13363
13364        /*
13365        **      Some features are required to be enabled in order to 
13366        **      work around some chip problems. :) ;)
13367        **      (ITEM 12 of a DEL about the 896 I haven't yet).
13368        **      We must ensure the chip will use WRITE AND INVALIDATE.
13369        **      The revision number limit is for now arbitrary.
13370        */
13371        if (device_id == PCI_DEVICE_ID_NCR_53C896 && revision <= 0x10) {
13372                chip->features  |= (FE_WRIE | FE_CLSE);
13373                pci_fix_up      |=  3;  /* Force appropriate PCI fix-up */
13374        }
13375
13376#ifdef  SCSI_NCR_PCI_FIX_UP_SUPPORT
13377        /*
13378        **    Try to fix up PCI config according to wished features.
13379        */
13380        if ((pci_fix_up & 1) && (chip->features & FE_CLSE) && 
13381            !cache_line_size && suggested_cache_line_size) {
13382                cache_line_size = suggested_cache_line_size;
13383                pci_write_config_byte(pdev,
13384                                      PCI_CACHE_LINE_SIZE, cache_line_size);
13385                printk(NAME53C8XX ": PCI_CACHE_LINE_SIZE set to %d (fix-up).\n",
13386                        cache_line_size);
13387        }
13388
13389        if ((pci_fix_up & 2) && cache_line_size &&
13390            (chip->features & FE_WRIE) && !(command & PCI_COMMAND_INVALIDATE)) {
13391                printk(NAME53C8XX": setting PCI_COMMAND_INVALIDATE (fix-up)\n");
13392                command |= PCI_COMMAND_INVALIDATE;
13393                pci_write_config_word(pdev, PCI_COMMAND, command);
13394        }
13395
13396        /*
13397        **    Tune PCI LATENCY TIMER according to burst max length transfer.
13398        **    (latency timer >= burst length + 6, we add 10 to be quite sure)
13399        */
13400
13401        if (chip->burst_max && (latency_timer == 0 || (pci_fix_up & 4))) {
13402                uchar lt = (1 << chip->burst_max) + 6 + 10;
13403                if (latency_timer < lt) {
13404                        printk(NAME53C8XX 
13405                               ": changing PCI_LATENCY_TIMER from %d to %d.\n",
13406                               (int) latency_timer, (int) lt);
13407                        latency_timer = lt;
13408                        pci_write_config_byte(pdev,
13409                                              PCI_LATENCY_TIMER, latency_timer);
13410                }
13411        }
13412
13413#endif  /* SCSI_NCR_PCI_FIX_UP_SUPPORT */
13414
13415        /*
13416        **    Initialise ncr_device structure with items required by ncr_attach.
13417        */
13418        device->pdev            = pdev;
13419        device->slot.bus        = PciBusNumber(pdev);
13420        device->slot.device_fn  = PciDeviceFn(pdev);
13421        device->slot.base       = base;
13422        device->slot.base_2     = base_2;
13423        device->slot.base_c     = base_c;
13424        device->slot.base_2_c   = base_2_c;
13425        device->slot.io_port    = io_port;
13426        device->slot.irq        = irq;
13427        device->attach_done     = 0;
13428
13429        return 0;
13430}
13431
13432
13433/*===================================================================
13434**    Detect and try to read SYMBIOS and TEKRAM NVRAM.
13435**
13436**    Data can be used to order booting of boards.
13437**
13438**    Data is saved in ncr_device structure if NVRAM found. This
13439**    is then used to find drive boot order for ncr_attach().
13440**
13441**    NVRAM data is passed to Scsi_Host_Template later during 
13442**    ncr_attach() for any device set up.
13443*===================================================================
13444*/
13445#ifdef SCSI_NCR_NVRAM_SUPPORT
13446static void __init ncr_get_nvram(ncr_device *devp, ncr_nvram *nvp)
13447{
13448        devp->nvram = nvp;
13449        if (!nvp)
13450                return;
13451        /*
13452        **    Get access to chip IO registers
13453        */
13454#ifdef SCSI_NCR_IOMAPPED
13455        request_region(devp->slot.io_port, 128, NAME53C8XX);
13456        devp->slot.base_io = devp->slot.io_port;
13457#else
13458        devp->slot.reg = 
13459                (struct ncr_reg *) remap_pci_mem(devp->slot.base_c, 128);
13460        if (!devp->slot.reg)
13461                return;
13462#endif
13463
13464        /*
13465        **    Try to read SYMBIOS nvram.
13466        **    Try to read TEKRAM nvram if Symbios nvram not found.
13467        */
13468        if      (!sym_read_Symbios_nvram(&devp->slot, &nvp->data.Symbios))
13469                nvp->type = SCSI_NCR_SYMBIOS_NVRAM;
13470        else if (!sym_read_Tekram_nvram(&devp->slot, devp->chip.device_id,
13471                                        &nvp->data.Tekram))
13472                nvp->type = SCSI_NCR_TEKRAM_NVRAM;
13473        else {
13474                nvp->type = 0;
13475                devp->nvram = 0;
13476        }
13477
13478        /*
13479        ** Release access to chip IO registers
13480        */
13481#ifdef SCSI_NCR_IOMAPPED
13482        release_region(devp->slot.base_io, 128);
13483#else
13484        unmap_pci_mem((u_long) devp->slot.reg, 128ul);
13485#endif
13486
13487}
13488#endif  /* SCSI_NCR_NVRAM_SUPPORT */
13489
13490/*
13491**   Linux select queue depths function
13492*/
13493
13494#define DEF_DEPTH       (driver_setup.default_tags)
13495#define ALL_TARGETS     -2
13496#define NO_TARGET       -1
13497#define ALL_LUNS        -2
13498#define NO_LUN          -1
13499
13500static int device_queue_depth(ncb_p np, int target, int lun)
13501{
13502        int c, h, t, u, v;
13503        char *p = driver_setup.tag_ctrl;
13504        char *ep;
13505
13506        h = -1;
13507        t = NO_TARGET;
13508        u = NO_LUN;
13509        while ((c = *p++) != 0) {
13510                v = simple_strtoul(p, &ep, 0);
13511                switch(c) {
13512                case '/':
13513                        ++h;
13514                        t = ALL_TARGETS;
13515                        u = ALL_LUNS;
13516                        break;
13517                case 't':
13518                        if (t != target)
13519                                t = (target == v) ? v : NO_TARGET;
13520                        u = ALL_LUNS;
13521                        break;
13522                case 'u':
13523                        if (u != lun)
13524                                u = (lun == v) ? v : NO_LUN;
13525                        break;
13526                case 'q':
13527                        if (h == np->unit &&
13528                                (t == ALL_TARGETS || t == target) &&
13529                                (u == ALL_LUNS    || u == lun))
13530                                return v;
13531                        break;
13532                case '-':
13533                        t = ALL_TARGETS;
13534                        u = ALL_LUNS;
13535                        break;
13536                default:
13537                        break;
13538                }
13539                p = ep;
13540        }
13541        return DEF_DEPTH;
13542}
13543
13544static void sym53c8xx_select_queue_depths(struct Scsi_Host *host, struct scsi_device *devlist)
13545{
13546        struct scsi_device *device;
13547
13548        for (device = devlist; device; device = device->next) {
13549                ncb_p np;
13550                tcb_p tp;
13551                lcb_p lp;
13552                int numtags;
13553
13554                if (device->host != host)
13555                        continue;
13556
13557                np = ((struct host_data *) host->hostdata)->ncb;
13558                tp = &np->target[device->id];
13559                lp = ncr_lp(np, tp, device->lun);
13560
13561                /*
13562                **      Select queue depth from driver setup.
13563                **      Donnot use more than configured by user.
13564                **      Use at least 2.
13565                **      Donnot use more than our maximum.
13566                */
13567                numtags = device_queue_depth(np, device->id, device->lun);
13568                if (numtags > tp->usrtags)
13569                        numtags = tp->usrtags;
13570                if (!device->tagged_supported)
13571                        numtags = 1;
13572                device->queue_depth = numtags;
13573                if (device->queue_depth < 2)
13574                        device->queue_depth = 2;
13575                if (device->queue_depth > MAX_TAGS)
13576                        device->queue_depth = MAX_TAGS;
13577
13578                /*
13579                **      Since the queue depth is not tunable under Linux,
13580                **      we need to know this value in order not to 
13581                **      announce stupid things to user.
13582                */
13583                if (lp) {
13584                        lp->numtags = lp->maxtags = numtags;
13585                        lp->scdev_depth = device->queue_depth;
13586                }
13587                ncr_setup_tags (np, device->id, device->lun);
13588
13589#ifdef DEBUG_SYM53C8XX
13590printk("sym53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n",
13591        np->unit, device->id, device->lun, device->queue_depth);
13592#endif
13593        }
13594}
13595
13596/*
13597**   Linux entry point for info() function
13598*/
13599const char *sym53c8xx_info (struct Scsi_Host *host)
13600{
13601        return SCSI_NCR_DRIVER_NAME;
13602}
13603
13604/*
13605**   Linux entry point of queuecommand() function
13606*/
13607
13608int sym53c8xx_queue_command (Scsi_Cmnd *cmd, void (* done)(Scsi_Cmnd *))
13609{
13610     ncb_p np = ((struct host_data *) cmd->host->hostdata)->ncb;
13611     unsigned long flags;
13612     int sts;
13613
13614#ifdef DEBUG_SYM53C8XX
13615printk("sym53c8xx_queue_command\n");
13616#endif
13617
13618     cmd->scsi_done     = done;
13619     cmd->host_scribble = NULL;
13620     cmd->SCp.ptr       = NULL;
13621     cmd->SCp.buffer    = NULL;
13622#ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
13623     __data_mapped(cmd) = 0;
13624     __data_mapping(cmd) = 0;
13625#endif
13626
13627     NCR_LOCK_NCB(np, flags);
13628
13629     if ((sts = ncr_queue_command(np, cmd)) != DID_OK) {
13630          SetScsiResult(cmd, sts, 0);
13631#ifdef DEBUG_SYM53C8XX
13632printk("sym53c8xx : command not queued - result=%d\n", sts);
13633#endif
13634     }
13635#ifdef DEBUG_SYM53C8XX
13636     else
13637printk("sym53c8xx : command successfully queued\n");
13638#endif
13639
13640     NCR_UNLOCK_NCB(np, flags);
13641
13642     if (sts != DID_OK) {
13643          unmap_scsi_data(np, cmd);
13644          done(cmd);
13645     }
13646
13647     return sts;
13648}
13649
13650/*
13651**   Linux entry point of the interrupt handler.
13652**   Since linux versions > 1.3.70, we trust the kernel for 
13653**   passing the internal host descriptor as 'dev_id'.
13654**   Otherwise, we scan the host list and call the interrupt 
13655**   routine for each host that uses this IRQ.
13656*/
13657
13658static void sym53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs)
13659{
13660     unsigned long flags;
13661     ncb_p np = (ncb_p) dev_id;
13662     Scsi_Cmnd *done_list;
13663
13664#ifdef DEBUG_SYM53C8XX
13665     printk("sym53c8xx : interrupt received\n");
13666#endif
13667
13668     if (DEBUG_FLAGS & DEBUG_TINY) printk ("[");
13669
13670     NCR_LOCK_NCB(np, flags);
13671     ncr_exception(np);
13672     done_list     = np->done_list;
13673     np->done_list = 0;
13674     NCR_UNLOCK_NCB(np, flags);
13675
13676     if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n");
13677
13678     if (done_list) {
13679          NCR_LOCK_SCSI_DONE(np, flags);
13680          ncr_flush_done_cmds(done_list);
13681          NCR_UNLOCK_SCSI_DONE(np, flags);
13682     }
13683}
13684
13685/*
13686**   Linux entry point of the timer handler
13687*/
13688
13689static void sym53c8xx_timeout(unsigned long npref)
13690{
13691     ncb_p np = (ncb_p) npref;
13692     unsigned long flags;
13693     Scsi_Cmnd *done_list;
13694
13695     NCR_LOCK_NCB(np, flags);
13696     ncr_timeout((ncb_p) np);
13697     done_list     = np->done_list;
13698     np->done_list = 0;
13699     NCR_UNLOCK_NCB(np, flags);
13700
13701     if (done_list) {
13702          NCR_LOCK_SCSI_DONE(np, flags);
13703          ncr_flush_done_cmds(done_list);
13704          NCR_UNLOCK_SCSI_DONE(np, flags);
13705     }
13706}
13707
13708/*
13709**   Linux entry point of reset() function
13710*/
13711
13712#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
13713int sym53c8xx_reset(Scsi_Cmnd *cmd, unsigned int reset_flags)
13714#else
13715int sym53c8xx_reset(Scsi_Cmnd *cmd)
13716#endif
13717{
13718        ncb_p np = ((struct host_data *) cmd->host->hostdata)->ncb;
13719        int sts;
13720        unsigned long flags;
13721        Scsi_Cmnd *done_list;
13722
13723#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
13724        printk("sym53c8xx_reset: pid=%lu reset_flags=%x serial_number=%ld serial_number_at_timeout=%ld\n",
13725                cmd->pid, reset_flags, cmd->serial_number, cmd->serial_number_at_timeout);
13726#else
13727        printk("sym53c8xx_reset: command pid %lu\n", cmd->pid);
13728#endif
13729
13730        NCR_LOCK_NCB(np, flags);
13731
13732        /*
13733         * We have to just ignore reset requests in some situations.
13734         */
13735#if defined SCSI_RESET_NOT_RUNNING
13736        if (cmd->serial_number != cmd->serial_number_at_timeout) {
13737                sts = SCSI_RESET_NOT_RUNNING;
13738                goto out;
13739        }
13740#endif
13741        /*
13742         * If the mid-level driver told us reset is synchronous, it seems 
13743         * that we must call the done() callback for the involved command, 
13744         * even if this command was not queued to the low-level driver, 
13745         * before returning SCSI_RESET_SUCCESS.
13746         */
13747
13748#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
13749        sts = ncr_reset_bus(np, cmd,
13750        (reset_flags & (SCSI_RESET_SYNCHRONOUS | SCSI_RESET_ASYNCHRONOUS)) == SCSI_RESET_SYNCHRONOUS);
13751#else
13752        sts = ncr_reset_bus(np, cmd, 0);
13753#endif
13754
13755        /*
13756         * Since we always reset the controller, when we return success, 
13757         * we add this information to the return code.
13758         */
13759#if defined SCSI_RESET_HOST_RESET
13760        if (sts == SCSI_RESET_SUCCESS)
13761                sts |= SCSI_RESET_HOST_RESET;
13762#endif
13763
13764out:
13765        done_list     = np->done_list;
13766        np->done_list = 0;
13767        NCR_UNLOCK_NCB(np, flags);
13768
13769        ncr_flush_done_cmds(done_list);
13770
13771        return sts;
13772}
13773
13774/*
13775**   Linux entry point of abort() function
13776*/
13777
13778int sym53c8xx_abort(Scsi_Cmnd *cmd)
13779{
13780        ncb_p np = ((struct host_data *) cmd->host->hostdata)->ncb;
13781        int sts;
13782        unsigned long flags;
13783        Scsi_Cmnd *done_list;
13784
13785#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
13786        printk("sym53c8xx_abort: pid=%lu serial_number=%ld serial_number_at_timeout=%ld\n",
13787                cmd->pid, cmd->serial_number, cmd->serial_number_at_timeout);
13788#else
13789        printk("sym53c8xx_abort: command pid %lu\n", cmd->pid);
13790#endif
13791
13792        NCR_LOCK_NCB(np, flags);
13793
13794#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
13795        /*
13796         * We have to just ignore abort requests in some situations.
13797         */
13798        if (cmd->serial_number != cmd->serial_number_at_timeout) {
13799                sts = SCSI_ABORT_NOT_RUNNING;
13800                goto out;
13801        }
13802#endif
13803
13804        sts = ncr_abort_command(np, cmd);
13805out:
13806        done_list     = np->done_list;
13807        np->done_list = 0;
13808        NCR_UNLOCK_NCB(np, flags);
13809
13810        ncr_flush_done_cmds(done_list);
13811
13812        return sts;
13813}
13814
13815
13816#ifdef MODULE
13817int sym53c8xx_release(struct Scsi_Host *host)
13818{
13819#ifdef DEBUG_SYM53C8XX
13820printk("sym53c8xx : release\n");
13821#endif
13822     ncr_detach(((struct host_data *) host->hostdata)->ncb);
13823
13824     return 1;
13825}
13826#endif
13827
13828
13829/*
13830**      Scsi command waiting list management.
13831**
13832**      It may happen that we cannot insert a scsi command into the start queue,
13833**      in the following circumstances.
13834**              Too few preallocated ccb(s), 
13835**              maxtags < cmd_per_lun of the Linux host control block,
13836**              etc...
13837**      Such scsi commands are inserted into a waiting list.
13838**      When a scsi command complete, we try to requeue the commands of the
13839**      waiting list.
13840*/
13841
13842#define next_wcmd host_scribble
13843
13844static void insert_into_waiting_list(ncb_p np, Scsi_Cmnd *cmd)
13845{
13846        Scsi_Cmnd *wcmd;
13847
13848#ifdef DEBUG_WAITING_LIST
13849        printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd);
13850#endif
13851        cmd->next_wcmd = 0;
13852        if (!(wcmd = np->waiting_list)) np->waiting_list = cmd;
13853        else {
13854                while ((wcmd->next_wcmd) != 0)
13855                        wcmd = (Scsi_Cmnd *) wcmd->next_wcmd;
13856                wcmd->next_wcmd = (char *) cmd;
13857        }
13858}
13859
13860static Scsi_Cmnd *retrieve_from_waiting_list(int to_remove, ncb_p np, Scsi_Cmnd *cmd)
13861{
13862        Scsi_Cmnd **pcmd = &np->waiting_list;
13863
13864        while (*pcmd) {
13865                if (cmd == *pcmd) {
13866                        if (to_remove) {
13867                                *pcmd = (Scsi_Cmnd *) cmd->next_wcmd;
13868                                cmd->next_wcmd = 0;
13869                        }
13870#ifdef DEBUG_WAITING_LIST
13871        printk("%s: cmd %lx retrieved from waiting list\n", ncr_name(np), (u_long) cmd);
13872#endif
13873                        return cmd;
13874                }
13875                pcmd = (Scsi_Cmnd **) &(*pcmd)->next_wcmd;
13876        }
13877        return 0;
13878}
13879
13880static void process_waiting_list(ncb_p np, int sts)
13881{
13882        Scsi_Cmnd *waiting_list, *wcmd;
13883
13884        waiting_list = np->waiting_list;
13885        np->waiting_list = 0;
13886
13887#ifdef DEBUG_WAITING_LIST
13888        if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts);
13889#endif
13890        while ((wcmd = waiting_list) != 0) {
13891                waiting_list = (Scsi_Cmnd *) wcmd->next_wcmd;
13892                wcmd->next_wcmd = 0;
13893                if (sts == DID_OK) {
13894#ifdef DEBUG_WAITING_LIST
13895        printk("%s: cmd %lx trying to requeue\n", ncr_name(np), (u_long) wcmd);
13896#endif
13897                        sts = ncr_queue_command(np, wcmd);
13898                }
13899                if (sts != DID_OK) {
13900#ifdef DEBUG_WAITING_LIST
13901        printk("%s: cmd %lx done forced sts=%d\n", ncr_name(np), (u_long) wcmd, sts);
13902#endif
13903                        SetScsiResult(wcmd, sts, 0);
13904                        ncr_queue_done_cmd(np, wcmd);
13905                }
13906        }
13907}
13908
13909#undef next_wcmd
13910
13911#ifdef SCSI_NCR_PROC_INFO_SUPPORT
13912
13913/*=========================================================================
13914**      Proc file system stuff
13915**
13916**      A read operation returns adapter information.
13917**      A write operation is a control command.
13918**      The string is parsed in the driver code and the command is passed 
13919**      to the ncr_usercmd() function.
13920**=========================================================================
13921*/
13922
13923#ifdef SCSI_NCR_USER_COMMAND_SUPPORT
13924
13925#define is_digit(c)     ((c) >= '0' && (c) <= '9')
13926#define digit_to_bin(c) ((c) - '0')
13927#define is_space(c)     ((c) == ' ' || (c) == '\t')
13928
13929static int skip_spaces(char *ptr, int len)
13930{
13931        int cnt, c;
13932
13933        for (cnt = len; cnt > 0 && (c = *ptr++) && is_space(c); cnt--);
13934
13935        return (len - cnt);
13936}
13937
13938static int get_int_arg(char *ptr, int len, u_long *pv)
13939{
13940        int     cnt, c;
13941        u_long  v;
13942
13943        for (v = 0, cnt = len; cnt > 0 && (c = *ptr++) && is_digit(c); cnt--) {
13944                v = (v * 10) + digit_to_bin(c);
13945        }
13946
13947        if (pv)
13948                *pv = v;
13949
13950        return (len - cnt);
13951}
13952
13953static int is_keyword(char *ptr, int len, char *verb)
13954{
13955        int verb_len = strlen(verb);
13956
13957        if (len >= strlen(verb) && !memcmp(verb, ptr, verb_len))
13958                return verb_len;
13959        else
13960                return 0;
13961
13962}
13963
13964#define SKIP_SPACES(min_spaces)                                         \
13965        if ((arg_len = skip_spaces(ptr, len)) < (min_spaces))           \
13966                return -EINVAL;                                         \
13967        ptr += arg_len; len -= arg_len;
13968
13969#define GET_INT_ARG(v)                                                  \
13970        if (!(arg_len = get_int_arg(ptr, len, &(v))))                   \
13971                return -EINVAL;                                         \
13972        ptr += arg_len; len -= arg_len;
13973
13974
13975/*
13976**      Parse a control command
13977*/
13978
13979static int ncr_user_command(ncb_p np, char *buffer, int length)
13980{
13981        char *ptr       = buffer;
13982        int len         = length;
13983        struct usrcmd    *uc = &np->user;
13984        int             arg_len;
13985        u_long          target;
13986
13987        bzero(uc, sizeof(*uc));
13988
13989        if (len > 0 && ptr[len-1] == '\n')
13990                --len;
13991
13992        if      ((arg_len = is_keyword(ptr, len, "setsync")) != 0)
13993                uc->cmd = UC_SETSYNC;
13994        else if ((arg_len = is_keyword(ptr, len, "settags")) != 0)
13995                uc->cmd = UC_SETTAGS;
13996        else if ((arg_len = is_keyword(ptr, len, "setorder")) != 0)
13997                uc->cmd = UC_SETORDER;
13998        else if ((arg_len = is_keyword(ptr, len, "setverbose")) != 0)
13999                uc->cmd = UC_SETVERBOSE;
14000        else if ((arg_len = is_keyword(ptr, len, "setwide")) != 0)
14001                uc->cmd = UC_SETWIDE;
14002        else if ((arg_len = is_keyword(ptr, len, "setdebug")) != 0)
14003                uc->cmd = UC_SETDEBUG;
14004        else if ((arg_len = is_keyword(ptr, len, "setflag")) != 0)
14005                uc->cmd = UC_SETFLAG;
14006        else if ((arg_len = is_keyword(ptr, len, "resetdev")) != 0)
14007                uc->cmd = UC_RESETDEV;
14008        else if ((arg_len = is_keyword(ptr, len, "cleardev")) != 0)
14009                uc->cmd = UC_CLEARDEV;
14010        else
14011                arg_len = 0;
14012
14013#ifdef DEBUG_PROC_INFO
14014printk("ncr_user_command: arg_len=%d, cmd=%ld\n", arg_len, uc->cmd);
14015#endif
14016
14017        if (!arg_len)
14018                return -EINVAL;
14019        ptr += arg_len; len -= arg_len;
14020
14021        switch(uc->cmd) {
14022        case UC_SETSYNC:
14023        case UC_SETTAGS:
14024        case UC_SETWIDE:
14025        case UC_SETFLAG:
14026        case UC_RESETDEV:
14027        case UC_CLEARDEV:
14028                SKIP_SPACES(1);
14029                if ((arg_len = is_keyword(ptr, len, "all")) != 0) {
14030                        ptr += arg_len; len -= arg_len;
14031                        uc->target = ~0;
14032                } else {
14033                        GET_INT_ARG(target);
14034                        uc->target = (1<<target);
14035#ifdef DEBUG_PROC_INFO
14036printk("ncr_user_command: target=%ld\n", target);
14037#endif
14038                }
14039                break;
14040        }
14041
14042        switch(uc->cmd) {
14043        case UC_SETVERBOSE:
14044        case UC_SETSYNC:
14045        case UC_SETTAGS:
14046        case UC_SETWIDE:
14047                SKIP_SPACES(1);
14048                GET_INT_ARG(uc->data);
14049#ifdef DEBUG_PROC_INFO
14050printk("ncr_user_command: data=%ld\n", uc->data);
14051#endif
14052                break;
14053        case UC_SETORDER:
14054                SKIP_SPACES(1);
14055                if      ((arg_len = is_keyword(ptr, len, "simple")))
14056                        uc->data = M_SIMPLE_TAG;
14057                else if ((arg_len = is_keyword(ptr, len, "ordered")))
14058                        uc->data = M_ORDERED_TAG;
14059                else if ((arg_len = is_keyword(ptr, len, "default")))
14060                        uc->data = 0;
14061                else
14062                        return -EINVAL;
14063                break;
14064        case UC_SETDEBUG:
14065                while (len > 0) {
14066                        SKIP_SPACES(1);
14067                        if      ((arg_len = is_keyword(ptr, len, "alloc")))
14068                                uc->data |= DEBUG_ALLOC;
14069                        else if ((arg_len = is_keyword(ptr, len, "phase")))
14070                                uc->data |= DEBUG_PHASE;
14071                        else if ((arg_len = is_keyword(ptr, len, "queue")))
14072                                uc->data |= DEBUG_QUEUE;
14073                        else if ((arg_len = is_keyword(ptr, len, "result")))
14074                                uc->data |= DEBUG_RESULT;
14075                        else if ((arg_len = is_keyword(ptr, len, "pointer")))
14076                                uc->data |= DEBUG_POINTER;
14077                        else if ((arg_len = is_keyword(ptr, len, "script")))
14078                                uc->data |= DEBUG_SCRIPT;
14079                        else if ((arg_len = is_keyword(ptr, len, "tiny")))
14080                                uc->data |= DEBUG_TINY;
14081                        else if ((arg_len = is_keyword(ptr, len, "timing")))
14082                                uc->data |= DEBUG_TIMING;
14083                        else if ((arg_len = is_keyword(ptr, len, "nego")))
14084                                uc->data |= DEBUG_NEGO;
14085                        else if ((arg_len = is_keyword(ptr, len, "tags")))
14086                                uc->data |= DEBUG_TAGS;
14087                        else
14088                                return -EINVAL;
14089                        ptr += arg_len; len -= arg_len;
14090                }
14091#ifdef DEBUG_PROC_INFO
14092printk("ncr_user_command: data=%ld\n", uc->data);
14093#endif
14094                break;
14095        case UC_SETFLAG:
14096                while (len > 0) {
14097                        SKIP_SPACES(1);
14098                        if      ((arg_len = is_keyword(ptr, len, "trace")))
14099                                uc->data |= UF_TRACE;
14100                        else if ((arg_len = is_keyword(ptr, len, "no_disc")))
14101                                uc->data |= UF_NODISC;
14102                        else
14103                                return -EINVAL;
14104                        ptr += arg_len; len -= arg_len;
14105                }
14106                break;
14107        default:
14108                break;
14109        }
14110
14111        if (len)
14112                return -EINVAL;
14113        else {
14114                unsigned long flags;
14115
14116                NCR_LOCK_NCB(np, flags);
14117                ncr_usercmd (np);
14118                NCR_UNLOCK_NCB(np, flags);
14119        }
14120        return length;
14121}
14122
14123#endif  /* SCSI_NCR_USER_COMMAND_SUPPORT */
14124
14125#ifdef SCSI_NCR_USER_INFO_SUPPORT
14126
14127struct info_str
14128{
14129        char *buffer;
14130        int length;
14131        int offset;
14132        int pos;
14133};
14134
14135static void copy_mem_info(struct info_str *info, char *data, int len)
14136{
14137        if (info->pos + len > info->length)
14138                len = info->length - info->pos;
14139
14140        if (info->pos + len < info->offset) {
14141                info->pos += len;
14142                return;
14143        }
14144        if (info->pos < info->offset) {
14145                data += (info->offset - info->pos);
14146                len  -= (info->offset - info->pos);
14147        }
14148
14149        if (len > 0) {
14150                memcpy(info->buffer + info->pos, data, len);
14151                info->pos += len;
14152        }
14153}
14154
14155static int copy_info(struct info_str *info, char *fmt, ...)
14156{
14157        va_list args;
14158        char buf[81];
14159        int len;
14160
14161        va_start(args, fmt);
14162        len = vsprintf(buf, fmt, args);
14163        va_end(args);
14164
14165        copy_mem_info(info, buf, len);
14166        return len;
14167}
14168
14169/*
14170**      Copy formatted information into the input buffer.
14171*/
14172
14173static int ncr_host_info(ncb_p np, char *ptr, off_t offset, int len)
14174{
14175        struct info_str info;
14176
14177        info.buffer     = ptr;
14178        info.length     = len;
14179        info.offset     = offset;
14180        info.pos        = 0;
14181
14182        copy_info(&info, "General information:\n");
14183        copy_info(&info, "  Chip " NAME53C "%s, device id 0x%x, "
14184                         "revision id 0x%x\n",
14185                         np->chip_name, np->device_id,  np->revision_id);
14186        copy_info(&info, "  On PCI bus %d, device %d, function %d, "
14187#ifdef __sparc__
14188                "IRQ %s\n",
14189#else
14190                "IRQ %d\n",
14191#endif
14192                np->bus, (np->device_fn & 0xf8) >> 3, np->device_fn & 7,
14193#ifdef __sparc__
14194                __irq_itoa(np->irq));
14195#else
14196                (int) np->irq);
14197#endif
14198        copy_info(&info, "  Synchronous period factor %d, "
14199                         "max commands per lun %d\n",
14200                         (int) np->minsync, MAX_TAGS);
14201
14202        if (driver_setup.debug || driver_setup.verbose > 1) {
14203                copy_info(&info, "  Debug flags 0x%x, verbosity level %d\n",
14204                          driver_setup.debug, driver_setup.verbose);
14205        }
14206
14207        return info.pos > info.offset? info.pos - info.offset : 0;
14208}
14209
14210#endif /* SCSI_NCR_USER_INFO_SUPPORT */
14211
14212/*
14213**      Entry point of the scsi proc fs of the driver.
14214**      - func = 0 means read  (returns adapter infos)
14215**      - func = 1 means write (parse user control command)
14216*/
14217
14218static int sym53c8xx_proc_info(char *buffer, char **start, off_t offset,
14219                        int length, int hostno, int func)
14220{
14221        struct Scsi_Host *host;
14222        struct host_data *host_data;
14223        ncb_p ncb = 0;
14224        int retv;
14225
14226#ifdef DEBUG_PROC_INFO
14227printk("sym53c8xx_proc_info: hostno=%d, func=%d\n", hostno, func);
14228#endif
14229
14230        for (host = first_host; host; host = host->next) {
14231                if (host->hostt != first_host->hostt)
14232                        continue;
14233                if (host->host_no == hostno) {
14234                        host_data = (struct host_data *) host->hostdata;
14235                        ncb = host_data->ncb;
14236                        break;
14237                }
14238        }
14239
14240        if (!ncb)
14241                return -EINVAL;
14242
14243        if (func) {
14244#ifdef  SCSI_NCR_USER_COMMAND_SUPPORT
14245                retv = ncr_user_command(ncb, buffer, length);
14246#else
14247                retv = -EINVAL;
14248#endif
14249        }
14250        else {
14251                if (start)
14252                        *start = buffer;
14253#ifdef SCSI_NCR_USER_INFO_SUPPORT
14254                retv = ncr_host_info(ncb, buffer, offset, length);
14255#else
14256                retv = -EINVAL;
14257#endif
14258        }
14259
14260        return retv;
14261}
14262
14263
14264/*=========================================================================
14265**      End of proc file system stuff
14266**=========================================================================
14267*/
14268#endif
14269
14270
14271#ifdef SCSI_NCR_NVRAM_SUPPORT
14272
14273/*
14274 *  24C16 EEPROM reading.
14275 *
14276 *  GPOI0 - data in/data out
14277 *  GPIO1 - clock
14278 *  Symbios NVRAM wiring now also used by Tekram.
14279 */
14280
14281#define SET_BIT 0
14282#define CLR_BIT 1
14283#define SET_CLK 2
14284#define CLR_CLK 3
14285
14286/*
14287 *  Set/clear data/clock bit in GPIO0
14288 */
14289static void __init
14290S24C16_set_bit(ncr_slot *np, u_char write_bit, u_char *gpreg, int bit_mode)
14291{
14292        UDELAY (5);
14293        switch (bit_mode){
14294        case SET_BIT:
14295                *gpreg |= write_bit;
14296                break;
14297        case CLR_BIT:
14298                *gpreg &= 0xfe;
14299                break;
14300        case SET_CLK:
14301                *gpreg |= 0x02;
14302                break;
14303        case CLR_CLK:
14304                *gpreg &= 0xfd;
14305                break;
14306
14307        }
14308        OUTB (nc_gpreg, *gpreg);
14309        UDELAY (5);
14310}
14311
14312/*
14313 *  Send START condition to NVRAM to wake it up.
14314 */
14315static void __init S24C16_start(ncr_slot *np, u_char *gpreg)
14316{
14317        S24C16_set_bit(np, 1, gpreg, SET_BIT);
14318        S24C16_set_bit(np, 0, gpreg, SET_CLK);
14319        S24C16_set_bit(np, 0, gpreg, CLR_BIT);
14320        S24C16_set_bit(np, 0, gpreg, CLR_CLK);
14321}
14322
14323/*
14324 *  Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
14325 */
14326static void __init S24C16_stop(ncr_slot *np, u_char *gpreg)
14327{
14328        S24C16_set_bit(np, 0, gpreg, SET_CLK);
14329        S24C16_set_bit(np, 1, gpreg, SET_BIT);
14330}
14331
14332/*
14333 *  Read or write a bit to the NVRAM,
14334 *  read if GPIO0 input else write if GPIO0 output
14335 */
14336static void __init 
14337S24C16_do_bit(ncr_slot *np, u_char *read_bit, u_char write_bit, u_char *gpreg)
14338{
14339        S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
14340        S24C16_set_bit(np, 0, gpreg, SET_CLK);
14341        if (read_bit)
14342                *read_bit = INB (nc_gpreg);
14343        S24C16_set_bit(np, 0, gpreg, CLR_CLK);
14344        S24C16_set_bit(np, 0, gpreg, CLR_BIT);
14345}
14346
14347/*
14348 *  Output an ACK to the NVRAM after reading,
14349 *  change GPIO0 to output and when done back to an input
14350 */
14351static void __init
14352S24C16_write_ack(ncr_slot *np, u_char write_bit, u_char *gpreg, u_char *gpcntl)
14353{
14354        OUTB (nc_gpcntl, *gpcntl & 0xfe);
14355        S24C16_do_bit(np, 0, write_bit, gpreg);
14356        OUTB (nc_gpcntl, *gpcntl);
14357}
14358
14359/*
14360 *  Input an ACK from NVRAM after writing,
14361 *  change GPIO0 to input and when done back to an output
14362 */
14363static void __init 
14364S24C16_read_ack(ncr_slot *np, u_char *read_bit, u_char *gpreg, u_char *gpcntl)
14365{
14366        OUTB (nc_gpcntl, *gpcntl | 0x01);
14367        S24C16_do_bit(np, read_bit, 1, gpreg);
14368        OUTB (nc_gpcntl, *gpcntl);
14369}
14370
14371/*
14372 *  WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
14373 *  GPIO0 must already be set as an output
14374 */
14375static void __init 
14376S24C16_write_byte(ncr_slot *np, u_char *ack_data, u_char write_data, 
14377                  u_char *gpreg, u_char *gpcntl)
14378{
14379        int x;
14380        
14381        for (x = 0; x < 8; x++)
14382                S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
14383                
14384        S24C16_read_ack(np, ack_data, gpreg, gpcntl);
14385}
14386
14387/*
14388 *  READ a byte from the NVRAM and then send an ACK to say we have got it,
14389 *  GPIO0 must already be set as an input
14390 */
14391static void __init 
14392S24C16_read_byte(ncr_slot *np, u_char *read_data, u_char ack_data, 
14393                 u_char *gpreg, u_char *gpcntl)
14394{
14395        int x;
14396        u_char read_bit;
14397
14398        *read_data = 0;
14399        for (x = 0; x < 8; x++) {
14400                S24C16_do_bit(np, &read_bit, 1, gpreg);
14401                *read_data |= ((read_bit & 0x01) << (7 - x));
14402        }
14403
14404        S24C16_write_ack(np, ack_data, gpreg, gpcntl);
14405}
14406
14407/*
14408 *  Read 'len' bytes starting at 'offset'.
14409 */
14410static int __init 
14411sym_read_S24C16_nvram (ncr_slot *np, int offset, u_char *data, int len)
14412{
14413        u_char  gpcntl, gpreg;
14414        u_char  old_gpcntl, old_gpreg;
14415        u_char  ack_data;
14416        int     retv = 1;
14417        int     x;
14418
14419        /* save current state of GPCNTL and GPREG */
14420        old_gpreg       = INB (nc_gpreg);
14421        old_gpcntl      = INB (nc_gpcntl);
14422        gpcntl          = old_gpcntl & 0x1c;
14423
14424        /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
14425        OUTB (nc_gpreg,  old_gpreg);
14426        OUTB (nc_gpcntl, gpcntl);
14427
14428        /* this is to set NVRAM into a known state with GPIO0/1 both low */
14429        gpreg = old_gpreg;
14430        S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
14431        S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
14432                
14433        /* now set NVRAM inactive with GPIO0/1 both high */
14434        S24C16_stop(np, &gpreg);
14435        
14436        /* activate NVRAM */
14437        S24C16_start(np, &gpreg);
14438
14439        /* write device code and random address MSB */
14440        S24C16_write_byte(np, &ack_data,
14441                0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
14442        if (ack_data & 0x01)
14443                goto out;
14444
14445        /* write random address LSB */
14446        S24C16_write_byte(np, &ack_data,
14447                offset & 0xff, &gpreg, &gpcntl);
14448        if (ack_data & 0x01)
14449                goto out;
14450
14451        /* regenerate START state to set up for reading */
14452        S24C16_start(np, &gpreg);
14453        
14454        /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
14455        S24C16_write_byte(np, &ack_data,
14456                0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
14457        if (ack_data & 0x01)
14458                goto out;
14459
14460        /* now set up GPIO0 for inputting data */
14461        gpcntl |= 0x01;
14462        OUTB (nc_gpcntl, gpcntl);
14463                
14464        /* input all requested data - only part of total NVRAM */
14465        for (x = 0; x < len; x++) 
14466                S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
14467
14468        /* finally put NVRAM back in inactive mode */
14469        gpcntl &= 0xfe;
14470        OUTB (nc_gpcntl, gpcntl);
14471        S24C16_stop(np, &gpreg);
14472        retv = 0;
14473out:
14474        /* return GPIO0/1 to original states after having accessed NVRAM */
14475        OUTB (nc_gpcntl, old_gpcntl);
14476        OUTB (nc_gpreg,  old_gpreg);
14477
14478        return retv;
14479}
14480
14481#undef SET_BIT
14482#undef CLR_BIT
14483#undef SET_CLK
14484#undef CLR_CLK
14485
14486/*
14487 *  Try reading Symbios NVRAM.
14488 *  Return 0 if OK.
14489 */
14490static int __init sym_read_Symbios_nvram (ncr_slot *np, Symbios_nvram *nvram)
14491{
14492        static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
14493        u_char *data = (u_char *) nvram;
14494        int len  = sizeof(*nvram);
14495        u_short csum;
14496        int x;
14497
14498        /* probe the 24c16 and read the SYMBIOS 24c16 area */
14499        if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
14500                return 1;
14501
14502        /* check valid NVRAM signature, verify byte count and checksum */
14503        if (nvram->type != 0 ||
14504            memcmp(nvram->trailer, Symbios_trailer, 6) ||
14505            nvram->byte_count != len - 12)
14506                return 1;
14507
14508        /* verify checksum */
14509        for (x = 6, csum = 0; x < len - 6; x++)
14510                csum += data[x];
14511        if (csum != nvram->checksum)
14512                return 1;
14513
14514        return 0;
14515}
14516
14517/*
14518 *  93C46 EEPROM reading.
14519 *
14520 *  GPOI0 - data in
14521 *  GPIO1 - data out
14522 *  GPIO2 - clock
14523 *  GPIO4 - chip select
14524 *
14525 *  Used by Tekram.
14526 */
14527
14528/*
14529 *  Pulse clock bit in GPIO0
14530 */
14531static void __init T93C46_Clk(ncr_slot *np, u_char *gpreg)
14532{
14533        OUTB (nc_gpreg, *gpreg | 0x04);
14534        UDELAY (2);
14535        OUTB (nc_gpreg, *gpreg);
14536}
14537
14538/* 
14539 *  Read bit from NVRAM
14540 */
14541static void __init T93C46_Read_Bit(ncr_slot *np, u_char *read_bit, u_char *gpreg)
14542{
14543        UDELAY (2);
14544        T93C46_Clk(np, gpreg);
14545        *read_bit = INB (nc_gpreg);
14546}
14547
14548/*
14549 *  Write bit to GPIO0
14550 */
14551static void __init T93C46_Write_Bit(ncr_slot *np, u_char write_bit, u_char *gpreg)
14552{
14553        if (write_bit & 0x01)
14554                *gpreg |= 0x02;
14555        else
14556                *gpreg &= 0xfd;
14557                
14558        *gpreg |= 0x10;
14559                
14560        OUTB (nc_gpreg, *gpreg);
14561        UDELAY (2);
14562
14563        T93C46_Clk(np, gpreg);
14564}
14565
14566/*
14567 *  Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
14568 */
14569static void __init T93C46_Stop(ncr_slot *np, u_char *gpreg)
14570{
14571        *gpreg &= 0xef;
14572        OUTB (nc_gpreg, *gpreg);
14573        UDELAY (2);
14574
14575        T93C46_Clk(np, gpreg);
14576}
14577
14578/*
14579 *  Send read command and address to NVRAM
14580 */
14581static void __init 
14582T93C46_Send_Command(ncr_slot *np, u_short write_data, 
14583                    u_char *read_bit, u_char *gpreg)
14584{
14585        int x;
14586
14587        /* send 9 bits, start bit (1), command (2), address (6)  */
14588        for (x = 0; x < 9; x++)
14589                T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
14590
14591        *read_bit = INB (nc_gpreg);
14592}
14593
14594/*
14595 *  READ 2 bytes from the NVRAM
14596 */
14597static void __init 
14598T93C46_Read_Word(ncr_slot *np, u_short *nvram_data, u_char *gpreg)
14599{
14600        int x;
14601        u_char read_bit;
14602
14603        *nvram_data = 0;
14604        for (x = 0; x < 16; x++) {
14605                T93C46_Read_Bit(np, &read_bit, gpreg);
14606
14607                if (read_bit & 0x01)
14608                        *nvram_data |=  (0x01 << (15 - x));
14609                else
14610                        *nvram_data &= ~(0x01 << (15 - x));
14611        }
14612}
14613
14614/*
14615 *  Read Tekram NvRAM data.
14616 */
14617static int __init 
14618T93C46_Read_Data(ncr_slot *np, u_short *data,int len,u_char *gpreg)
14619{
14620        u_char  read_bit;
14621        int     x;
14622
14623        for (x = 0; x < len; x++)  {
14624
14625                /* output read command and address */
14626                T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
14627                if (read_bit & 0x01)
14628                        return 1; /* Bad */
14629                T93C46_Read_Word(np, &data[x], gpreg);
14630                T93C46_Stop(np, gpreg);
14631        }
14632
14633        return 0;
14634}
14635
14636/*
14637 *  Try reading 93C46 Tekram NVRAM.
14638 */
14639static int __init 
14640sym_read_T93C46_nvram (ncr_slot *np, Tekram_nvram *nvram)
14641{
14642        u_char gpcntl, gpreg;
14643        u_char old_gpcntl, old_gpreg;
14644        int retv = 1;
14645
14646        /* save current state of GPCNTL and GPREG */
14647        old_gpreg       = INB (nc_gpreg);
14648        old_gpcntl      = INB (nc_gpcntl);
14649
14650        /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
14651           1/2/4 out */
14652        gpreg = old_gpreg & 0xe9;
14653        OUTB (nc_gpreg, gpreg);
14654        gpcntl = (old_gpcntl & 0xe9) | 0x09;
14655        OUTB (nc_gpcntl, gpcntl);
14656
14657        /* input all of NVRAM, 64 words */
14658        retv = T93C46_Read_Data(np, (u_short *) nvram,
14659                                sizeof(*nvram) / sizeof(short), &gpreg);
14660        
14661        /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
14662        OUTB (nc_gpcntl, old_gpcntl);
14663        OUTB (nc_gpreg,  old_gpreg);
14664
14665        return retv;
14666}
14667
14668/*
14669 *  Try reading Tekram NVRAM.
14670 *  Return 0 if OK.
14671 */
14672static int __init 
14673sym_read_Tekram_nvram (ncr_slot *np, u_short device_id, Tekram_nvram *nvram)
14674{
14675        u_char *data = (u_char *) nvram;
14676        int len = sizeof(*nvram);
14677        u_short csum;
14678        int x;
14679
14680        switch (device_id) {
14681        case PCI_DEVICE_ID_NCR_53C885:
14682        case PCI_DEVICE_ID_NCR_53C895:
14683        case PCI_DEVICE_ID_NCR_53C896:
14684                x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
14685                                          data, len);
14686                break;
14687        case PCI_DEVICE_ID_NCR_53C875:
14688                x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
14689                                          data, len);
14690                if (!x)
14691                        break;
14692        default:
14693                x = sym_read_T93C46_nvram(np, nvram);
14694                break;
14695        }
14696        if (x)
14697                return 1;
14698
14699        /* verify checksum */
14700        for (x = 0, csum = 0; x < len - 1; x += 2)
14701                csum += data[x] + (data[x+1] << 8);
14702        if (csum != 0x1234)
14703                return 1;
14704
14705        return 0;
14706}
14707
14708#endif  /* SCSI_NCR_NVRAM_SUPPORT */
14709
14710/*
14711**      Module stuff
14712*/
14713
14714MODULE_LICENSE("GPL");
14715
14716#if LINUX_VERSION_CODE >= LinuxVersionCode(2,4,0)
14717static
14718#endif
14719#if LINUX_VERSION_CODE >= LinuxVersionCode(2,4,0) || defined(MODULE)
14720Scsi_Host_Template driver_template = SYM53C8XX;
14721#include "scsi_module.c"
14722#endif
14723
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