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28#include <linux/version.h>
29#include <linux/config.h>
30#include <linux/kernel.h>
31#include <linux/slab.h>
32#include <linux/init.h>
33#include <linux/capability.h>
34#include <linux/sched.h>
35#include <linux/interrupt.h>
36#include <linux/bitops.h>
37#include <linux/atmdev.h>
38#include <linux/sonet.h>
39#include <linux/atm_suni.h>
40#include <asm/io.h>
41#include <asm/string.h>
42#include <asm/segment.h>
43#include <asm/page.h>
44#include <asm/irq.h>
45#include <asm/dma.h>
46#include <asm/byteorder.h>
47#include <asm/uaccess.h>
48#include <asm/atomic.h>
49#include <linux/pci.h>
50
51#ifdef CONFIG_ATM_FORE200E_SBA
52#include <asm/idprom.h>
53#include <asm/sbus.h>
54#include <asm/openprom.h>
55#include <asm/oplib.h>
56#include <asm/pgtable.h>
57#endif
58
59#include <linux/module.h>
60
61#include "fore200e.h"
62#include "suni.h"
63
64#if 1
65#define FORE200E_52BYTE_AAL0_SDU
66#endif
67
68#define FORE200E_VERSION "0.2d"
69
70
71#define FORE200E "fore200e: "
72
73#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
74#define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
75 printk(FORE200E format, ##args); } while(0)
76#else
77#define DPRINTK(level, format, args...) while(0)
78#endif
79
80
81#define FORE200E_ALIGN(addr, alignment) \
82 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
83
84#define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
85
86#define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
87
88#define FORE200E_NEXT_ENTRY(index, modulo) (index = ++(index) % (modulo))
89
90
91#define MSECS(ms) (((ms)*HZ/1000)+1)
92
93
94extern const struct atmdev_ops fore200e_ops;
95extern const struct fore200e_bus fore200e_bus[];
96
97static struct fore200e* fore200e_boards = NULL;
98
99
100#ifdef MODULE
101MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
102MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
103MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
104#endif
105
106
107static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
108 { BUFFER_S1_NBR, BUFFER_L1_NBR },
109 { BUFFER_S2_NBR, BUFFER_L2_NBR }
110};
111
112static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
113 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
114 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
115};
116
117
118#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
119static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
120#endif
121
122
123#if 0
124static int
125fore200e_fore2atm_aal(enum fore200e_aal aal)
126{
127 switch(aal) {
128 case FORE200E_AAL0: return ATM_AAL0;
129 case FORE200E_AAL34: return ATM_AAL34;
130 case FORE200E_AAL5: return ATM_AAL5;
131 }
132
133 return -EINVAL;
134}
135#endif
136
137
138static enum fore200e_aal
139fore200e_atm2fore_aal(int aal)
140{
141 switch(aal) {
142 case ATM_AAL0: return FORE200E_AAL0;
143 case ATM_AAL34: return FORE200E_AAL34;
144 case ATM_AAL1:
145 case ATM_AAL2:
146 case ATM_AAL5: return FORE200E_AAL5;
147 }
148
149 return -EINVAL;
150}
151
152
153static char*
154fore200e_irq_itoa(int irq)
155{
156#if defined(__sparc_v9__)
157 return __irq_itoa(irq);
158#else
159 static char str[8];
160 sprintf(str, "%d", irq);
161 return str;
162#endif
163}
164
165
166static void*
167fore200e_kmalloc(int size, int flags)
168{
169 void* chunk = kmalloc(size, flags);
170
171 if (chunk)
172 memset(chunk, 0x00, size);
173 else
174 printk(FORE200E "kmalloc() failed, requested size = %d, flags = 0x%x\n", size, flags);
175
176 return chunk;
177}
178
179
180static void
181fore200e_kfree(void* chunk)
182{
183 kfree(chunk);
184}
185
186
187
188
189
190static int
191fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
192{
193 unsigned long offset = 0;
194
195 if (alignment <= sizeof(int))
196 alignment = 0;
197
198 chunk->alloc_size = size + alignment;
199 chunk->align_size = size;
200 chunk->direction = direction;
201
202 chunk->alloc_addr = fore200e_kmalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
203 if (chunk->alloc_addr == NULL)
204 return -ENOMEM;
205
206 if (alignment > 0)
207 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
208
209 chunk->align_addr = chunk->alloc_addr + offset;
210
211 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
212
213 return 0;
214}
215
216
217
218
219static void
220fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
221{
222 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
223
224 fore200e_kfree(chunk->alloc_addr);
225}
226
227
228
229#if 0
230static int
231fore200e_checkup(struct fore200e* fore200e)
232{
233 u32 hb1, hb2;
234
235 hb1 = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
236 fore200e_spin(10);
237 hb2 = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
238
239 if (hb2 <= hb1) {
240 printk(FORE200E "device %s heartbeat is not counting upwards, hb1 = %x; hb2 = %x\n",
241 fore200e->name, hb1, hb2);
242 return -EIO;
243 }
244 printk(FORE200E "device %s heartbeat is ok\n", fore200e->name);
245
246 return 0;
247}
248#endif
249
250
251static void
252fore200e_spin(int msecs)
253{
254 unsigned long timeout = jiffies + MSECS(msecs);
255 while (time_before(jiffies, timeout));
256}
257
258
259static int
260fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
261{
262 unsigned long timeout = jiffies + MSECS(msecs);
263 int ok;
264
265 mb();
266 do {
267 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
268 break;
269
270 } while (time_before(jiffies, timeout));
271
272#if 1
273 if (!ok) {
274 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
275 *addr, val);
276 }
277#endif
278
279 return ok;
280}
281
282
283static int
284fore200e_io_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
285{
286 unsigned long timeout = jiffies + MSECS(msecs);
287 int ok;
288
289 do {
290 if ((ok = (fore200e->bus->read(addr) == val)))
291 break;
292
293 } while (time_before(jiffies, timeout));
294
295#if 1
296 if (!ok) {
297 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
298 fore200e->bus->read(addr), val);
299 }
300#endif
301
302 return ok;
303}
304
305
306static void
307fore200e_free_rx_buf(struct fore200e* fore200e)
308{
309 int scheme, magn, nbr;
310 struct buffer* buffer;
311
312 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
313 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
314
315 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
316
317 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
318
319 struct chunk* data = &buffer[ nbr ].data;
320
321 if (data->alloc_addr != NULL)
322 fore200e_chunk_free(fore200e, data);
323 }
324 }
325 }
326 }
327}
328
329
330static void
331fore200e_uninit_bs_queue(struct fore200e* fore200e)
332{
333 int scheme, magn;
334
335 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
336 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
337
338 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
339 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
340
341 if (status->alloc_addr)
342 fore200e->bus->dma_chunk_free(fore200e, status);
343
344 if (rbd_block->alloc_addr)
345 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
346 }
347 }
348}
349
350
351static int
352fore200e_reset(struct fore200e* fore200e, int diag)
353{
354 int ok;
355
356 fore200e->cp_monitor = (struct cp_monitor*)(fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET);
357
358 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
359
360 fore200e->bus->reset(fore200e);
361
362 if (diag) {
363 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
364 if (ok == 0) {
365
366 printk(FORE200E "device %s self-test failed\n", fore200e->name);
367 return -ENODEV;
368 }
369
370 printk(FORE200E "device %s self-test passed\n", fore200e->name);
371
372 fore200e->state = FORE200E_STATE_RESET;
373 }
374
375 return 0;
376}
377
378
379static void
380fore200e_shutdown(struct fore200e* fore200e)
381{
382 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
383 fore200e->name, fore200e->phys_base,
384 fore200e_irq_itoa(fore200e->irq));
385
386 if (fore200e->state > FORE200E_STATE_RESET) {
387
388 fore200e_reset(fore200e, 0);
389 }
390
391
392 switch(fore200e->state) {
393
394 case FORE200E_STATE_COMPLETE:
395 if (fore200e->stats)
396 kfree(fore200e->stats);
397
398 case FORE200E_STATE_IRQ:
399 free_irq(fore200e->irq, fore200e->atm_dev);
400
401 case FORE200E_STATE_ALLOC_BUF:
402 fore200e_free_rx_buf(fore200e);
403
404 case FORE200E_STATE_INIT_BSQ:
405 fore200e_uninit_bs_queue(fore200e);
406
407 case FORE200E_STATE_INIT_RXQ:
408 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
409 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
410
411 case FORE200E_STATE_INIT_TXQ:
412 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
413 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
414
415 case FORE200E_STATE_INIT_CMDQ:
416 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
417
418 case FORE200E_STATE_INITIALIZE:
419
420
421 case FORE200E_STATE_START_FW:
422
423
424 case FORE200E_STATE_LOAD_FW:
425
426
427 case FORE200E_STATE_RESET:
428
429
430 case FORE200E_STATE_MAP:
431 fore200e->bus->unmap(fore200e);
432
433 case FORE200E_STATE_CONFIGURE:
434
435
436 case FORE200E_STATE_REGISTER:
437
438 atm_dev_deregister(fore200e->atm_dev);
439
440 case FORE200E_STATE_BLANK:
441
442 break;
443 }
444}
445
446
447
448#ifdef CONFIG_ATM_FORE200E_PCA
449
450static u32 fore200e_pca_read(volatile u32* addr)
451{
452
453
454 return le32_to_cpu(readl(addr));
455}
456
457
458static void fore200e_pca_write(u32 val, volatile u32* addr)
459{
460
461
462 writel(cpu_to_le32(val), addr);
463}
464
465
466static u32
467fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
468{
469 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
470
471 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
472 virt_addr, size, direction, dma_addr);
473
474 return dma_addr;
475}
476
477
478static void
479fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
480{
481 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
482 dma_addr, size, direction);
483
484 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
485}
486
487
488static void
489fore200e_pca_dma_sync(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
490{
491 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
492
493 pci_dma_sync_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
494}
495
496
497
498
499
500static int
501fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
502 int size, int nbr, int alignment)
503{
504#if defined(__sparc_v9__)
505
506 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
507 chunk->alloc_size,
508 &chunk->dma_addr);
509
510 if (chunk->alloc_addr == NULL || chunk->dma_addr == 0)
511 return -ENOMEM;
512
513 chunk->align_addr = chunk->alloc_addr;
514#else
515 if (fore200e_chunk_alloc(fore200e, chunk, size * nbr, alignment, FORE200E_DMA_BIDIRECTIONAL) < 0)
516 return -ENOMEM;
517#endif
518
519 return 0;
520}
521
522
523
524
525static void
526fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
527{
528#if defined(__sparc_v9__)
529 pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
530 chunk->alloc_size,
531 chunk->alloc_addr,
532 chunk->dma_addr);
533#else
534 fore200e_chunk_free(fore200e, chunk);
535#endif
536}
537
538
539static int
540fore200e_pca_irq_check(struct fore200e* fore200e)
541{
542
543 return readl(fore200e->regs.pca.psr);
544}
545
546
547static void
548fore200e_pca_irq_ack(struct fore200e* fore200e)
549{
550 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
551}
552
553
554static void
555fore200e_pca_reset(struct fore200e* fore200e)
556{
557 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
558 fore200e_spin(10);
559 writel(0, fore200e->regs.pca.hcr);
560}
561
562
563static int __init
564fore200e_pca_map(struct fore200e* fore200e)
565{
566 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
567
568 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
569
570 if (fore200e->virt_base == NULL) {
571 printk(FORE200E "can't map device %s\n", fore200e->name);
572 return -EFAULT;
573 }
574
575 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
576
577
578 fore200e->regs.pca.hcr = (u32*)(fore200e->virt_base + PCA200E_HCR_OFFSET);
579 fore200e->regs.pca.imr = (u32*)(fore200e->virt_base + PCA200E_IMR_OFFSET);
580 fore200e->regs.pca.psr = (u32*)(fore200e->virt_base + PCA200E_PSR_OFFSET);
581
582 fore200e->state = FORE200E_STATE_MAP;
583 return 0;
584}
585
586
587static void
588fore200e_pca_unmap(struct fore200e* fore200e)
589{
590 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
591
592
593
594 if (fore200e->virt_base != NULL)
595 iounmap(fore200e->virt_base);
596}
597
598
599static int __init
600fore200e_pca_configure(struct fore200e* fore200e)
601{
602 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
603 u8 master_ctrl;
604
605 DPRINTK(2, "device %s being configured\n", fore200e->name);
606
607 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
608 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
609 return -EIO;
610 }
611
612 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
613
614 master_ctrl = master_ctrl
615#if 0
616 | PCA200E_CTRL_DIS_CACHE_RD
617 | PCA200E_CTRL_DIS_WRT_INVAL
618#endif
619#if defined(__BIG_ENDIAN)
620
621 | PCA200E_CTRL_CONVERT_ENDIAN
622#endif
623 | PCA200E_CTRL_LARGE_PCI_BURSTS;
624
625 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
626
627 fore200e->state = FORE200E_STATE_CONFIGURE;
628 return 0;
629}
630
631
632static struct fore200e* __init
633fore200e_pca_detect(const struct fore200e_bus* bus, int index)
634{
635 struct fore200e* fore200e;
636 struct pci_dev* pci_dev = NULL;
637 int count = index;
638
639 if (pci_present() == 0) {
640 printk(FORE200E "no PCI subsystem\n");
641 return NULL;
642 }
643
644 do {
645 pci_dev = pci_find_device(PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, pci_dev);
646 if (pci_dev == NULL)
647 return NULL;
648 } while (count--);
649
650 if (pci_enable_device(pci_dev))
651 return NULL;
652
653 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
654 if (fore200e == NULL)
655 return NULL;
656
657 fore200e->bus = bus;
658 fore200e->bus_dev = pci_dev;
659 fore200e->irq = pci_dev->irq;
660 fore200e->phys_base = pci_resource_start (pci_dev, 0);
661
662#if defined(__powerpc__)
663 fore200e->phys_base += KERNELBASE;
664#endif
665
666 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
667
668 pci_set_master(pci_dev);
669
670 return fore200e;
671}
672
673
674static int __init
675fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
676{
677 struct host_cmdq* cmdq = &fore200e->host_cmdq;
678 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
679 struct prom_opcode opcode;
680 int ok;
681 u32 prom_dma;
682
683 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
684
685 opcode.opcode = OPCODE_GET_PROM;
686 opcode.pad = 0;
687
688 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
689
690 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
691
692 *entry->status = STATUS_PENDING;
693
694 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.prom_block.opcode);
695
696 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
697
698 *entry->status = STATUS_FREE;
699
700 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
701
702 if (ok == 0) {
703 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
704 return -EIO;
705 }
706
707#if defined(__BIG_ENDIAN)
708
709#define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
710
711
712 swap_here(&prom->mac_addr[0]);
713 swap_here(&prom->mac_addr[4]);
714#endif
715
716 return 0;
717}
718
719
720static int
721fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
722{
723 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
724
725 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
726 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
727}
728
729#endif
730
731
732
733
734#ifdef CONFIG_ATM_FORE200E_SBA
735
736static u32
737fore200e_sba_read(volatile u32* addr)
738{
739 return sbus_readl(addr);
740}
741
742
743static void
744fore200e_sba_write(u32 val, volatile u32* addr)
745{
746 sbus_writel(val, addr);
747}
748
749
750static u32
751fore200e_sba_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
752{
753 u32 dma_addr = sbus_map_single((struct sbus_dev*)fore200e->bus_dev, virt_addr, size, direction);
754
755 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
756 virt_addr, size, direction, dma_addr);
757
758 return dma_addr;
759}
760
761
762static void
763fore200e_sba_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
764{
765 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
766 dma_addr, size, direction);
767
768 sbus_unmap_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
769}
770
771
772static void
773fore200e_sba_dma_sync(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
774{
775 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
776
777 sbus_dma_sync_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
778}
779
780
781
782
783
784static int
785fore200e_sba_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
786 int size, int nbr, int alignment)
787{
788 chunk->alloc_size = chunk->align_size = size * nbr;
789
790
791 chunk->alloc_addr = sbus_alloc_consistent((struct sbus_dev*)fore200e->bus_dev,
792 chunk->alloc_size,
793 &chunk->dma_addr);
794
795 if (chunk->alloc_addr == NULL || chunk->dma_addr == 0)
796 return -ENOMEM;
797
798 chunk->align_addr = chunk->alloc_addr;
799
800 return 0;
801}
802
803
804
805
806static void
807fore200e_sba_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
808{
809 sbus_free_consistent((struct sbus_dev*)fore200e->bus_dev,
810 chunk->alloc_size,
811 chunk->alloc_addr,
812 chunk->dma_addr);
813}
814
815
816static void
817fore200e_sba_irq_enable(struct fore200e* fore200e)
818{
819 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
820 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
821}
822
823
824static int
825fore200e_sba_irq_check(struct fore200e* fore200e)
826{
827 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
828}
829
830
831static void
832fore200e_sba_irq_ack(struct fore200e* fore200e)
833{
834 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
835 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
836}
837
838
839static void
840fore200e_sba_reset(struct fore200e* fore200e)
841{
842 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
843 fore200e_spin(10);
844 fore200e->bus->write(0, fore200e->regs.sba.hcr);
845}
846
847
848static int __init
849fore200e_sba_map(struct fore200e* fore200e)
850{
851 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
852 unsigned int bursts;
853
854
855
856 fore200e->regs.sba.hcr = (u32*)sbus_ioremap(&sbus_dev->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
857 fore200e->regs.sba.bsr = (u32*)sbus_ioremap(&sbus_dev->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
858 fore200e->regs.sba.isr = (u32*)sbus_ioremap(&sbus_dev->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
859 fore200e->virt_base = (u32*)sbus_ioremap(&sbus_dev->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
860
861 if (fore200e->virt_base == NULL) {
862 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
863 return -EFAULT;
864 }
865
866 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
867
868 fore200e->bus->write(0x02, fore200e->regs.sba.isr);
869
870
871 bursts = prom_getintdefault(sbus_dev->bus->prom_node, "burst-sizes", 0x00);
872
873 if (sbus_can_dma_64bit(sbus_dev))
874 sbus_set_sbus64(sbus_dev, bursts);
875
876#if 0
877 if (bursts & DMA_BURST16)
878 fore200e->bus->write(SBA200E_BSR_BURST16, fore200e->regs.sba.bsr);
879 else
880 if (bursts & DMA_BURST8)
881 fore200e->bus->write(SBA200E_BSR_BURST8, fore200e->regs.sba.bsr);
882 else
883 if (bursts & DMA_BURST4)
884 fore200e->bus->write(SBA200E_BSR_BURST4, fore200e->regs.sba.bsr);
885#endif
886
887 fore200e->state = FORE200E_STATE_MAP;
888 return 0;
889}
890
891
892static void
893fore200e_sba_unmap(struct fore200e* fore200e)
894{
895 sbus_iounmap((ulong)fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
896 sbus_iounmap((ulong)fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
897 sbus_iounmap((ulong)fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
898 sbus_iounmap((ulong)fore200e->virt_base, SBA200E_RAM_LENGTH);
899}
900
901
902static int __init
903fore200e_sba_configure(struct fore200e* fore200e)
904{
905 fore200e->state = FORE200E_STATE_CONFIGURE;
906 return 0;
907}
908
909
910static struct fore200e* __init
911fore200e_sba_detect(const struct fore200e_bus* bus, int index)
912{
913 struct fore200e* fore200e;
914 struct sbus_bus* sbus_bus;
915 struct sbus_dev* sbus_dev = NULL;
916
917 unsigned int count = 0;
918
919 for_each_sbus (sbus_bus) {
920 for_each_sbusdev (sbus_dev, sbus_bus) {
921 if (strcmp(sbus_dev->prom_name, SBA200E_PROM_NAME) == 0) {
922 if (count >= index)
923 goto found;
924 count++;
925 }
926 }
927 }
928 return NULL;
929
930 found:
931#if 1
932 if (sbus_dev->num_registers != 4) {
933 printk(FORE200E "this %s device has %d instead of 4 registers\n",
934 bus->model_name, sbus_dev->num_registers);
935 return NULL;
936 }
937#endif
938
939 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
940 if (fore200e == NULL)
941 return NULL;
942
943 fore200e->bus = bus;
944 fore200e->bus_dev = sbus_dev;
945 fore200e->irq = sbus_dev->irqs[ 0 ];
946
947 fore200e->phys_base = (unsigned long)sbus_dev;
948
949 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
950
951 return fore200e;
952}
953
954
955static int __init
956fore200e_sba_prom_read(struct fore200e* fore200e, struct prom_data* prom)
957{
958 struct sbus_dev* sbus_dev = (struct sbus_dev*) fore200e->bus_dev;
959 int len;
960
961 len = prom_getproperty(sbus_dev->prom_node, "macaddrlo2", &prom->mac_addr[ 4 ], 4);
962 if (len < 0)
963 return -EBUSY;
964
965 len = prom_getproperty(sbus_dev->prom_node, "macaddrhi4", &prom->mac_addr[ 2 ], 4);
966 if (len < 0)
967 return -EBUSY;
968
969 prom_getproperty(sbus_dev->prom_node, "serialnumber",
970 (char*)&prom->serial_number, sizeof(prom->serial_number));
971
972 prom_getproperty(sbus_dev->prom_node, "promversion",
973 (char*)&prom->hw_revision, sizeof(prom->hw_revision));
974
975 return 0;
976}
977
978
979static int
980fore200e_sba_proc_read(struct fore200e* fore200e, char *page)
981{
982 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
983
984 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n", sbus_dev->slot, sbus_dev->prom_name);
985}
986#endif
987
988
989static void
990fore200e_irq_tx(struct fore200e* fore200e)
991{
992 struct host_txq_entry* entry;
993 int i;
994
995 entry = fore200e->host_txq.host_entry;
996
997 for (i = 0; i < QUEUE_SIZE_TX; i++) {
998
999 if (*entry->status & STATUS_COMPLETE) {
1000
1001 DPRINTK(3, "TX COMPLETED: entry = %p, vcc = %p, skb = %p\n", entry, entry->vcc, entry->skb);
1002
1003
1004 if (entry->data)
1005 kfree(entry->data);
1006
1007
1008 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
1009 FORE200E_DMA_TODEVICE);
1010
1011
1012 if (entry->vcc->pop)
1013 entry->vcc->pop(entry->vcc, entry->skb);
1014 else
1015 dev_kfree_skb_irq(entry->skb);
1016
1017
1018 if (*entry->status & STATUS_ERROR)
1019 atomic_inc(&entry->vcc->stats->tx_err);
1020 else
1021 atomic_inc(&entry->vcc->stats->tx);
1022
1023 *entry->status = STATUS_FREE;
1024
1025 fore200e->host_txq.txing--;
1026 }
1027 entry++;
1028 }
1029}
1030
1031
1032static void
1033fore200e_supply(struct fore200e* fore200e)
1034{
1035 int scheme, magn, i;
1036
1037 struct host_bsq* bsq;
1038 struct host_bsq_entry* entry;
1039 struct buffer* buffer;
1040
1041 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1042 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1043
1044 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1045
1046 if (fore200e_rx_buf_nbr[ scheme ][ magn ] - bsq->count > RBD_BLK_SIZE) {
1047
1048 DPRINTK(2, "supplying rx buffers to queue %d / %d, count = %d\n",
1049 scheme, magn, bsq->count);
1050
1051 entry = &bsq->host_entry[ bsq->head ];
1052
1053 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1054
1055 for (i = 0; i < RBD_BLK_SIZE; i++) {
1056
1057 buffer = &bsq->buffer[ bsq->free ];
1058
1059 FORE200E_NEXT_ENTRY(bsq->free, fore200e_rx_buf_nbr[ scheme ][ magn ]);
1060
1061 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1062 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1063 }
1064
1065
1066 bsq->count += RBD_BLK_SIZE;
1067
1068 *entry->status = STATUS_PENDING;
1069 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1070 }
1071 }
1072 }
1073}
1074
1075
1076
1077static struct atm_vcc*
1078fore200e_find_vcc(struct fore200e* fore200e, struct rpd* rpd)
1079{
1080 unsigned long flags;
1081 struct atm_vcc* vcc;
1082
1083 spin_lock_irqsave(&fore200e->atm_dev->lock, flags);
1084 for (vcc = fore200e->atm_dev->vccs; vcc; vcc = vcc->next) {
1085
1086 if (vcc->vpi == rpd->atm_header.vpi && vcc->vci == rpd->atm_header.vci)
1087 break;
1088 }
1089 spin_unlock_irqrestore(&fore200e->atm_dev->lock, flags);
1090
1091 return vcc;
1092}
1093
1094
1095static void
1096fore200e_push_rpd(struct fore200e* fore200e, struct rpd* rpd)
1097{
1098 struct atm_vcc* vcc;
1099 struct sk_buff* skb;
1100 struct buffer* buffer;
1101 struct fore200e_vcc* fore200e_vcc;
1102 int i, pdu_len = 0;
1103#ifdef FORE200E_52BYTE_AAL0_SDU
1104 u32 cell_header = 0;
1105#endif
1106
1107 vcc = fore200e_find_vcc(fore200e, rpd);
1108 if (vcc == NULL) {
1109
1110 printk(FORE200E "no vcc found for PDU received on %d.%d.%d\n",
1111 fore200e->atm_dev->number, rpd->atm_header.vpi, rpd->atm_header.vci);
1112 return;
1113 }
1114
1115 fore200e_vcc = FORE200E_VCC(vcc);
1116
1117#ifdef FORE200E_52BYTE_AAL0_SDU
1118 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1119
1120 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1121 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1122 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1123 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1124 rpd->atm_header.clp;
1125 pdu_len = 4;
1126 }
1127#endif
1128
1129
1130 for (i = 0; i < rpd->nseg; i++)
1131 pdu_len += rpd->rsd[ i ].length;
1132
1133 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1134 if (skb == NULL) {
1135
1136 printk(FORE200E "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1137 atomic_inc(&vcc->stats->rx_drop);
1138 return;
1139 }
1140
1141 skb->stamp = xtime;
1142
1143#ifdef FORE200E_52BYTE_AAL0_SDU
1144 if (cell_header) {
1145 *((u32*)skb_put(skb, 4)) = cell_header;
1146 }
1147#endif
1148
1149
1150 for (i = 0; i < rpd->nseg; i++) {
1151
1152
1153 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1154
1155
1156 fore200e->bus->dma_sync(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, FORE200E_DMA_FROMDEVICE);
1157
1158 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
1159 }
1160
1161 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1162
1163 if (pdu_len < fore200e_vcc->rx_min_pdu)
1164 fore200e_vcc->rx_min_pdu = pdu_len;
1165 if (pdu_len > fore200e_vcc->rx_max_pdu)
1166 fore200e_vcc->rx_max_pdu = pdu_len;
1167
1168
1169 if (atm_charge(vcc, skb->truesize) == 0) {
1170
1171 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1172 vcc->itf, vcc->vpi, vcc->vci);
1173
1174 dev_kfree_skb_irq(skb);
1175 return;
1176 }
1177
1178 vcc->push(vcc, skb);
1179 atomic_inc(&vcc->stats->rx);
1180}
1181
1182
1183static void
1184fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1185{
1186 struct buffer* buffer;
1187 int i;
1188
1189 for (i = 0; i < rpd->nseg; i++) {
1190
1191
1192 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1193
1194
1195 fore200e->host_bsq[ buffer->scheme ][ buffer->magn ].count--;
1196 }
1197}
1198
1199
1200static void
1201fore200e_irq_rx(struct fore200e* fore200e)
1202{
1203 struct host_rxq* rxq = &fore200e->host_rxq;
1204 struct host_rxq_entry* entry;
1205
1206 for (;;) {
1207
1208 entry = &rxq->host_entry[ rxq->head ];
1209
1210
1211 if ((*entry->status & STATUS_COMPLETE) == 0)
1212 break;
1213
1214 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1215
1216 if ((*entry->status & STATUS_ERROR) == 0) {
1217
1218 fore200e_push_rpd(fore200e, entry->rpd);
1219 }
1220 else {
1221 printk(FORE200E "damaged PDU on %d.%d.%d\n",
1222 fore200e->atm_dev->number, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1223 }
1224
1225 fore200e_collect_rpd(fore200e, entry->rpd);
1226
1227 fore200e_supply(fore200e);
1228
1229
1230 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1231 *entry->status = STATUS_FREE;
1232 }
1233}
1234
1235
1236static void
1237fore200e_interrupt(int irq, void* dev, struct pt_regs* regs)
1238{
1239 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1240
1241 if (fore200e->bus->irq_check(fore200e) == 0) {
1242
1243 DPRINTK(3, "unexpected interrupt on device %c\n", fore200e->name[9]);
1244 return;
1245 }
1246 DPRINTK(3, "valid interrupt on device %c\n", fore200e->name[9]);
1247
1248 tasklet_schedule(&fore200e->tasklet);
1249
1250 fore200e->bus->irq_ack(fore200e);
1251}
1252
1253
1254static void
1255fore200e_tasklet(unsigned long data)
1256{
1257 struct fore200e* fore200e = (struct fore200e*) data;
1258
1259 fore200e_irq_rx(fore200e);
1260
1261 if (fore200e->host_txq.txing)
1262 fore200e_irq_tx(fore200e);
1263}
1264
1265
1266
1267static int
1268fore200e_select_scheme(struct atm_vcc* vcc)
1269{
1270 int scheme;
1271
1272#if 1
1273
1274 scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1275#else
1276
1277 if (vcc->vpi & (1<<7)) {
1278 vcc->vpi &= ((1<<7) - 1);
1279 scheme = BUFFER_SCHEME_TWO;
1280 }
1281 else {
1282 scheme = BUFFER_SCHEME_ONE;
1283 }
1284#endif
1285
1286 DPRINTK(1, "vpvc %d.%d.%d uses the %s buffer scheme\n",
1287 vcc->itf, vcc->vpi, vcc->vci, scheme == BUFFER_SCHEME_ONE ? "first" : "second");
1288
1289 return scheme;
1290}
1291
1292
1293
1294static int
1295fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1296{
1297 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1298 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1299 struct activate_opcode activ_opcode;
1300 struct deactivate_opcode deactiv_opcode;
1301 struct vpvc vpvc;
1302 int ok;
1303 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1304
1305 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1306
1307 if (activate) {
1308 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1309
1310 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1311 activ_opcode.aal = aal;
1312 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1313 activ_opcode.pad = 0;
1314 }
1315 else {
1316 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1317 deactiv_opcode.pad = 0;
1318 }
1319
1320 vpvc.vci = vcc->vci;
1321 vpvc.vpi = vcc->vpi;
1322
1323 *entry->status = STATUS_PENDING;
1324
1325 if (activate) {
1326
1327#ifdef FORE200E_52BYTE_AAL0_SDU
1328 mtu = 48;
1329#endif
1330
1331 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1332 fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.activate_block.vpvc);
1333 fore200e->bus->write(*(u32*)&activ_opcode, (u32*)&entry->cp_entry->cmd.activate_block.opcode);
1334 }
1335 else {
1336 fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.deactivate_block.vpvc);
1337 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32*)&entry->cp_entry->cmd.deactivate_block.opcode);
1338 }
1339
1340 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1341
1342 *entry->status = STATUS_FREE;
1343
1344 if (ok == 0) {
1345 printk(FORE200E "unable to %s vpvc %d.%d on device %s\n",
1346 activate ? "open" : "close", vcc->vpi, vcc->vci, fore200e->name);
1347 return -EIO;
1348 }
1349
1350 DPRINTK(1, "vpvc %d.%d %sed on device %s\n", vcc->vpi, vcc->vci,
1351 activate ? "open" : "clos", fore200e->name);
1352
1353 return 0;
1354}
1355
1356
1357static int
1358fore200e_walk_vccs(struct atm_vcc *vcc, short *vpi, int *vci)
1359{
1360 unsigned long flags;
1361 struct atm_vcc* walk;
1362
1363
1364
1365 spin_lock_irqsave(&vcc->dev->lock, flags);
1366
1367 if (*vpi == ATM_VPI_ANY) {
1368
1369 for (*vpi = 0, walk = vcc->dev->vccs; walk; walk = walk->next) {
1370
1371 if ((walk->vci == *vci) && (walk->vpi == *vpi)) {
1372 (*vpi)++;
1373 walk = vcc->dev->vccs;
1374 }
1375 }
1376 }
1377
1378
1379 if (*vci == ATM_VCI_ANY) {
1380
1381 for (*vci = ATM_NOT_RSV_VCI, walk = vcc->dev->vccs; walk; walk = walk->next) {
1382
1383 if ((walk->vpi = *vpi) && (walk->vci == *vci)) {
1384 *vci = walk->vci + 1;
1385 walk = vcc->dev->vccs;
1386 }
1387 }
1388 }
1389
1390 spin_unlock_irqrestore(&vcc->dev->lock, flags);
1391
1392 return 0;
1393}
1394
1395
1396#define FORE200E_MAX_BACK2BACK_CELLS 255
1397
1398static void
1399fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1400{
1401 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1402
1403
1404 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1405 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1406 }
1407 else {
1408
1409 rate->data_cells = rate->idle_cells = 0;
1410 }
1411}
1412
1413
1414static int
1415fore200e_open(struct atm_vcc *vcc, short vpi, int vci)
1416{
1417 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1418 struct fore200e_vcc* fore200e_vcc;
1419
1420
1421 fore200e_walk_vccs(vcc, &vpi, &vci);
1422
1423 vcc->vpi = vpi;
1424 vcc->vci = vci;
1425
1426
1427 if (vci == ATM_VCI_UNSPEC || vpi == ATM_VPI_UNSPEC)
1428 return 0;
1429
1430 set_bit(ATM_VF_ADDR, &vcc->flags);
1431 vcc->itf = vcc->dev->number;
1432
1433 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1434 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1435 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1436 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1437 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1438 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1439 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1440
1441 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1442
1443 down(&fore200e->rate_sf);
1444 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1445 up(&fore200e->rate_sf);
1446 return -EAGAIN;
1447 }
1448
1449
1450
1451
1452
1453 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1454 up(&fore200e->rate_sf);
1455 }
1456
1457 fore200e_vcc = fore200e_kmalloc(sizeof(struct fore200e_vcc), GFP_KERNEL);
1458 if (fore200e_vcc == NULL) {
1459 down(&fore200e->rate_sf);
1460 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1461 up(&fore200e->rate_sf);
1462 return -ENOMEM;
1463 }
1464
1465 FORE200E_VCC(vcc) = fore200e_vcc;
1466
1467 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1468 kfree(fore200e_vcc);
1469 down(&fore200e->rate_sf);
1470 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1471 up(&fore200e->rate_sf);
1472 return -EBUSY;
1473 }
1474
1475
1476 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1477
1478 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1479
1480 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1481 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1482 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1483 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1484 }
1485
1486 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = 65536;
1487 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1488
1489 set_bit(ATM_VF_READY, &vcc->flags);
1490 return 0;
1491}
1492
1493
1494
1495static void
1496fore200e_close(struct atm_vcc* vcc)
1497{
1498 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1499
1500 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1501
1502 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1503
1504 kfree(FORE200E_VCC(vcc));
1505
1506 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1507 down(&fore200e->rate_sf);
1508 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1509 up(&fore200e->rate_sf);
1510 }
1511
1512 clear_bit(ATM_VF_READY, &vcc->flags);
1513}
1514
1515
1516#if 0
1517#define FORE200E_SYNC_SEND
1518#endif
1519
1520
1521static int
1522fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1523{
1524 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1525 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1526 struct host_txq* txq = &fore200e->host_txq;
1527 struct host_txq_entry* entry;
1528 struct tpd* tpd;
1529 struct tpd_haddr tpd_haddr;
1530
1531 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1532 int tx_copy = 0;
1533 int tx_len = skb->len;
1534 u32* cell_header = NULL;
1535 unsigned char* skb_data;
1536 int skb_len;
1537
1538#ifdef FORE200E_52BYTE_AAL0_SDU
1539 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1540 cell_header = (u32*) skb->data;
1541 skb_data = skb->data + 4;
1542 skb_len = tx_len = skb->len - 4;
1543
1544 DPRINTK(3, "skipping user-supplied cell header 0x%08x", *cell_header);
1545 }
1546 else
1547#endif
1548 {
1549 skb_data = skb->data;
1550 skb_len = skb->len;
1551 }
1552
1553 retry_here:
1554
1555 tasklet_disable(&fore200e->tasklet);
1556
1557 entry = &txq->host_entry[ txq->head ];
1558
1559 if (*entry->status != STATUS_FREE) {
1560
1561
1562 fore200e_irq_tx(fore200e);
1563
1564 if (*entry->status != STATUS_FREE) {
1565
1566 tasklet_enable(&fore200e->tasklet);
1567
1568
1569 if(--retry > 0)
1570 goto retry_here;
1571
1572 atomic_inc(&vcc->stats->tx_err);
1573
1574 printk(FORE200E "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1575 fore200e->name, fore200e->cp_queues->heartbeat);
1576 if (vcc->pop)
1577 vcc->pop(vcc, skb);
1578 else
1579 dev_kfree_skb(skb);
1580 return -EIO;
1581 }
1582 }
1583
1584 tpd = entry->tpd;
1585
1586 if (((unsigned long)skb_data) & 0x3) {
1587
1588 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1589 tx_copy = 1;
1590 tx_len = skb_len;
1591 }
1592
1593 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1594
1595
1596 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1597 tx_copy = 1;
1598 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1599 }
1600
1601 if (tx_copy) {
1602
1603 entry->data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1604 if (entry->data == NULL) {
1605
1606 tasklet_enable(&fore200e->tasklet);
1607 if (vcc->pop)
1608 vcc->pop(vcc, skb);
1609 else
1610 dev_kfree_skb(skb);
1611 return -ENOMEM;
1612 }
1613
1614 memcpy(entry->data, skb_data, skb_len);
1615 if (skb_len < tx_len)
1616 memset(entry->data + skb_len, 0x00, tx_len - skb_len);
1617
1618 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, entry->data, tx_len, FORE200E_DMA_TODEVICE);
1619 }
1620 else {
1621 entry->data = NULL;
1622 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, skb_data, tx_len, FORE200E_DMA_TODEVICE);
1623 }
1624
1625 tpd->tsd[ 0 ].length = tx_len;
1626
1627 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1628 txq->txing++;
1629
1630 tasklet_enable(&fore200e->tasklet);
1631
1632
1633 fore200e->bus->dma_sync(fore200e, tpd->tsd[ 0 ].buffer, tpd->tsd[ 0 ].length, FORE200E_DMA_TODEVICE);
1634
1635 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1636 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1637 tpd->tsd[0].length, skb_len);
1638
1639 if (skb_len < fore200e_vcc->tx_min_pdu)
1640 fore200e_vcc->tx_min_pdu = skb_len;
1641 if (skb_len > fore200e_vcc->tx_max_pdu)
1642 fore200e_vcc->tx_max_pdu = skb_len;
1643
1644 entry->vcc = vcc;
1645 entry->skb = skb;
1646
1647
1648 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1649 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1650
1651 if (cell_header) {
1652 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1653 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1654 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1655 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1656 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1657 }
1658 else {
1659
1660 tpd->atm_header.clp = 0;
1661 tpd->atm_header.plt = 0;
1662 tpd->atm_header.vci = vcc->vci;
1663 tpd->atm_header.vpi = vcc->vpi;
1664 tpd->atm_header.gfc = 0;
1665 }
1666
1667 tpd->spec.length = tx_len;
1668 tpd->spec.nseg = 1;
1669 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1670#ifdef FORE200E_SYNC_SEND
1671 tpd->spec.intr = 0;
1672#else
1673 tpd->spec.intr = 1;
1674#endif
1675
1676 tpd_haddr.size = sizeof(struct tpd) / 32;
1677 tpd_haddr.pad = 0;
1678 tpd_haddr.haddr = entry->tpd_dma >> 5;
1679
1680 *entry->status = STATUS_PENDING;
1681 fore200e->bus->write(*(u32*)&tpd_haddr, (u32*)&entry->cp_entry->tpd_haddr);
1682
1683
1684#ifdef FORE200E_SYNC_SEND
1685 {
1686 int ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 10);
1687
1688 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
1689 FORE200E_DMA_TODEVICE);
1690
1691
1692 if (entry->data)
1693 kfree(entry->data);
1694
1695
1696 if (vcc->pop)
1697 vcc->pop(vcc, skb);
1698 else
1699 dev_kfree_skb(skb);
1700
1701 if (ok == 0) {
1702 printk(FORE200E "synchronous tx on %d:%d:%d failed\n", vcc->itf, vcc->vpi, vcc->vci);
1703
1704 atomic_inc(&entry->vcc->stats->tx_err);
1705 return -EIO;
1706 }
1707 atomic_inc(&entry->vcc->stats->tx);
1708
1709 DPRINTK(3, "synchronous tx on %d:%d:%d succeeded\n", vcc->itf, vcc->vpi, vcc->vci);
1710
1711 }
1712#endif
1713
1714 return 0;
1715}
1716
1717
1718static int
1719fore200e_getstats(struct fore200e* fore200e)
1720{
1721 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1722 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1723 struct stats_opcode opcode;
1724 int ok;
1725 u32 stats_dma_addr;
1726
1727 if (fore200e->stats == NULL) {
1728 fore200e->stats = fore200e_kmalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1729 if (fore200e->stats == NULL)
1730 return -ENOMEM;
1731 }
1732
1733 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats, sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
1734
1735 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1736
1737 opcode.opcode = OPCODE_GET_STATS;
1738 opcode.pad = 0;
1739
1740 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1741
1742 *entry->status = STATUS_PENDING;
1743
1744 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.stats_block.opcode);
1745
1746 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1747
1748 *entry->status = STATUS_FREE;
1749
1750 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
1751
1752 if (ok == 0) {
1753 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1754 return -EIO;
1755 }
1756
1757 return 0;
1758}
1759
1760
1761static int
1762fore200e_getsockopt (struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
1763{
1764
1765
1766 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1767 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1768
1769 return -EINVAL;
1770}
1771
1772
1773static int
1774fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
1775{
1776
1777
1778 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1779 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1780
1781 return -EINVAL;
1782}
1783
1784
1785#if 0
1786static int
1787fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1788{
1789 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1790 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1791 struct oc3_opcode opcode;
1792 int ok;
1793 u32 oc3_regs_dma_addr;
1794
1795 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
1796
1797 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1798
1799 opcode.opcode = OPCODE_GET_OC3;
1800 opcode.reg = 0;
1801 opcode.value = 0;
1802 opcode.mask = 0;
1803
1804 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1805
1806 *entry->status = STATUS_PENDING;
1807
1808 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1809
1810 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1811
1812 *entry->status = STATUS_FREE;
1813
1814 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
1815
1816 if (ok == 0) {
1817 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1818 return -EIO;
1819 }
1820
1821 return 0;
1822}
1823#endif
1824
1825
1826static int
1827fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1828{
1829 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1830 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1831 struct oc3_opcode opcode;
1832 int ok;
1833
1834 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1835
1836 opcode.opcode = OPCODE_SET_OC3;
1837 opcode.reg = reg;
1838 opcode.value = value;
1839 opcode.mask = mask;
1840
1841 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1842
1843 *entry->status = STATUS_PENDING;
1844
1845 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1846
1847 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1848
1849 *entry->status = STATUS_FREE;
1850
1851 if (ok == 0) {
1852 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1853 return -EIO;
1854 }
1855
1856 return 0;
1857}
1858
1859
1860static int
1861fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1862{
1863 u32 mct_value, mct_mask;
1864 int error;
1865
1866 if (!capable(CAP_NET_ADMIN))
1867 return -EPERM;
1868
1869 switch (loop_mode) {
1870
1871 case ATM_LM_NONE:
1872 mct_value = 0;
1873 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1874 break;
1875
1876 case ATM_LM_LOC_PHY:
1877 mct_value = mct_mask = SUNI_MCT_DLE;
1878 break;
1879
1880 case ATM_LM_RMT_PHY:
1881 mct_value = mct_mask = SUNI_MCT_LLE;
1882 break;
1883
1884 default:
1885 return -EINVAL;
1886 }
1887
1888 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1889 if ( error == 0)
1890 fore200e->loop_mode = loop_mode;
1891
1892 return error;
1893}
1894
1895
1896static inline unsigned int
1897fore200e_swap(unsigned int in)
1898{
1899#if defined(__LITTLE_ENDIAN)
1900 return swab32(in);
1901#else
1902 return in;
1903#endif
1904}
1905
1906
1907static int
1908fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats* arg)
1909{
1910 struct sonet_stats tmp;
1911
1912 if (fore200e_getstats(fore200e) < 0)
1913 return -EIO;
1914
1915 tmp.section_bip = fore200e_swap(fore200e->stats->oc3.section_bip8_errors);
1916 tmp.line_bip = fore200e_swap(fore200e->stats->oc3.line_bip24_errors);
1917 tmp.path_bip = fore200e_swap(fore200e->stats->oc3.path_bip8_errors);
1918 tmp.line_febe = fore200e_swap(fore200e->stats->oc3.line_febe_errors);
1919 tmp.path_febe = fore200e_swap(fore200e->stats->oc3.path_febe_errors);
1920 tmp.corr_hcs = fore200e_swap(fore200e->stats->oc3.corr_hcs_errors);
1921 tmp.uncorr_hcs = fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors);
1922 tmp.tx_cells = fore200e_swap(fore200e->stats->aal0.cells_transmitted) +
1923 fore200e_swap(fore200e->stats->aal34.cells_transmitted) +
1924 fore200e_swap(fore200e->stats->aal5.cells_transmitted);
1925 tmp.rx_cells = fore200e_swap(fore200e->stats->aal0.cells_received) +
1926 fore200e_swap(fore200e->stats->aal34.cells_received) +
1927 fore200e_swap(fore200e->stats->aal5.cells_received);
1928
1929 if (arg)
1930 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1931
1932 return 0;
1933}
1934
1935
1936static int
1937fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void* arg)
1938{
1939 struct fore200e* fore200e = FORE200E_DEV(dev);
1940
1941 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1942
1943 switch (cmd) {
1944
1945 case SONET_GETSTAT:
1946 return fore200e_fetch_stats(fore200e, (struct sonet_stats*)arg);
1947
1948 case SONET_GETDIAG:
1949 return put_user(0, (int*)arg) ? -EFAULT : 0;
1950
1951 case ATM_SETLOOP:
1952 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1953
1954 case ATM_GETLOOP:
1955 return put_user(fore200e->loop_mode, (int*)arg) ? -EFAULT : 0;
1956
1957 case ATM_QUERYLOOP:
1958 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int*)arg) ? -EFAULT : 0;
1959 }
1960
1961 return -ENOSYS;
1962}
1963
1964
1965static int
1966fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1967{
1968 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1969 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1970
1971 DPRINTK(2, "change_qos %d.%d.%d, "
1972 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1973 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1974 "available_cell_rate = %u",
1975 vcc->itf, vcc->vpi, vcc->vci,
1976 fore200e_traffic_class[ qos->txtp.traffic_class ],
1977 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
1978 fore200e_traffic_class[ qos->rxtp.traffic_class ],
1979 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
1980 flags, fore200e->available_cell_rate);
1981
1982 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
1983
1984 down(&fore200e->rate_sf);
1985 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
1986 up(&fore200e->rate_sf);
1987 return -EAGAIN;
1988 }
1989
1990 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1991 fore200e->available_cell_rate -= qos->txtp.max_pcr;
1992 up(&fore200e->rate_sf);
1993
1994 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
1995
1996
1997 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
1998
1999 set_bit(ATM_VF_HASQOS, &vcc->flags);
2000 return 0;
2001 }
2002
2003 return -EINVAL;
2004}
2005
2006
2007static int __init
2008fore200e_irq_request(struct fore200e* fore200e)
2009{
2010 if (request_irq(fore200e->irq, fore200e_interrupt, SA_SHIRQ, fore200e->name, fore200e->atm_dev) < 0) {
2011
2012 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2013 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2014 return -EBUSY;
2015 }
2016
2017 printk(FORE200E "IRQ %s reserved for device %s\n",
2018 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2019
2020 tasklet_init(&fore200e->tasklet, fore200e_tasklet, (unsigned long)fore200e);
2021
2022 fore200e->state = FORE200E_STATE_IRQ;
2023 return 0;
2024}
2025
2026
2027static int __init
2028fore200e_get_esi(struct fore200e* fore200e)
2029{
2030 struct prom_data* prom = fore200e_kmalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2031 int ok, i;
2032
2033 if (!prom)
2034 return -ENOMEM;
2035 ok = fore200e->bus->prom_read(fore200e, prom);
2036 if (ok < 0) {
2037 fore200e_kfree(prom);
2038 return -EBUSY;
2039 }
2040
2041 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %02x:%02x:%02x:%02x:%02x:%02x\n",
2042 fore200e->name,
2043 (prom->hw_revision & 0xFF) + '@',
2044 prom->serial_number & 0xFFFF,
2045 prom->mac_addr[ 2 ], prom->mac_addr[ 3 ], prom->mac_addr[ 4 ],
2046 prom->mac_addr[ 5 ], prom->mac_addr[ 6 ], prom->mac_addr[ 7 ]);
2047
2048 for (i = 0; i < ESI_LEN; i++) {
2049 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2050 }
2051
2052 fore200e_kfree(prom);
2053
2054 return 0;
2055}
2056
2057
2058static int __init
2059fore200e_alloc_rx_buf(struct fore200e* fore200e)
2060{
2061 int scheme, magn, nbr, size, i;
2062
2063 struct host_bsq* bsq;
2064 struct buffer* buffer;
2065
2066 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2067 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2068
2069 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2070
2071 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2072 size = fore200e_rx_buf_size[ scheme ][ magn ];
2073
2074 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2075
2076
2077 buffer = bsq->buffer = fore200e_kmalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2078
2079 if (buffer == NULL)
2080 return -ENOMEM;
2081
2082 for (i = 0; i < nbr; i++) {
2083
2084 buffer[ i ].scheme = scheme;
2085 buffer[ i ].magn = magn;
2086
2087
2088 if (fore200e_chunk_alloc(fore200e,
2089 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2090 FORE200E_DMA_FROMDEVICE) < 0) {
2091
2092 while (i > 0)
2093 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2094 fore200e_kfree(buffer);
2095
2096 return -ENOMEM;
2097 }
2098 }
2099
2100 bsq->free = 0;
2101 }
2102 }
2103
2104 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2105 return 0;
2106}
2107
2108
2109static int __init
2110fore200e_init_bs_queue(struct fore200e* fore200e)
2111{
2112 int scheme, magn, i;
2113
2114 struct host_bsq* bsq;
2115 struct cp_bsq_entry* cp_entry;
2116
2117 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2118 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2119
2120 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2121
2122 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2123
2124
2125 if (fore200e->bus->dma_chunk_alloc(fore200e,
2126 &bsq->status,
2127 sizeof(enum status),
2128 QUEUE_SIZE_BS,
2129 fore200e->bus->status_alignment) < 0) {
2130 return -ENOMEM;
2131 }
2132
2133
2134 if (fore200e->bus->dma_chunk_alloc(fore200e,
2135 &bsq->rbd_block,
2136 sizeof(struct rbd_block),
2137 QUEUE_SIZE_BS,
2138 fore200e->bus->descr_alignment) < 0) {
2139
2140 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2141 return -ENOMEM;
2142 }
2143
2144
2145 cp_entry = (struct cp_bsq_entry*)(fore200e->virt_base +
2146 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]));
2147
2148
2149 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2150
2151 bsq->host_entry[ i ].status =
2152 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2153 bsq->host_entry[ i ].rbd_block =
2154 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2155 bsq->host_entry[ i ].rbd_block_dma =
2156 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2157 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2158
2159 *bsq->host_entry[ i ].status = STATUS_FREE;
2160
2161 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2162 &cp_entry[ i ].status_haddr);
2163 }
2164 }
2165 }
2166
2167 fore200e->state = FORE200E_STATE_INIT_BSQ;
2168 return 0;
2169}
2170
2171
2172static int __init
2173fore200e_init_rx_queue(struct fore200e* fore200e)
2174{
2175 struct host_rxq* rxq = &fore200e->host_rxq;
2176 struct cp_rxq_entry* cp_entry;
2177 int i;
2178
2179 DPRINTK(2, "receive queue is being initialized\n");
2180
2181
2182 if (fore200e->bus->dma_chunk_alloc(fore200e,
2183 &rxq->status,
2184 sizeof(enum status),
2185 QUEUE_SIZE_RX,
2186 fore200e->bus->status_alignment) < 0) {
2187 return -ENOMEM;
2188 }
2189
2190
2191 if (fore200e->bus->dma_chunk_alloc(fore200e,
2192 &rxq->rpd,
2193 sizeof(struct rpd),
2194 QUEUE_SIZE_RX,
2195 fore200e->bus->descr_alignment) < 0) {
2196
2197 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2198 return -ENOMEM;
2199 }
2200
2201
2202 cp_entry = (struct cp_rxq_entry*)(fore200e->virt_base +
2203 fore200e->bus->read(&fore200e->cp_queues->cp_rxq));
2204
2205
2206 for (i=0; i < QUEUE_SIZE_RX; i++) {
2207
2208 rxq->host_entry[ i ].status =
2209 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2210 rxq->host_entry[ i ].rpd =
2211 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2212 rxq->host_entry[ i ].rpd_dma =
2213 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2214 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2215
2216 *rxq->host_entry[ i ].status = STATUS_FREE;
2217
2218 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2219 &cp_entry[ i ].status_haddr);
2220
2221 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2222 &cp_entry[ i ].rpd_haddr);
2223 }
2224
2225
2226 rxq->head = 0;
2227
2228 fore200e->state = FORE200E_STATE_INIT_RXQ;
2229 return 0;
2230}
2231
2232
2233static int __init
2234fore200e_init_tx_queue(struct fore200e* fore200e)
2235{
2236 struct host_txq* txq = &fore200e->host_txq;
2237 struct cp_txq_entry* cp_entry;
2238 int i;
2239
2240 DPRINTK(2, "transmit queue is being initialized\n");
2241
2242
2243 if (fore200e->bus->dma_chunk_alloc(fore200e,
2244 &txq->status,
2245 sizeof(enum status),
2246 QUEUE_SIZE_TX,
2247 fore200e->bus->status_alignment) < 0) {
2248 return -ENOMEM;
2249 }
2250
2251
2252 if (fore200e->bus->dma_chunk_alloc(fore200e,
2253 &txq->tpd,
2254 sizeof(struct tpd),
2255 QUEUE_SIZE_TX,
2256 fore200e->bus->descr_alignment) < 0) {
2257
2258 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2259 return -ENOMEM;
2260 }
2261
2262
2263 cp_entry = (struct cp_txq_entry*)(fore200e->virt_base +
2264 fore200e->bus->read(&fore200e->cp_queues->cp_txq));
2265
2266
2267 for (i=0; i < QUEUE_SIZE_TX; i++) {
2268
2269 txq->host_entry[ i ].status =
2270 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2271 txq->host_entry[ i ].tpd =
2272 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2273 txq->host_entry[ i ].tpd_dma =
2274 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2275 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2276
2277 *txq->host_entry[ i ].status = STATUS_FREE;
2278
2279 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2280 &cp_entry[ i ].status_haddr);
2281
2282
2283
2284
2285
2286}
2287
2288
2289 txq->head = 0;
2290
2291 fore200e->state = FORE200E_STATE_INIT_TXQ;
2292 return 0;
2293}
2294
2295
2296static int __init
2297fore200e_init_cmd_queue(struct fore200e* fore200e)
2298{
2299 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2300 struct cp_cmdq_entry* cp_entry;
2301 int i;
2302
2303 DPRINTK(2, "command queue is being initialized\n");
2304
2305
2306 if (fore200e->bus->dma_chunk_alloc(fore200e,
2307 &cmdq->status,
2308 sizeof(enum status),
2309 QUEUE_SIZE_CMD,
2310 fore200e->bus->status_alignment) < 0) {
2311 return -ENOMEM;
2312 }
2313
2314
2315 cp_entry = (struct cp_cmdq_entry*)(fore200e->virt_base +
2316 fore200e->bus->read(&fore200e->cp_queues->cp_cmdq));
2317
2318
2319 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2320
2321 cmdq->host_entry[ i ].status =
2322 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2323 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2324
2325 *cmdq->host_entry[ i ].status = STATUS_FREE;
2326
2327 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2328 &cp_entry[ i ].status_haddr);
2329 }
2330
2331
2332 cmdq->head = 0;
2333
2334 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2335 return 0;
2336}
2337
2338
2339static void __init
2340fore200e_param_bs_queue(struct fore200e* fore200e,
2341 enum buffer_scheme scheme, enum buffer_magn magn,
2342 int queue_length, int pool_size, int supply_blksize)
2343{
2344 struct bs_spec* bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2345
2346
2347
2348
2349 if (pool_size == 0)
2350 pool_size = 64;
2351
2352 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2353 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2354 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2355 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2356}
2357
2358
2359static int __init
2360fore200e_initialize(struct fore200e* fore200e)
2361{
2362 struct cp_queues* cpq;
2363 int ok, scheme, magn;
2364
2365 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2366
2367 init_MUTEX(&fore200e->rate_sf);
2368
2369 cpq = fore200e->cp_queues = (struct cp_queues*) (fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET);
2370
2371
2372 fore200e->bus->write(1, &cpq->imask);
2373
2374 if (fore200e->bus->irq_enable)
2375 fore200e->bus->irq_enable(fore200e);
2376
2377 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2378
2379 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2380 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2381 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2382
2383 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2384 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2385
2386 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2387 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2388 fore200e_param_bs_queue(fore200e, scheme, magn,
2389 QUEUE_SIZE_BS,
2390 fore200e_rx_buf_nbr[ scheme ][ magn ],
2391 RBD_BLK_SIZE);
2392
2393
2394 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2395 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2396
2397 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2398 if (ok == 0) {
2399 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2400 return -ENODEV;
2401 }
2402
2403 printk(FORE200E "device %s initialized\n", fore200e->name);
2404
2405 fore200e->state = FORE200E_STATE_INITIALIZE;
2406 return 0;
2407}
2408
2409
2410static void __init
2411fore200e_monitor_putc(struct fore200e* fore200e, char c)
2412{
2413 struct cp_monitor* monitor = fore200e->cp_monitor;
2414
2415#if 0
2416 printk("%c", c);
2417#endif
2418 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2419}
2420
2421
2422static int __init
2423fore200e_monitor_getc(struct fore200e* fore200e)
2424{
2425 struct cp_monitor* monitor = fore200e->cp_monitor;
2426 unsigned long timeout = jiffies + MSECS(50);
2427 int c;
2428
2429 while (time_before(jiffies, timeout)) {
2430
2431 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2432
2433 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2434
2435 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2436#if 0
2437 printk("%c", c & 0xFF);
2438#endif
2439 return c & 0xFF;
2440 }
2441 }
2442
2443 return -1;
2444}
2445
2446
2447static void __init
2448fore200e_monitor_puts(struct fore200e* fore200e, char* str)
2449{
2450 while(*str) {
2451
2452
2453 while (fore200e_monitor_getc(fore200e) >= 0);
2454
2455 fore200e_monitor_putc(fore200e, *str++);
2456 }
2457
2458 while (fore200e_monitor_getc(fore200e) >= 0);
2459}
2460
2461
2462static int __init
2463fore200e_start_fw(struct fore200e* fore200e)
2464{
2465 int ok;
2466 char cmd[ 48 ];
2467 struct fw_header* fw_header = (struct fw_header*) fore200e->bus->fw_data;
2468
2469 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2470
2471 sprintf(cmd, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2472
2473 fore200e_monitor_puts(fore200e, cmd);
2474
2475 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000);
2476 if (ok == 0) {
2477 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2478 return -ENODEV;
2479 }
2480
2481 printk(FORE200E "device %s firmware started\n", fore200e->name);
2482
2483 fore200e->state = FORE200E_STATE_START_FW;
2484 return 0;
2485}
2486
2487
2488static int __init
2489fore200e_load_fw(struct fore200e* fore200e)
2490{
2491 u32* fw_data = (u32*) fore200e->bus->fw_data;
2492 u32 fw_size = (u32) *fore200e->bus->fw_size / sizeof(u32);
2493
2494 struct fw_header* fw_header = (struct fw_header*) fw_data;
2495
2496 u32* load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2497
2498 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2499 fore200e->name, load_addr, fw_size);
2500
2501#if 1
2502 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2503 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2504 return -ENODEV;
2505 }
2506#endif
2507
2508 for (; fw_size--; fw_data++, load_addr++)
2509 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2510
2511 fore200e->state = FORE200E_STATE_LOAD_FW;
2512 return 0;
2513}
2514
2515
2516static int __init
2517fore200e_register(struct fore200e* fore200e)
2518{
2519 struct atm_dev* atm_dev;
2520
2521 DPRINTK(2, "device %s being registered\n", fore200e->name);
2522
2523 atm_dev = atm_dev_register(fore200e->bus->proc_name, &fore200e_ops, -1,
2524 NULL);
2525 if (atm_dev == NULL) {
2526 printk(FORE200E "unable to register device %s\n", fore200e->name);
2527 return -ENODEV;
2528 }
2529
2530 FORE200E_DEV(atm_dev) = fore200e;
2531 fore200e->atm_dev = atm_dev;
2532
2533 atm_dev->ci_range.vpi_bits = 8;
2534 atm_dev->ci_range.vci_bits = 10;
2535
2536 fore200e->available_cell_rate = ATM_OC3_PCR;
2537
2538 fore200e->state = FORE200E_STATE_REGISTER;
2539 return 0;
2540}
2541
2542
2543static int __init
2544fore200e_init(struct fore200e* fore200e)
2545{
2546 if (fore200e_register(fore200e) < 0)
2547 return -ENODEV;
2548
2549 if (fore200e->bus->configure(fore200e) < 0)
2550 return -ENODEV;
2551
2552 if (fore200e->bus->map(fore200e) < 0)
2553 return -ENODEV;
2554
2555 if (fore200e_reset(fore200e, 1) < 0)
2556 return -ENODEV;
2557
2558 if (fore200e_load_fw(fore200e) < 0)
2559 return -ENODEV;
2560
2561 if (fore200e_start_fw(fore200e) < 0)
2562 return -ENODEV;
2563
2564 if (fore200e_initialize(fore200e) < 0)
2565 return -ENODEV;
2566
2567 if (fore200e_init_cmd_queue(fore200e) < 0)
2568 return -ENOMEM;
2569
2570 if (fore200e_init_tx_queue(fore200e) < 0)
2571 return -ENOMEM;
2572
2573 if (fore200e_init_rx_queue(fore200e) < 0)
2574 return -ENOMEM;
2575
2576 if (fore200e_init_bs_queue(fore200e) < 0)
2577 return -ENOMEM;
2578
2579 if (fore200e_alloc_rx_buf(fore200e) < 0)
2580 return -ENOMEM;
2581
2582 if (fore200e_get_esi(fore200e) < 0)
2583 return -EIO;
2584
2585 if (fore200e_irq_request(fore200e) < 0)
2586 return -EBUSY;
2587
2588 fore200e_supply(fore200e);
2589
2590
2591 fore200e->state = FORE200E_STATE_COMPLETE;
2592 return 0;
2593}
2594
2595
2596int __init
2597fore200e_detect(void)
2598{
2599 const struct fore200e_bus* bus;
2600 struct fore200e* fore200e;
2601 int index, link;
2602
2603 printk(FORE200E "FORE Systems 200E-series driver - version " FORE200E_VERSION "\n");
2604
2605
2606 for (link = 0, bus = fore200e_bus; bus->model_name; bus++) {
2607
2608
2609 for (index = 0; (fore200e = bus->detect(bus, index)); index++) {
2610
2611 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2612 fore200e->bus->model_name,
2613 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2614
2615 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2616
2617 if (fore200e_init(fore200e) < 0) {
2618
2619 fore200e_shutdown(fore200e);
2620 break;
2621 }
2622
2623 link++;
2624
2625 fore200e->next = fore200e_boards;
2626 fore200e_boards = fore200e;
2627 }
2628 }
2629
2630 return link;
2631}
2632
2633
2634#ifdef MODULE
2635static void
2636fore200e_cleanup(struct fore200e** head)
2637{
2638 struct fore200e* fore200e = *head;
2639
2640 fore200e_shutdown(fore200e);
2641
2642 *head = fore200e->next;
2643
2644 kfree(fore200e);
2645}
2646#endif
2647
2648
2649static int
2650fore200e_proc_read(struct atm_dev *dev,loff_t* pos,char* page)
2651{
2652 unsigned long flags;
2653 struct fore200e* fore200e = FORE200E_DEV(dev);
2654 int len, left = *pos;
2655
2656 if (!left--) {
2657
2658 if (fore200e_getstats(fore200e) < 0)
2659 return -EIO;
2660
2661 len = sprintf(page,"\n"
2662 " device:\n"
2663 " internal name:\t\t%s\n", fore200e->name);
2664
2665
2666 if (fore200e->bus->proc_read)
2667 len += fore200e->bus->proc_read(fore200e, page + len);
2668
2669 len += sprintf(page + len,
2670 " interrupt line:\t\t%s\n"
2671 " physical base address:\t0x%p\n"
2672 " virtual base address:\t0x%p\n"
2673 " factory address (ESI):\t%02x:%02x:%02x:%02x:%02x:%02x\n"
2674 " board serial number:\t\t%d\n\n",
2675 fore200e_irq_itoa(fore200e->irq),
2676 (void*)fore200e->phys_base,
2677 (void*)fore200e->virt_base,
2678 fore200e->esi[0], fore200e->esi[1], fore200e->esi[2],
2679 fore200e->esi[3], fore200e->esi[4], fore200e->esi[5],
2680 fore200e->esi[4] * 256 + fore200e->esi[5]);
2681
2682 return len;
2683 }
2684
2685 if (!left--)
2686 return sprintf(page,
2687 " supplied small bufs (1):\t%d\n"
2688 " supplied large bufs (1):\t%d\n"
2689 " supplied small bufs (2):\t%d\n"
2690 " supplied large bufs (2):\t%d\n",
2691 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].count,
2692 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].count,
2693 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].count,
2694 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].count);
2695 if (!left--) {
2696 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2697
2698 len = sprintf(page,"\n\n"
2699 " cell processor:\n"
2700 " heartbeat state:\t\t");
2701
2702 if (hb >> 16 != 0xDEAD)
2703 len += sprintf(page + len, "0x%08x\n", hb);
2704 else
2705 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2706
2707 return len;
2708 }
2709
2710 if (!left--) {
2711 static const char* media_name[] = {
2712 "unshielded twisted pair",
2713 "multimode optical fiber ST",
2714 "multimode optical fiber SC",
2715 "single-mode optical fiber ST",
2716 "single-mode optical fiber SC",
2717 "unknown"
2718 };
2719
2720 static const char* oc3_mode[] = {
2721 "normal operation",
2722 "diagnostic loopback",
2723 "line loopback",
2724 "unknown"
2725 };
2726
2727 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2728 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2729 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2730 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2731 u32 oc3_index;
2732
2733 if (media_index < 0 || media_index > 4)
2734 media_index = 5;
2735
2736 switch (fore200e->loop_mode) {
2737 case ATM_LM_NONE: oc3_index = 0;
2738 break;
2739 case ATM_LM_LOC_PHY: oc3_index = 1;
2740 break;
2741 case ATM_LM_RMT_PHY: oc3_index = 2;
2742 break;
2743 default: oc3_index = 3;
2744 }
2745
2746 return sprintf(page,
2747 " firmware release:\t\t%d.%d.%d\n"
2748 " monitor release:\t\t%d.%d\n"
2749 " media type:\t\t\t%s\n"
2750 " OC-3 revision:\t\t0x%x\n"
2751 " OC-3 mode:\t\t\t%s",
2752 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2753 mon960_release >> 16, mon960_release << 16 >> 16,
2754 media_name[ media_index ],
2755 oc3_revision,
2756 oc3_mode[ oc3_index ]);
2757 }
2758
2759 if (!left--) {
2760 struct cp_monitor* cp_monitor = fore200e->cp_monitor;
2761
2762 return sprintf(page,
2763 "\n\n"
2764 " monitor:\n"
2765 " version number:\t\t%d\n"
2766 " boot status word:\t\t0x%08x\n",
2767 fore200e->bus->read(&cp_monitor->mon_version),
2768 fore200e->bus->read(&cp_monitor->bstat));
2769 }
2770
2771 if (!left--)
2772 return sprintf(page,
2773 "\n"
2774 " device statistics:\n"
2775 " 4b5b:\n"
2776 " crc_header_errors:\t\t%10u\n"
2777 " framing_errors:\t\t%10u\n",
2778 fore200e_swap(fore200e->stats->phy.crc_header_errors),
2779 fore200e_swap(fore200e->stats->phy.framing_errors));
2780
2781 if (!left--)
2782 return sprintf(page, "\n"
2783 " OC-3:\n"
2784 " section_bip8_errors:\t%10u\n"
2785 " path_bip8_errors:\t\t%10u\n"
2786 " line_bip24_errors:\t\t%10u\n"
2787 " line_febe_errors:\t\t%10u\n"
2788 " path_febe_errors:\t\t%10u\n"
2789 " corr_hcs_errors:\t\t%10u\n"
2790 " ucorr_hcs_errors:\t\t%10u\n",
2791 fore200e_swap(fore200e->stats->oc3.section_bip8_errors),
2792 fore200e_swap(fore200e->stats->oc3.path_bip8_errors),
2793 fore200e_swap(fore200e->stats->oc3.line_bip24_errors),
2794 fore200e_swap(fore200e->stats->oc3.line_febe_errors),
2795 fore200e_swap(fore200e->stats->oc3.path_febe_errors),
2796 fore200e_swap(fore200e->stats->oc3.corr_hcs_errors),
2797 fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors));
2798
2799 if (!left--)
2800 return sprintf(page,"\n"
2801 " ATM:\t\t\t\t cells\n"
2802 " TX:\t\t\t%10u\n"
2803 " RX:\t\t\t%10u\n"
2804 " vpi out of range:\t\t%10u\n"
2805 " vpi no conn:\t\t%10u\n"
2806 " vci out of range:\t\t%10u\n"
2807 " vci no conn:\t\t%10u\n",
2808 fore200e_swap(fore200e->stats->atm.cells_transmitted),
2809 fore200e_swap(fore200e->stats->atm.cells_received),
2810 fore200e_swap(fore200e->stats->atm.vpi_bad_range),
2811 fore200e_swap(fore200e->stats->atm.vpi_no_conn),
2812 fore200e_swap(fore200e->stats->atm.vci_bad_range),
2813 fore200e_swap(fore200e->stats->atm.vci_no_conn));
2814
2815 if (!left--)
2816 return sprintf(page,"\n"
2817 " AAL0:\t\t\t cells\n"
2818 " TX:\t\t\t%10u\n"
2819 " RX:\t\t\t%10u\n"
2820 " dropped:\t\t\t%10u\n",
2821 fore200e_swap(fore200e->stats->aal0.cells_transmitted),
2822 fore200e_swap(fore200e->stats->aal0.cells_received),
2823 fore200e_swap(fore200e->stats->aal0.cells_dropped));
2824
2825 if (!left--)
2826 return sprintf(page,"\n"
2827 " AAL3/4:\n"
2828 " SAR sublayer:\t\t cells\n"
2829 " TX:\t\t\t%10u\n"
2830 " RX:\t\t\t%10u\n"
2831 " dropped:\t\t\t%10u\n"
2832 " CRC errors:\t\t%10u\n"
2833 " protocol errors:\t\t%10u\n\n"
2834 " CS sublayer:\t\t PDUs\n"
2835 " TX:\t\t\t%10u\n"
2836 " RX:\t\t\t%10u\n"
2837 " dropped:\t\t\t%10u\n"
2838 " protocol errors:\t\t%10u\n",
2839 fore200e_swap(fore200e->stats->aal34.cells_transmitted),
2840 fore200e_swap(fore200e->stats->aal34.cells_received),
2841 fore200e_swap(fore200e->stats->aal34.cells_dropped),
2842 fore200e_swap(fore200e->stats->aal34.cells_crc_errors),
2843 fore200e_swap(fore200e->stats->aal34.cells_protocol_errors),
2844 fore200e_swap(fore200e->stats->aal34.cspdus_transmitted),
2845 fore200e_swap(fore200e->stats->aal34.cspdus_received),
2846 fore200e_swap(fore200e->stats->aal34.cspdus_dropped),
2847 fore200e_swap(fore200e->stats->aal34.cspdus_protocol_errors));
2848
2849 if (!left--)
2850 return sprintf(page,"\n"
2851 " AAL5:\n"
2852 " SAR sublayer:\t\t cells\n"
2853 " TX:\t\t\t%10u\n"
2854 " RX:\t\t\t%10u\n"
2855 " dropped:\t\t\t%10u\n"
2856 " congestions:\t\t%10u\n\n"
2857 " CS sublayer:\t\t PDUs\n"
2858 " TX:\t\t\t%10u\n"
2859 " RX:\t\t\t%10u\n"
2860 " dropped:\t\t\t%10u\n"
2861 " CRC errors:\t\t%10u\n"
2862 " protocol errors:\t\t%10u\n",
2863 fore200e_swap(fore200e->stats->aal5.cells_transmitted),
2864 fore200e_swap(fore200e->stats->aal5.cells_received),
2865 fore200e_swap(fore200e->stats->aal5.cells_dropped),
2866 fore200e_swap(fore200e->stats->aal5.congestion_experienced),
2867 fore200e_swap(fore200e->stats->aal5.cspdus_transmitted),
2868 fore200e_swap(fore200e->stats->aal5.cspdus_received),
2869 fore200e_swap(fore200e->stats->aal5.cspdus_dropped),
2870 fore200e_swap(fore200e->stats->aal5.cspdus_crc_errors),
2871 fore200e_swap(fore200e->stats->aal5.cspdus_protocol_errors));
2872
2873 if (!left--)
2874 return sprintf(page,"\n"
2875 " AUX:\t\t allocation failures\n"
2876 " small b1:\t\t\t%10u\n"
2877 " large b1:\t\t\t%10u\n"
2878 " small b2:\t\t\t%10u\n"
2879 " large b2:\t\t\t%10u\n"
2880 " RX PDUs:\t\t\t%10u\n",
2881 fore200e_swap(fore200e->stats->aux.small_b1_failed),
2882 fore200e_swap(fore200e->stats->aux.large_b1_failed),
2883 fore200e_swap(fore200e->stats->aux.small_b2_failed),
2884 fore200e_swap(fore200e->stats->aux.large_b2_failed),
2885 fore200e_swap(fore200e->stats->aux.rpd_alloc_failed));
2886
2887 if (!left--)
2888 return sprintf(page,"\n"
2889 " receive carrier:\t\t\t%s\n",
2890 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
2891
2892 if (!left--) {
2893 struct atm_vcc *vcc;
2894 struct fore200e_vcc* fore200e_vcc;
2895
2896 len = sprintf(page,"\n"
2897 " VCCs:\n address\tVPI.VCI:AAL\t(min/max tx PDU size) (min/max rx PDU size)\n");
2898
2899 spin_lock_irqsave(&fore200e->atm_dev->lock, flags);
2900 for (vcc = fore200e->atm_dev->vccs; vcc; vcc = vcc->next) {
2901
2902 fore200e_vcc = FORE200E_VCC(vcc);
2903
2904 len += sprintf(page + len,
2905 " %x\t%d.%d:%d\t\t(%d/%d)\t(%d/%d)\n",
2906 (u32)(unsigned long)vcc,
2907 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
2908 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
2909 fore200e_vcc->tx_max_pdu,
2910 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
2911 fore200e_vcc->rx_max_pdu
2912 );
2913 }
2914 spin_unlock_irqrestore(&fore200e->atm_dev->lock, flags);
2915
2916 return len;
2917 }
2918
2919 return 0;
2920}
2921
2922
2923#ifdef MODULE
2924static int __init
2925fore200e_module_init(void)
2926{
2927 DPRINTK(1, "module loaded\n");
2928 return fore200e_detect() == 0;
2929}
2930
2931static void __exit
2932fore200e_module_cleanup(void)
2933{
2934 while (fore200e_boards) {
2935 fore200e_cleanup(&fore200e_boards);
2936 }
2937 DPRINTK(1, "module being removed\n");
2938}
2939
2940module_init(fore200e_module_init);
2941module_exit(fore200e_module_cleanup);
2942#endif
2943
2944
2945static const struct atmdev_ops fore200e_ops =
2946{
2947 open: fore200e_open,
2948 close: fore200e_close,
2949 ioctl: fore200e_ioctl,
2950 getsockopt: fore200e_getsockopt,
2951 setsockopt: fore200e_setsockopt,
2952 send: fore200e_send,
2953 change_qos: fore200e_change_qos,
2954 proc_read: fore200e_proc_read,
2955 owner: THIS_MODULE,
2956};
2957
2958
2959#ifdef CONFIG_ATM_FORE200E_PCA
2960extern const unsigned char _fore200e_pca_fw_data[];
2961extern const unsigned int _fore200e_pca_fw_size;
2962#endif
2963#ifdef CONFIG_ATM_FORE200E_SBA
2964extern const unsigned char _fore200e_sba_fw_data[];
2965extern const unsigned int _fore200e_sba_fw_size;
2966#endif
2967
2968static const struct fore200e_bus fore200e_bus[] = {
2969#ifdef CONFIG_ATM_FORE200E_PCA
2970 { "PCA-200E", "pca200e", 32, 4, 32,
2971 _fore200e_pca_fw_data, &_fore200e_pca_fw_size,
2972 fore200e_pca_read,
2973 fore200e_pca_write,
2974 fore200e_pca_dma_map,
2975 fore200e_pca_dma_unmap,
2976 fore200e_pca_dma_sync,
2977 fore200e_pca_dma_chunk_alloc,
2978 fore200e_pca_dma_chunk_free,
2979 fore200e_pca_detect,
2980 fore200e_pca_configure,
2981 fore200e_pca_map,
2982 fore200e_pca_reset,
2983 fore200e_pca_prom_read,
2984 fore200e_pca_unmap,
2985 NULL,
2986 fore200e_pca_irq_check,
2987 fore200e_pca_irq_ack,
2988 fore200e_pca_proc_read,
2989 },
2990#endif
2991#ifdef CONFIG_ATM_FORE200E_SBA
2992 { "SBA-200E", "sba200e", 32, 64, 32,
2993 _fore200e_sba_fw_data, &_fore200e_sba_fw_size,
2994 fore200e_sba_read,
2995 fore200e_sba_write,
2996 fore200e_sba_dma_map,
2997 fore200e_sba_dma_unmap,
2998 fore200e_sba_dma_sync,
2999 fore200e_sba_dma_chunk_alloc,
3000 fore200e_sba_dma_chunk_free,
3001 fore200e_sba_detect,
3002 fore200e_sba_configure,
3003 fore200e_sba_map,
3004 fore200e_sba_reset,
3005 fore200e_sba_prom_read,
3006 fore200e_sba_unmap,
3007 fore200e_sba_irq_enable,
3008 fore200e_sba_irq_check,
3009 fore200e_sba_irq_ack,
3010 fore200e_sba_proc_read,
3011 },
3012#endif
3013 {}
3014};
3015
3016MODULE_LICENSE("GPL");
3017