1/* 2 * Low-Level PCI Access for i386 machines. 3 * 4 * (c) 1999 Martin Mares <mj@ucw.cz> 5 */ 6 7#undef DEBUG 8 9#ifdef DEBUG 10#define DBG(x...) printk(x) 11#else 12#define DBG(x...) 13#endif 14 15#define PCI_PROBE_BIOS 0x0001 16#define PCI_PROBE_CONF1 0x0002 17#define PCI_PROBE_CONF2 0x0004 18#define PCI_NO_SORT 0x0100 19#define PCI_BIOS_SORT 0x0200 20#define PCI_NO_CHECKS 0x0400 21#define PCI_ASSIGN_ROMS 0x1000 22#define PCI_BIOS_IRQ_SCAN 0x2000 23#define PCI_ASSIGN_ALL_BUSSES 0x4000 24 25extern unsigned int pci_probe; 26 27/* pci-i386.c */ 28 29extern unsigned int pcibios_max_latency; 30 31void pcibios_resource_survey(void); 32int pcibios_enable_resources(struct pci_dev *, int); 33 34/* pci-pc.c */ 35 36extern int pcibios_last_bus; 37extern struct pci_bus *pci_root_bus; 38extern struct pci_ops *pci_root_ops; 39 40/* pci-irq.c */ 41 42struct irq_info { 43 u8 bus, devfn; /* Bus, device and function */ 44 struct { 45 u8 link; /* IRQ line ID, chipset dependent, 0=not routed */ 46 u16 bitmap; /* Available IRQs */ 47 } __attribute__((packed)) irq[4]; 48 u8 slot; /* Slot number, 0=onboard */ 49 u8 rfu; 50} __attribute__((packed)); 51 52struct irq_routing_table { 53 u32 signature; /* PIRQ_SIGNATURE should be here */ 54 u16 version; /* PIRQ_VERSION */ 55 u16 size; /* Table size in bytes */ 56 u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */ 57 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */ 58 u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */ 59 u32 miniport_data; /* Crap */ 60 u8 rfu[11]; 61 u8 checksum; /* Modulo 256 checksum must give zero */ 62 struct irq_info slots[0]; 63} __attribute__((packed)); 64 65extern unsigned int pcibios_irq_mask; 66 67void pcibios_irq_init(void); 68void pcibios_fixup_irqs(void); 69void pcibios_enable_irq(struct pci_dev *dev); 70