LXR linux-old/include/asm-parisc/pdc.h

   1#ifndef _PARISC_PDC_H
   2#define _PARISC_PDC_H
   3
   4/*
   5    PDC entry points...
   6*/
   7
   8#define PDC_POW_FAIL    1               /* perform a power-fail         */
   9#define PDC_POW_FAIL_PREPARE    0       /* prepare for powerfail        */
  10
  11#define PDC_CHASSIS     2               /* PDC-chassis functions        */
  12#define PDC_CHASSIS_DISP        0       /* update chassis display       */
  13#define PDC_CHASSIS_WARN        1       /* return chassis warnings      */
  14#define PDC_CHASSIS_DISPWARN    2       /* update&return chassis status */
  15#define PDC_RETURN_CHASSIS_INFO 128     /* HVERSION dependend: return chassis LED/LCD info  */
  16
  17#define PDC_PIM         3               /* Get PIM data                 */
  18#define PDC_PIM_HPMC            0       /* Transfer HPMC data           */
  19#define PDC_PIM_RETURN_SIZE     1       /* Get Max buffer needed for PIM*/
  20#define PDC_PIM_LPMC            2       /* Transfer HPMC data           */
  21#define PDC_PIM_SOFT_BOOT       3       /* Transfer Soft Boot data      */
  22#define PDC_PIM_TOC             4       /* Transfer TOC data            */
  23
  24#define PDC_MODEL       4               /* PDC model information call   */
  25#define PDC_MODEL_INFO          0       /* returns information          */
  26#define PDC_MODEL_BOOTID        1       /* set the BOOT_ID              */
  27#define PDC_MODEL_VERSIONS      2       /* returns cpu-internal versions*/
  28#define PDC_MODEL_SYSMODEL      3       /* return system model info     */
  29#define PDC_MODEL_ENSPEC        4       /* ??? */
  30#define PDC_MODEL_DISPEC        5       /* ??? */
  31#define PDC_MODEL_CPU_ID        6       /* returns cpu-id (only newer machines!) */
  32#define PDC_MODEL_CAPABILITIES  7       /* returns OS32/OS64-flags      */
  33#define PDC_MODEL_GET_BOOT__OP  8       /* returns boot test options    */
  34#define PDC_MODEL_SET_BOOT__OP  9       /* set boot test options        */
  35
  36#define PDC_CACHE       5               /* return/set cache (& TLB) info*/
  37#define PDC_CACHE_INFO          0       /* returns information          */
  38#define PDC_CACHE_SET_COH       1       /* set coherence state          */
  39#define PDC_CACHE_RET_SPID      2       /* returns space-ID bits        */
  40
  41#define PDC_HPA  6              /* return HPA of processor */
  42#define PDC_HPA_PROCESSOR       0
  43#define PDC_HPA_MODULES  1
  44
  45#define PDC_IODC        8       /* talk to IODC */
  46#define PDC_IODC_READ      0       /* read IODC entry point */
  47/*      PDC_IODC_RI_*                 INDEX parameter of PDC_IODC_READ   */
  48#define PDC_IODC_RI_DATA_BYTES  0       /* IODC Data Bytes                  */
  49/*                              1, 2       obsolete - HVERSION dependent      */
  50#define PDC_IODC_RI_INIT        3       /* Initialize module              */
  51#define PDC_IODC_RI_IO          4       /* Module input/output          */
  52#define PDC_IODC_RI_SPA         5       /* Module input/output          */
  53#define PDC_IODC_RI_CONFIG      6       /* Module input/output          */
  54/*                              7         obsolete - HVERSION dependent      */
  55#define PDC_IODC_RI_TEST        8       /* Module input/output          */
  56#define PDC_IODC_RI_TLB         9       /* Module input/output          */
  57#define PDC_IODC_NINIT    2       /* non-destructive init */
  58#define PDC_IODC_DINIT    3       /* destructive init */
  59#define PDC_IODC_MEMERR  4       /* check for memory errors */
  60#define PDC_IODC_INDEX_DATA     0       /* get first 16 bytes from mod IODC */
  61#define PDC_IODC_BUS_ERROR      -4      /* bus error return value */
  62#define PDC_IODC_INVALID_INDEX  -5      /* invalid index return value */
  63#define PDC_IODC_COUNT    -6      /* count is too small */
  64
  65#define PDC_TOD         9               /* time-of-day clock (TOD) */
  66#define PDC_TOD_READ            0       /* read TOD  */
  67#define PDC_TOD_WRITE           1       /* write TOD */
  68#define PDC_TOD_ITIMER          2       /* calibrate Interval Timer (CR16) */
  69
  70#define PDC_ADD_VALID   12              /* Memory validation PDC call */
  71#define PDC_ADD_VALID_VERIFY  0         /* Make PDC_ADD_VALID verify region */
  72
  73#define PDC_INSTR       15              /* get instr to invoke PDCE_CHECK() */
  74
  75#define PDC_BLOCK_TLB   18              /* manage hardware block-TLB    */
  76#define PDC_BTLB_INFO           0       /* returns parameter            */
  77#define PDC_BTLB_INSERT         1       /* insert BTLB entry            */
  78#define PDC_BTLB_PURGE          2       /* purge BTLB entries           */
  79#define PDC_BTLB_PURGE_ALL      3       /* purge all BTLB entries       */
  80
  81#define PDC_TLB         19              /* manage hardware TLB miss handling */
  82#define PDC_TLB_INFO            0       /* returns parameter            */
  83#define PDC_TLB_SETUP           1       /* set up miss handling         */
  84
  85#define PDC_SYSTEM_MAP  22              /* find system modules */
  86#define PDC_FIND_MODULE         0
  87
  88
  89/* HVERSION dependent */
  90
  91#define PDC_IO                  135     /* log error info, reset IO system  */
  92
  93#define PDC_BROADCAST_RESET     136     /* reset all processors      */
  94#define PDC_DO_RESET            0UL     /* option: perform a broadcast reset */
  95#define PDC_DO_FIRM_TEST_RESET  1UL     /* Do broadcast reset with bitmap */
  96#define PDC_BR_RECONFIGURATION  2UL     /* reset w/reconfiguration */
  97#define PDC_FIRM_TEST_MAGIC     0xab9ec36fUL    /* for this reboot only */
  98
  99#define PDC_LAN_STATION_ID      138     /* Hversion dependent mechanism for */
 100#define PDC_LAN_STATION_ID_READ 0       /* getting the lan station address  */
 101
 102#define PDC_LAN_STATION_ID_SIZE 6
 103
 104/* Legacy PDC definitions for same stuff */
 105#define PDC_PCI_INDEX              147UL
 106#define PDC_PCI_GET_INT_TBL_SIZE        13UL
 107#define PDC_PCI_GET_INT_TBL          14UL
 108
 109/* generic error codes returned by all PDC-functions */
 110
 111#define PDC_WARN            3  /* Call completed with a warning */
 112#define PDC_REQ_ERR_1       2  /* See above */
 113#define PDC_REQ_ERR_0       1  /* Call would generate a requestor error */
 114#define PDC_OK        0  /* Call completed successfully */
 115#define PDC_BAD_PROC       -1  /* Called non-existant procedure */
 116#define PDC_BAD_OPTION     -2  /* Called with non-existant option */
 117#define PDC_ERROR         -3  /* Call could not complete without an error */
 118#define PDC_INVALID_ARG   -10  /* Called with an invalid argument */
 119#define PDC_BUS_POW_WARN  -12  /* Call could not complete in allowed power budget */
 120
 121
 122/* The following are from the HPUX .h files, and are just for
 123compatibility */
 124
 125#define PDC_RET_OK       0L     /* Call completed successfully */
 126#define PDC_RET_NE_PROC -1L     /* Non-existent procedure */
 127#define PDC_RET_NE_OPT  -2L     /* non-existant option - arg1 */
 128#define PDC_RET_NE_MOD  -5L     /* Module not found */
 129#define PDC_RET_NE_CELL_MOD -7L /* Cell module not found */
 130#define PDC_RET_INV_ARG -10L    /* Invalid argument */
 131#define PDC_RET_NOT_NARROW -17L /* Narrow mode not supported */
 132
 133
 134/* Error codes for PDC_ADD_VALID */
 135
 136#define PDC_ADD_VALID_WARN          3  /* Call completed with a warning */
 137#define PDC_ADD_VALID_REQ_ERR_1       2  /* See above */
 138#define PDC_ADD_VALID_REQ_ERR_0       1  /* Call would generate a requestor error */
 139#define PDC_ADD_VALID_OK              0  /* Call completed successfully */
 140#define PDC_ADD_VALID_BAD_OPTION     -2  /* Called with non-existant option */
 141#define PDC_ADD_VALID_ERROR       -3  /* Call could not complete without an error */
 142#define PDC_ADD_VALID_INVALID_ARG   -10  /* Called with an invalid argument */
 143#define PDC_ADD_VALID_BUS_POW_WARN  -12  /* Call could not complete in allowed power budget */
 144
 145/* The PDC_MEM_MAP calls */
 146
 147#define PDC_MEM_MAP         128
 148#define PDC_MEM_MAP_HPA         0
 149
 150/* constants for OS (NVM...) */
 151#define OS_ID_NONE      0
 152#define OS_ID_HPUX      1
 153#define OS_ID_MPEXL     2
 154#define OS_ID_OSF       3
 155#define OS_ID_LINUX     OS_ID_HPUX
 156
 157/* constants for PDC_CHASSIS */
 158#define OSTAT_OFF                     0
 159#define OSTAT_FLT                     1 
 160#define OSTAT_TEST                   2
 161#define OSTAT_INIT                   3
 162#define OSTAT_SHUT                   4
 163#define OSTAT_WARN                   5
 164#define OSTAT_RUN                     6
 165#define OSTAT_ON                       7
 166
 167#ifndef __ASSEMBLY__
 168
 169#include <linux/types.h>
 170
 171struct pdc_model {              /* for PDC_MODEL */
 172        unsigned long hversion;
 173        unsigned long sversion;
 174        unsigned long hw_id;
 175        unsigned long boot_id;
 176        unsigned long sw_id;
 177        unsigned long sw_cap;
 178        unsigned long arch_rev;
 179        unsigned long pot_key;
 180        unsigned long curr_key;
 181        unsigned long pad[32-9];
 182} __attribute__((aligned(8))) ;
 183
 184
 185#if 0
 186struct pdc_chassis_warn {               /* for PDC_CHASSIS */
 187        unsigned long warn;
 188        unsigned long pad[32-1];
 189} __attribute__((aligned(8))) ;
 190#endif
 191
 192struct pdc_model_sysmodel {     /* for PDC_MODEL_SYSMODEL */
 193        unsigned long mod_len;
 194        unsigned long pad[32-1];
 195} __attribute__((aligned(8))) ;
 196
 197struct pdc_model_cpuid   {      /* for PDC_MODEL_CPU_ID */
 198        unsigned long cpuid;
 199        unsigned long pad[32-1];
 200} __attribute__((aligned(8))) ;
 201
 202struct pdc_cache_cf {           /* for PDC_CACHE  (I/D-caches) */
 203    unsigned long
 204#ifdef __LP64__
 205                cc_padW:32,
 206#endif
 207                cc_alias:4,     /* alias boundaries for virtual adresses   */
 208                cc_block: 4,    /* to determine most efficient stride */
 209                cc_line : 3,    /* maximum amount written back as a result of store (multiple of 16 bytes) */
 210                cc_pad0 : 2,    /* reserved */
 211                cc_wt   : 1,    /* 0 = WT-Dcache, 1 = WB-Dcache */
 212                cc_sh   : 2,    /* 0 = separate I/D-cache, else shared I/D-cache */
 213                cc_cst  : 3,    /* 0 = incoherent D-cache, 1=coherent D-cache */
 214                cc_pad1 : 5,    /* reserved */
 215                cc_assoc: 8;    /* associativity of I/D-cache */
 216};
 217
 218struct pdc_tlb_cf {             /* for PDC_CACHE (I/D-TLB's) */
 219    unsigned long tc_pad0:12,   /* reserved */
 220#ifdef __LP64__
 221                tc_padW:32,
 222#endif
 223                tc_sh   : 2,    /* 0 = separate I/D-TLB, else shared I/D-TLB */
 224                tc_hv   : 1,    /* HV */
 225                tc_page : 1,    /* 0 = 2K page-size-machine, 1 = 4k page size */
 226                tc_cst  : 3,    /* 0 = incoherent operations, else coherent operations */
 227                tc_aid  : 5,    /* ITLB: width of access ids of processor (encoded!) */
 228                tc_pad1 : 8;    /* ITLB: width of space-registers (encoded) */
 229};
 230
 231struct pdc_cache_info {         /* main-PDC_CACHE-structure (caches & TLB's) */
 232        /* I-cache */
 233        unsigned long   ic_size;        /* size in bytes */
 234        struct pdc_cache_cf ic_conf;    /* configuration */
 235        unsigned long   ic_base;        /* base-addr */
 236        unsigned long   ic_stride;
 237        unsigned long   ic_count;
 238        unsigned long   ic_loop;
 239        /* D-cache */
 240        unsigned long   dc_size;        /* size in bytes */
 241        struct pdc_cache_cf dc_conf;    /* configuration */
 242        unsigned long   dc_base;        /* base-addr */
 243        unsigned long   dc_stride;
 244        unsigned long   dc_count;
 245        unsigned long   dc_loop;
 246        /* Instruction-TLB */
 247        unsigned long   it_size;        /* number of entries in I-TLB */
 248        struct pdc_tlb_cf it_conf;      /* I-TLB-configuration */
 249        unsigned long   it_sp_base;
 250        unsigned long   it_sp_stride;
 251        unsigned long   it_sp_count;
 252        unsigned long   it_off_base;
 253        unsigned long   it_off_stride;
 254        unsigned long   it_off_count;
 255        unsigned long   it_loop;
 256        /* data-TLB */
 257        unsigned long   dt_size;        /* number of entries in D-TLB */
 258        struct pdc_tlb_cf dt_conf;      /* D-TLB-configuration */
 259        unsigned long   dt_sp_base;
 260        unsigned long   dt_sp_stride;
 261        unsigned long   dt_sp_count;
 262        unsigned long   dt_off_base;
 263        unsigned long   dt_off_stride;
 264        unsigned long   dt_off_count;
 265        unsigned long   dt_loop;
 266        /* padded to 32 entries... */
 267        unsigned long   pad[32-30];
 268} __attribute__((aligned(8))) ;
 269
 270struct pdc_hpa {      /* PDC_HPA */
 271        unsigned long   hpa;
 272        unsigned long   filler[31];
 273} __attribute__((aligned(8))) ;
 274
 275#if 0
 276/* If you start using the next struct, you'll have to adjust it to
 277 * work with 64-bit firmware I think -PB
 278 */
 279struct pdc_iodc {     /* PDC_IODC */
 280        unsigned char   hversion_model;
 281        unsigned char   hversion;
 282        unsigned char   spa;
 283        unsigned char   type;
 284        unsigned int    sversion_rev:4;
 285        unsigned int    sversion_model:19;
 286        unsigned int    sversion_opt:8;
 287        unsigned char   rev;
 288        unsigned char   dep;
 289        unsigned char   features;
 290        unsigned char   filler1;
 291        unsigned int    checksum:16;
 292        unsigned int    length:16;
 293        unsigned int    filler[15];
 294} __attribute__((aligned(8))) ;
 295#endif
 296
 297#ifndef __LP64__
 298/* no BLTBs in pa2.0 processors */
 299struct pdc_btlb_info_range {
 300        __u8 res00;
 301        __u8 num_i;
 302        __u8 num_d;
 303        __u8 num_comb;
 304};
 305
 306struct pdc_btlb_info {  /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
 307        unsigned int min_size;  /* minimum size of BTLB in pages */
 308        unsigned int max_size;  /* maximum size of BTLB in pages */
 309        struct pdc_btlb_info_range fixed_range_info;
 310        struct pdc_btlb_info_range variable_range_info;
 311        unsigned int pad[32-4];
 312} __attribute__((aligned(8))) ;
 313#endif
 314
 315struct pdc_tlb {                /* for PDC_TLB */
 316        unsigned long min_size;
 317        unsigned long max_size;
 318        unsigned long pad[32-2];
 319} __attribute__((aligned(8))) ;
 320
 321struct pdc_system_map { /* PDC_SYTEM_MAP/FIND_MODULE */
 322        void * mod_addr;
 323        unsigned long mod_pgs;
 324        unsigned long add_addrs;
 325        unsigned long filler[29];
 326} __attribute__((aligned(8))) ;
 327
 328/*
 329 * Device path specifications used by PDC.
 330 */
 331struct pdc_module_path {
 332        char  flags;    /* see bit definitions below */
 333        char  bc[6];    /* Bus Converter routing info to a specific */
 334                        /* I/O adaptor (< 0 means none, > 63 resvd) */
 335        char  mod;      /* fixed field of specified module */
 336        unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
 337} __attribute__((aligned(8))) ;
 338
 339#ifndef __LP64__
 340/* Probably needs 64-bit porting -PB */
 341struct pdc_memory_map { /* PDC_MEMORY_MAP */
 342        unsigned int hpa;       /* mod's register set address */
 343        unsigned int more_pgs;  /* number of additional I/O pgs */
 344} __attribute__((aligned(8))) ;
 345
 346struct pdc_lan_station_id {     /* PDC_LAN_STATION_ID */
 347        unsigned char addr[PDC_LAN_STATION_ID_SIZE];
 348        unsigned char pad0[2];
 349        int pad1[30];
 350};
 351#endif
 352
 353struct pdc_tod {
 354        unsigned long tod_sec; 
 355        unsigned long tod_usec;
 356        long pad[30];
 357} __attribute__((aligned(8))) ;
 358
 359/* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
 360
 361struct pdc_hpmc_pim_11 { /* PDC_PIM */
 362        __u32 gr[32];
 363        __u32 cr[32];
 364        __u32 sr[8];
 365        __u32 iasq_back;
 366        __u32 iaoq_back;
 367        __u32 check_type;
 368        __u32 cpu_state;
 369        __u32 rsvd1;
 370        __u32 cache_check;
 371        __u32 tlb_check;
 372        __u32 bus_check;
 373        __u32 assists_check;
 374        __u32 rsvd2;
 375        __u32 assist_state;
 376        __u32 responder_addr;
 377        __u32 requestor_addr;
 378        __u32 path_info;
 379        __u64 fr[32];
 380};
 381
 382/*
 383 * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
 384 *
 385 * Note that PDC_PIM doesn't care whether or not wide mode was enabled
 386 * so the results are different on  PA1.1 vs. PA2.0 when in narrow mode.
 387 *
 388 * Note also that there are unarchitected results available, which
 389 * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
 390 * the firmware is probably the best way of printing hversion dependent
 391 * data.
 392 */
 393
 394struct pdc_hpmc_pim_20 { /* PDC_PIM */
 395        __u64 gr[32];
 396        __u64 cr[32];
 397        __u64 sr[8];
 398        __u64 iasq_back;
 399        __u64 iaoq_back;
 400        __u32 check_type;
 401        __u32 cpu_state;
 402        __u32 cache_check;
 403        __u32 tlb_check;
 404        __u32 bus_check;
 405        __u32 assists_check;
 406        __u32 assist_state;
 407        __u32 path_info;
 408        __u64 responder_addr;
 409        __u64 requestor_addr;
 410        __u64 fr[32];
 411};
 412
 413#endif /* __ASSEMBLY__ */
 414
 415/* flags of the device_path (see below) */
 416#define PF_AUTOBOOT     0x80
 417#define PF_AUTOSEARCH   0x40
 418#define PF_TIMER        0x0F
 419
 420#ifndef __ASSEMBLY__
 421
 422struct device_path {            /* page 1-69 */
 423        unsigned char flags;    /* flags see above! */
 424        unsigned char bc[6];    /* bus converter routing info */
 425        unsigned char mod;
 426        unsigned int  layers[6];/* device-specific layer-info */
 427} __attribute__((aligned(8))) ;
 428
 429struct pz_device {
 430        struct  device_path dp; /* see above */
 431        /* struct       iomod *hpa; */
 432        unsigned int hpa;       /* HPA base address */
 433        /* char *spa; */
 434        unsigned int spa;       /* SPA base address */
 435        /* int  (*iodc_io)(struct iomod*, ...); */
 436        unsigned int iodc_io;   /* device entry point */
 437        short   pad;            /* reserved */
 438        unsigned short cl_class;/* see below */
 439} __attribute__((aligned(8))) ;
 440
 441#endif /* __ASSEMBLY__ */
 442
 443/* cl_class
 444 * page 3-33 of IO-Firmware ARS
 445 * IODC ENTRY_INIT(Search first) RET[1]
 446 */
 447#define CL_NULL         0       /* invalid */
 448#define CL_RANDOM       1       /* random access (as disk) */
 449#define CL_SEQU         2       /* sequential access (as tape) */
 450#define CL_DUPLEX       7       /* full-duplex point-to-point (RS-232, Net) */
 451#define CL_KEYBD        8       /* half-duplex console (HIL Keyboard) */
 452#define CL_DISPL        9       /* half-duplex console (display) */
 453#define CL_FC           10      /* FiberChannel access media */
 454
 455#if 0
 456/* FIXME: DEVCLASS_* duplicates CL_* (above).  Delete DEVCLASS_*? */
 457#define DEVCLASS_RANDOM         1
 458#define DEVCLASS_SEQU           2
 459#define DEVCLASS_DUPLEX         7
 460#define DEVCLASS_KEYBD          8
 461#define DEVCLASS_DISP           9
 462#endif
 463
 464/* IODC ENTRY_INIT() */
 465#define ENTRY_INIT_SRCH_FRST    2
 466#define ENTRY_INIT_SRCH_NEXT    3
 467#define ENTRY_INIT_MOD_DEV      4
 468#define ENTRY_INIT_DEV          5
 469#define ENTRY_INIT_MOD          6
 470#define ENTRY_INIT_MSG          9
 471
 472/* IODC ENTRY_IO() */
 473#define ENTRY_IO_BOOTIN         0
 474#define ENTRY_IO_CIN            2
 475#define ENTRY_IO_COUT           3
 476#define ENTRY_IO_CLOSE          4
 477#define ENTRY_IO_GETMSG         9
 478
 479/* IODC ENTRY_SPA() */
 480
 481/* IODC ENTRY_CONFIG() */
 482
 483/* IODC ENTRY_TEST() */
 484
 485/* IODC ENTRY_TLB() */
 486
 487
 488/* DEFINITION OF THE ZERO-PAGE (PAG0) */
 489/* based on work by Jason Eckhardt (jason@equator.com) */
 490
 491#ifndef __ASSEMBLY__
 492
 493#define PAGE0   ((struct zeropage *)0xc0000000)
 494
 495struct zeropage {
 496        /* [0x000] initialize vectors (VEC) */
 497        unsigned int    vec_special;            /* must be zero */
 498        /* int  (*vec_pow_fail)(void);*/
 499        unsigned int    vec_pow_fail; /* power failure handler */
 500        /* int  (*vec_toc)(void); */
 501        unsigned int    vec_toc;
 502        unsigned int    vec_toclen;
 503        /* int  (*vec_rendz)(void); */
 504        unsigned int vec_rendz;
 505        int     vec_pow_fail_flen;
 506        int     vec_pad[10];            
 507        
 508        /* [0x040] reserved processor dependent */
 509        int     pad0[112];
 510
 511        /* [0x200] reserved */
 512        int     pad1[84];
 513
 514        /* [0x350] memory configuration (MC) */
 515        int     memc_cont;              /* contiguous mem size (bytes) */
 516        int     memc_phsize;            /* physical memory size */
 517        int     memc_adsize;            /* additional mem size, bytes of SPA space used by PDC */
 518        unsigned int mem_pdc_hi;        /* used for 64-bit */
 519
 520        /* [0x360] various parameters for the boot-CPU */
 521        /* unsigned int *mem_booterr[8]; */
 522        unsigned int mem_booterr[8];    /* ptr to boot errors */
 523        unsigned int mem_free;          /* first location, where OS can be loaded */
 524        /* struct iomod *mem_hpa; */
 525        unsigned int mem_hpa;           /* HPA of the boot-CPU */
 526        /* int (*mem_pdc)(int, ...); */
 527        unsigned int mem_pdc;           /* PDC entry point */
 528        unsigned int mem_10msec;        /* number of clock ticks in 10msec */
 529
 530        /* [0x390] initial memory module (IMM) */
 531        /* struct iomod *imm_hpa; */
 532        unsigned int imm_hpa;           /* HPA of the IMM */
 533        int     imm_soft_boot;          /* 0 = was hard boot, 1 = was soft boot */
 534        unsigned int    imm_spa_size;           /* SPA size of the IMM in bytes */
 535        unsigned int    imm_max_mem;            /* bytes of mem in IMM */
 536
 537        /* [0x3A0] boot console, display device and keyboard */
 538        struct pz_device mem_cons;      /* description of console device */
 539        struct pz_device mem_boot;      /* description of boot device */
 540        struct pz_device mem_kbd;       /* description of keyboard device */
 541
 542        /* [0x430] reserved */
 543        int     pad430[116];
 544
 545        /* [0x600] processor dependent */
 546        __u32   pad600[1];
 547        __u32   proc_sti;               /* pointer to STI ROM */
 548        __u32   pad608[126];
 549};
 550
 551#endif /* __ASSEMBLY__ */
 552
 553/* Page Zero constant offsets used by the HPMC handler */
 554
 555#define BOOT_CONSOLE_HPA_OFFSET  0x3c0
 556#define BOOT_CONSOLE_SPA_OFFSET  0x3c4
 557#define BOOT_CONSOLE_PATH_OFFSET 0x3a8
 558
 559#ifndef __ASSEMBLY__
 560
 561struct pdc_pat_io_num {
 562        unsigned long num;
 563        unsigned long reserved[31];
 564};
 565
 566
 567
 568extern void pdc_console_init(void);
 569extern int  pdc_getc(void);     /* wait for char */
 570extern void pdc_putc(unsigned char);    /* print char */
 571
 572
 573/* wrapper-functions from pdc.c */
 574
 575int pdc_add_valid(void *address);
 576int pdc_hpa_processor(void *address);
 577#if 0
 578int pdc_hpa_modules(void *address);
 579#endif
 580int pdc_iodc_read(void *address, void *hpa, unsigned int index,
 581                  void *iodc_data, unsigned int iodc_data_size);
 582int pdc_system_map_find_mods(void *pdc_mod_info, void *mod_path, int index);
 583int pdc_model_info(struct pdc_model *model);
 584int pdc_model_sysmodel(char  *name);
 585int pdc_model_cpuid(struct pdc_model_cpuid *cpu_id);
 586int pdc_model_versions(struct pdc_model_cpuid *cpu_id, int id);
 587int pdc_cache_info(struct pdc_cache_info *cache);
 588#ifndef __LP64__
 589int pdc_btlb_info( struct pdc_btlb_info *btlb);
 590int pdc_lan_station_id( char *lan_addr, void *net_hpa);
 591#endif
 592int pdc_mem_map_hpa(void *r_addr, void *mod_path);
 593
 594extern int pdc_chassis_disp(unsigned long disp);
 595extern int pdc_chassis_info(void *pdc_result, void *chassis_info, unsigned long len);
 596
 597#ifdef __LP64__
 598int pdc_pat_get_irt_size(void *r_addr, unsigned long cell_num);
 599int pdc_pat_get_irt(void *r_addr, unsigned long cell_num);
 600#else
 601/* No PAT support for 32-bit kernels...sorry */
 602#define pdc_pat_get_irt_size(r_addr, cell_numn) PDC_RET_NE_PROC
 603#define pdc_pat_get_irt(r_addr, cell_num)       PDC_RET_NE_PROC
 604#endif
 605int pdc_pci_irt_size(void *r_addr, void *hpa);
 606int pdc_pci_irt(void *r_addr, void *hpa, void *tbl);
 607
 608int pdc_tod_read(struct pdc_tod *tod);
 609int pdc_tod_set(unsigned long sec, unsigned long usec);
 610
 611/* on all currently-supported platforms, IODC I/O calls are always
 612 * 32-bit calls, and MEM_PDC calls are always the same width as the OS.
 613 * This means Cxxx boxes can't run wide kernels right now. -PB
 614 *
 615 * Note that some PAT boxes may have 64-bit IODC I/O...
 616 */
 617#ifdef __LP64__
 618#   define mem_pdc_call(args...) real64_call(0L, ##args)
 619#else
 620#   define mem_pdc_call(args...) real32_call(0L, ##args)
 621#endif
 622/* yes 'int', not 'long' -- IODC I/O is always 32-bit stuff */
 623extern long real64_call(unsigned long function, ...);
 624extern long real32_call(unsigned long function, ...);
 625extern void pdc_init(void);
 626
 627#endif /* __ASSEMBLY__ */
 628
 629#endif /* _PARISC_PDC_H */
 630