linux-bk/include/asm-i386/bugs.h
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   1/*
   2 *  include/asm-i386/bugs.h
   3 *
   4 *  Copyright (C) 1994  Linus Torvalds
   5 *
   6 *  Cyrix stuff, June 1998 by:
   7 *      - Rafael R. Reilova (moved everything from head.S),
   8 *        <rreilova@ececs.uc.edu>
   9 *      - Channing Corn (tests & fixes),
  10 *      - Andrew D. Balsa (code cleanup).
  11 *
  12 *  Pentium III FXSR, SSE support
  13 *      Gareth Hughes <gareth@valinux.com>, May 2000
  14 */
  15
  16/*
  17 * This is included by init/main.c to check for architecture-dependent bugs.
  18 *
  19 * Needs:
  20 *      void check_bugs(void);
  21 */
  22
  23#include <linux/config.h>
  24#include <linux/init.h>
  25#include <asm/processor.h>
  26#include <asm/i387.h>
  27#include <asm/msr.h>
  28
  29static int __init no_halt(char *s)
  30{
  31        boot_cpu_data.hlt_works_ok = 0;
  32        return 1;
  33}
  34
  35__setup("no-hlt", no_halt);
  36
  37static int __init mca_pentium(char *s)
  38{
  39        mca_pentium_flag = 1;
  40        return 1;
  41}
  42
  43__setup("mca-pentium", mca_pentium);
  44
  45static int __init no_387(char *s)
  46{
  47        boot_cpu_data.hard_math = 0;
  48        write_cr0(0xE | read_cr0());
  49        return 1;
  50}
  51
  52__setup("no387", no_387);
  53
  54static double __initdata x = 4195835.0;
  55static double __initdata y = 3145727.0;
  56
  57/*
  58 * This used to check for exceptions.. 
  59 * However, it turns out that to support that,
  60 * the XMM trap handlers basically had to
  61 * be buggy. So let's have a correct XMM trap
  62 * handler, and forget about printing out
  63 * some status at boot.
  64 *
  65 * We should really only care about bugs here
  66 * anyway. Not features.
  67 */
  68static void __init check_fpu(void)
  69{
  70        if (!boot_cpu_data.hard_math) {
  71#ifndef CONFIG_MATH_EMULATION
  72                printk(KERN_EMERG "No coprocessor found and no math emulation present.\n");
  73                printk(KERN_EMERG "Giving up.\n");
  74                for (;;) ;
  75#endif
  76                return;
  77        }
  78
  79/* Enable FXSR and company _before_ testing for FP problems. */
  80        /*
  81         * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
  82         */
  83        if (offsetof(struct task_struct, thread.i387.fxsave) & 15) {
  84                extern void __buggy_fxsr_alignment(void);
  85                __buggy_fxsr_alignment();
  86        }
  87        if (cpu_has_fxsr) {
  88                printk(KERN_INFO "Enabling fast FPU save and restore... ");
  89                set_in_cr4(X86_CR4_OSFXSR);
  90                printk("done.\n");
  91        }
  92        if (cpu_has_xmm) {
  93                printk(KERN_INFO "Enabling unmasked SIMD FPU exception support... ");
  94                set_in_cr4(X86_CR4_OSXMMEXCPT);
  95                printk("done.\n");
  96        }
  97
  98        /* Test for the divl bug.. */
  99        __asm__("fninit\n\t"
 100                "fldl %1\n\t"
 101                "fdivl %2\n\t"
 102                "fmull %2\n\t"
 103                "fldl %1\n\t"
 104                "fsubp %%st,%%st(1)\n\t"
 105                "fistpl %0\n\t"
 106                "fwait\n\t"
 107                "fninit"
 108                : "=m" (*&boot_cpu_data.fdiv_bug)
 109                : "m" (*&x), "m" (*&y));
 110        if (boot_cpu_data.fdiv_bug)
 111                printk("Hmm, FPU with FDIV bug.\n");
 112}
 113
 114static void __init check_hlt(void)
 115{
 116        printk(KERN_INFO "Checking 'hlt' instruction... ");
 117        if (!boot_cpu_data.hlt_works_ok) {
 118                printk("disabled\n");
 119                return;
 120        }
 121        __asm__ __volatile__("hlt ; hlt ; hlt ; hlt");
 122        printk("OK.\n");
 123}
 124
 125/*
 126 *      Most 386 processors have a bug where a POPAD can lock the 
 127 *      machine even from user space.
 128 */
 129 
 130static void __init check_popad(void)
 131{
 132#ifndef CONFIG_X86_POPAD_OK
 133        int res, inp = (int) &res;
 134
 135        printk(KERN_INFO "Checking for popad bug... ");
 136        __asm__ __volatile__( 
 137          "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx "
 138          : "=&a" (res)
 139          : "d" (inp)
 140          : "ecx", "edi" );
 141        /* If this fails, it means that any user program may lock the CPU hard. Too bad. */
 142        if (res != 12345678) printk( "Buggy.\n" );
 143                        else printk( "OK.\n" );
 144#endif
 145}
 146
 147/*
 148 * Check whether we are able to run this kernel safely on SMP.
 149 *
 150 * - In order to run on a i386, we need to be compiled for i386
 151 *   (for due to lack of "invlpg" and working WP on a i386)
 152 * - In order to run on anything without a TSC, we need to be
 153 *   compiled for a i486.
 154 * - In order to support the local APIC on a buggy Pentium machine,
 155 *   we need to be compiled with CONFIG_X86_GOOD_APIC disabled,
 156 *   which happens implicitly if compiled for a Pentium or lower
 157 *   (unless an advanced selection of CPU features is used) as an
 158 *   otherwise config implies a properly working local APIC without
 159 *   the need to do extra reads from the APIC.
 160*/
 161
 162static void __init check_config(void)
 163{
 164/*
 165 * We'd better not be a i386 if we're configured to use some
 166 * i486+ only features! (WP works in supervisor mode and the
 167 * new "invlpg" and "bswap" instructions)
 168 */
 169#if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_BSWAP)
 170        if (boot_cpu_data.x86 == 3)
 171                panic("Kernel requires i486+ for 'invlpg' and other features");
 172#endif
 173
 174/*
 175 * If we configured ourselves for a TSC, we'd better have one!
 176 */
 177#ifdef CONFIG_X86_TSC
 178        if (!cpu_has_tsc)
 179                panic("Kernel compiled for Pentium+, requires TSC feature!");
 180#endif
 181
 182/*
 183 * If we were told we had a good local APIC, check for buggy Pentia,
 184 * i.e. all B steppings and the C2 stepping of P54C when using their
 185 * integrated APIC (see 11AP erratum in "Pentium Processor
 186 * Specification Update").
 187 */
 188#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_GOOD_APIC)
 189        if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL
 190            && cpu_has_apic
 191            && boot_cpu_data.x86 == 5
 192            && boot_cpu_data.x86_model == 2
 193            && (boot_cpu_data.x86_mask < 6 || boot_cpu_data.x86_mask == 11))
 194                panic("Kernel compiled for PMMX+, assumes a local APIC without the read-before-write bug!");
 195#endif
 196}
 197
 198extern void alternative_instructions(void);
 199
 200static void __init check_bugs(void)
 201{
 202        identify_cpu(&boot_cpu_data);
 203#ifndef CONFIG_SMP
 204        printk("CPU: ");
 205        print_cpu_info(&boot_cpu_data);
 206#endif
 207        check_config();
 208        check_fpu();
 209        check_hlt();
 210        check_popad();
 211        system_utsname.machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);
 212        alternative_instructions(); 
 213}
 214
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