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20#include <linux/init.h>
21#include <linux/pci.h>
22#include <linux/proc_fs.h>
23#include <linux/bootmem.h>
24#include <linux/mm.h>
25#include <linux/rbtree.h>
26#include <linux/spinlock.h>
27#include <linux/seq_file.h>
28#include <asm/paca.h>
29#include <asm/processor.h>
30#include <asm/naca.h>
31#include <asm/io.h>
32#include <asm/machdep.h>
33#include <asm/pgtable.h>
34#include <asm/rtas.h>
35#include "pci.h"
36
37#undef DEBUG
38
39#define BUID_HI(buid) ((buid) >> 32)
40#define BUID_LO(buid) ((buid) & 0xffffffff)
41#define CONFIG_ADDR(busno, devfn) \
42 (((((busno) & 0xff) << 8) | ((devfn) & 0xf8)) << 8)
43
44
45static int ibm_set_eeh_option;
46static int ibm_set_slot_reset;
47static int ibm_read_slot_reset_state;
48static int ibm_slot_error_detail;
49
50static int eeh_subsystem_enabled;
51#define EEH_MAX_OPTS 4096
52static char *eeh_opts;
53static int eeh_opts_last;
54
55
56static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
57static spinlock_t slot_errbuf_lock = SPIN_LOCK_UNLOCKED;
58static int eeh_error_buf_size;
59
60
61static DEFINE_PER_CPU(unsigned long, total_mmio_ffs);
62static DEFINE_PER_CPU(unsigned long, false_positives);
63static DEFINE_PER_CPU(unsigned long, ignored_failures);
64
65static int eeh_check_opts_config(struct device_node *dn, int class_code,
66 int vendor_id, int device_id,
67 int default_state);
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85struct pci_io_addr_range
86{
87 struct rb_node rb_node;
88 unsigned long addr_lo;
89 unsigned long addr_hi;
90 struct pci_dev *pcidev;
91 unsigned int flags;
92};
93
94static struct pci_io_addr_cache
95{
96 struct rb_root rb_root;
97 spinlock_t piar_lock;
98} pci_io_addr_cache_root;
99
100static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
101{
102 struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
103
104 while (n) {
105 struct pci_io_addr_range *piar;
106 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
107
108 if (addr < piar->addr_lo) {
109 n = n->rb_left;
110 } else {
111 if (addr > piar->addr_hi) {
112 n = n->rb_right;
113 } else {
114 pci_dev_get(piar->pcidev);
115 return piar->pcidev;
116 }
117 }
118 }
119
120 return NULL;
121}
122
123
124
125
126
127
128
129
130
131
132
133static struct pci_dev *pci_get_device_by_addr(unsigned long addr)
134{
135 struct pci_dev *dev;
136 unsigned long flags;
137
138 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
139 dev = __pci_get_device_by_addr(addr);
140 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
141 return dev;
142}
143
144#ifdef DEBUG
145
146
147
148
149static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
150{
151 struct rb_node *n;
152 int cnt = 0;
153
154 n = rb_first(&cache->rb_root);
155 while (n) {
156 struct pci_io_addr_range *piar;
157 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
158 printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s %s\n",
159 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
160 piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev),
161 pci_pretty_name(piar->pcidev));
162 cnt++;
163 n = rb_next(n);
164 }
165}
166#endif
167
168
169static struct pci_io_addr_range *
170pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
171 unsigned long ahi, unsigned int flags)
172{
173 struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
174 struct rb_node *parent = NULL;
175 struct pci_io_addr_range *piar;
176
177
178 while (*p) {
179 parent = *p;
180 piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
181 if (alo < piar->addr_lo) {
182 p = &parent->rb_left;
183 } else if (ahi > piar->addr_hi) {
184 p = &parent->rb_right;
185 } else {
186 if (dev != piar->pcidev ||
187 alo != piar->addr_lo || ahi != piar->addr_hi) {
188 printk(KERN_WARNING "PIAR: overlapping address range\n");
189 }
190 return piar;
191 }
192 }
193 piar = (struct pci_io_addr_range *)kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
194 if (!piar)
195 return NULL;
196
197 piar->addr_lo = alo;
198 piar->addr_hi = ahi;
199 piar->pcidev = dev;
200 piar->flags = flags;
201
202 rb_link_node(&piar->rb_node, parent, p);
203 rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
204
205 return piar;
206}
207
208static void __pci_addr_cache_insert_device(struct pci_dev *dev)
209{
210 struct device_node *dn;
211 int i;
212
213 dn = pci_device_to_OF_node(dev);
214 if (!dn) {
215 printk(KERN_WARNING "PCI: no pci dn found for dev=%s %s\n",
216 pci_name(dev), pci_pretty_name(dev));
217 return;
218 }
219
220
221 if (!(dn->eeh_mode & EEH_MODE_SUPPORTED) ||
222 dn->eeh_mode & EEH_MODE_NOCHECK) {
223#ifdef DEBUG
224 printk(KERN_INFO "PCI: skip building address cache for=%s %s\n",
225 pci_name(dev), pci_pretty_name(dev));
226#endif
227 return;
228 }
229
230
231 pci_dev_get(dev);
232
233
234 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
235 unsigned long start = pci_resource_start(dev,i);
236 unsigned long end = pci_resource_end(dev,i);
237 unsigned int flags = pci_resource_flags(dev,i);
238
239
240 if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
241 continue;
242 if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
243 continue;
244 pci_addr_cache_insert(dev, start, end, flags);
245 }
246}
247
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253
254
255
256void pci_addr_cache_insert_device(struct pci_dev *dev)
257{
258 unsigned long flags;
259
260 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
261 __pci_addr_cache_insert_device(dev);
262 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
263}
264
265static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
266{
267 struct rb_node *n;
268
269restart:
270 n = rb_first(&pci_io_addr_cache_root.rb_root);
271 while (n) {
272 struct pci_io_addr_range *piar;
273 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
274
275 if (piar->pcidev == dev) {
276 rb_erase(n, &pci_io_addr_cache_root.rb_root);
277 kfree(piar);
278 goto restart;
279 }
280 n = rb_next(n);
281 }
282
283
284 pci_dev_put(dev);
285}
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294
295
296void pci_addr_cache_remove_device(struct pci_dev *dev)
297{
298 unsigned long flags;
299
300 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
301 __pci_addr_cache_remove_device(dev);
302 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
303}
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311
312
313
314void __init pci_addr_cache_build(void)
315{
316 struct pci_dev *dev = NULL;
317
318 spin_lock_init(&pci_io_addr_cache_root.piar_lock);
319
320 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
321
322 if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) {
323 continue;
324 }
325 pci_addr_cache_insert_device(dev);
326 }
327
328#ifdef DEBUG
329
330 pci_addr_cache_print(&pci_io_addr_cache_root);
331#endif
332}
333
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336
337
338
339
340
341
342static unsigned long eeh_token_to_phys(unsigned long token)
343{
344 pte_t *ptep;
345 unsigned long pa, vaddr;
346
347 if (REGION_ID(token) == EEH_REGION_ID)
348 vaddr = IO_TOKEN_TO_ADDR(token);
349 else
350 return token;
351
352 ptep = find_linux_pte(ioremap_mm.pgd, vaddr);
353 pa = pte_pfn(*ptep) << PAGE_SHIFT;
354
355 return pa | (vaddr & (PAGE_SIZE-1));
356}
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371
372unsigned long eeh_check_failure(void *token, unsigned long val)
373{
374 unsigned long addr;
375 struct pci_dev *dev;
376 struct device_node *dn;
377 int ret;
378 int rets[2];
379 unsigned long flags;
380
381 __get_cpu_var(total_mmio_ffs)++;
382
383 if (!eeh_subsystem_enabled)
384 return val;
385
386
387 addr = eeh_token_to_phys((unsigned long)token);
388 dev = pci_get_device_by_addr(addr);
389 if (!dev)
390 return val;
391
392 dn = pci_device_to_OF_node(dev);
393 if (!dn) {
394 pci_dev_put(dev);
395 return val;
396 }
397
398
399 if (!(dn->eeh_mode & EEH_MODE_SUPPORTED) ||
400 dn->eeh_mode & EEH_MODE_NOCHECK) {
401 pci_dev_put(dev);
402 return val;
403 }
404
405 if (!dn->eeh_config_addr) {
406 pci_dev_put(dev);
407 return val;
408 }
409
410
411
412
413
414
415
416
417 ret = rtas_call(ibm_read_slot_reset_state, 3, 3, rets,
418 dn->eeh_config_addr, BUID_HI(dn->phb->buid),
419 BUID_LO(dn->phb->buid));
420
421 if (ret == 0 && rets[1] == 1 && rets[0] >= 2) {
422 int log_event;
423
424 spin_lock_irqsave(&slot_errbuf_lock, flags);
425 memset(slot_errbuf, 0, eeh_error_buf_size);
426
427 log_event = rtas_call(ibm_slot_error_detail,
428 8, 1, NULL, dn->eeh_config_addr,
429 BUID_HI(dn->phb->buid),
430 BUID_LO(dn->phb->buid), NULL, 0,
431 virt_to_phys(slot_errbuf),
432 eeh_error_buf_size,
433 2 );
434
435 if (log_event == 0)
436 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG,
437 1 );
438
439 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
440
441
442
443
444
445
446
447
448 if (panic_on_oops) {
449 panic("EEH: MMIO failure (%d) on device:%s %s\n",
450 rets[0], pci_name(dev), pci_pretty_name(dev));
451 } else {
452 __get_cpu_var(ignored_failures)++;
453 printk(KERN_INFO "EEH: MMIO failure (%d) on device:%s %s\n",
454 rets[0], pci_name(dev), pci_pretty_name(dev));
455 }
456 } else {
457 __get_cpu_var(false_positives)++;
458 }
459
460 pci_dev_put(dev);
461 return val;
462}
463EXPORT_SYMBOL(eeh_check_failure);
464
465struct eeh_early_enable_info {
466 unsigned int buid_hi;
467 unsigned int buid_lo;
468 int force_off;
469};
470
471
472static void *early_enable_eeh(struct device_node *dn, void *data)
473{
474 struct eeh_early_enable_info *info = data;
475 int ret;
476 char *status = get_property(dn, "status", NULL);
477 u32 *class_code = (u32 *)get_property(dn, "class-code", NULL);
478 u32 *vendor_id = (u32 *)get_property(dn, "vendor-id", NULL);
479 u32 *device_id = (u32 *)get_property(dn, "device-id", NULL);
480 u32 *regs;
481 int enable;
482
483 dn->eeh_mode = 0;
484
485 if (status && strcmp(status, "ok") != 0)
486 return NULL;
487
488
489 if (!class_code || !vendor_id || !device_id)
490 return NULL;
491
492
493 if (dn->type && !strcmp(dn->type, "isa")) {
494 dn->eeh_mode |= EEH_MODE_NOCHECK;
495 return NULL;
496 }
497
498
499
500
501
502
503
504
505
506 enable = 1;
507 if ((*class_code >> 16) == PCI_BASE_CLASS_DISPLAY)
508 enable = 0;
509
510 if (!eeh_check_opts_config(dn, *class_code, *vendor_id, *device_id,
511 enable)) {
512 if (enable) {
513 printk(KERN_WARNING "EEH: %s user requested to run "
514 "without EEH checking.\n", dn->full_name);
515 enable = 0;
516 }
517 }
518
519 if (!enable || info->force_off) {
520 dn->eeh_mode |= EEH_MODE_NOCHECK;
521 }
522
523
524
525 regs = (u32 *)get_property(dn, "reg", NULL);
526 if (regs) {
527
528
529 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
530 regs[0], info->buid_hi, info->buid_lo,
531 EEH_ENABLE);
532 if (ret == 0) {
533 eeh_subsystem_enabled = 1;
534 dn->eeh_mode |= EEH_MODE_SUPPORTED;
535 dn->eeh_config_addr = regs[0];
536#ifdef DEBUG
537 printk(KERN_DEBUG "EEH: %s: eeh enabled\n", dn->full_name);
538#endif
539 } else {
540
541
542
543 if (dn->parent && (dn->parent->eeh_mode & EEH_MODE_SUPPORTED)) {
544
545 dn->eeh_mode |= EEH_MODE_SUPPORTED;
546 dn->eeh_config_addr = dn->parent->eeh_config_addr;
547 return NULL;
548 }
549 }
550 } else {
551 printk(KERN_WARNING "EEH: %s: unable to get reg property.\n",
552 dn->full_name);
553 }
554
555 return NULL;
556}
557
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569
570
571void __init eeh_init(void)
572{
573 struct device_node *phb, *np;
574 struct eeh_early_enable_info info;
575 char *eeh_force_off = strstr(saved_command_line, "eeh-force-off");
576
577 init_pci_config_tokens();
578
579 np = of_find_node_by_path("/rtas");
580 if (np == NULL) {
581 printk(KERN_WARNING "EEH: RTAS not found !\n");
582 return;
583 }
584
585 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
586 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
587 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
588 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
589
590 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE)
591 return;
592
593 eeh_error_buf_size = rtas_token("rtas-error-log-max");
594 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
595 eeh_error_buf_size = 1024;
596 }
597 if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
598 printk(KERN_WARNING "EEH: rtas-error-log-max is bigger than allocated "
599 "buffer ! (%d vs %d)", eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
600 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
601 }
602
603 info.force_off = 0;
604 if (eeh_force_off) {
605 printk(KERN_WARNING "EEH: WARNING: PCI Enhanced I/O Error "
606 "Handling is user disabled\n");
607 info.force_off = 1;
608 }
609
610
611 for (phb = of_find_node_by_name(NULL, "pci"); phb;
612 phb = of_find_node_by_name(phb, "pci")) {
613 unsigned long buid;
614
615 buid = get_phb_buid(phb);
616 if (buid == 0)
617 continue;
618
619 info.buid_lo = BUID_LO(buid);
620 info.buid_hi = BUID_HI(buid);
621 traverse_pci_devices(phb, early_enable_eeh, &info);
622 }
623
624 if (eeh_subsystem_enabled) {
625 printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
626 } else {
627 printk(KERN_WARNING "EEH: disabled PCI Enhanced I/O Error Handling\n");
628 }
629}
630
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641
642
643void eeh_add_device_early(struct device_node *dn)
644{
645 struct pci_controller *phb;
646 struct eeh_early_enable_info info;
647
648 if (!dn || !eeh_subsystem_enabled)
649 return;
650 phb = dn->phb;
651 if (NULL == phb || 0 == phb->buid) {
652 printk(KERN_WARNING "EEH: Expected buid but found none\n");
653 return;
654 }
655
656 info.buid_hi = BUID_HI(phb->buid);
657 info.buid_lo = BUID_LO(phb->buid);
658 early_enable_eeh(dn, &info);
659}
660EXPORT_SYMBOL(eeh_add_device_early);
661
662
663
664
665
666
667
668
669void eeh_add_device_late(struct pci_dev *dev)
670{
671 if (!dev || !eeh_subsystem_enabled)
672 return;
673
674#ifdef DEBUG
675 printk(KERN_DEBUG "EEH: adding device %s %s\n", pci_name(dev),
676 pci_pretty_name(dev));
677#endif
678
679 pci_addr_cache_insert_device (dev);
680}
681EXPORT_SYMBOL(eeh_add_device_late);
682
683
684
685
686
687
688
689
690void eeh_remove_device(struct pci_dev *dev)
691{
692 if (!dev || !eeh_subsystem_enabled)
693 return;
694
695
696#ifdef DEBUG
697 printk(KERN_DEBUG "EEH: remove device %s %s\n", pci_name(dev),
698 pci_pretty_name(dev));
699#endif
700 pci_addr_cache_remove_device(dev);
701}
702EXPORT_SYMBOL(eeh_remove_device);
703
704
705
706
707
708
709
710void *eeh_ioremap(unsigned long addr, void *vaddr)
711{
712 struct pci_dev *dev;
713 struct device_node *dn;
714
715 if (!eeh_subsystem_enabled)
716 return vaddr;
717
718 dev = pci_get_device_by_addr(addr);
719 if (!dev)
720 return vaddr;
721
722 dn = pci_device_to_OF_node(dev);
723 if (!dn) {
724 pci_dev_put(dev);
725 return vaddr;
726 }
727
728 if (dn->eeh_mode & EEH_MODE_NOCHECK) {
729 pci_dev_put(dev);
730 return vaddr;
731 }
732
733 pci_dev_put(dev);
734 return (void *)IO_ADDR_TO_TOKEN(vaddr);
735}
736
737static int proc_eeh_show(struct seq_file *m, void *v)
738{
739 unsigned int cpu;
740 unsigned long ffs = 0, positives = 0, failures = 0;
741
742 for_each_cpu(cpu) {
743 ffs += per_cpu(total_mmio_ffs, cpu);
744 positives += per_cpu(false_positives, cpu);
745 failures += per_cpu(ignored_failures, cpu);
746 }
747
748 if (0 == eeh_subsystem_enabled) {
749 seq_printf(m, "EEH Subsystem is globally disabled\n");
750 seq_printf(m, "eeh_total_mmio_ffs=%ld\n", ffs);
751 } else {
752 seq_printf(m, "EEH Subsystem is enabled\n");
753 seq_printf(m, "eeh_total_mmio_ffs=%ld\n"
754 "eeh_false_positives=%ld\n"
755 "eeh_ignored_failures=%ld\n",
756 ffs, positives, failures);
757 }
758
759 return 0;
760}
761
762static int proc_eeh_open(struct inode *inode, struct file *file)
763{
764 return single_open(file, proc_eeh_show, NULL);
765}
766
767static struct file_operations proc_eeh_operations = {
768 .open = proc_eeh_open,
769 .read = seq_read,
770 .llseek = seq_lseek,
771 .release = single_release,
772};
773
774static int __init eeh_init_proc(void)
775{
776 struct proc_dir_entry *e;
777
778 if (systemcfg->platform & PLATFORM_PSERIES) {
779 e = create_proc_entry("ppc64/eeh", 0, NULL);
780 if (e)
781 e->proc_fops = &proc_eeh_operations;
782 }
783
784 return 0;
785}
786__initcall(eeh_init_proc);
787
788
789
790
791
792
793
794static int eeh_check_opts_config(struct device_node *dn,
795 int class_code, int vendor_id, int device_id,
796 int default_state)
797{
798 char devname[32], classname[32];
799 char *strs[8], *s;
800 int nstrs, i;
801 int ret = default_state;
802
803
804 nstrs = 0;
805 s = (char *)get_property(dn, "ibm,loc-code", NULL);
806 if (s)
807 strs[nstrs++] = s;
808 sprintf(devname, "dev%04x:%04x", vendor_id, device_id);
809 strs[nstrs++] = devname;
810 sprintf(classname, "class%04x", class_code);
811 strs[nstrs++] = classname;
812 strs[nstrs++] = "";
813
814
815
816
817
818 for (s = eeh_opts; s && (s < (eeh_opts + eeh_opts_last));
819 s += strlen(s)+1) {
820 for (i = 0; i < nstrs; i++) {
821 if (strcasecmp(strs[i], s+1) == 0) {
822 ret = (strs[i][0] == '+') ? 1 : 0;
823 }
824 }
825 }
826 return ret;
827}
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859
860static int __init eeh_parm(char *str, int state)
861{
862 char *s, *cur, *curend;
863
864 if (!eeh_opts) {
865 eeh_opts = alloc_bootmem(EEH_MAX_OPTS);
866 eeh_opts[eeh_opts_last++] = '+';
867 eeh_opts[eeh_opts_last++] = '\0';
868 }
869 if (*str == '\0') {
870 eeh_opts[eeh_opts_last++] = state ? '+' : '-';
871 eeh_opts[eeh_opts_last++] = '\0';
872 return 1;
873 }
874 if (*str == '=')
875 str++;
876 for (s = str; s && *s != '\0'; s = curend) {
877 cur = s;
878
879 while (*cur == ',')
880 cur++;
881 curend = strchr(cur, ',');
882 if (!curend)
883 curend = cur + strlen(cur);
884 if (*cur) {
885 int curlen = curend-cur;
886 if (eeh_opts_last + curlen > EEH_MAX_OPTS-2) {
887 printk(KERN_WARNING "EEH: sorry...too many "
888 "eeh cmd line options\n");
889 return 1;
890 }
891 eeh_opts[eeh_opts_last++] = state ? '+' : '-';
892 strncpy(eeh_opts+eeh_opts_last, cur, curlen);
893 eeh_opts_last += curlen;
894 eeh_opts[eeh_opts_last++] = '\0';
895 }
896 }
897
898 return 1;
899}
900
901static int __init eehoff_parm(char *str)
902{
903 return eeh_parm(str, 0);
904}
905
906static int __init eehon_parm(char *str)
907{
908 return eeh_parm(str, 1);
909}
910
911__setup("eeh-off", eehoff_parm);
912__setup("eeh-on", eehon_parm);
913