LXR linux-bk/arch/ppc/platforms/4xx/walnut.c

   1/*
   2 * arch/ppc/platforms/4xx/walnut.c
   3 *
   4 * Architecture- / platform-specific boot-time initialization code for
   5 * IBM PowerPC 4xx based boards. Adapted from original
   6 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
   7 * <dan@net4x.com>.
   8 *
   9 * Copyright(c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
  10 *
  11 * 2002 (c) MontaVista, Software, Inc.  This file is licensed under
  12 * the terms of the GNU General Public License version 2.  This program
  13 * is licensed "as is" without any warranty of any kind, whether express
  14 * or implied.
  15 */
  16#include <linux/config.h>
  17#include <linux/init.h>
  18#include <linux/smp.h>
  19#include <linux/threads.h>
  20#include <linux/param.h>
  21#include <linux/string.h>
  22#include <linux/pci.h>
  23#include <linux/rtc.h>
  24
  25#include <asm/system.h>
  26#include <asm/pci-bridge.h>
  27#include <asm/machdep.h>
  28#include <asm/page.h>
  29#include <asm/time.h>
  30#include <asm/io.h>
  31#include <asm/ocp.h>
  32#include <asm/ibm_ocp_pci.h>
  33#include <asm/todc.h>
  34
  35#undef DEBUG
  36
  37#ifdef DEBUG
  38#define DBG(x...) printk(x)
  39#else
  40#define DBG(x...)
  41#endif
  42
  43void *kb_cs;
  44void *kb_data;
  45void *walnut_rtc_base;
  46
  47/* Some IRQs unique to Walnut.
  48 * Used by the generic 405 PCI setup functions in ppc4xx_pci.c
  49 */
  50int __init
  51ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
  52{
  53        static char pci_irq_table[][4] =
  54            /*
  55             *      PCI IDSEL/INTPIN->INTLINE
  56             *      A       B       C       D
  57             */
  58        {
  59                {28, 28, 28, 28},       /* IDSEL 1 - PCI slot 1 */
  60                {29, 29, 29, 29},       /* IDSEL 2 - PCI slot 2 */
  61                {30, 30, 30, 30},       /* IDSEL 3 - PCI slot 3 */
  62                {31, 31, 31, 31},       /* IDSEL 4 - PCI slot 4 */
  63        };
  64
  65        const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
  66        return PCI_IRQ_TABLE_LOOKUP;
  67};
  68
  69void __init
  70walnut_setup_arch(void)
  71{
  72
  73        void *fpga_brdc;
  74        unsigned char fpga_brdc_data;
  75        void *fpga_enable;
  76        void *fpga_polarity;
  77        void *fpga_status;
  78        void *fpga_trigger;
  79
  80        ppc4xx_setup_arch();
  81
  82        ibm_ocp_set_emac(0, 0);
  83
  84        kb_data = ioremap(WALNUT_PS2_BASE, 8);
  85        if (!kb_data) {
  86                printk(KERN_CRIT
  87                       "walnut_setup_arch() kb_data ioremap failed\n");
  88                return;
  89        }
  90
  91        kb_cs = kb_data + 1;
  92
  93        fpga_status = ioremap(WALNUT_FPGA_BASE, 8);
  94        if (!fpga_status) {
  95                printk(KERN_CRIT
  96                       "walnut_setup_arch() fpga_status ioremap failed\n");
  97                return;
  98        }
  99
 100        fpga_enable = fpga_status + 1;
 101        fpga_polarity = fpga_status + 2;
 102        fpga_trigger = fpga_status + 3;
 103        fpga_brdc = fpga_status + 4;
 104
 105        /* split the keyboard and mouse interrupts */
 106        fpga_brdc_data = readb(fpga_brdc);
 107        fpga_brdc_data |= 0x80;
 108        writeb(fpga_brdc_data, fpga_brdc);
 109
 110        writeb(0x3, fpga_enable);
 111
 112        writeb(0x3, fpga_polarity);
 113
 114        writeb(0x3, fpga_trigger);
 115
 116        /* RTC step for the walnut */
 117        walnut_rtc_base = (void *) WALNUT_RTC_VADDR;
 118        TODC_INIT(TODC_TYPE_DS1743, walnut_rtc_base, walnut_rtc_base,
 119                  walnut_rtc_base, 8);
 120        /* Identify the system */
 121        printk("IBM Walnut port (C) 2000-2002 MontaVista Software, Inc. (source@mvista.com)\n");
 122}
 123
 124void __init
 125bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
 126{
 127#ifdef CONFIG_PCI
 128        unsigned int bar_response, bar;
 129        /*
 130         * Expected PCI mapping:
 131         *
 132         *  PLB addr             PCI memory addr
 133         *  ---------------------       ---------------------
 134         *  0000'0000 - 7fff'ffff <---  0000'0000 - 7fff'ffff
 135         *  8000'0000 - Bfff'ffff --->  8000'0000 - Bfff'ffff
 136         *
 137         *  PLB addr             PCI io addr
 138         *  ---------------------       ---------------------
 139         *  e800'0000 - e800'ffff --->  0000'0000 - 0001'0000
 140         *
 141         * The following code is simplified by assuming that the bootrom
 142         * has been well behaved in following this mapping.
 143         */
 144
 145#ifdef DEBUG
 146        int i;
 147
 148        printk("ioremap PCLIO_BASE = 0x%x\n", pcip);
 149        printk("PCI bridge regs before fixup \n");
 150        for (i = 0; i <= 3; i++) {
 151                printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
 152                printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
 153                printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
 154                printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
 155        }
 156        printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
 157        printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
 158        printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
 159        printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
 160
 161#endif
 162
 163        /* added for IBM boot rom version 1.15 bios bar changes  -AK */
 164
 165        /* Disable region first */
 166        out_le32((void *) &(pcip->pmm[0].ma), 0x00000000);
 167        /* PLB starting addr, PCI: 0x80000000 */
 168        out_le32((void *) &(pcip->pmm[0].la), 0x80000000);
 169        /* PCI start addr, 0x80000000 */
 170        out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE);
 171        /* 512MB range of PLB to PCI */
 172        out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000);
 173        /* Enable no pre-fetch, enable region */
 174        out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff -
 175                                                (PPC405_PCI_UPPER_MEM -
 176                                                 PPC405_PCI_MEM_BASE)) | 0x01));
 177
 178        /* Disable region one */
 179        out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
 180        out_le32((void *) &(pcip->pmm[1].la), 0x00000000);
 181        out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000);
 182        out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000);
 183        out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
 184        out_le32((void *) &(pcip->ptm1ms), 0x00000000);
 185
 186        /* Disable region two */
 187        out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
 188        out_le32((void *) &(pcip->pmm[2].la), 0x00000000);
 189        out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000);
 190        out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000);
 191        out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
 192        out_le32((void *) &(pcip->ptm2ms), 0x00000000);
 193
 194        /* Zero config bars */
 195        for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
 196                early_write_config_dword(hose, hose->first_busno,
 197                                         PCI_FUNC(hose->first_busno), bar,
 198                                         0x00000000);
 199                early_read_config_dword(hose, hose->first_busno,
 200                                        PCI_FUNC(hose->first_busno), bar,
 201                                        &bar_response);
 202                DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n",
 203                    hose->first_busno, PCI_SLOT(hose->first_busno),
 204                    PCI_FUNC(hose->first_busno), bar, bar_response);
 205        }
 206        /* end work arround */
 207
 208#ifdef DEBUG
 209        printk("PCI bridge regs after fixup \n");
 210        for (i = 0; i <= 3; i++) {
 211                printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
 212                printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
 213                printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
 214                printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
 215        }
 216        printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
 217        printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
 218        printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
 219        printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
 220
 221#endif
 222#endif
 223}
 224
 225void __init
 226walnut_map_io(void)
 227{
 228        ppc4xx_map_io();
 229        io_block_mapping(WALNUT_RTC_VADDR,
 230                         WALNUT_RTC_PADDR, WALNUT_RTC_SIZE, _PAGE_IO);
 231}
 232
 233void __init
 234platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 235              unsigned long r6, unsigned long r7)
 236{
 237        ppc4xx_init(r3, r4, r5, r6, r7);
 238
 239        ppc_md.setup_arch = walnut_setup_arch;
 240        ppc_md.setup_io_mappings = walnut_map_io;
 241
 242#ifdef CONFIG_GEN_RTC
 243        ppc_md.time_init = todc_time_init;
 244        ppc_md.set_rtc_time = todc_set_rtc_time;
 245        ppc_md.get_rtc_time = todc_get_rtc_time;
 246        ppc_md.nvram_read_val = todc_direct_read_val;
 247        ppc_md.nvram_write_val = todc_direct_write_val;
 248#endif
 249}
 250