LXR linux-bk/include/linux/hpet.h

   1#ifndef __HPET__
   2#define __HPET__ 1
   3
   4#include <linux/compiler.h>
   5
   6/*
   7 * Offsets into HPET Registers
   8 */
   9
  10struct hpet {
  11        u64 hpet_cap;           /* capabilities */
  12        u64 res0;               /* reserved */
  13        u64 hpet_config;        /* configuration */
  14        u64 res1;               /* reserved */
  15        u64 hpet_isr;           /* interrupt status reg */
  16        u64 res2[25];           /* reserved */
  17        union {                 /* main counter */
  18                u64 _hpet_mc64;
  19                u32 _hpet_mc32;
  20                unsigned long _hpet_mc;
  21        } _u0;
  22        u64 res3;               /* reserved */
  23        struct hpet_timer {
  24                u64 hpet_config;        /* configuration/cap */
  25                union {         /* timer compare register */
  26                        u64 _hpet_hc64;
  27                        u32 _hpet_hc32;
  28                        unsigned long _hpet_compare;
  29                } _u1;
  30                u64 hpet_fsb[2];        /* FSB route */
  31        } hpet_timers[1];
  32};
  33
  34#define hpet_mc         _u0._hpet_mc
  35#define hpet_compare    _u1._hpet_compare
  36
  37#define HPET_MAX_TIMERS (32)
  38
  39/*
  40 * HPET general capabilities register
  41 */
  42
  43#define HPET_COUNTER_CLK_PERIOD_MASK    (0xffffffff00000000ULL)
  44#define HPET_COUNTER_CLK_PERIOD_SHIFT   (32UL)
  45#define HPET_VENDOR_ID_MASK             (0x00000000ffff0000ULL)
  46#define HPET_VENDOR_ID_SHIFT            (16ULL)
  47#define HPET_LEG_RT_CAP_MASK            (0x8000)
  48#define HPET_COUNTER_SIZE_MASK          (0x2000)
  49#define HPET_NUM_TIM_CAP_MASK           (0x1f00)
  50#define HPET_NUM_TIM_CAP_SHIFT          (8ULL)
  51
  52/*
  53 * HPET general configuration register
  54 */
  55
  56#define HPET_LEG_RT_CNF_MASK            (2UL)
  57#define HPET_ENABLE_CNF_MASK            (1UL)
  58
  59
  60/*
  61 * Timer configuration register
  62 */
  63
  64#define Tn_INT_ROUTE_CAP_MASK           (0xffffffff00000000ULL)
  65#define Tn_INI_ROUTE_CAP_SHIFT          (32UL)
  66#define Tn_FSB_INT_DELCAP_MASK          (0x8000UL)
  67#define Tn_FSB_INT_DELCAP_SHIFT         (15)
  68#define Tn_FSB_EN_CNF_MASK              (0x4000UL)
  69#define Tn_FSB_EN_CNF_SHIFT             (14)
  70#define Tn_INT_ROUTE_CNF_MASK           (0x3e00UL)
  71#define Tn_INT_ROUTE_CNF_SHIFT          (9)
  72#define Tn_32MODE_CNF_MASK              (0x0100UL)
  73#define Tn_VAL_SET_CNF_MASK             (0x0040UL)
  74#define Tn_SIZE_CAP_MASK                (0x0020UL)
  75#define Tn_PER_INT_CAP_MASK             (0x0010UL)
  76#define Tn_TYPE_CNF_MASK                (0x0008UL)
  77#define Tn_INT_ENB_CNF_MASK             (0x0004UL)
  78#define Tn_INT_TYPE_CNF_MASK            (0x0002UL)
  79
  80/*
  81 * Timer FSB Interrupt Route Register
  82 */
  83
  84#define Tn_FSB_INT_ADDR_MASK            (0xffffffff00000000ULL)
  85#define Tn_FSB_INT_ADDR_SHIFT           (32UL)
  86#define Tn_FSB_INT_VAL_MASK             (0x00000000ffffffffULL)
  87
  88struct hpet_info {
  89        unsigned long hi_ireqfreq;      /* Hz */
  90        unsigned long hi_flags; /* information */
  91        unsigned short hi_hpet;
  92        unsigned short hi_timer;
  93};
  94
  95#define HPET_INFO_PERIODIC      0x0001  /* timer is periodic */
  96
  97#define HPET_IE_ON      _IO('h', 0x01)  /* interrupt on */
  98#define HPET_IE_OFF     _IO('h', 0x02)  /* interrupt off */
  99#define HPET_INFO       _IOR('h', 0x03, struct hpet_info)
 100#define HPET_EPI        _IO('h', 0x04)  /* enable periodic */
 101#define HPET_DPI        _IO('h', 0x05)  /* disable periodic */
 102#define HPET_IRQFREQ    _IOW('h', 0x6, unsigned long)   /* IRQFREQ usec */
 103
 104/*
 105 * exported interfaces
 106 */
 107
 108struct hpet_task {
 109        void (*ht_func) (void *);
 110        void *ht_data;
 111        void *ht_opaque;
 112};
 113
 114struct hpet_data {
 115        unsigned long hd_phys_address;
 116        void __iomem *hd_address;
 117        unsigned short hd_nirqs;
 118        unsigned short hd_flags;
 119        unsigned int hd_state;  /* timer allocated */
 120        unsigned int hd_irq[HPET_MAX_TIMERS];
 121};
 122
 123#define HPET_DATA_PLATFORM      0x0001  /* platform call to hpet_alloc */
 124
 125static inline void hpet_reserve_timer(struct hpet_data *hd, int timer)
 126{
 127        hd->hd_state |= (1 << timer);
 128        return;
 129}
 130
 131int hpet_alloc(struct hpet_data *);
 132int hpet_register(struct hpet_task *, int);
 133int hpet_unregister(struct hpet_task *);
 134int hpet_control(struct hpet_task *, unsigned int, unsigned long);
 135
 136#endif                          /* !__HPET__ */
 137