LXR linux-bk/drivers/w1/dscore.h

   1/*
   2 *      dscore.h
   3 *
   4 * Copyright (c) 2004 Evgeniy Polyakov <johnpol@2ka.mipt.ru>
   5 * 
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 2 of the License, or
  10 * (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20 */
  21
  22#ifndef __DSCORE_H
  23#define __DSCORE_H
  24
  25#include <linux/usb.h>
  26#include <asm/atomic.h>
  27
  28/* COMMAND TYPE CODES */
  29#define CONTROL_CMD                     0x00
  30#define COMM_CMD                        0x01
  31#define MODE_CMD                        0x02
  32
  33/* CONTROL COMMAND CODES */
  34#define CTL_RESET_DEVICE                0x0000
  35#define CTL_START_EXE                   0x0001
  36#define CTL_RESUME_EXE                  0x0002
  37#define CTL_HALT_EXE_IDLE               0x0003
  38#define CTL_HALT_EXE_DONE               0x0004
  39#define CTL_FLUSH_COMM_CMDS             0x0007
  40#define CTL_FLUSH_RCV_BUFFER            0x0008
  41#define CTL_FLUSH_XMT_BUFFER            0x0009
  42#define CTL_GET_COMM_CMDS               0x000A
  43
  44/* MODE COMMAND CODES */
  45#define MOD_PULSE_EN                    0x0000
  46#define MOD_SPEED_CHANGE_EN             0x0001
  47#define MOD_1WIRE_SPEED                 0x0002
  48#define MOD_STRONG_PU_DURATION          0x0003
  49#define MOD_PULLDOWN_SLEWRATE           0x0004
  50#define MOD_PROG_PULSE_DURATION         0x0005
  51#define MOD_WRITE1_LOWTIME              0x0006
  52#define MOD_DSOW0_TREC                  0x0007
  53
  54/* COMMUNICATION COMMAND CODES */
  55#define COMM_ERROR_ESCAPE               0x0601
  56#define COMM_SET_DURATION               0x0012
  57#define COMM_BIT_IO                     0x0020
  58#define COMM_PULSE                      0x0030
  59#define COMM_1_WIRE_RESET               0x0042
  60#define COMM_BYTE_IO                    0x0052
  61#define COMM_MATCH_ACCESS               0x0064
  62#define COMM_BLOCK_IO                   0x0074
  63#define COMM_READ_STRAIGHT              0x0080
  64#define COMM_DO_RELEASE                 0x6092
  65#define COMM_SET_PATH                   0x00A2
  66#define COMM_WRITE_SRAM_PAGE            0x00B2
  67#define COMM_WRITE_EPROM                0x00C4
  68#define COMM_READ_CRC_PROT_PAGE         0x00D4
  69#define COMM_READ_REDIRECT_PAGE_CRC     0x21E4
  70#define COMM_SEARCH_ACCESS              0x00F4
  71
  72/* Communication command bits */
  73#define COMM_TYPE                       0x0008
  74#define COMM_SE                         0x0008
  75#define COMM_D                          0x0008
  76#define COMM_Z                          0x0008
  77#define COMM_CH                         0x0008
  78#define COMM_SM                         0x0008
  79#define COMM_R                          0x0008
  80#define COMM_IM                         0x0001
  81
  82#define COMM_PS                         0x4000
  83#define COMM_PST                        0x4000
  84#define COMM_CIB                        0x4000
  85#define COMM_RTS                        0x4000
  86#define COMM_DT                         0x2000
  87#define COMM_SPU                        0x1000
  88#define COMM_F                          0x0800
  89#define COMM_NTP                        0x0400
  90#define COMM_ICP                        0x0200
  91#define COMM_RST                        0x0100
  92
  93#define PULSE_PROG                      0x01
  94#define PULSE_SPUE                      0x02
  95
  96#define BRANCH_MAIN                     0xCC
  97#define BRANCH_AUX                      0x33
  98
  99/*
 100 * Duration of the strong pull-up pulse in milliseconds.
 101 */
 102#define PULLUP_PULSE_DURATION           750
 103
 104/* Status flags */
 105#define ST_SPUA                         0x01  /* Strong Pull-up is active */
 106#define ST_PRGA                         0x02  /* 12V programming pulse is being generated */
 107#define ST_12VP                         0x04  /* external 12V programming voltage is present */
 108#define ST_PMOD                         0x08  /* DS2490 powered from USB and external sources */
 109#define ST_HALT                         0x10  /* DS2490 is currently halted */
 110#define ST_IDLE                         0x20  /* DS2490 is currently idle */
 111#define ST_EPOF                         0x80
 112
 113#define SPEED_NORMAL                    0x00
 114#define SPEED_FLEXIBLE                  0x01
 115#define SPEED_OVERDRIVE                 0x02
 116
 117#define NUM_EP                          4
 118#define EP_CONTROL                      0
 119#define EP_STATUS                       1
 120#define EP_DATA_OUT                     2
 121#define EP_DATA_IN                      3
 122
 123struct ds_device
 124{
 125        struct usb_device       *udev;
 126        struct usb_interface    *intf;
 127
 128        int                     ep[NUM_EP];
 129
 130        atomic_t                refcnt;
 131};
 132
 133struct ds_status
 134{
 135        u8                      enable;
 136        u8                      speed;
 137        u8                      pullup_dur;
 138        u8                      ppuls_dur;
 139        u8                      pulldown_slew;
 140        u8                      write1_time;
 141        u8                      write0_time;
 142        u8                      reserved0;
 143        u8                      status;
 144        u8                      command0;
 145        u8                      command1;
 146        u8                      command_buffer_status;
 147        u8                      data_out_buffer_status;
 148        u8                      data_in_buffer_status;
 149        u8                      reserved1;
 150        u8                      reserved2;
 151
 152};
 153
 154int ds_touch_bit(struct ds_device *, u8, u8 *);
 155int ds_read_byte(struct ds_device *, u8 *);
 156int ds_read_bit(struct ds_device *, u8 *);
 157int ds_write_byte(struct ds_device *, u8);
 158int ds_write_bit(struct ds_device *, u8);
 159int ds_start_pulse(struct ds_device *, int);
 160int ds_set_speed(struct ds_device *, int);
 161int ds_reset(struct ds_device *, struct ds_status *);
 162int ds_detect(struct ds_device *, struct ds_status *);
 163int ds_stop_pulse(struct ds_device *, int);
 164int ds_send_data(struct ds_device *, unsigned char *, int);
 165int ds_recv_data(struct ds_device *, unsigned char *, int);
 166int ds_recv_status(struct ds_device *, struct ds_status *);
 167struct ds_device * ds_get_device(void);
 168void ds_put_device(struct ds_device *);
 169int ds_write_block(struct ds_device *, u8 *, int);
 170int ds_read_block(struct ds_device *, u8 *, int);
 171
 172#endif /* __DSCORE_H */
 173
 174