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50#define DRV_NAME "yellowfin"
51#define DRV_VERSION "1.05+LK1.1.6"
52#define DRV_RELDATE "Feb 11, 2002"
53
54#define PFX DRV_NAME ": "
55
56
57
58
59static int debug = 1;
60
61static int max_interrupt_work = 20;
62static int mtu;
63#ifdef YF_PROTOTYPE
64
65static int bogus_rx;
66static int dma_ctrl = 0x004A0263;
67static int fifo_cfg = 0x0020;
68#elif YF_NEW
69static int dma_ctrl = 0x00CAC277;
70static int fifo_cfg = 0x0028;
71#else
72static int dma_ctrl = 0x004A0263;
73static int fifo_cfg = 0x0020;
74#endif
75
76
77
78static int rx_copybreak;
79
80
81
82
83
84#define MAX_UNITS 8
85static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
86static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
87
88
89static int gx_fix;
90
91
92
93
94
95
96
97#define TX_RING_SIZE 16
98#define TX_QUEUE_SIZE 12
99#define RX_RING_SIZE 64
100#define STATUS_TOTAL_SIZE TX_RING_SIZE*sizeof(struct tx_status_words)
101#define TX_TOTAL_SIZE 2*TX_RING_SIZE*sizeof(struct yellowfin_desc)
102#define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct yellowfin_desc)
103
104
105
106#define TX_TIMEOUT (2*HZ)
107#define PKT_BUF_SZ 1536
108
109#define yellowfin_debug debug
110
111#if !defined(__OPTIMIZE__)
112#warning You must compile this file with the correct options!
113#warning See the last lines of the source file.
114#error You must compile this driver with "-O".
115#endif
116
117#include <linux/module.h>
118#include <linux/kernel.h>
119#include <linux/string.h>
120#include <linux/timer.h>
121#include <linux/errno.h>
122#include <linux/ioport.h>
123#include <linux/slab.h>
124#include <linux/interrupt.h>
125#include <linux/pci.h>
126#include <linux/init.h>
127#include <linux/mii.h>
128#include <linux/netdevice.h>
129#include <linux/etherdevice.h>
130#include <linux/skbuff.h>
131#include <linux/ethtool.h>
132#include <linux/crc32.h>
133#include <asm/uaccess.h>
134#include <asm/processor.h>
135#include <asm/unaligned.h>
136#include <asm/bitops.h>
137#include <asm/io.h>
138
139
140static char version[] __devinitdata =
141KERN_INFO DRV_NAME ".c:v1.05 1/09/2001 Written by Donald Becker <becker@scyld.com>\n"
142KERN_INFO " http://www.scyld.com/network/yellowfin.html\n"
143KERN_INFO " (unofficial 2.4.x port, " DRV_VERSION ", " DRV_RELDATE ")\n";
144
145#ifndef USE_IO_OPS
146#undef inb
147#undef inw
148#undef inl
149#undef outb
150#undef outw
151#undef outl
152#define inb readb
153#define inw readw
154#define inl readl
155#define outb writeb
156#define outw writew
157#define outl writel
158#endif
159MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
160MODULE_DESCRIPTION("Packet Engines Yellowfin G-NIC Gigabit Ethernet driver");
161MODULE_LICENSE("GPL");
162
163MODULE_PARM(max_interrupt_work, "i");
164MODULE_PARM(mtu, "i");
165MODULE_PARM(debug, "i");
166MODULE_PARM(rx_copybreak, "i");
167MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
168MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
169MODULE_PARM(gx_fix, "i");
170MODULE_PARM_DESC(max_interrupt_work, "G-NIC maximum events handled per interrupt");
171MODULE_PARM_DESC(mtu, "G-NIC MTU (all boards)");
172MODULE_PARM_DESC(debug, "G-NIC debug level (0-7)");
173MODULE_PARM_DESC(rx_copybreak, "G-NIC copy breakpoint for copy-only-tiny-frames");
174MODULE_PARM_DESC(options, "G-NIC: Bits 0-3: media type, bit 17: full duplex");
175MODULE_PARM_DESC(full_duplex, "G-NIC full duplex setting(s) (1)");
176MODULE_PARM_DESC(gx_fix, "G-NIC: enable GX server chipset bug workaround (0-1)");
177
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256
257enum pci_id_flags_bits {
258
259 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
260
261 PCI_ADDR0=0<<4, PCI_ADDR1=1<<4, PCI_ADDR2=2<<4, PCI_ADDR3=3<<4,
262 PCI_ADDR_64BITS=0x100, PCI_NO_ACPI_WAKE=0x200, PCI_NO_MIN_LATENCY=0x400,
263 PCI_UNUSED_IRQ=0x800,
264};
265enum capability_flags {
266 HasMII=1, FullTxStatus=2, IsGigabit=4, HasMulticastBug=8, FullRxStatus=16,
267 HasMACAddrBug=32,
268 DontUseEeprom=64,
269};
270
271#define YELLOWFIN_SIZE 0x100
272#ifdef USE_IO_OPS
273#define PCI_IOTYPE (PCI_USES_MASTER | PCI_USES_IO | PCI_ADDR0)
274#else
275#define PCI_IOTYPE (PCI_USES_MASTER | PCI_USES_MEM | PCI_ADDR1)
276#endif
277
278struct pci_id_info {
279 const char *name;
280 struct match_info {
281 int pci, pci_mask, subsystem, subsystem_mask;
282 int revision, revision_mask;
283 } id;
284 enum pci_id_flags_bits pci_flags;
285 int io_size;
286 int drv_flags;
287};
288
289static struct pci_id_info pci_id_tbl[] = {
290 {"Yellowfin G-NIC Gigabit Ethernet", { 0x07021000, 0xffffffff},
291 PCI_IOTYPE, YELLOWFIN_SIZE,
292 FullTxStatus | IsGigabit | HasMulticastBug | HasMACAddrBug | DontUseEeprom},
293 {"Symbios SYM83C885", { 0x07011000, 0xffffffff},
294 PCI_IOTYPE, YELLOWFIN_SIZE, HasMII | DontUseEeprom },
295 {0,},
296};
297
298static struct pci_device_id yellowfin_pci_tbl[] = {
299 { 0x1000, 0x0702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
300 { 0x1000, 0x0701, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
301 { 0, }
302};
303MODULE_DEVICE_TABLE (pci, yellowfin_pci_tbl);
304
305
306
307enum yellowfin_offsets {
308 TxCtrl=0x00, TxStatus=0x04, TxPtr=0x0C,
309 TxIntrSel=0x10, TxBranchSel=0x14, TxWaitSel=0x18,
310 RxCtrl=0x40, RxStatus=0x44, RxPtr=0x4C,
311 RxIntrSel=0x50, RxBranchSel=0x54, RxWaitSel=0x58,
312 EventStatus=0x80, IntrEnb=0x82, IntrClear=0x84, IntrStatus=0x86,
313 ChipRev=0x8C, DMACtrl=0x90, TxThreshold=0x94,
314 Cnfg=0xA0, FrameGap0=0xA2, FrameGap1=0xA4,
315 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
316 MII_Status=0xAE,
317 RxDepth=0xB8, FlowCtrl=0xBC,
318 AddrMode=0xD0, StnAddr=0xD2, HashTbl=0xD8, FIFOcfg=0xF8,
319 EEStatus=0xF0, EECtrl=0xF1, EEAddr=0xF2, EERead=0xF3, EEWrite=0xF4,
320 EEFeature=0xF5,
321};
322
323
324
325struct yellowfin_desc {
326 u32 dbdma_cmd;
327 u32 addr;
328 u32 branch_addr;
329 u32 result_status;
330};
331
332struct tx_status_words {
333#ifdef __BIG_ENDIAN
334 u16 tx_errs;
335 u16 tx_cnt;
336 u16 paused;
337 u16 total_tx_cnt;
338#else
339 u16 tx_cnt;
340 u16 tx_errs;
341 u16 total_tx_cnt;
342 u16 paused;
343#endif
344};
345
346
347enum desc_cmd_bits {
348 CMD_TX_PKT=0x10000000, CMD_RX_BUF=0x20000000, CMD_TXSTATUS=0x30000000,
349 CMD_NOP=0x60000000, CMD_STOP=0x70000000,
350 BRANCH_ALWAYS=0x0C0000, INTR_ALWAYS=0x300000, WAIT_ALWAYS=0x030000,
351 BRANCH_IFTRUE=0x040000,
352};
353
354
355enum desc_status_bits { RX_EOP=0x0040, };
356
357
358enum intr_status_bits {
359 IntrRxDone=0x01, IntrRxInvalid=0x02, IntrRxPCIFault=0x04,IntrRxPCIErr=0x08,
360 IntrTxDone=0x10, IntrTxInvalid=0x20, IntrTxPCIFault=0x40,IntrTxPCIErr=0x80,
361 IntrEarlyRx=0x100, IntrWakeup=0x200, };
362
363#define PRIV_ALIGN 31
364#define MII_CNT 4
365struct yellowfin_private {
366
367
368 struct yellowfin_desc *rx_ring;
369 struct yellowfin_desc *tx_ring;
370 struct sk_buff* rx_skbuff[RX_RING_SIZE];
371 struct sk_buff* tx_skbuff[TX_RING_SIZE];
372 dma_addr_t rx_ring_dma;
373 dma_addr_t tx_ring_dma;
374
375 struct tx_status_words *tx_status;
376 dma_addr_t tx_status_dma;
377
378 struct timer_list timer;
379 struct net_device_stats stats;
380
381 int chip_id, drv_flags;
382 struct pci_dev *pci_dev;
383 unsigned int cur_rx, dirty_rx;
384 unsigned int rx_buf_sz;
385 struct tx_status_words *tx_tail_desc;
386 unsigned int cur_tx, dirty_tx;
387 int tx_threshold;
388 unsigned int tx_full:1;
389 unsigned int full_duplex:1;
390 unsigned int duplex_lock:1;
391 unsigned int medialock:1;
392 unsigned int default_port:4;
393
394 int mii_cnt;
395 u16 advertising;
396 unsigned char phys[MII_CNT];
397 spinlock_t lock;
398};
399
400static int read_eeprom(long ioaddr, int location);
401static int mdio_read(long ioaddr, int phy_id, int location);
402static void mdio_write(long ioaddr, int phy_id, int location, int value);
403static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
404static int yellowfin_open(struct net_device *dev);
405static void yellowfin_timer(unsigned long data);
406static void yellowfin_tx_timeout(struct net_device *dev);
407static void yellowfin_init_ring(struct net_device *dev);
408static int yellowfin_start_xmit(struct sk_buff *skb, struct net_device *dev);
409static irqreturn_t yellowfin_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
410static int yellowfin_rx(struct net_device *dev);
411static void yellowfin_error(struct net_device *dev, int intr_status);
412static int yellowfin_close(struct net_device *dev);
413static struct net_device_stats *yellowfin_get_stats(struct net_device *dev);
414static void set_rx_mode(struct net_device *dev);
415
416
417static int __devinit yellowfin_init_one(struct pci_dev *pdev,
418 const struct pci_device_id *ent)
419{
420 struct net_device *dev;
421 struct yellowfin_private *np;
422 int irq;
423 int chip_idx = ent->driver_data;
424 static int find_cnt;
425 long ioaddr, real_ioaddr;
426 int i, option = find_cnt < MAX_UNITS ? options[find_cnt] : 0;
427 int drv_flags = pci_id_tbl[chip_idx].drv_flags;
428 void *ring_space;
429 dma_addr_t ring_dma;
430
431
432#ifndef MODULE
433 static int printed_version;
434 if (!printed_version++)
435 printk(version);
436#endif
437
438 i = pci_enable_device(pdev);
439 if (i) return i;
440
441 dev = alloc_etherdev(sizeof(*np));
442 if (!dev) {
443 printk (KERN_ERR PFX "cannot allocate ethernet device\n");
444 return -ENOMEM;
445 }
446 SET_MODULE_OWNER(dev);
447 SET_NETDEV_DEV(dev, &pdev->dev);
448
449 np = dev->priv;
450
451 if (pci_request_regions(pdev, dev->name))
452 goto err_out_free_netdev;
453
454 pci_set_master (pdev);
455
456#ifdef USE_IO_OPS
457 real_ioaddr = ioaddr = pci_resource_start (pdev, 0);
458#else
459 real_ioaddr = ioaddr = pci_resource_start (pdev, 1);
460 ioaddr = (long) ioremap(ioaddr, YELLOWFIN_SIZE);
461 if (!ioaddr)
462 goto err_out_free_res;
463#endif
464 irq = pdev->irq;
465
466 if (drv_flags & DontUseEeprom)
467 for (i = 0; i < 6; i++)
468 dev->dev_addr[i] = inb(ioaddr + StnAddr + i);
469 else {
470 int ee_offset = (read_eeprom(ioaddr, 6) == 0xff ? 0x100 : 0);
471 for (i = 0; i < 6; i++)
472 dev->dev_addr[i] = read_eeprom(ioaddr, ee_offset + i);
473 }
474
475
476 outl(0x80000000, ioaddr + DMACtrl);
477
478 dev->base_addr = ioaddr;
479 dev->irq = irq;
480
481 pci_set_drvdata(pdev, dev);
482 spin_lock_init(&np->lock);
483
484 np->pci_dev = pdev;
485 np->chip_id = chip_idx;
486 np->drv_flags = drv_flags;
487
488 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
489 if (!ring_space)
490 goto err_out_cleardev;
491 np->tx_ring = (struct yellowfin_desc *)ring_space;
492 np->tx_ring_dma = ring_dma;
493
494 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
495 if (!ring_space)
496 goto err_out_unmap_tx;
497 np->rx_ring = (struct yellowfin_desc *)ring_space;
498 np->rx_ring_dma = ring_dma;
499
500 ring_space = pci_alloc_consistent(pdev, STATUS_TOTAL_SIZE, &ring_dma);
501 if (!ring_space)
502 goto err_out_unmap_rx;
503 np->tx_status = (struct tx_status_words *)ring_space;
504 np->tx_status_dma = ring_dma;
505
506 if (dev->mem_start)
507 option = dev->mem_start;
508
509
510 if (option > 0) {
511 if (option & 0x200)
512 np->full_duplex = 1;
513 np->default_port = option & 15;
514 if (np->default_port)
515 np->medialock = 1;
516 }
517 if (find_cnt < MAX_UNITS && full_duplex[find_cnt] > 0)
518 np->full_duplex = 1;
519
520 if (np->full_duplex)
521 np->duplex_lock = 1;
522
523
524 dev->open = &yellowfin_open;
525 dev->hard_start_xmit = &yellowfin_start_xmit;
526 dev->stop = &yellowfin_close;
527 dev->get_stats = &yellowfin_get_stats;
528 dev->set_multicast_list = &set_rx_mode;
529 dev->do_ioctl = &netdev_ioctl;
530 dev->tx_timeout = yellowfin_tx_timeout;
531 dev->watchdog_timeo = TX_TIMEOUT;
532
533 if (mtu)
534 dev->mtu = mtu;
535
536 i = register_netdev(dev);
537 if (i)
538 goto err_out_unmap_status;
539
540 printk(KERN_INFO "%s: %s type %8x at 0x%lx, ",
541 dev->name, pci_id_tbl[chip_idx].name, inl(ioaddr + ChipRev), ioaddr);
542 for (i = 0; i < 5; i++)
543 printk("%2.2x:", dev->dev_addr[i]);
544 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
545
546 if (np->drv_flags & HasMII) {
547 int phy, phy_idx = 0;
548 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
549 int mii_status = mdio_read(ioaddr, phy, 1);
550 if (mii_status != 0xffff && mii_status != 0x0000) {
551 np->phys[phy_idx++] = phy;
552 np->advertising = mdio_read(ioaddr, phy, 4);
553 printk(KERN_INFO "%s: MII PHY found at address %d, status "
554 "0x%4.4x advertising %4.4x.\n",
555 dev->name, phy, mii_status, np->advertising);
556 }
557 }
558 np->mii_cnt = phy_idx;
559 }
560
561 find_cnt++;
562
563 return 0;
564
565err_out_unmap_status:
566 pci_free_consistent(pdev, STATUS_TOTAL_SIZE, np->tx_status,
567 np->tx_status_dma);
568err_out_unmap_rx:
569 pci_free_consistent(pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
570err_out_unmap_tx:
571 pci_free_consistent(pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
572err_out_cleardev:
573 pci_set_drvdata(pdev, NULL);
574#ifndef USE_IO_OPS
575 iounmap((void *)ioaddr);
576err_out_free_res:
577#endif
578 pci_release_regions(pdev);
579err_out_free_netdev:
580 free_netdev (dev);
581 return -ENODEV;
582}
583
584static int __devinit read_eeprom(long ioaddr, int location)
585{
586 int bogus_cnt = 10000;
587
588 outb(location, ioaddr + EEAddr);
589 outb(0x30 | ((location >> 8) & 7), ioaddr + EECtrl);
590 while ((inb(ioaddr + EEStatus) & 0x80) && --bogus_cnt > 0)
591 ;
592 return inb(ioaddr + EERead);
593}
594
595
596
597
598
599static int mdio_read(long ioaddr, int phy_id, int location)
600{
601 int i;
602
603 outw((phy_id<<8) + location, ioaddr + MII_Addr);
604 outw(1, ioaddr + MII_Cmd);
605 for (i = 10000; i >= 0; i--)
606 if ((inw(ioaddr + MII_Status) & 1) == 0)
607 break;
608 return inw(ioaddr + MII_Rd_Data);
609}
610
611static void mdio_write(long ioaddr, int phy_id, int location, int value)
612{
613 int i;
614
615 outw((phy_id<<8) + location, ioaddr + MII_Addr);
616 outw(value, ioaddr + MII_Wr_Data);
617
618
619 for (i = 10000; i >= 0; i--)
620 if ((inw(ioaddr + MII_Status) & 1) == 0)
621 break;
622 return;
623}
624
625
626static int yellowfin_open(struct net_device *dev)
627{
628 struct yellowfin_private *yp = dev->priv;
629 long ioaddr = dev->base_addr;
630 int i;
631
632
633 outl(0x80000000, ioaddr + DMACtrl);
634
635 i = request_irq(dev->irq, &yellowfin_interrupt, SA_SHIRQ, dev->name, dev);
636 if (i) return i;
637
638 if (yellowfin_debug > 1)
639 printk(KERN_DEBUG "%s: yellowfin_open() irq %d.\n",
640 dev->name, dev->irq);
641
642 yellowfin_init_ring(dev);
643
644 outl(yp->rx_ring_dma, ioaddr + RxPtr);
645 outl(yp->tx_ring_dma, ioaddr + TxPtr);
646
647 for (i = 0; i < 6; i++)
648 outb(dev->dev_addr[i], ioaddr + StnAddr + i);
649
650
651
652 outl(0x00800080, ioaddr + TxIntrSel);
653 outl(0x00800080, ioaddr + TxBranchSel);
654 outl(0x00400040, ioaddr + TxWaitSel);
655 outl(0x00400040, ioaddr + RxIntrSel);
656 outl(0x00400040, ioaddr + RxBranchSel);
657 outl(0x00400040, ioaddr + RxWaitSel);
658
659
660
661 outl(dma_ctrl, ioaddr + DMACtrl);
662 outw(fifo_cfg, ioaddr + FIFOcfg);
663
664 outl(0x0030FFFF, ioaddr + FlowCtrl);
665
666 yp->tx_threshold = 32;
667 outl(yp->tx_threshold, ioaddr + TxThreshold);
668
669 if (dev->if_port == 0)
670 dev->if_port = yp->default_port;
671
672 netif_start_queue(dev);
673
674
675 if (yp->drv_flags & IsGigabit) {
676
677 yp->full_duplex = 1;
678 outw(0x01CF, ioaddr + Cnfg);
679 } else {
680 outw(0x0018, ioaddr + FrameGap0);
681 outw(0x1018, ioaddr + FrameGap1);
682 outw(0x101C | (yp->full_duplex ? 2 : 0), ioaddr + Cnfg);
683 }
684 set_rx_mode(dev);
685
686
687 outw(0x81ff, ioaddr + IntrEnb);
688 outw(0x0000, ioaddr + EventStatus);
689 outl(0x80008000, ioaddr + RxCtrl);
690 outl(0x80008000, ioaddr + TxCtrl);
691
692 if (yellowfin_debug > 2) {
693 printk(KERN_DEBUG "%s: Done yellowfin_open().\n",
694 dev->name);
695 }
696
697
698 init_timer(&yp->timer);
699 yp->timer.expires = jiffies + 3*HZ;
700 yp->timer.data = (unsigned long)dev;
701 yp->timer.function = &yellowfin_timer;
702 add_timer(&yp->timer);
703
704 return 0;
705}
706
707static void yellowfin_timer(unsigned long data)
708{
709 struct net_device *dev = (struct net_device *)data;
710 struct yellowfin_private *yp = dev->priv;
711 long ioaddr = dev->base_addr;
712 int next_tick = 60*HZ;
713
714 if (yellowfin_debug > 3) {
715 printk(KERN_DEBUG "%s: Yellowfin timer tick, status %8.8x.\n",
716 dev->name, inw(ioaddr + IntrStatus));
717 }
718
719 if (yp->mii_cnt) {
720 int bmsr = mdio_read(ioaddr, yp->phys[0], MII_BMSR);
721 int lpa = mdio_read(ioaddr, yp->phys[0], MII_LPA);
722 int negotiated = lpa & yp->advertising;
723 if (yellowfin_debug > 1)
724 printk(KERN_DEBUG "%s: MII #%d status register is %4.4x, "
725 "link partner capability %4.4x.\n",
726 dev->name, yp->phys[0], bmsr, lpa);
727
728 yp->full_duplex = mii_duplex(yp->duplex_lock, negotiated);
729
730 outw(0x101C | (yp->full_duplex ? 2 : 0), ioaddr + Cnfg);
731
732 if (bmsr & BMSR_LSTATUS)
733 next_tick = 60*HZ;
734 else
735 next_tick = 3*HZ;
736 }
737
738 yp->timer.expires = jiffies + next_tick;
739 add_timer(&yp->timer);
740}
741
742static void yellowfin_tx_timeout(struct net_device *dev)
743{
744 struct yellowfin_private *yp = dev->priv;
745 long ioaddr = dev->base_addr;
746
747 printk(KERN_WARNING "%s: Yellowfin transmit timed out at %d/%d Tx "
748 "status %4.4x, Rx status %4.4x, resetting...\n",
749 dev->name, yp->cur_tx, yp->dirty_tx,
750 inl(ioaddr + TxStatus), inl(ioaddr + RxStatus));
751
752
753 if (yellowfin_debug) {
754 int i;
755 printk(KERN_WARNING " Rx ring %p: ", yp->rx_ring);
756 for (i = 0; i < RX_RING_SIZE; i++)
757 printk(" %8.8x", yp->rx_ring[i].result_status);
758 printk("\n"KERN_WARNING" Tx ring %p: ", yp->tx_ring);
759 for (i = 0; i < TX_RING_SIZE; i++)
760 printk(" %4.4x /%8.8x", yp->tx_status[i].tx_errs,
761 yp->tx_ring[i].result_status);
762 printk("\n");
763 }
764
765
766
767 dev->if_port = 0;
768
769
770 outl(0x10001000, dev->base_addr + TxCtrl);
771 if (yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE)
772 netif_wake_queue (dev);
773
774 dev->trans_start = jiffies;
775 yp->stats.tx_errors++;
776}
777
778
779static void yellowfin_init_ring(struct net_device *dev)
780{
781 struct yellowfin_private *yp = dev->priv;
782 int i;
783
784 yp->tx_full = 0;
785 yp->cur_rx = yp->cur_tx = 0;
786 yp->dirty_tx = 0;
787
788 yp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
789
790 for (i = 0; i < RX_RING_SIZE; i++) {
791 yp->rx_ring[i].dbdma_cmd =
792 cpu_to_le32(CMD_RX_BUF | INTR_ALWAYS | yp->rx_buf_sz);
793 yp->rx_ring[i].branch_addr = cpu_to_le32(yp->rx_ring_dma +
794 ((i+1)%RX_RING_SIZE)*sizeof(struct yellowfin_desc));
795 }
796
797 for (i = 0; i < RX_RING_SIZE; i++) {
798 struct sk_buff *skb = dev_alloc_skb(yp->rx_buf_sz);
799 yp->rx_skbuff[i] = skb;
800 if (skb == NULL)
801 break;
802 skb->dev = dev;
803 skb_reserve(skb, 2);
804 yp->rx_ring[i].addr = cpu_to_le32(pci_map_single(yp->pci_dev,
805 skb->tail, yp->rx_buf_sz, PCI_DMA_FROMDEVICE));
806 }
807 yp->rx_ring[i-1].dbdma_cmd = cpu_to_le32(CMD_STOP);
808 yp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
809
810#define NO_TXSTATS
811#ifdef NO_TXSTATS
812
813 for (i = 0; i < TX_RING_SIZE; i++) {
814 yp->tx_skbuff[i] = 0;
815 yp->tx_ring[i].dbdma_cmd = cpu_to_le32(CMD_STOP);
816 yp->tx_ring[i].branch_addr = cpu_to_le32(yp->tx_ring_dma +
817 ((i+1)%TX_RING_SIZE)*sizeof(struct yellowfin_desc));
818 }
819
820 yp->tx_ring[--i].dbdma_cmd = cpu_to_le32(CMD_STOP | BRANCH_ALWAYS);
821#else
822{
823 int j;
824
825
826 for (i = 0; i < TX_RING_SIZE; i++) {
827 j = 2*i;
828 yp->tx_skbuff[i] = 0;
829
830 yp->tx_ring[j].dbdma_cmd = cpu_to_le32(CMD_STOP);
831 yp->tx_ring[j].branch_addr = cpu_to_le32(yp->tx_ring_dma +
832 (j+1)*sizeof(struct yellowfin_desc);
833 j++;
834 if (yp->flags & FullTxStatus) {
835 yp->tx_ring[j].dbdma_cmd =
836 cpu_to_le32(CMD_TXSTATUS | sizeof(*yp->tx_status));
837 yp->tx_ring[j].request_cnt = sizeof(*yp->tx_status);
838 yp->tx_ring[j].addr = cpu_to_le32(yp->tx_status_dma +
839 i*sizeof(struct tx_status_words);
840 } else {
841
842 yp->tx_ring[j].dbdma_cmd =
843 cpu_to_le32(CMD_TXSTATUS | INTR_ALWAYS | 2);
844 yp->tx_ring[j].request_cnt = 2;
845
846 yp->tx_ring[j].addr = cpu_to_le32(yp->tx_status_dma +
847 i*sizeof(struct tx_status_words) +
848 &(yp->tx_status[0].tx_errs) -
849 &(yp->tx_status[0]));
850 }
851 yp->tx_ring[j].branch_addr = cpu_to_le32(yp->tx_ring_dma +
852 ((j+1)%(2*TX_RING_SIZE))*sizeof(struct yellowfin_desc));
853 }
854
855 yp->tx_ring[++j].dbdma_cmd |= cpu_to_le32(BRANCH_ALWAYS | INTR_ALWAYS);
856}
857#endif
858 yp->tx_tail_desc = &yp->tx_status[0];
859 return;
860}
861
862static int yellowfin_start_xmit(struct sk_buff *skb, struct net_device *dev)
863{
864 struct yellowfin_private *yp = dev->priv;
865 unsigned entry;
866 int len = skb->len;
867
868 netif_stop_queue (dev);
869
870
871
872
873
874 entry = yp->cur_tx % TX_RING_SIZE;
875
876 if (gx_fix) {
877 int cacheline_end = ((unsigned long)skb->data + skb->len) % 32;
878
879 if (cacheline_end > 24 || cacheline_end == 0) {
880 len = skb->len + 32 - cacheline_end + 1;
881 if (len != skb->len)
882 skb = skb_padto(skb, len);
883 }
884 if (skb == NULL) {
885 yp->tx_skbuff[entry] = NULL;
886 netif_wake_queue(dev);
887 return 0;
888 }
889 }
890 yp->tx_skbuff[entry] = skb;
891
892#ifdef NO_TXSTATS
893 yp->tx_ring[entry].addr = cpu_to_le32(pci_map_single(yp->pci_dev,
894 skb->data, len, PCI_DMA_TODEVICE));
895 yp->tx_ring[entry].result_status = 0;
896 if (entry >= TX_RING_SIZE-1) {
897
898 yp->tx_ring[0].dbdma_cmd = cpu_to_le32(CMD_STOP);
899 yp->tx_ring[TX_RING_SIZE-1].dbdma_cmd =
900 cpu_to_le32(CMD_TX_PKT|BRANCH_ALWAYS | len);
901 } else {
902 yp->tx_ring[entry+1].dbdma_cmd = cpu_to_le32(CMD_STOP);
903 yp->tx_ring[entry].dbdma_cmd =
904 cpu_to_le32(CMD_TX_PKT | BRANCH_IFTRUE | len);
905 }
906 yp->cur_tx++;
907#else
908 yp->tx_ring[entry<<1].request_cnt = len;
909 yp->tx_ring[entry<<1].addr = cpu_to_le32(pci_map_single(yp->pci_dev,
910 skb->data, len, PCI_DMA_TODEVICE));
911
912
913
914 yp->cur_tx++;
915 {
916 unsigned next_entry = yp->cur_tx % TX_RING_SIZE;
917 yp->tx_ring[next_entry<<1].dbdma_cmd = cpu_to_le32(CMD_STOP);
918 }
919
920
921 yp->tx_ring[entry<<1].dbdma_cmd =
922 cpu_to_le32( ((entry % 6) == 0 ? CMD_TX_PKT|INTR_ALWAYS|BRANCH_IFTRUE :
923 CMD_TX_PKT | BRANCH_IFTRUE) | len);
924#endif
925
926
927
928
929 outl(0x10001000, dev->base_addr + TxCtrl);
930
931 if (yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE)
932 netif_start_queue (dev);
933 else
934 yp->tx_full = 1;
935 dev->trans_start = jiffies;
936
937 if (yellowfin_debug > 4) {
938 printk(KERN_DEBUG "%s: Yellowfin transmit frame #%d queued in slot %d.\n",
939 dev->name, yp->cur_tx, entry);
940 }
941 return 0;
942}
943
944
945
946static irqreturn_t yellowfin_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
947{
948 struct net_device *dev = dev_instance;
949 struct yellowfin_private *yp;
950 long ioaddr;
951 int boguscnt = max_interrupt_work;
952 unsigned int handled = 0;
953
954#ifndef final_version
955 if (dev == NULL) {
956 printk (KERN_ERR "yellowfin_interrupt(): irq %d for unknown device.\n", irq);
957 return IRQ_NONE;
958 }
959#endif
960
961 ioaddr = dev->base_addr;
962 yp = dev->priv;
963
964 spin_lock (&yp->lock);
965
966 do {
967 u16 intr_status = inw(ioaddr + IntrClear);
968
969 if (yellowfin_debug > 4)
970 printk(KERN_DEBUG "%s: Yellowfin interrupt, status %4.4x.\n",
971 dev->name, intr_status);
972
973 if (intr_status == 0)
974 break;
975 handled = 1;
976
977 if (intr_status & (IntrRxDone | IntrEarlyRx)) {
978 yellowfin_rx(dev);
979 outl(0x10001000, ioaddr + RxCtrl);
980 }
981
982#ifdef NO_TXSTATS
983 for (; yp->cur_tx - yp->dirty_tx > 0; yp->dirty_tx++) {
984 int entry = yp->dirty_tx % TX_RING_SIZE;
985 struct sk_buff *skb;
986
987 if (yp->tx_ring[entry].result_status == 0)
988 break;
989 skb = yp->tx_skbuff[entry];
990 yp->stats.tx_packets++;
991 yp->stats.tx_bytes += skb->len;
992
993 pci_unmap_single(yp->pci_dev, yp->tx_ring[entry].addr,
994 skb->len, PCI_DMA_TODEVICE);
995 dev_kfree_skb_irq(skb);
996 yp->tx_skbuff[entry] = 0;
997 }
998 if (yp->tx_full
999 && yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE - 4) {
1000
1001 yp->tx_full = 0;
1002 netif_wake_queue(dev);
1003 }
1004#else
1005 if ((intr_status & IntrTxDone) || (yp->tx_tail_desc->tx_errs)) {
1006 unsigned dirty_tx = yp->dirty_tx;
1007
1008 for (dirty_tx = yp->dirty_tx; yp->cur_tx - dirty_tx > 0;
1009 dirty_tx++) {
1010
1011 int entry = dirty_tx % TX_RING_SIZE;
1012 u16 tx_errs = yp->tx_status[entry].tx_errs;
1013 struct sk_buff *skb;
1014
1015#ifndef final_version
1016 if (yellowfin_debug > 5)
1017 printk(KERN_DEBUG "%s: Tx queue %d check, Tx status "
1018 "%4.4x %4.4x %4.4x %4.4x.\n",
1019 dev->name, entry,
1020 yp->tx_status[entry].tx_cnt,
1021 yp->tx_status[entry].tx_errs,
1022 yp->tx_status[entry].total_tx_cnt,
1023 yp->tx_status[entry].paused);
1024#endif
1025 if (tx_errs == 0)
1026 break;
1027 skb = yp->tx_skbuff[entry];
1028 if (tx_errs & 0xF810) {
1029
1030#ifndef final_version
1031 if (yellowfin_debug > 1)
1032 printk(KERN_DEBUG "%s: Transmit error, Tx status %4.4x.\n",
1033 dev->name, tx_errs);
1034#endif
1035 yp->stats.tx_errors++;
1036 if (tx_errs & 0xF800) yp->stats.tx_aborted_errors++;
1037 if (tx_errs & 0x0800) yp->stats.tx_carrier_errors++;
1038 if (tx_errs & 0x2000) yp->stats.tx_window_errors++;
1039 if (tx_errs & 0x8000) yp->stats.tx_fifo_errors++;
1040 } else {
1041#ifndef final_version
1042 if (yellowfin_debug > 4)
1043 printk(KERN_DEBUG "%s: Normal transmit, Tx status %4.4x.\n",
1044 dev->name, tx_errs);
1045#endif
1046 yp->stats.tx_bytes += skb->len;
1047 yp->stats.collisions += tx_errs & 15;
1048 yp->stats.tx_packets++;
1049 }
1050
1051 pci_unmap_single(yp->pci_dev,
1052 yp->tx_ring[entry<<1].addr, skb->len,
1053 PCI_DMA_TODEVICE);
1054 dev_kfree_skb_irq(skb);
1055 yp->tx_skbuff[entry] = 0;
1056
1057 yp->tx_status[entry].tx_errs = 0;
1058 }
1059
1060#ifndef final_version
1061 if (yp->cur_tx - dirty_tx > TX_RING_SIZE) {
1062 printk(KERN_ERR "%s: Out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
1063 dev->name, dirty_tx, yp->cur_tx, yp->tx_full);
1064 dirty_tx += TX_RING_SIZE;
1065 }
1066#endif
1067
1068 if (yp->tx_full
1069 && yp->cur_tx - dirty_tx < TX_QUEUE_SIZE - 2) {
1070
1071 yp->tx_full = 0;
1072 netif_wake_queue(dev);
1073 }
1074
1075 yp->dirty_tx = dirty_tx;
1076 yp->tx_tail_desc = &yp->tx_status[dirty_tx % TX_RING_SIZE];
1077 }
1078#endif
1079
1080
1081 if (intr_status & 0x2ee)
1082 yellowfin_error(dev, intr_status);
1083
1084 if (--boguscnt < 0) {
1085 printk(KERN_WARNING "%s: Too much work at interrupt, "
1086 "status=0x%4.4x.\n",
1087 dev->name, intr_status);
1088 break;
1089 }
1090 } while (1);
1091
1092 if (yellowfin_debug > 3)
1093 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1094 dev->name, inw(ioaddr + IntrStatus));
1095
1096 spin_unlock (&yp->lock);
1097 return IRQ_RETVAL(handled);
1098}
1099
1100
1101
1102static int yellowfin_rx(struct net_device *dev)
1103{
1104 struct yellowfin_private *yp = dev->priv;
1105 int entry = yp->cur_rx % RX_RING_SIZE;
1106 int boguscnt = yp->dirty_rx + RX_RING_SIZE - yp->cur_rx;
1107
1108 if (yellowfin_debug > 4) {
1109 printk(KERN_DEBUG " In yellowfin_rx(), entry %d status %8.8x.\n",
1110 entry, yp->rx_ring[entry].result_status);
1111 printk(KERN_DEBUG " #%d desc. %8.8x %8.8x %8.8x.\n",
1112 entry, yp->rx_ring[entry].dbdma_cmd, yp->rx_ring[entry].addr,
1113 yp->rx_ring[entry].result_status);
1114 }
1115
1116
1117 while (1) {
1118 struct yellowfin_desc *desc = &yp->rx_ring[entry];
1119 struct sk_buff *rx_skb = yp->rx_skbuff[entry];
1120 s16 frame_status;
1121 u16 desc_status;
1122 int data_size;
1123 u8 *buf_addr;
1124
1125 if(!desc->result_status)
1126 break;
1127 pci_dma_sync_single(yp->pci_dev, desc->addr,
1128 yp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1129 desc_status = le32_to_cpu(desc->result_status) >> 16;
1130 buf_addr = rx_skb->tail;
1131 data_size = (le32_to_cpu(desc->dbdma_cmd) -
1132 le32_to_cpu(desc->result_status)) & 0xffff;
1133 frame_status = le16_to_cpu(get_unaligned((s16*)&(buf_addr[data_size - 2])));
1134 if (yellowfin_debug > 4)
1135 printk(KERN_DEBUG " yellowfin_rx() status was %4.4x.\n",
1136 frame_status);
1137 if (--boguscnt < 0)
1138 break;
1139 if ( ! (desc_status & RX_EOP)) {
1140 if (data_size != 0)
1141 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned multiple buffers,"
1142 " status %4.4x, data_size %d!\n", dev->name, desc_status, data_size);
1143 yp->stats.rx_length_errors++;
1144 } else if ((yp->drv_flags & IsGigabit) && (frame_status & 0x0038)) {
1145
1146 if (yellowfin_debug > 3)
1147 printk(KERN_DEBUG " yellowfin_rx() Rx error was %4.4x.\n",
1148 frame_status);
1149 yp->stats.rx_errors++;
1150 if (frame_status & 0x0060) yp->stats.rx_length_errors++;
1151 if (frame_status & 0x0008) yp->stats.rx_frame_errors++;
1152 if (frame_status & 0x0010) yp->stats.rx_crc_errors++;
1153 if (frame_status < 0) yp->stats.rx_dropped++;
1154 } else if ( !(yp->drv_flags & IsGigabit) &&
1155 ((buf_addr[data_size-1] & 0x85) || buf_addr[data_size-2] & 0xC0)) {
1156 u8 status1 = buf_addr[data_size-2];
1157 u8 status2 = buf_addr[data_size-1];
1158 yp->stats.rx_errors++;
1159 if (status1 & 0xC0) yp->stats.rx_length_errors++;
1160 if (status2 & 0x03) yp->stats.rx_frame_errors++;
1161 if (status2 & 0x04) yp->stats.rx_crc_errors++;
1162 if (status2 & 0x80) yp->stats.rx_dropped++;
1163#ifdef YF_PROTOTYPE
1164 } else if ((yp->flags & HasMACAddrBug) &&
1165 memcmp(le32_to_cpu(yp->rx_ring_dma +
1166 entry*sizeof(struct yellowfin_desc)),
1167 dev->dev_addr, 6) != 0 &&
1168 memcmp(le32_to_cpu(yp->rx_ring_dma +
1169 entry*sizeof(struct yellowfin_desc)),
1170 "\377\377\377\377\377\377", 6) != 0) {
1171 if (bogus_rx++ == 0)
1172 printk(KERN_WARNING "%s: Bad frame to %2.2x:%2.2x:%2.2x:%2.2x:"
1173 "%2.2x:%2.2x.\n",
1174 dev->name, buf_addr[0], buf_addr[1], buf_addr[2],
1175 buf_addr[3], buf_addr[4], buf_addr[5]);
1176#endif
1177 } else {
1178 struct sk_buff *skb;
1179 int pkt_len = data_size -
1180 (yp->chip_id ? 7 : 8 + buf_addr[data_size - 8]);
1181
1182
1183#ifndef final_version
1184 if (yellowfin_debug > 4)
1185 printk(KERN_DEBUG " yellowfin_rx() normal Rx pkt length %d"
1186 " of %d, bogus_cnt %d.\n",
1187 pkt_len, data_size, boguscnt);
1188#endif
1189
1190
1191 if (pkt_len > rx_copybreak) {
1192 skb_put(skb = rx_skb, pkt_len);
1193 pci_unmap_single(yp->pci_dev,
1194 yp->rx_ring[entry].addr,
1195 yp->rx_buf_sz,
1196 PCI_DMA_FROMDEVICE);
1197 yp->rx_skbuff[entry] = NULL;
1198 } else {
1199 skb = dev_alloc_skb(pkt_len + 2);
1200 if (skb == NULL)
1201 break;
1202 skb->dev = dev;
1203 skb_reserve(skb, 2);
1204#if HAS_IP_COPYSUM
1205 eth_copy_and_sum(skb, rx_skb->tail, pkt_len, 0);
1206 skb_put(skb, pkt_len);
1207#else
1208 memcpy(skb_put(skb, pkt_len),
1209 rx_skb->tail, pkt_len);
1210#endif
1211 }
1212 skb->protocol = eth_type_trans(skb, dev);
1213 netif_rx(skb);
1214 dev->last_rx = jiffies;
1215 yp->stats.rx_packets++;
1216 yp->stats.rx_bytes += pkt_len;
1217 }
1218 entry = (++yp->cur_rx) % RX_RING_SIZE;
1219 }
1220
1221
1222 for (; yp->cur_rx - yp->dirty_rx > 0; yp->dirty_rx++) {
1223 entry = yp->dirty_rx % RX_RING_SIZE;
1224 if (yp->rx_skbuff[entry] == NULL) {
1225 struct sk_buff *skb = dev_alloc_skb(yp->rx_buf_sz);
1226 if (skb == NULL)
1227 break;
1228 yp->rx_skbuff[entry] = skb;
1229 skb->dev = dev;
1230 skb_reserve(skb, 2);
1231 yp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(yp->pci_dev,
1232 skb->tail, yp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1233 }
1234 yp->rx_ring[entry].dbdma_cmd = cpu_to_le32(CMD_STOP);
1235 yp->rx_ring[entry].result_status = 0;
1236 if (entry != 0)
1237 yp->rx_ring[entry - 1].dbdma_cmd =
1238 cpu_to_le32(CMD_RX_BUF | INTR_ALWAYS | yp->rx_buf_sz);
1239 else
1240 yp->rx_ring[RX_RING_SIZE - 1].dbdma_cmd =
1241 cpu_to_le32(CMD_RX_BUF | INTR_ALWAYS | BRANCH_ALWAYS
1242 | yp->rx_buf_sz);
1243 }
1244
1245 return 0;
1246}
1247
1248static void yellowfin_error(struct net_device *dev, int intr_status)
1249{
1250 struct yellowfin_private *yp = dev->priv;
1251
1252 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1253 dev->name, intr_status);
1254
1255 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1256 yp->stats.tx_errors++;
1257 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1258 yp->stats.rx_errors++;
1259}
1260
1261static int yellowfin_close(struct net_device *dev)
1262{
1263 long ioaddr = dev->base_addr;
1264 struct yellowfin_private *yp = dev->priv;
1265 int i;
1266
1267 netif_stop_queue (dev);
1268
1269 if (yellowfin_debug > 1) {
1270 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x "
1271 "Rx %4.4x Int %2.2x.\n",
1272 dev->name, inw(ioaddr + TxStatus),
1273 inw(ioaddr + RxStatus), inw(ioaddr + IntrStatus));
1274 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1275 dev->name, yp->cur_tx, yp->dirty_tx, yp->cur_rx, yp->dirty_rx);
1276 }
1277
1278
1279 outw(0x0000, ioaddr + IntrEnb);
1280
1281
1282 outl(0x80000000, ioaddr + RxCtrl);
1283 outl(0x80000000, ioaddr + TxCtrl);
1284
1285 del_timer(&yp->timer);
1286
1287#if defined(__i386__)
1288 if (yellowfin_debug > 2) {
1289 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n", yp->tx_ring_dma);
1290 for (i = 0; i < TX_RING_SIZE*2; i++)
1291 printk(" %c #%d desc. %8.8x %8.8x %8.8x %8.8x.\n",
1292 inl(ioaddr + TxPtr) == (long)&yp->tx_ring[i] ? '>' : ' ',
1293 i, yp->tx_ring[i].dbdma_cmd, yp->tx_ring[i].addr,
1294 yp->tx_ring[i].branch_addr, yp->tx_ring[i].result_status);
1295 printk(KERN_DEBUG " Tx status %p:\n", yp->tx_status);
1296 for (i = 0; i < TX_RING_SIZE; i++)
1297 printk(" #%d status %4.4x %4.4x %4.4x %4.4x.\n",
1298 i, yp->tx_status[i].tx_cnt, yp->tx_status[i].tx_errs,
1299 yp->tx_status[i].total_tx_cnt, yp->tx_status[i].paused);
1300
1301 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n", yp->rx_ring_dma);
1302 for (i = 0; i < RX_RING_SIZE; i++) {
1303 printk(KERN_DEBUG " %c #%d desc. %8.8x %8.8x %8.8x\n",
1304 inl(ioaddr + RxPtr) == (long)&yp->rx_ring[i] ? '>' : ' ',
1305 i, yp->rx_ring[i].dbdma_cmd, yp->rx_ring[i].addr,
1306 yp->rx_ring[i].result_status);
1307 if (yellowfin_debug > 6) {
1308 if (get_unaligned((u8*)yp->rx_ring[i].addr) != 0x69) {
1309 int j;
1310 for (j = 0; j < 0x50; j++)
1311 printk(" %4.4x",
1312 get_unaligned(((u16*)yp->rx_ring[i].addr) + j));
1313 printk("\n");
1314 }
1315 }
1316 }
1317 }
1318#endif
1319
1320 free_irq(dev->irq, dev);
1321
1322
1323 for (i = 0; i < RX_RING_SIZE; i++) {
1324 yp->rx_ring[i].dbdma_cmd = cpu_to_le32(CMD_STOP);
1325 yp->rx_ring[i].addr = 0xBADF00D0;
1326 if (yp->rx_skbuff[i]) {
1327 dev_kfree_skb(yp->rx_skbuff[i]);
1328 }
1329 yp->rx_skbuff[i] = 0;
1330 }
1331 for (i = 0; i < TX_RING_SIZE; i++) {
1332 if (yp->tx_skbuff[i])
1333 dev_kfree_skb(yp->tx_skbuff[i]);
1334 yp->tx_skbuff[i] = 0;
1335 }
1336
1337#ifdef YF_PROTOTYPE
1338 if (yellowfin_debug > 0) {
1339 printk(KERN_DEBUG "%s: Received %d frames that we should not have.\n",
1340 dev->name, bogus_rx);
1341 }
1342#endif
1343
1344 return 0;
1345}
1346
1347static struct net_device_stats *yellowfin_get_stats(struct net_device *dev)
1348{
1349 struct yellowfin_private *yp = dev->priv;
1350 return &yp->stats;
1351}
1352
1353
1354
1355static void set_rx_mode(struct net_device *dev)
1356{
1357 struct yellowfin_private *yp = dev->priv;
1358 long ioaddr = dev->base_addr;
1359 u16 cfg_value = inw(ioaddr + Cnfg);
1360
1361
1362 outw(cfg_value & ~0x1000, ioaddr + Cnfg);
1363 if (dev->flags & IFF_PROMISC) {
1364
1365 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1366 outw(0x000F, ioaddr + AddrMode);
1367 } else if ((dev->mc_count > 64) || (dev->flags & IFF_ALLMULTI)) {
1368
1369 outw(0x000B, ioaddr + AddrMode);
1370 } else if (dev->mc_count > 0) {
1371 struct dev_mc_list *mclist;
1372 u16 hash_table[4];
1373 int i;
1374 memset(hash_table, 0, sizeof(hash_table));
1375 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1376 i++, mclist = mclist->next) {
1377 unsigned int bit;
1378
1379
1380
1381 if (yp->drv_flags & HasMulticastBug) {
1382 bit = (ether_crc_le(3, mclist->dmi_addr) >> 3) & 0x3f;
1383 hash_table[bit >> 4] |= (1 << bit);
1384 bit = (ether_crc_le(4, mclist->dmi_addr) >> 3) & 0x3f;
1385 hash_table[bit >> 4] |= (1 << bit);
1386 bit = (ether_crc_le(5, mclist->dmi_addr) >> 3) & 0x3f;
1387 hash_table[bit >> 4] |= (1 << bit);
1388 }
1389 bit = (ether_crc_le(6, mclist->dmi_addr) >> 3) & 0x3f;
1390 hash_table[bit >> 4] |= (1 << bit);
1391 }
1392
1393 for (i = 0; i < 4; i++)
1394 outw(hash_table[i], ioaddr + HashTbl + i*2);
1395 outw(0x0003, ioaddr + AddrMode);
1396 } else {
1397 outw(0x0001, ioaddr + AddrMode);
1398 }
1399
1400 outw(cfg_value | 0x1000, ioaddr + Cnfg);
1401}
1402
1403static int netdev_ethtool_ioctl(struct net_device *dev, void *useraddr)
1404{
1405 struct yellowfin_private *np = dev->priv;
1406 u32 ethcmd;
1407
1408 if (copy_from_user(ðcmd, useraddr, sizeof(ethcmd)))
1409 return -EFAULT;
1410
1411 switch (ethcmd) {
1412 case ETHTOOL_GDRVINFO: {
1413 struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
1414 strcpy(info.driver, DRV_NAME);
1415 strcpy(info.version, DRV_VERSION);
1416 strcpy(info.bus_info, pci_name(np->pci_dev));
1417 if (copy_to_user(useraddr, &info, sizeof(info)))
1418 return -EFAULT;
1419 return 0;
1420 }
1421
1422 }
1423
1424 return -EOPNOTSUPP;
1425}
1426
1427static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1428{
1429 struct yellowfin_private *np = dev->priv;
1430 long ioaddr = dev->base_addr;
1431 struct mii_ioctl_data *data = (struct mii_ioctl_data *)&rq->ifr_data;
1432
1433 switch(cmd) {
1434 case SIOCETHTOOL:
1435 return netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
1436 case SIOCGMIIPHY:
1437 data->phy_id = np->phys[0] & 0x1f;
1438
1439
1440 case SIOCGMIIREG:
1441 data->val_out = mdio_read(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f);
1442 return 0;
1443
1444 case SIOCSMIIREG:
1445 if (!capable(CAP_NET_ADMIN))
1446 return -EPERM;
1447 if (data->phy_id == np->phys[0]) {
1448 u16 value = data->val_in;
1449 switch (data->reg_num) {
1450 case 0:
1451
1452 np->medialock = (value & 0x9000) ? 0 : 1;
1453 if (np->medialock)
1454 np->full_duplex = (value & 0x0100) ? 1 : 0;
1455 break;
1456 case 4: np->advertising = value; break;
1457 }
1458
1459 }
1460 mdio_write(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1461 return 0;
1462 default:
1463 return -EOPNOTSUPP;
1464 }
1465}
1466
1467
1468static void __devexit yellowfin_remove_one (struct pci_dev *pdev)
1469{
1470 struct net_device *dev = pci_get_drvdata(pdev);
1471 struct yellowfin_private *np;
1472
1473 if (!dev)
1474 BUG();
1475 np = dev->priv;
1476
1477 pci_free_consistent(pdev, STATUS_TOTAL_SIZE, np->tx_status,
1478 np->tx_status_dma);
1479 pci_free_consistent(pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
1480 pci_free_consistent(pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
1481 unregister_netdev (dev);
1482
1483 pci_release_regions (pdev);
1484
1485#ifndef USE_IO_OPS
1486 iounmap ((void *) dev->base_addr);
1487#endif
1488
1489 free_netdev (dev);
1490 pci_set_drvdata(pdev, NULL);
1491}
1492
1493
1494static struct pci_driver yellowfin_driver = {
1495 .name = DRV_NAME,
1496 .id_table = yellowfin_pci_tbl,
1497 .probe = yellowfin_init_one,
1498 .remove = __devexit_p(yellowfin_remove_one),
1499};
1500
1501
1502static int __init yellowfin_init (void)
1503{
1504
1505#ifdef MODULE
1506 printk(version);
1507#endif
1508 return pci_module_init (&yellowfin_driver);
1509}
1510
1511
1512static void __exit yellowfin_cleanup (void)
1513{
1514 pci_unregister_driver (&yellowfin_driver);
1515}
1516
1517
1518module_init(yellowfin_init);
1519module_exit(yellowfin_cleanup);
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531