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17#define DRV_NAME "tulip"
18#define DRV_VERSION "1.1.13"
19#define DRV_RELDATE "May 11, 2002"
20
21#include <linux/config.h>
22#include <linux/module.h>
23#include "tulip.h"
24#include <linux/pci.h>
25#include <linux/init.h>
26#include <linux/etherdevice.h>
27#include <linux/delay.h>
28#include <linux/mii.h>
29#include <linux/ethtool.h>
30#include <linux/crc32.h>
31#include <asm/unaligned.h>
32#include <asm/uaccess.h>
33
34#ifdef __sparc__
35#include <asm/pbm.h>
36#endif
37
38static char version[] __devinitdata =
39 "Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
40
41
42
43
44
45static unsigned int max_interrupt_work = 25;
46
47#define MAX_UNITS 8
48
49static int full_duplex[MAX_UNITS];
50static int options[MAX_UNITS];
51static int mtu[MAX_UNITS];
52
53
54const char * const medianame[32] = {
55 "10baseT", "10base2", "AUI", "100baseTx",
56 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
57 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
58 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
59 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
60 "","","","", "","","","", "","","","Transceiver reset",
61};
62
63
64#if defined(__alpha__) || defined(__arm__) || defined(__hppa__) \
65 || defined(__sparc_) || defined(__ia64__) \
66 || defined(__sh__) || defined(__mips__)
67static int rx_copybreak = 1518;
68#else
69static int rx_copybreak = 100;
70#endif
71
72
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82
83
84
85#if defined(__alpha__) || defined(__ia64__) || defined(__x86_64__)
86static int csr0 = 0x01A00000 | 0xE000;
87#elif defined(__i386__) || defined(__powerpc__)
88static int csr0 = 0x01A00000 | 0x8000;
89#elif defined(__sparc__) || defined(__hppa__)
90
91
92
93
94static int csr0 = 0x01A00000 | 0x9000;
95#elif defined(__arm__) || defined(__sh__)
96static int csr0 = 0x01A00000 | 0x4800;
97#elif defined(__mips__)
98static int csr0 = 0x00200000 | 0x4000;
99#else
100#warning Processor architecture undefined!
101static int csr0 = 0x00A00000 | 0x4800;
102#endif
103
104
105
106#define TX_TIMEOUT (4*HZ)
107
108
109MODULE_AUTHOR("The Linux Kernel Team");
110MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
111MODULE_LICENSE("GPL");
112MODULE_PARM(tulip_debug, "i");
113MODULE_PARM(max_interrupt_work, "i");
114MODULE_PARM(rx_copybreak, "i");
115MODULE_PARM(csr0, "i");
116MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
117MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
118
119#define PFX DRV_NAME ": "
120
121#ifdef TULIP_DEBUG
122int tulip_debug = TULIP_DEBUG;
123#else
124int tulip_debug = 1;
125#endif
126
127
128
129
130
131
132
133
134
135struct tulip_chip_table tulip_tbl[] = {
136 { },
137 { },
138
139
140 { "Digital DS21140 Tulip", 128, 0x0001ebef,
141 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer },
142
143
144 { "Digital DS21143 Tulip", 128, 0x0801fbff,
145 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
146 | HAS_INTR_MITIGATION | HAS_PCI_MWI, t21142_timer },
147
148
149 { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
150 HAS_MII | HAS_PNICNWAY, pnic_timer },
151
152
153 { "Macronix 98713 PMAC", 128, 0x0001ebef,
154 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
155
156
157 { "Macronix 98715 PMAC", 256, 0x0001ebef,
158 HAS_MEDIA_TABLE, mxic_timer },
159
160
161 { "Macronix 98725 PMAC", 256, 0x0001ebef,
162 HAS_MEDIA_TABLE, mxic_timer },
163
164
165 { "ASIX AX88140", 128, 0x0001fbff,
166 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
167 | IS_ASIX, tulip_timer },
168
169
170 { "Lite-On PNIC-II", 256, 0x0801fbff,
171 HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer },
172
173
174 { "ADMtek Comet", 256, 0x0001abef,
175 MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer },
176
177
178 { "Compex 9881 PMAC", 128, 0x0001ebef,
179 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
180
181
182 { "Intel DS21145 Tulip", 128, 0x0801fbff,
183 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
184 | HAS_NWAY | HAS_PCI_MWI, t21142_timer },
185
186
187 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
188 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
189 tulip_timer },
190
191
192 { "Conexant LANfinity", 256, 0x0001ebef,
193 HAS_MII | HAS_ACPI, tulip_timer },
194};
195
196
197static struct pci_device_id tulip_pci_tbl[] = {
198 { 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
199 { 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
200 { 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
201 { 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
202 { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
203
204 { 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
205 { 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
206 { 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
207 { 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
208 { 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
209 { 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
210 { 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
211 { 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
212 { 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
213 { 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
214 { 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
215 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
216 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
217 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
218 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
219 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
220 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
221 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
222 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
223 { 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
224 { 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
225 { 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
226 { 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
227 { 0x1737, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
228 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
229 { 0x10b9, 0x5261, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
230 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
231 { }
232};
233MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
234
235
236
237const char tulip_media_cap[32] =
238{0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
239
240static void tulip_tx_timeout(struct net_device *dev);
241static void tulip_init_ring(struct net_device *dev);
242static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
243static int tulip_open(struct net_device *dev);
244static int tulip_close(struct net_device *dev);
245static void tulip_up(struct net_device *dev);
246static void tulip_down(struct net_device *dev);
247static struct net_device_stats *tulip_get_stats(struct net_device *dev);
248static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
249static void set_rx_mode(struct net_device *dev);
250
251
252
253static void tulip_set_power_state (struct tulip_private *tp,
254 int sleep, int snooze)
255{
256 if (tp->flags & HAS_ACPI) {
257 u32 tmp, newtmp;
258 pci_read_config_dword (tp->pdev, CFDD, &tmp);
259 newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
260 if (sleep)
261 newtmp |= CFDD_Sleep;
262 else if (snooze)
263 newtmp |= CFDD_Snooze;
264 if (tmp != newtmp)
265 pci_write_config_dword (tp->pdev, CFDD, newtmp);
266 }
267
268}
269
270
271static void tulip_up(struct net_device *dev)
272{
273 struct tulip_private *tp = (struct tulip_private *)dev->priv;
274 long ioaddr = dev->base_addr;
275 int next_tick = 3*HZ;
276 int i;
277
278
279 tulip_set_power_state (tp, 0, 0);
280
281
282 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
283 outl(0x00040000, ioaddr + CSR6);
284
285
286 outl(0x00000001, ioaddr + CSR0);
287 udelay(100);
288
289
290
291
292 outl(tp->csr0, ioaddr + CSR0);
293 udelay(100);
294
295 if (tulip_debug > 1)
296 printk(KERN_DEBUG "%s: tulip_up(), irq==%d.\n", dev->name, dev->irq);
297
298 outl(tp->rx_ring_dma, ioaddr + CSR3);
299 outl(tp->tx_ring_dma, ioaddr + CSR4);
300 tp->cur_rx = tp->cur_tx = 0;
301 tp->dirty_rx = tp->dirty_tx = 0;
302
303 if (tp->flags & MC_HASH_ONLY) {
304 u32 addr_low = cpu_to_le32(get_unaligned((u32 *)dev->dev_addr));
305 u32 addr_high = cpu_to_le32(get_unaligned((u16 *)(dev->dev_addr+4)));
306 if (tp->chip_id == AX88140) {
307 outl(0, ioaddr + CSR13);
308 outl(addr_low, ioaddr + CSR14);
309 outl(1, ioaddr + CSR13);
310 outl(addr_high, ioaddr + CSR14);
311 } else if (tp->flags & COMET_MAC_ADDR) {
312 outl(addr_low, ioaddr + 0xA4);
313 outl(addr_high, ioaddr + 0xA8);
314 outl(0, ioaddr + 0xAC);
315 outl(0, ioaddr + 0xB0);
316 }
317 } else {
318
319 u16 *eaddrs = (u16 *)dev->dev_addr;
320 u16 *setup_frm = &tp->setup_frame[15*6];
321 dma_addr_t mapping;
322
323
324 memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
325
326 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
327 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
328 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
329
330 mapping = pci_map_single(tp->pdev, tp->setup_frame,
331 sizeof(tp->setup_frame),
332 PCI_DMA_TODEVICE);
333 tp->tx_buffers[tp->cur_tx].skb = NULL;
334 tp->tx_buffers[tp->cur_tx].mapping = mapping;
335
336
337 tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
338 tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
339 tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
340
341 tp->cur_tx++;
342 }
343
344 tp->saved_if_port = dev->if_port;
345 if (dev->if_port == 0)
346 dev->if_port = tp->default_port;
347
348
349 i = 0;
350 if (tp->mtable == NULL)
351 goto media_picked;
352 if (dev->if_port) {
353 int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
354 (dev->if_port == 12 ? 0 : dev->if_port);
355 for (i = 0; i < tp->mtable->leafcount; i++)
356 if (tp->mtable->mleaf[i].media == looking_for) {
357 printk(KERN_INFO "%s: Using user-specified media %s.\n",
358 dev->name, medianame[dev->if_port]);
359 goto media_picked;
360 }
361 }
362 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
363 int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
364 for (i = 0; i < tp->mtable->leafcount; i++)
365 if (tp->mtable->mleaf[i].media == looking_for) {
366 printk(KERN_INFO "%s: Using EEPROM-set media %s.\n",
367 dev->name, medianame[looking_for]);
368 goto media_picked;
369 }
370 }
371
372 for (i = tp->mtable->leafcount - 1;
373 (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
374 ;
375media_picked:
376
377 tp->csr6 = 0;
378 tp->cur_index = i;
379 tp->nwayset = 0;
380
381 if (dev->if_port) {
382 if (tp->chip_id == DC21143 &&
383 (tulip_media_cap[dev->if_port] & MediaIsMII)) {
384
385 outl(0x0000, ioaddr + CSR13);
386 outl(0x0000, ioaddr + CSR14);
387 outl(0x0008, ioaddr + CSR15);
388 }
389 tulip_select_media(dev, 1);
390 } else if (tp->chip_id == DC21142) {
391 if (tp->mii_cnt) {
392 tulip_select_media(dev, 1);
393 if (tulip_debug > 1)
394 printk(KERN_INFO "%s: Using MII transceiver %d, status "
395 "%4.4x.\n",
396 dev->name, tp->phys[0], tulip_mdio_read(dev, tp->phys[0], 1));
397 outl(csr6_mask_defstate, ioaddr + CSR6);
398 tp->csr6 = csr6_mask_hdcap;
399 dev->if_port = 11;
400 outl(0x0000, ioaddr + CSR13);
401 outl(0x0000, ioaddr + CSR14);
402 } else
403 t21142_start_nway(dev);
404 } else if (tp->chip_id == PNIC2) {
405
406 tp->sym_advertise = 0x01E0;
407
408 outl(inl(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
409 outl(inl(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
410 pnic2_start_nway(dev);
411 } else if (tp->chip_id == LC82C168 && ! tp->medialock) {
412 if (tp->mii_cnt) {
413 dev->if_port = 11;
414 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
415 outl(0x0001, ioaddr + CSR15);
416 } else if (inl(ioaddr + CSR5) & TPLnkPass)
417 pnic_do_nway(dev);
418 else {
419
420 outl(0x32, ioaddr + CSR12);
421 tp->csr6 = 0x00420000;
422 outl(0x0001B078, ioaddr + 0xB8);
423 outl(0x0201B078, ioaddr + 0xB8);
424 next_tick = 1*HZ;
425 }
426 } else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881)
427 && ! tp->medialock) {
428 dev->if_port = 0;
429 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
430 outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
431 } else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
432
433 dev->if_port = 0;
434 tp->csr6 = 0x01a80200;
435 outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
436 outl(0x11000 | inw(ioaddr + 0xa0), ioaddr + 0xa0);
437 } else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
438
439 outl(inl(ioaddr + 0x88) | 1, ioaddr + 0x88);
440 dev->if_port = tp->mii_cnt ? 11 : 0;
441 tp->csr6 = 0x00040000;
442 } else if (tp->chip_id == AX88140) {
443 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
444 } else
445 tulip_select_media(dev, 1);
446
447
448 tulip_stop_rxtx(tp);
449 barrier();
450 udelay(5);
451 outl(tp->csr6 | TxOn, ioaddr + CSR6);
452
453
454 outl(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
455 outl(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
456 tulip_start_rxtx(tp);
457 outl(0, ioaddr + CSR2);
458
459 if (tulip_debug > 2) {
460 printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %8.8x, CSR5 %8.8x CSR6 %8.8x.\n",
461 dev->name, inl(ioaddr + CSR0), inl(ioaddr + CSR5),
462 inl(ioaddr + CSR6));
463 }
464
465
466
467 tp->timer.expires = RUN_AT(next_tick);
468 add_timer(&tp->timer);
469}
470
471#ifdef CONFIG_NET_HW_FLOWCONTROL
472
473void tulip_xon(struct net_device *dev)
474{
475 struct tulip_private *tp = (struct tulip_private *)dev->priv;
476
477 clear_bit(tp->fc_bit, &netdev_fc_xoff);
478 if (netif_running(dev)){
479
480 tulip_refill_rx(dev);
481 outl(tulip_tbl[tp->chip_id].valid_intrs, dev->base_addr+CSR7);
482 }
483}
484#endif
485
486static int
487tulip_open(struct net_device *dev)
488{
489#ifdef CONFIG_NET_HW_FLOWCONTROL
490 struct tulip_private *tp = (struct tulip_private *)dev->priv;
491#endif
492 int retval;
493
494 if ((retval = request_irq(dev->irq, &tulip_interrupt, SA_SHIRQ, dev->name, dev)))
495 return retval;
496
497 tulip_init_ring (dev);
498
499 tulip_up (dev);
500
501#ifdef CONFIG_NET_HW_FLOWCONTROL
502 tp->fc_bit = netdev_register_fc(dev, tulip_xon);
503#endif
504
505 netif_start_queue (dev);
506
507 return 0;
508}
509
510
511static void tulip_tx_timeout(struct net_device *dev)
512{
513 struct tulip_private *tp = (struct tulip_private *)dev->priv;
514 long ioaddr = dev->base_addr;
515 unsigned long flags;
516
517 spin_lock_irqsave (&tp->lock, flags);
518
519 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
520
521 if (tulip_debug > 1)
522 printk(KERN_WARNING "%s: Transmit timeout using MII device.\n",
523 dev->name);
524 } else if (tp->chip_id == DC21140 || tp->chip_id == DC21142
525 || tp->chip_id == MX98713 || tp->chip_id == COMPEX9881
526 || tp->chip_id == DM910X) {
527 printk(KERN_WARNING "%s: 21140 transmit timed out, status %8.8x, "
528 "SIA %8.8x %8.8x %8.8x %8.8x, resetting...\n",
529 dev->name, inl(ioaddr + CSR5), inl(ioaddr + CSR12),
530 inl(ioaddr + CSR13), inl(ioaddr + CSR14), inl(ioaddr + CSR15));
531 if ( ! tp->medialock && tp->mtable) {
532 do
533 --tp->cur_index;
534 while (tp->cur_index >= 0
535 && (tulip_media_cap[tp->mtable->mleaf[tp->cur_index].media]
536 & MediaIsFD));
537 if (--tp->cur_index < 0) {
538
539 tp->cur_index = tp->mtable->leafcount - 1;
540 }
541 tulip_select_media(dev, 0);
542 printk(KERN_WARNING "%s: transmit timed out, switching to %s "
543 "media.\n", dev->name, medianame[dev->if_port]);
544 }
545 } else if (tp->chip_id == PNIC2) {
546 printk(KERN_WARNING "%s: PNIC2 transmit timed out, status %8.8x, "
547 "CSR6/7 %8.8x / %8.8x CSR12 %8.8x, resetting...\n",
548 dev->name, (int)inl(ioaddr + CSR5), (int)inl(ioaddr + CSR6),
549 (int)inl(ioaddr + CSR7), (int)inl(ioaddr + CSR12));
550 } else {
551 printk(KERN_WARNING "%s: Transmit timed out, status %8.8x, CSR12 "
552 "%8.8x, resetting...\n",
553 dev->name, inl(ioaddr + CSR5), inl(ioaddr + CSR12));
554 dev->if_port = 0;
555 }
556
557#if defined(way_too_many_messages)
558 if (tulip_debug > 3) {
559 int i;
560 for (i = 0; i < RX_RING_SIZE; i++) {
561 u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
562 int j;
563 printk(KERN_DEBUG "%2d: %8.8x %8.8x %8.8x %8.8x "
564 "%2.2x %2.2x %2.2x.\n",
565 i, (unsigned int)tp->rx_ring[i].status,
566 (unsigned int)tp->rx_ring[i].length,
567 (unsigned int)tp->rx_ring[i].buffer1,
568 (unsigned int)tp->rx_ring[i].buffer2,
569 buf[0], buf[1], buf[2]);
570 for (j = 0; buf[j] != 0xee && j < 1600; j++)
571 if (j < 100) printk(" %2.2x", buf[j]);
572 printk(" j=%d.\n", j);
573 }
574 printk(KERN_DEBUG " Rx ring %8.8x: ", (int)tp->rx_ring);
575 for (i = 0; i < RX_RING_SIZE; i++)
576 printk(" %8.8x", (unsigned int)tp->rx_ring[i].status);
577 printk("\n" KERN_DEBUG " Tx ring %8.8x: ", (int)tp->tx_ring);
578 for (i = 0; i < TX_RING_SIZE; i++)
579 printk(" %8.8x", (unsigned int)tp->tx_ring[i].status);
580 printk("\n");
581 }
582#endif
583
584
585#ifdef CONFIG_NET_HW_FLOWCONTROL
586 if (tp->fc_bit && test_bit(tp->fc_bit,&netdev_fc_xoff))
587 printk("BUG tx_timeout restarting rx when fc on\n");
588#endif
589 tulip_restart_rxtx(tp);
590
591 outl(0, ioaddr + CSR1);
592
593 tp->stats.tx_errors++;
594
595 spin_unlock_irqrestore (&tp->lock, flags);
596 dev->trans_start = jiffies;
597 netif_wake_queue (dev);
598}
599
600
601
602static void tulip_init_ring(struct net_device *dev)
603{
604 struct tulip_private *tp = (struct tulip_private *)dev->priv;
605 int i;
606
607 tp->susp_rx = 0;
608 tp->ttimer = 0;
609 tp->nir = 0;
610
611 for (i = 0; i < RX_RING_SIZE; i++) {
612 tp->rx_ring[i].status = 0x00000000;
613 tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
614 tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
615 tp->rx_buffers[i].skb = NULL;
616 tp->rx_buffers[i].mapping = 0;
617 }
618
619 tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
620 tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
621
622 for (i = 0; i < RX_RING_SIZE; i++) {
623 dma_addr_t mapping;
624
625
626
627
628 struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
629 tp->rx_buffers[i].skb = skb;
630 if (skb == NULL)
631 break;
632 mapping = pci_map_single(tp->pdev, skb->tail,
633 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
634 tp->rx_buffers[i].mapping = mapping;
635 skb->dev = dev;
636 tp->rx_ring[i].status = cpu_to_le32(DescOwned);
637 tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
638 }
639 tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
640
641
642
643 for (i = 0; i < TX_RING_SIZE; i++) {
644 tp->tx_buffers[i].skb = NULL;
645 tp->tx_buffers[i].mapping = 0;
646 tp->tx_ring[i].status = 0x00000000;
647 tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
648 }
649 tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
650}
651
652static int
653tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
654{
655 struct tulip_private *tp = (struct tulip_private *)dev->priv;
656 int entry;
657 u32 flag;
658 dma_addr_t mapping;
659
660 spin_lock_irq(&tp->lock);
661
662
663 entry = tp->cur_tx % TX_RING_SIZE;
664
665 tp->tx_buffers[entry].skb = skb;
666 mapping = pci_map_single(tp->pdev, skb->data,
667 skb->len, PCI_DMA_TODEVICE);
668 tp->tx_buffers[entry].mapping = mapping;
669 tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
670
671 if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {
672 flag = 0x60000000;
673 } else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
674 flag = 0xe0000000;
675 } else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
676 flag = 0x60000000;
677 } else {
678 flag = 0xe0000000;
679 netif_stop_queue(dev);
680 }
681 if (entry == TX_RING_SIZE-1)
682 flag = 0xe0000000 | DESC_RING_WRAP;
683
684 tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
685
686
687 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
688 wmb();
689
690 tp->cur_tx++;
691
692
693 outl(0, dev->base_addr + CSR1);
694
695 spin_unlock_irq(&tp->lock);
696
697 dev->trans_start = jiffies;
698
699 return 0;
700}
701
702static void tulip_clean_tx_ring(struct tulip_private *tp)
703{
704 unsigned int dirty_tx;
705
706 for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
707 dirty_tx++) {
708 int entry = dirty_tx % TX_RING_SIZE;
709 int status = le32_to_cpu(tp->tx_ring[entry].status);
710
711 if (status < 0) {
712 tp->stats.tx_errors++;
713 tp->tx_ring[entry].status = 0;
714 }
715
716
717 if (tp->tx_buffers[entry].skb == NULL) {
718
719 if (tp->tx_buffers[entry].mapping)
720 pci_unmap_single(tp->pdev,
721 tp->tx_buffers[entry].mapping,
722 sizeof(tp->setup_frame),
723 PCI_DMA_TODEVICE);
724 continue;
725 }
726
727 pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
728 tp->tx_buffers[entry].skb->len,
729 PCI_DMA_TODEVICE);
730
731
732 dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
733 tp->tx_buffers[entry].skb = NULL;
734 tp->tx_buffers[entry].mapping = 0;
735 }
736}
737
738static void tulip_down (struct net_device *dev)
739{
740 long ioaddr = dev->base_addr;
741 struct tulip_private *tp = (struct tulip_private *) dev->priv;
742 unsigned long flags;
743
744 del_timer_sync (&tp->timer);
745
746 spin_lock_irqsave (&tp->lock, flags);
747
748
749 outl (0x00000000, ioaddr + CSR7);
750
751
752 tulip_stop_rxtx(tp);
753
754
755 tulip_refill_rx(dev);
756
757
758 tulip_clean_tx_ring(tp);
759
760 if (inl (ioaddr + CSR6) != 0xffffffff)
761 tp->stats.rx_missed_errors += inl (ioaddr + CSR8) & 0xffff;
762
763 spin_unlock_irqrestore (&tp->lock, flags);
764
765 init_timer(&tp->timer);
766 tp->timer.data = (unsigned long)dev;
767 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
768
769 dev->if_port = tp->saved_if_port;
770
771
772 tulip_set_power_state (tp, 0, 1);
773}
774
775
776static int tulip_close (struct net_device *dev)
777{
778 long ioaddr = dev->base_addr;
779 struct tulip_private *tp = (struct tulip_private *) dev->priv;
780 int i;
781
782 netif_stop_queue (dev);
783
784#ifdef CONFIG_NET_HW_FLOWCONTROL
785 if (tp->fc_bit) {
786 int bit = tp->fc_bit;
787 tp->fc_bit = 0;
788 netdev_unregister_fc(bit);
789 }
790#endif
791 tulip_down (dev);
792
793 if (tulip_debug > 1)
794 printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
795 dev->name, inl (ioaddr + CSR5));
796
797 free_irq (dev->irq, dev);
798
799
800 for (i = 0; i < RX_RING_SIZE; i++) {
801 struct sk_buff *skb = tp->rx_buffers[i].skb;
802 dma_addr_t mapping = tp->rx_buffers[i].mapping;
803
804 tp->rx_buffers[i].skb = NULL;
805 tp->rx_buffers[i].mapping = 0;
806
807 tp->rx_ring[i].status = 0;
808 tp->rx_ring[i].length = 0;
809 tp->rx_ring[i].buffer1 = 0xBADF00D0;
810 if (skb) {
811 pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
812 PCI_DMA_FROMDEVICE);
813 dev_kfree_skb (skb);
814 }
815 }
816 for (i = 0; i < TX_RING_SIZE; i++) {
817 struct sk_buff *skb = tp->tx_buffers[i].skb;
818
819 if (skb != NULL) {
820 pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
821 skb->len, PCI_DMA_TODEVICE);
822 dev_kfree_skb (skb);
823 }
824 tp->tx_buffers[i].skb = NULL;
825 tp->tx_buffers[i].mapping = 0;
826 }
827
828 return 0;
829}
830
831static struct net_device_stats *tulip_get_stats(struct net_device *dev)
832{
833 struct tulip_private *tp = (struct tulip_private *)dev->priv;
834 long ioaddr = dev->base_addr;
835
836 if (netif_running(dev)) {
837 unsigned long flags;
838
839 spin_lock_irqsave (&tp->lock, flags);
840
841 tp->stats.rx_missed_errors += inl(ioaddr + CSR8) & 0xffff;
842
843 spin_unlock_irqrestore(&tp->lock, flags);
844 }
845
846 return &tp->stats;
847}
848
849
850static int netdev_ethtool_ioctl(struct net_device *dev, void *useraddr)
851{
852 struct tulip_private *np = dev->priv;
853 u32 ethcmd;
854
855 if (copy_from_user(ðcmd, useraddr, sizeof(ethcmd)))
856 return -EFAULT;
857
858 switch (ethcmd) {
859 case ETHTOOL_GDRVINFO: {
860 struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
861 strcpy(info.driver, DRV_NAME);
862 strcpy(info.version, DRV_VERSION);
863 strcpy(info.bus_info, pci_name(np->pdev));
864 if (copy_to_user(useraddr, &info, sizeof(info)))
865 return -EFAULT;
866 return 0;
867 }
868
869 }
870
871 return -EOPNOTSUPP;
872}
873
874
875static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
876{
877 struct tulip_private *tp = dev->priv;
878 long ioaddr = dev->base_addr;
879 struct mii_ioctl_data *data = (struct mii_ioctl_data *) & rq->ifr_data;
880 const unsigned int phy_idx = 0;
881 int phy = tp->phys[phy_idx] & 0x1f;
882 unsigned int regnum = data->reg_num;
883
884 switch (cmd) {
885 case SIOCETHTOOL:
886 return netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
887
888 case SIOCGMIIPHY:
889 if (tp->mii_cnt)
890 data->phy_id = phy;
891 else if (tp->flags & HAS_NWAY)
892 data->phy_id = 32;
893 else if (tp->chip_id == COMET)
894 data->phy_id = 1;
895 else
896 return -ENODEV;
897
898 case SIOCGMIIREG:
899 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
900 int csr12 = inl (ioaddr + CSR12);
901 int csr14 = inl (ioaddr + CSR14);
902 switch (regnum) {
903 case 0:
904 if (((csr14<<5) & 0x1000) ||
905 (dev->if_port == 5 && tp->nwayset))
906 data->val_out = 0x1000;
907 else
908 data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
909 | (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
910 break;
911 case 1:
912 data->val_out =
913 0x1848 +
914 ((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
915 ((csr12&0x06) == 6 ? 0 : 4);
916 data->val_out |= 0x6048;
917 break;
918 case 4:
919
920 data->val_out =
921 ((inl(ioaddr + CSR6) >> 3) & 0x0040) +
922 ((csr14 >> 1) & 0x20) + 1;
923 data->val_out |= ((csr14 >> 9) & 0x03C0);
924 break;
925 case 5: data->val_out = tp->lpar; break;
926 default: data->val_out = 0; break;
927 }
928 } else {
929 data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
930 }
931 return 0;
932
933 case SIOCSMIIREG:
934 if (!capable (CAP_NET_ADMIN))
935 return -EPERM;
936 if (regnum & ~0x1f)
937 return -EINVAL;
938 if (data->phy_id == phy) {
939 u16 value = data->val_in;
940 switch (regnum) {
941 case 0:
942 tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
943 if (tp->full_duplex_lock)
944 tp->full_duplex = (value & 0x0100) ? 1 : 0;
945 break;
946 case 4:
947 tp->advertising[phy_idx] =
948 tp->mii_advertise = data->val_in;
949 break;
950 }
951 }
952 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
953 u16 value = data->val_in;
954 if (regnum == 0) {
955 if ((value & 0x1200) == 0x1200) {
956 if (tp->chip_id == PNIC2) {
957 pnic2_start_nway (dev);
958 } else {
959 t21142_start_nway (dev);
960 }
961 }
962 } else if (regnum == 4)
963 tp->sym_advertise = value;
964 } else {
965 tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
966 }
967 return 0;
968 default:
969 return -EOPNOTSUPP;
970 }
971
972 return -EOPNOTSUPP;
973}
974
975
976
977
978
979
980
981#undef set_bit_le
982#define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
983
984static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
985{
986 struct tulip_private *tp = (struct tulip_private *)dev->priv;
987 u16 hash_table[32];
988 struct dev_mc_list *mclist;
989 int i;
990 u16 *eaddrs;
991
992 memset(hash_table, 0, sizeof(hash_table));
993 set_bit_le(255, hash_table);
994
995 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
996 i++, mclist = mclist->next) {
997 int index = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x1ff;
998
999 set_bit_le(index, hash_table);
1000
1001 }
1002 for (i = 0; i < 32; i++) {
1003 *setup_frm++ = hash_table[i];
1004 *setup_frm++ = hash_table[i];
1005 }
1006 setup_frm = &tp->setup_frame[13*6];
1007
1008
1009 eaddrs = (u16 *)dev->dev_addr;
1010 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1011 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1012 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1013}
1014
1015static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
1016{
1017 struct tulip_private *tp = (struct tulip_private *)dev->priv;
1018 struct dev_mc_list *mclist;
1019 int i;
1020 u16 *eaddrs;
1021
1022
1023
1024 for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
1025 i++, mclist = mclist->next) {
1026 eaddrs = (u16 *)mclist->dmi_addr;
1027 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1028 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1029 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1030 }
1031
1032 memset(setup_frm, 0xff, (15-i)*12);
1033 setup_frm = &tp->setup_frame[15*6];
1034
1035
1036 eaddrs = (u16 *)dev->dev_addr;
1037 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1038 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1039 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1040}
1041
1042
1043static void set_rx_mode(struct net_device *dev)
1044{
1045 struct tulip_private *tp = (struct tulip_private *)dev->priv;
1046 long ioaddr = dev->base_addr;
1047 int csr6;
1048
1049 csr6 = inl(ioaddr + CSR6) & ~0x00D5;
1050
1051 tp->csr6 &= ~0x00D5;
1052 if (dev->flags & IFF_PROMISC) {
1053 tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
1054 csr6 |= AcceptAllMulticast | AcceptAllPhys;
1055
1056 printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
1057 } else if ((dev->mc_count > 1000) || (dev->flags & IFF_ALLMULTI)) {
1058
1059 tp->csr6 |= AcceptAllMulticast;
1060 csr6 |= AcceptAllMulticast;
1061 } else if (tp->flags & MC_HASH_ONLY) {
1062
1063
1064 struct dev_mc_list *mclist;
1065 int i;
1066 if (dev->mc_count > 64) {
1067 tp->csr6 |= AcceptAllMulticast;
1068 csr6 |= AcceptAllMulticast;
1069 } else {
1070 u32 mc_filter[2] = {0, 0};
1071 int filterbit;
1072 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1073 i++, mclist = mclist->next) {
1074 if (tp->flags & COMET_MAC_ADDR)
1075 filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr);
1076 else
1077 filterbit = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1078 filterbit &= 0x3f;
1079 mc_filter[filterbit >> 5] |= cpu_to_le32(1 << (filterbit & 31));
1080 if (tulip_debug > 2) {
1081 printk(KERN_INFO "%s: Added filter for %2.2x:%2.2x:%2.2x:"
1082 "%2.2x:%2.2x:%2.2x %8.8x bit %d.\n", dev->name,
1083 mclist->dmi_addr[0], mclist->dmi_addr[1],
1084 mclist->dmi_addr[2], mclist->dmi_addr[3],
1085 mclist->dmi_addr[4], mclist->dmi_addr[5],
1086 ether_crc(ETH_ALEN, mclist->dmi_addr), filterbit);
1087 }
1088 }
1089 if (mc_filter[0] == tp->mc_filter[0] &&
1090 mc_filter[1] == tp->mc_filter[1])
1091 ;
1092 else if (tp->flags & IS_ASIX) {
1093 outl(2, ioaddr + CSR13);
1094 outl(mc_filter[0], ioaddr + CSR14);
1095 outl(3, ioaddr + CSR13);
1096 outl(mc_filter[1], ioaddr + CSR14);
1097 } else if (tp->flags & COMET_MAC_ADDR) {
1098 outl(mc_filter[0], ioaddr + 0xAC);
1099 outl(mc_filter[1], ioaddr + 0xB0);
1100 }
1101 tp->mc_filter[0] = mc_filter[0];
1102 tp->mc_filter[1] = mc_filter[1];
1103 }
1104 } else {
1105 unsigned long flags;
1106 u32 tx_flags = 0x08000000 | 192;
1107
1108
1109
1110 if (dev->mc_count > 14) {
1111 build_setup_frame_hash(tp->setup_frame, dev);
1112 tx_flags = 0x08400000 | 192;
1113 } else {
1114 build_setup_frame_perfect(tp->setup_frame, dev);
1115 }
1116
1117 spin_lock_irqsave(&tp->lock, flags);
1118
1119 if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
1120
1121 } else {
1122 unsigned int entry;
1123 int dummy = -1;
1124
1125
1126
1127 entry = tp->cur_tx++ % TX_RING_SIZE;
1128
1129 if (entry != 0) {
1130
1131 tp->tx_buffers[entry].skb = NULL;
1132 tp->tx_buffers[entry].mapping = 0;
1133 tp->tx_ring[entry].length =
1134 (entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
1135 tp->tx_ring[entry].buffer1 = 0;
1136
1137 dummy = entry;
1138 entry = tp->cur_tx++ % TX_RING_SIZE;
1139 }
1140
1141 tp->tx_buffers[entry].skb = NULL;
1142 tp->tx_buffers[entry].mapping =
1143 pci_map_single(tp->pdev, tp->setup_frame,
1144 sizeof(tp->setup_frame),
1145 PCI_DMA_TODEVICE);
1146
1147 if (entry == TX_RING_SIZE-1)
1148 tx_flags |= DESC_RING_WRAP;
1149 tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
1150 tp->tx_ring[entry].buffer1 =
1151 cpu_to_le32(tp->tx_buffers[entry].mapping);
1152 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
1153 if (dummy >= 0)
1154 tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
1155 if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
1156 netif_stop_queue(dev);
1157
1158
1159 outl(0, ioaddr + CSR1);
1160 }
1161
1162 spin_unlock_irqrestore(&tp->lock, flags);
1163 }
1164
1165 outl(csr6, ioaddr + CSR6);
1166}
1167
1168#ifdef CONFIG_TULIP_MWI
1169static void __devinit tulip_mwi_config (struct pci_dev *pdev,
1170 struct net_device *dev)
1171{
1172 struct tulip_private *tp = dev->priv;
1173 u8 cache;
1174 u16 pci_command;
1175 u32 csr0;
1176
1177 if (tulip_debug > 3)
1178 printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pci_name(pdev));
1179
1180 tp->csr0 = csr0 = 0;
1181
1182
1183 csr0 |= MRM;
1184
1185
1186 if (!(tp->chip_id == DC21143 && tp->revision == 65))
1187 csr0 |= MWI;
1188
1189
1190
1191
1192 if (csr0 & MWI) pci_set_mwi(pdev);
1193 else pci_clear_mwi(pdev);
1194
1195
1196 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
1197 if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
1198 csr0 &= ~MWI;
1199
1200
1201 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
1202 if ((csr0 & MWI) && (cache == 0)) {
1203 csr0 &= ~MWI;
1204 pci_clear_mwi(pdev);
1205 }
1206
1207
1208
1209
1210 switch (cache) {
1211 case 8:
1212 csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
1213 break;
1214 case 16:
1215 csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
1216 break;
1217 case 32:
1218 csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
1219 break;
1220 default:
1221 cache = 0;
1222 break;
1223 }
1224
1225
1226
1227
1228 if (cache)
1229 goto out;
1230
1231
1232 if (csr0 & MWI) {
1233 pci_clear_mwi(pdev);
1234 csr0 &= ~MWI;
1235 }
1236
1237
1238
1239
1240 csr0 |= (8 << BurstLenShift) | (1 << CALShift);
1241
1242out:
1243 tp->csr0 = csr0;
1244 if (tulip_debug > 2)
1245 printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
1246 pci_name(pdev), cache, csr0);
1247}
1248#endif
1249
1250static int __devinit tulip_init_one (struct pci_dev *pdev,
1251 const struct pci_device_id *ent)
1252{
1253 struct tulip_private *tp;
1254
1255 static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1256 static int last_irq;
1257 static int multiport_cnt;
1258 u8 chip_rev;
1259 int i, irq;
1260 unsigned short sum;
1261 unsigned char *ee_data;
1262 struct net_device *dev;
1263 long ioaddr;
1264 static int board_idx = -1;
1265 int chip_idx = ent->driver_data;
1266 unsigned int eeprom_missing = 0;
1267 unsigned int force_csr0 = 0;
1268
1269#ifndef MODULE
1270 static int did_version;
1271 if (tulip_debug > 0 && did_version++ == 0)
1272 printk (KERN_INFO "%s", version);
1273#endif
1274
1275 board_idx++;
1276
1277
1278
1279
1280
1281
1282 if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
1283 printk (KERN_ERR PFX "skipping LMC card.\n");
1284 return -ENODEV;
1285 }
1286
1287
1288
1289
1290
1291 if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
1292 {
1293 u32 dev_rev;
1294
1295 pci_read_config_dword(pdev, PCI_REVISION_ID, &dev_rev);
1296 if(dev_rev < 0x02000030)
1297 {
1298 printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
1299 return -ENODEV;
1300 }
1301 }
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313 if (pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424, NULL)) {
1314 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1315 force_csr0 = 1;
1316 }
1317
1318 if (pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, NULL)) {
1319 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1320 force_csr0 = 1;
1321 }
1322
1323
1324 if (chip_idx == AX88140) {
1325 if ((csr0 & 0x3f00) == 0)
1326 csr0 |= 0x2000;
1327 }
1328
1329
1330 if (chip_idx == LC82C168)
1331 csr0 &= ~0xfff10000;
1332
1333
1334 if ((pdev->vendor == 0x1282 && pdev->device == 0x9102)
1335 || (pdev->vendor == 0x10b9 && pdev->device == 0x5261))
1336 csr0 &= ~0x01f100ff;
1337
1338#if defined(__sparc__)
1339
1340 if ((pdev->vendor == 0x1282 && pdev->device == 0x9102)
1341 || (pdev->vendor == 0x10b9 && pdev->device == 0x5261))
1342 csr0 = (csr0 & ~0xff00) | 0xe000;
1343#endif
1344
1345
1346
1347
1348
1349 i = pci_enable_device(pdev);
1350 if (i) {
1351 printk (KERN_ERR PFX
1352 "Cannot enable tulip board #%d, aborting\n",
1353 board_idx);
1354 return i;
1355 }
1356
1357 ioaddr = pci_resource_start (pdev, 0);
1358 irq = pdev->irq;
1359
1360
1361 dev = alloc_etherdev (sizeof (*tp));
1362 if (!dev) {
1363 printk (KERN_ERR PFX "ether device alloc failed, aborting\n");
1364 return -ENOMEM;
1365 }
1366
1367 SET_MODULE_OWNER(dev);
1368 SET_NETDEV_DEV(dev, &pdev->dev);
1369 if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
1370 printk (KERN_ERR PFX "%s: I/O region (0x%lx@0x%lx) too small, "
1371 "aborting\n", pci_name(pdev),
1372 pci_resource_len (pdev, 0),
1373 pci_resource_start (pdev, 0));
1374 goto err_out_free_netdev;
1375 }
1376
1377
1378
1379 if (pci_request_regions (pdev, "tulip"))
1380 goto err_out_free_netdev;
1381
1382#ifndef USE_IO_OPS
1383 ioaddr = (unsigned long) ioremap (pci_resource_start (pdev, 1),
1384 tulip_tbl[chip_idx].io_size);
1385 if (!ioaddr)
1386 goto err_out_free_res;
1387#endif
1388
1389 pci_read_config_byte (pdev, PCI_REVISION_ID, &chip_rev);
1390
1391
1392
1393
1394
1395 tp = dev->priv;
1396
1397 tp->rx_ring = pci_alloc_consistent(pdev,
1398 sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
1399 sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
1400 &tp->rx_ring_dma);
1401 if (!tp->rx_ring)
1402 goto err_out_mtable;
1403 tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
1404 tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
1405
1406 tp->chip_id = chip_idx;
1407 tp->flags = tulip_tbl[chip_idx].flags;
1408 tp->pdev = pdev;
1409 tp->base_addr = ioaddr;
1410 tp->revision = chip_rev;
1411 tp->csr0 = csr0;
1412 spin_lock_init(&tp->lock);
1413 spin_lock_init(&tp->mii_lock);
1414 init_timer(&tp->timer);
1415 tp->timer.data = (unsigned long)dev;
1416 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
1417
1418 dev->base_addr = ioaddr;
1419
1420#ifdef CONFIG_TULIP_MWI
1421 if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1422 tulip_mwi_config (pdev, dev);
1423#else
1424
1425 if (chip_idx == DC21143 && chip_rev == 65)
1426 tp->csr0 &= ~MWI;
1427#endif
1428
1429
1430 tulip_stop_rxtx(tp);
1431
1432 pci_set_master(pdev);
1433
1434
1435 inl(ioaddr + CSR8);
1436
1437
1438
1439
1440
1441 ee_data = tp->eeprom;
1442 sum = 0;
1443 if (chip_idx == LC82C168) {
1444 for (i = 0; i < 3; i++) {
1445 int value, boguscnt = 100000;
1446 outl(0x600 | i, ioaddr + 0x98);
1447 do
1448 value = inl(ioaddr + CSR9);
1449 while (value < 0 && --boguscnt > 0);
1450 put_unaligned(le16_to_cpu(value), ((u16*)dev->dev_addr) + i);
1451 sum += value & 0xffff;
1452 }
1453 } else if (chip_idx == COMET) {
1454
1455 put_unaligned(inl(ioaddr + 0xA4), (u32 *)dev->dev_addr);
1456 put_unaligned(inl(ioaddr + 0xA8), (u16 *)(dev->dev_addr + 4));
1457 for (i = 0; i < 6; i ++)
1458 sum += dev->dev_addr[i];
1459 } else {
1460
1461 int sa_offset = 0;
1462 int ee_addr_size = tulip_read_eeprom(ioaddr, 0xff, 8) & 0x40000 ? 8 : 6;
1463
1464 for (i = 0; i < sizeof(tp->eeprom)/2; i++)
1465 ((u16 *)ee_data)[i] =
1466 le16_to_cpu(tulip_read_eeprom(ioaddr, i, ee_addr_size));
1467
1468
1469
1470
1471 for (i = 0; i < 8; i ++)
1472 if (ee_data[i] != ee_data[16+i])
1473 sa_offset = 20;
1474 if (chip_idx == CONEXANT) {
1475
1476 if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
1477 sa_offset = 0x19A;
1478 } else if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
1479 ee_data[2] == 0) {
1480 sa_offset = 2;
1481 multiport_cnt = 4;
1482 }
1483#ifdef CONFIG_DDB5476
1484 if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 6)) {
1485
1486 sa_offset = 0;
1487
1488 tp->flags &= ~HAS_MEDIA_TABLE;
1489 }
1490#endif
1491#ifdef CONFIG_DDB5477
1492 if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 4)) {
1493
1494 sa_offset = 0;
1495
1496 tp->flags &= ~HAS_MEDIA_TABLE;
1497 }
1498#endif
1499#ifdef CONFIG_MIPS_COBALT
1500 if ((pdev->bus->number == 0) &&
1501 ((PCI_SLOT(pdev->devfn) == 7) ||
1502 (PCI_SLOT(pdev->devfn) == 12))) {
1503
1504 sa_offset = 0;
1505
1506 tp->flags &= ~HAS_MEDIA_TABLE;
1507 }
1508#endif
1509#ifdef __hppa__
1510
1511 if(ee_data[0] == 0x61 && ee_data[1] == 0x10) {
1512
1513 ee_data[0] = ee_data[2];
1514 ee_data[1] = ee_data[3];
1515 ee_data[2] = 0x61;
1516 ee_data[3] = 0x10;
1517
1518
1519
1520
1521
1522 for(i = 4; i >= 0; i -= 2) {
1523 ee_data[17 + i + 3] = ee_data[17 + i];
1524 ee_data[16 + i + 5] = ee_data[16 + i];
1525 }
1526 }
1527#endif
1528 for (i = 0; i < 6; i ++) {
1529 dev->dev_addr[i] = ee_data[i + sa_offset];
1530 sum += ee_data[i + sa_offset];
1531 }
1532 }
1533
1534 if ((dev->dev_addr[0] == 0xA0 || dev->dev_addr[0] == 0xC0)
1535 && dev->dev_addr[1] == 0x00)
1536 for (i = 0; i < 6; i+=2) {
1537 char tmp = dev->dev_addr[i];
1538 dev->dev_addr[i] = dev->dev_addr[i+1];
1539 dev->dev_addr[i+1] = tmp;
1540 }
1541
1542
1543
1544
1545
1546
1547
1548 if (sum == 0 || sum == 6*0xff) {
1549#if defined(__sparc__)
1550 struct pcidev_cookie *pcp = pdev->sysdata;
1551#endif
1552 eeprom_missing = 1;
1553 for (i = 0; i < 5; i++)
1554 dev->dev_addr[i] = last_phys_addr[i];
1555 dev->dev_addr[i] = last_phys_addr[i] + 1;
1556#if defined(__sparc__)
1557 if ((pcp != NULL) && prom_getproplen(pcp->prom_node,
1558 "local-mac-address") == 6) {
1559 prom_getproperty(pcp->prom_node, "local-mac-address",
1560 dev->dev_addr, 6);
1561 }
1562#endif
1563#if defined(__i386__)
1564 if (last_irq)
1565 irq = last_irq;
1566#endif
1567 }
1568
1569 for (i = 0; i < 6; i++)
1570 last_phys_addr[i] = dev->dev_addr[i];
1571 last_irq = irq;
1572 dev->irq = irq;
1573
1574
1575 if (board_idx >= 0 && board_idx < MAX_UNITS) {
1576 if (options[board_idx] & MEDIA_MASK)
1577 tp->default_port = options[board_idx] & MEDIA_MASK;
1578 if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
1579 tp->full_duplex = 1;
1580 if (mtu[board_idx] > 0)
1581 dev->mtu = mtu[board_idx];
1582 }
1583 if (dev->mem_start & MEDIA_MASK)
1584 tp->default_port = dev->mem_start & MEDIA_MASK;
1585 if (tp->default_port) {
1586 printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
1587 board_idx, medianame[tp->default_port & MEDIA_MASK]);
1588 tp->medialock = 1;
1589 if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
1590 tp->full_duplex = 1;
1591 }
1592 if (tp->full_duplex)
1593 tp->full_duplex_lock = 1;
1594
1595 if (tulip_media_cap[tp->default_port] & MediaIsMII) {
1596 u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1597 tp->mii_advertise = media2advert[tp->default_port - 9];
1598 tp->mii_advertise |= (tp->flags & HAS_8023X);
1599 }
1600
1601 if (tp->flags & HAS_MEDIA_TABLE) {
1602 sprintf(dev->name, "tulip%d", board_idx);
1603 tulip_parse_eeprom(dev);
1604 strcpy(dev->name, "eth%d");
1605 }
1606
1607 if ((tp->flags & ALWAYS_CHECK_MII) ||
1608 (tp->mtable && tp->mtable->has_mii) ||
1609 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1610 if (tp->mtable && tp->mtable->has_mii) {
1611 for (i = 0; i < tp->mtable->leafcount; i++)
1612 if (tp->mtable->mleaf[i].media == 11) {
1613 tp->cur_index = i;
1614 tp->saved_if_port = dev->if_port;
1615 tulip_select_media(dev, 2);
1616 dev->if_port = tp->saved_if_port;
1617 break;
1618 }
1619 }
1620
1621
1622
1623
1624 tulip_find_mii (dev, board_idx);
1625 }
1626
1627
1628 dev->open = tulip_open;
1629 dev->hard_start_xmit = tulip_start_xmit;
1630 dev->tx_timeout = tulip_tx_timeout;
1631 dev->watchdog_timeo = TX_TIMEOUT;
1632 dev->stop = tulip_close;
1633 dev->get_stats = tulip_get_stats;
1634 dev->do_ioctl = private_ioctl;
1635 dev->set_multicast_list = set_rx_mode;
1636
1637 if (register_netdev(dev))
1638 goto err_out_free_ring;
1639
1640 printk(KERN_INFO "%s: %s rev %d at %#3lx,",
1641 dev->name, tulip_tbl[chip_idx].chip_name, chip_rev, ioaddr);
1642 pci_set_drvdata(pdev, dev);
1643
1644 if (eeprom_missing)
1645 printk(" EEPROM not present,");
1646 for (i = 0; i < 6; i++)
1647 printk("%c%2.2X", i ? ':' : ' ', dev->dev_addr[i]);
1648 printk(", IRQ %d.\n", irq);
1649
1650 if (tp->chip_id == PNIC2)
1651 tp->link_change = pnic2_lnk_change;
1652 else if (tp->flags & HAS_NWAY)
1653 tp->link_change = t21142_lnk_change;
1654 else if (tp->flags & HAS_PNICNWAY)
1655 tp->link_change = pnic_lnk_change;
1656
1657
1658 switch (chip_idx) {
1659 case DC21140:
1660 case DM910X:
1661 default:
1662 if (tp->mtable)
1663 outl(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1664 break;
1665 case DC21142:
1666 if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
1667 outl(csr6_mask_defstate, ioaddr + CSR6);
1668 outl(0x0000, ioaddr + CSR13);
1669 outl(0x0000, ioaddr + CSR14);
1670 outl(csr6_mask_hdcap, ioaddr + CSR6);
1671 } else
1672 t21142_start_nway(dev);
1673 break;
1674 case PNIC2:
1675
1676 outl(0x0000, ioaddr + CSR13);
1677 outl(0x0000, ioaddr + CSR14);
1678 break;
1679 case LC82C168:
1680 if ( ! tp->mii_cnt) {
1681 tp->nway = 1;
1682 tp->nwayset = 0;
1683 outl(csr6_ttm | csr6_ca, ioaddr + CSR6);
1684 outl(0x30, ioaddr + CSR12);
1685 outl(0x0001F078, ioaddr + CSR6);
1686 outl(0x0201F078, ioaddr + CSR6);
1687 }
1688 break;
1689 case MX98713:
1690 case COMPEX9881:
1691 outl(0x00000000, ioaddr + CSR6);
1692 outl(0x000711C0, ioaddr + CSR14);
1693 outl(0x00000001, ioaddr + CSR13);
1694 break;
1695 case MX98715:
1696 case MX98725:
1697 outl(0x01a80000, ioaddr + CSR6);
1698 outl(0xFFFFFFFF, ioaddr + CSR14);
1699 outl(0x00001000, ioaddr + CSR12);
1700 break;
1701 case COMET:
1702
1703 break;
1704 }
1705
1706
1707 tulip_set_power_state (tp, 0, 1);
1708
1709 return 0;
1710
1711err_out_free_ring:
1712 pci_free_consistent (pdev,
1713 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1714 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1715 tp->rx_ring, tp->rx_ring_dma);
1716
1717err_out_mtable:
1718 if (tp->mtable)
1719 kfree (tp->mtable);
1720#ifndef USE_IO_OPS
1721 iounmap((void *)ioaddr);
1722
1723err_out_free_res:
1724#endif
1725 pci_release_regions (pdev);
1726
1727err_out_free_netdev:
1728 kfree (dev);
1729 return -ENODEV;
1730}
1731
1732
1733#ifdef CONFIG_PM
1734
1735static int tulip_suspend (struct pci_dev *pdev, u32 state)
1736{
1737 struct net_device *dev = pci_get_drvdata(pdev);
1738
1739 if (dev && netif_running (dev) && netif_device_present (dev)) {
1740 netif_device_detach (dev);
1741 tulip_down (dev);
1742
1743 }
1744 return 0;
1745}
1746
1747
1748static int tulip_resume(struct pci_dev *pdev)
1749{
1750 struct net_device *dev = pci_get_drvdata(pdev);
1751
1752 if (dev && netif_running (dev) && !netif_device_present (dev)) {
1753#if 1
1754 pci_enable_device (pdev);
1755#endif
1756
1757 tulip_up (dev);
1758 netif_device_attach (dev);
1759 }
1760 return 0;
1761}
1762
1763#endif
1764
1765
1766static void __devexit tulip_remove_one (struct pci_dev *pdev)
1767{
1768 struct net_device *dev = pci_get_drvdata (pdev);
1769 struct tulip_private *tp;
1770
1771 if (!dev)
1772 return;
1773
1774 tp = dev->priv;
1775 pci_free_consistent (pdev,
1776 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1777 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1778 tp->rx_ring, tp->rx_ring_dma);
1779 unregister_netdev (dev);
1780 if (tp->mtable)
1781 kfree (tp->mtable);
1782#ifndef USE_IO_OPS
1783 iounmap((void *)dev->base_addr);
1784#endif
1785 free_netdev (dev);
1786 pci_release_regions (pdev);
1787 pci_set_drvdata (pdev, NULL);
1788
1789
1790}
1791
1792
1793static struct pci_driver tulip_driver = {
1794 .name = DRV_NAME,
1795 .id_table = tulip_pci_tbl,
1796 .probe = tulip_init_one,
1797 .remove = __devexit_p(tulip_remove_one),
1798#ifdef CONFIG_PM
1799 .suspend = tulip_suspend,
1800 .resume = tulip_resume,
1801#endif
1802};
1803
1804
1805static int __init tulip_init (void)
1806{
1807#ifdef MODULE
1808 printk (KERN_INFO "%s", version);
1809#endif
1810
1811
1812 tulip_rx_copybreak = rx_copybreak;
1813 tulip_max_interrupt_work = max_interrupt_work;
1814
1815
1816 return pci_module_init (&tulip_driver);
1817}
1818
1819
1820static void __exit tulip_cleanup (void)
1821{
1822 pci_unregister_driver (&tulip_driver);
1823}
1824
1825
1826module_init(tulip_init);
1827module_exit(tulip_cleanup);
1828