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96#define DRV_NAME "sundance"
97#define DRV_VERSION "1.01+LK1.09a"
98#define DRV_RELDATE "10-Jul-2003"
99
100
101
102
103static int debug = 1;
104
105
106static int multicast_filter_limit = 32;
107
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110
111
112static int rx_copybreak;
113static int flowctrl=1;
114
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125
126
127#define MAX_UNITS 8
128static char *media[MAX_UNITS];
129
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137
138
139#define TX_RING_SIZE 32
140#define TX_QUEUE_LEN (TX_RING_SIZE - 1)
141#define RX_RING_SIZE 64
142#define RX_BUDGET 32
143#define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct netdev_desc)
144#define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct netdev_desc)
145
146
147
148#define TX_TIMEOUT (4*HZ)
149#define PKT_BUF_SZ 1536
150
151#ifndef __KERNEL__
152#define __KERNEL__
153#endif
154#if !defined(__OPTIMIZE__)
155#warning You must compile this file with the correct options!
156#warning See the last lines of the source file.
157#error You must compile this driver with "-O".
158#endif
159
160
161#include <linux/module.h>
162#include <linux/kernel.h>
163#include <linux/string.h>
164#include <linux/timer.h>
165#include <linux/errno.h>
166#include <linux/ioport.h>
167#include <linux/slab.h>
168#include <linux/interrupt.h>
169#include <linux/pci.h>
170#include <linux/netdevice.h>
171#include <linux/etherdevice.h>
172#include <linux/skbuff.h>
173#include <linux/init.h>
174#include <asm/uaccess.h>
175#include <asm/processor.h>
176#include <asm/bitops.h>
177#include <asm/io.h>
178#include <linux/delay.h>
179#include <linux/spinlock.h>
180#ifndef _COMPAT_WITH_OLD_KERNEL
181#include <linux/crc32.h>
182#include <linux/ethtool.h>
183#include <linux/mii.h>
184#else
185#include "crc32.h"
186#include "ethtool.h"
187#include "mii.h"
188#include "compat.h"
189#endif
190
191
192static char version[] __devinitdata =
193KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
194KERN_INFO " http://www.scyld.com/network/sundance.html\n";
195
196MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
197MODULE_DESCRIPTION("Sundance Alta Ethernet driver");
198MODULE_LICENSE("GPL");
199
200MODULE_PARM(debug, "i");
201MODULE_PARM(rx_copybreak, "i");
202MODULE_PARM(media, "1-" __MODULE_STRING(MAX_UNITS) "s");
203MODULE_PARM(flowctrl, "i");
204MODULE_PARM_DESC(debug, "Sundance Alta debug level (0-5)");
205MODULE_PARM_DESC(rx_copybreak, "Sundance Alta copy breakpoint for copy-only-tiny-frames");
206MODULE_PARM_DESC(flowctrl, "Sundance Alta flow control [0|1]");
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283#ifndef CONFIG_SUNDANCE_MMIO
284#define USE_IO_OPS 1
285#endif
286
287static struct pci_device_id sundance_pci_tbl[] = {
288 {0x1186, 0x1002, 0x1186, 0x1002, 0, 0, 0},
289 {0x1186, 0x1002, 0x1186, 0x1003, 0, 0, 1},
290 {0x1186, 0x1002, 0x1186, 0x1012, 0, 0, 2},
291 {0x1186, 0x1002, 0x1186, 0x1040, 0, 0, 3},
292 {0x1186, 0x1002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
293 {0x13F0, 0x0201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5},
294 {0,}
295};
296MODULE_DEVICE_TABLE(pci, sundance_pci_tbl);
297
298enum {
299 netdev_io_size = 128
300};
301
302struct pci_id_info {
303 const char *name;
304};
305static struct pci_id_info pci_id_tbl[] = {
306 {"D-Link DFE-550TX FAST Ethernet Adapter"},
307 {"D-Link DFE-550FX 100Mbps Fiber-optics Adapter"},
308 {"D-Link DFE-580TX 4 port Server Adapter"},
309 {"D-Link DFE-530TXS FAST Ethernet Adapter"},
310 {"D-Link DL10050-based FAST Ethernet Adapter"},
311 {"Sundance Technology Alta"},
312 {0,},
313};
314
315
316
317#ifdef USE_IO_OPS
318#undef readb
319#undef readw
320#undef readl
321#undef writeb
322#undef writew
323#undef writel
324#define readb inb
325#define readw inw
326#define readl inl
327#define writeb outb
328#define writew outw
329#define writel outl
330#endif
331
332
333
334
335
336
337
338
339
340enum alta_offsets {
341 DMACtrl = 0x00,
342 TxListPtr = 0x04,
343 TxDMABurstThresh = 0x08,
344 TxDMAUrgentThresh = 0x09,
345 TxDMAPollPeriod = 0x0a,
346 RxDMAStatus = 0x0c,
347 RxListPtr = 0x10,
348 DebugCtrl0 = 0x1a,
349 DebugCtrl1 = 0x1c,
350 RxDMABurstThresh = 0x14,
351 RxDMAUrgentThresh = 0x15,
352 RxDMAPollPeriod = 0x16,
353 LEDCtrl = 0x1a,
354 ASICCtrl = 0x30,
355 EEData = 0x34,
356 EECtrl = 0x36,
357 TxStartThresh = 0x3c,
358 RxEarlyThresh = 0x3e,
359 FlashAddr = 0x40,
360 FlashData = 0x44,
361 TxStatus = 0x46,
362 TxFrameId = 0x47,
363 DownCounter = 0x18,
364 IntrClear = 0x4a,
365 IntrEnable = 0x4c,
366 IntrStatus = 0x4e,
367 MACCtrl0 = 0x50,
368 MACCtrl1 = 0x52,
369 StationAddr = 0x54,
370 MaxFrameSize = 0x5A,
371 RxMode = 0x5c,
372 MIICtrl = 0x5e,
373 MulticastFilter0 = 0x60,
374 MulticastFilter1 = 0x64,
375 RxOctetsLow = 0x68,
376 RxOctetsHigh = 0x6a,
377 TxOctetsLow = 0x6c,
378 TxOctetsHigh = 0x6e,
379 TxFramesOK = 0x70,
380 RxFramesOK = 0x72,
381 StatsCarrierError = 0x74,
382 StatsLateColl = 0x75,
383 StatsMultiColl = 0x76,
384 StatsOneColl = 0x77,
385 StatsTxDefer = 0x78,
386 RxMissed = 0x79,
387 StatsTxXSDefer = 0x7a,
388 StatsTxAbort = 0x7b,
389 StatsBcastTx = 0x7c,
390 StatsBcastRx = 0x7d,
391 StatsMcastTx = 0x7e,
392 StatsMcastRx = 0x7f,
393
394 RxStatus = 0x0c,
395};
396enum ASICCtrl_HiWord_bit {
397 GlobalReset = 0x0001,
398 RxReset = 0x0002,
399 TxReset = 0x0004,
400 DMAReset = 0x0008,
401 FIFOReset = 0x0010,
402 NetworkReset = 0x0020,
403 HostReset = 0x0040,
404 ResetBusy = 0x0400,
405};
406
407
408enum intr_status_bits {
409 IntrSummary=0x0001, IntrPCIErr=0x0002, IntrMACCtrl=0x0008,
410 IntrTxDone=0x0004, IntrRxDone=0x0010, IntrRxStart=0x0020,
411 IntrDrvRqst=0x0040,
412 StatsMax=0x0080, LinkChange=0x0100,
413 IntrTxDMADone=0x0200, IntrRxDMADone=0x0400,
414};
415
416
417enum rx_mode_bits {
418 AcceptAllIPMulti=0x20, AcceptMultiHash=0x10, AcceptAll=0x08,
419 AcceptBroadcast=0x04, AcceptMulticast=0x02, AcceptMyPhys=0x01,
420};
421
422enum mac_ctrl0_bits {
423 EnbFullDuplex=0x20, EnbRcvLargeFrame=0x40,
424 EnbFlowCtrl=0x100, EnbPassRxCRC=0x200,
425};
426enum mac_ctrl1_bits {
427 StatsEnable=0x0020, StatsDisable=0x0040, StatsEnabled=0x0080,
428 TxEnable=0x0100, TxDisable=0x0200, TxEnabled=0x0400,
429 RxEnable=0x0800, RxDisable=0x1000, RxEnabled=0x2000,
430};
431
432
433
434
435struct netdev_desc {
436 u32 next_desc;
437 u32 status;
438 struct desc_frag { u32 addr, length; } frag[1];
439};
440
441
442enum desc_status_bits {
443 DescOwn=0x8000,
444 DescEndPacket=0x4000,
445 DescEndRing=0x2000,
446 LastFrag=0x80000000,
447 DescIntrOnTx=0x8000,
448 DescIntrOnDMADone=0x80000000,
449 DisableAlign = 0x00000001,
450};
451
452#define PRIV_ALIGN 15
453
454
455#define MII_CNT 4
456struct netdev_private {
457
458 struct netdev_desc *rx_ring;
459 struct netdev_desc *tx_ring;
460 struct sk_buff* rx_skbuff[RX_RING_SIZE];
461 struct sk_buff* tx_skbuff[TX_RING_SIZE];
462 dma_addr_t tx_ring_dma;
463 dma_addr_t rx_ring_dma;
464 struct net_device_stats stats;
465 struct timer_list timer;
466
467 spinlock_t lock;
468 spinlock_t rx_lock;
469 int msg_enable;
470 int chip_id;
471 unsigned int cur_rx, dirty_rx;
472 unsigned int rx_buf_sz;
473 struct netdev_desc *last_tx;
474 unsigned int cur_tx, dirty_tx;
475
476 unsigned int flowctrl:1;
477 unsigned int default_port:4;
478 unsigned int an_enable:1;
479 unsigned int speed;
480 struct tasklet_struct rx_tasklet;
481 struct tasklet_struct tx_tasklet;
482 int budget;
483 int cur_task;
484
485 spinlock_t mcastlock;
486 u16 mcast_filter[4];
487
488 struct mii_if_info mii_if;
489 int mii_preamble_required;
490 unsigned char phys[MII_CNT];
491 struct pci_dev *pci_dev;
492 unsigned char pci_rev_id;
493};
494
495
496#define EEPROM_SA_OFFSET 0x10
497#define DEFAULT_INTR (IntrRxDMADone | IntrPCIErr | \
498 IntrDrvRqst | IntrTxDone | StatsMax | \
499 LinkChange)
500
501static int change_mtu(struct net_device *dev, int new_mtu);
502static int eeprom_read(long ioaddr, int location);
503static int mdio_read(struct net_device *dev, int phy_id, int location);
504static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
505static int netdev_open(struct net_device *dev);
506static void check_duplex(struct net_device *dev);
507static void netdev_timer(unsigned long data);
508static void tx_timeout(struct net_device *dev);
509static void init_ring(struct net_device *dev);
510static int start_tx(struct sk_buff *skb, struct net_device *dev);
511static int reset_tx (struct net_device *dev);
512static irqreturn_t intr_handler(int irq, void *dev_instance, struct pt_regs *regs);
513static void rx_poll(unsigned long data);
514static void tx_poll(unsigned long data);
515static void refill_rx (struct net_device *dev);
516static void netdev_error(struct net_device *dev, int intr_status);
517static void netdev_error(struct net_device *dev, int intr_status);
518static void set_rx_mode(struct net_device *dev);
519static int __set_mac_addr(struct net_device *dev);
520static struct net_device_stats *get_stats(struct net_device *dev);
521static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
522static int netdev_close(struct net_device *dev);
523
524
525
526static int __devinit sundance_probe1 (struct pci_dev *pdev,
527 const struct pci_device_id *ent)
528{
529 struct net_device *dev;
530 struct netdev_private *np;
531 static int card_idx;
532 int chip_idx = ent->driver_data;
533 int irq;
534 int i;
535 long ioaddr;
536 u16 mii_ctl;
537 void *ring_space;
538 dma_addr_t ring_dma;
539
540
541
542#ifndef MODULE
543 static int printed_version;
544 if (!printed_version++)
545 printk(version);
546#endif
547
548 if (pci_enable_device(pdev))
549 return -EIO;
550 pci_set_master(pdev);
551
552 irq = pdev->irq;
553
554 dev = alloc_etherdev(sizeof(*np));
555 if (!dev)
556 return -ENOMEM;
557 SET_MODULE_OWNER(dev);
558 SET_NETDEV_DEV(dev, &pdev->dev);
559
560 if (pci_request_regions(pdev, DRV_NAME))
561 goto err_out_netdev;
562
563#ifdef USE_IO_OPS
564 ioaddr = pci_resource_start(pdev, 0);
565#else
566 ioaddr = pci_resource_start(pdev, 1);
567 ioaddr = (long) ioremap (ioaddr, netdev_io_size);
568 if (!ioaddr)
569 goto err_out_res;
570#endif
571
572 for (i = 0; i < 3; i++)
573 ((u16 *)dev->dev_addr)[i] =
574 le16_to_cpu(eeprom_read(ioaddr, i + EEPROM_SA_OFFSET));
575
576 dev->base_addr = ioaddr;
577 dev->irq = irq;
578
579 np = dev->priv;
580 np->pci_dev = pdev;
581 np->chip_id = chip_idx;
582 np->msg_enable = (1 << debug) - 1;
583 spin_lock_init(&np->lock);
584 tasklet_init(&np->rx_tasklet, rx_poll, (unsigned long)dev);
585 tasklet_init(&np->tx_tasklet, tx_poll, (unsigned long)dev);
586
587 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
588 if (!ring_space)
589 goto err_out_cleardev;
590 np->tx_ring = (struct netdev_desc *)ring_space;
591 np->tx_ring_dma = ring_dma;
592
593 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
594 if (!ring_space)
595 goto err_out_unmap_tx;
596 np->rx_ring = (struct netdev_desc *)ring_space;
597 np->rx_ring_dma = ring_dma;
598
599 np->mii_if.dev = dev;
600 np->mii_if.mdio_read = mdio_read;
601 np->mii_if.mdio_write = mdio_write;
602 np->mii_if.phy_id_mask = 0x1f;
603 np->mii_if.reg_num_mask = 0x1f;
604
605
606 dev->open = &netdev_open;
607 dev->hard_start_xmit = &start_tx;
608 dev->stop = &netdev_close;
609 dev->get_stats = &get_stats;
610 dev->set_multicast_list = &set_rx_mode;
611 dev->do_ioctl = &netdev_ioctl;
612 dev->tx_timeout = &tx_timeout;
613 dev->watchdog_timeo = TX_TIMEOUT;
614 dev->change_mtu = &change_mtu;
615 pci_set_drvdata(pdev, dev);
616
617 pci_read_config_byte(pdev, PCI_REVISION_ID, &np->pci_rev_id);
618
619 i = register_netdev(dev);
620 if (i)
621 goto err_out_unmap_rx;
622
623 printk(KERN_INFO "%s: %s at 0x%lx, ",
624 dev->name, pci_id_tbl[chip_idx].name, ioaddr);
625 for (i = 0; i < 5; i++)
626 printk("%2.2x:", dev->dev_addr[i]);
627 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
628
629 if (1) {
630 int phy, phy_idx = 0;
631 np->phys[0] = 1;
632 np->mii_preamble_required++;
633 for (phy = 1; phy < 32 && phy_idx < MII_CNT; phy++) {
634 int mii_status = mdio_read(dev, phy, MII_BMSR);
635 if (mii_status != 0xffff && mii_status != 0x0000) {
636 np->phys[phy_idx++] = phy;
637 np->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
638 if ((mii_status & 0x0040) == 0)
639 np->mii_preamble_required++;
640 printk(KERN_INFO "%s: MII PHY found at address %d, status "
641 "0x%4.4x advertising %4.4x.\n",
642 dev->name, phy, mii_status, np->mii_if.advertising);
643 }
644 }
645 np->mii_preamble_required--;
646
647 if (phy_idx == 0) {
648 printk(KERN_INFO "%s: No MII transceiver found, aborting. ASIC status %x\n",
649 dev->name, readl(ioaddr + ASICCtrl));
650 goto err_out_unregister;
651 }
652
653 np->mii_if.phy_id = np->phys[0];
654 }
655
656
657 np->an_enable = 1;
658 if (card_idx < MAX_UNITS) {
659 if (media[card_idx] != NULL) {
660 np->an_enable = 0;
661 if (strcmp (media[card_idx], "100mbps_fd") == 0 ||
662 strcmp (media[card_idx], "4") == 0) {
663 np->speed = 100;
664 np->mii_if.full_duplex = 1;
665 } else if (strcmp (media[card_idx], "100mbps_hd") == 0
666 || strcmp (media[card_idx], "3") == 0) {
667 np->speed = 100;
668 np->mii_if.full_duplex = 0;
669 } else if (strcmp (media[card_idx], "10mbps_fd") == 0 ||
670 strcmp (media[card_idx], "2") == 0) {
671 np->speed = 10;
672 np->mii_if.full_duplex = 1;
673 } else if (strcmp (media[card_idx], "10mbps_hd") == 0 ||
674 strcmp (media[card_idx], "1") == 0) {
675 np->speed = 10;
676 np->mii_if.full_duplex = 0;
677 } else {
678 np->an_enable = 1;
679 }
680 }
681 if (flowctrl == 1)
682 np->flowctrl = 1;
683 }
684
685
686 if (readl (ioaddr + ASICCtrl) & 0x80) {
687
688 if (np->an_enable) {
689 np->speed = 100;
690 np->mii_if.full_duplex = 1;
691 np->an_enable = 0;
692 }
693 }
694
695 mdio_write (dev, np->phys[0], MII_BMCR, BMCR_RESET);
696 mdelay (300);
697
698 if (np->flowctrl)
699 mdio_write (dev, np->phys[0], MII_ADVERTISE, np->mii_if.advertising | 0x0400);
700 mdio_write (dev, np->phys[0], MII_BMCR, BMCR_ANENABLE|BMCR_ANRESTART);
701
702 if (!np->an_enable) {
703 mii_ctl = 0;
704 mii_ctl |= (np->speed == 100) ? BMCR_SPEED100 : 0;
705 mii_ctl |= (np->mii_if.full_duplex) ? BMCR_FULLDPLX : 0;
706 mdio_write (dev, np->phys[0], MII_BMCR, mii_ctl);
707 printk (KERN_INFO "Override speed=%d, %s duplex\n",
708 np->speed, np->mii_if.full_duplex ? "Full" : "Half");
709
710 }
711
712
713
714 if (netif_msg_hw(np))
715 printk("ASIC Control is %x.\n", readl(ioaddr + ASICCtrl));
716 writew(0x007f, ioaddr + ASICCtrl + 2);
717 if (netif_msg_hw(np))
718 printk("ASIC Control is now %x.\n", readl(ioaddr + ASICCtrl));
719
720 card_idx++;
721 return 0;
722
723err_out_unregister:
724 unregister_netdev(dev);
725err_out_unmap_rx:
726 pci_free_consistent(pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
727err_out_unmap_tx:
728 pci_free_consistent(pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
729err_out_cleardev:
730 pci_set_drvdata(pdev, NULL);
731#ifndef USE_IO_OPS
732 iounmap((void *)ioaddr);
733err_out_res:
734#endif
735 pci_release_regions(pdev);
736err_out_netdev:
737 free_netdev (dev);
738 return -ENODEV;
739}
740
741static int change_mtu(struct net_device *dev, int new_mtu)
742{
743 if ((new_mtu < 68) || (new_mtu > 8191))
744 return -EINVAL;
745 if (netif_running(dev))
746 return -EBUSY;
747 dev->mtu = new_mtu;
748 return 0;
749}
750
751#define eeprom_delay(ee_addr) readl(ee_addr)
752
753static int __devinit eeprom_read(long ioaddr, int location)
754{
755 int boguscnt = 10000;
756 writew(0x0200 | (location & 0xff), ioaddr + EECtrl);
757 do {
758 eeprom_delay(ioaddr + EECtrl);
759 if (! (readw(ioaddr + EECtrl) & 0x8000)) {
760 return readw(ioaddr + EEData);
761 }
762 } while (--boguscnt > 0);
763 return 0;
764}
765
766
767
768
769
770
771
772
773#define mdio_delay() readb(mdio_addr)
774
775enum mii_reg_bits {
776 MDIO_ShiftClk=0x0001, MDIO_Data=0x0002, MDIO_EnbOutput=0x0004,
777};
778#define MDIO_EnbIn (0)
779#define MDIO_WRITE0 (MDIO_EnbOutput)
780#define MDIO_WRITE1 (MDIO_Data | MDIO_EnbOutput)
781
782
783
784static void mdio_sync(long mdio_addr)
785{
786 int bits = 32;
787
788
789 while (--bits >= 0) {
790 writeb(MDIO_WRITE1, mdio_addr);
791 mdio_delay();
792 writeb(MDIO_WRITE1 | MDIO_ShiftClk, mdio_addr);
793 mdio_delay();
794 }
795}
796
797static int mdio_read(struct net_device *dev, int phy_id, int location)
798{
799 struct netdev_private *np = dev->priv;
800 long mdio_addr = dev->base_addr + MIICtrl;
801 int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
802 int i, retval = 0;
803
804 if (np->mii_preamble_required)
805 mdio_sync(mdio_addr);
806
807
808 for (i = 15; i >= 0; i--) {
809 int dataval = (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
810
811 writeb(dataval, mdio_addr);
812 mdio_delay();
813 writeb(dataval | MDIO_ShiftClk, mdio_addr);
814 mdio_delay();
815 }
816
817 for (i = 19; i > 0; i--) {
818 writeb(MDIO_EnbIn, mdio_addr);
819 mdio_delay();
820 retval = (retval << 1) | ((readb(mdio_addr) & MDIO_Data) ? 1 : 0);
821 writeb(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr);
822 mdio_delay();
823 }
824 return (retval>>1) & 0xffff;
825}
826
827static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
828{
829 struct netdev_private *np = dev->priv;
830 long mdio_addr = dev->base_addr + MIICtrl;
831 int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location<<18) | value;
832 int i;
833
834 if (np->mii_preamble_required)
835 mdio_sync(mdio_addr);
836
837
838 for (i = 31; i >= 0; i--) {
839 int dataval = (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
840
841 writeb(dataval, mdio_addr);
842 mdio_delay();
843 writeb(dataval | MDIO_ShiftClk, mdio_addr);
844 mdio_delay();
845 }
846
847 for (i = 2; i > 0; i--) {
848 writeb(MDIO_EnbIn, mdio_addr);
849 mdio_delay();
850 writeb(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr);
851 mdio_delay();
852 }
853 return;
854}
855
856static int netdev_open(struct net_device *dev)
857{
858 struct netdev_private *np = dev->priv;
859 long ioaddr = dev->base_addr;
860 int i;
861
862
863
864 i = request_irq(dev->irq, &intr_handler, SA_SHIRQ, dev->name, dev);
865 if (i)
866 return i;
867
868 if (netif_msg_ifup(np))
869 printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",
870 dev->name, dev->irq);
871 init_ring(dev);
872
873 writel(np->rx_ring_dma, ioaddr + RxListPtr);
874
875
876
877 __set_mac_addr(dev);
878#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
879 writew(dev->mtu + 18, ioaddr + MaxFrameSize);
880#else
881 writew(dev->mtu + 14, ioaddr + MaxFrameSize);
882#endif
883 if (dev->mtu > 2047)
884 writel(readl(ioaddr + ASICCtrl) | 0x0C, ioaddr + ASICCtrl);
885
886
887
888 if (dev->if_port == 0)
889 dev->if_port = np->default_port;
890
891 np->mcastlock = (spinlock_t) SPIN_LOCK_UNLOCKED;
892
893 set_rx_mode(dev);
894 writew(0, ioaddr + IntrEnable);
895 writew(0, ioaddr + DownCounter);
896
897 writeb(100, ioaddr + RxDMAPollPeriod);
898 writeb(127, ioaddr + TxDMAPollPeriod);
899
900 if (np->pci_rev_id >= 0x14)
901 writeb(0x01, ioaddr + DebugCtrl1);
902 netif_start_queue(dev);
903
904 writew (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);
905
906 if (netif_msg_ifup(np))
907 printk(KERN_DEBUG "%s: Done netdev_open(), status: Rx %x Tx %x "
908 "MAC Control %x, %4.4x %4.4x.\n",
909 dev->name, readl(ioaddr + RxStatus), readb(ioaddr + TxStatus),
910 readl(ioaddr + MACCtrl0),
911 readw(ioaddr + MACCtrl1), readw(ioaddr + MACCtrl0));
912
913
914 init_timer(&np->timer);
915 np->timer.expires = jiffies + 3*HZ;
916 np->timer.data = (unsigned long)dev;
917 np->timer.function = &netdev_timer;
918 add_timer(&np->timer);
919
920
921 writew(DEFAULT_INTR, ioaddr + IntrEnable);
922
923 return 0;
924}
925
926static void check_duplex(struct net_device *dev)
927{
928 struct netdev_private *np = dev->priv;
929 long ioaddr = dev->base_addr;
930 int mii_lpa = mdio_read(dev, np->phys[0], MII_LPA);
931 int negotiated = mii_lpa & np->mii_if.advertising;
932 int duplex;
933
934
935 if (!np->an_enable || mii_lpa == 0xffff) {
936 if (np->mii_if.full_duplex)
937 writew (readw (ioaddr + MACCtrl0) | EnbFullDuplex,
938 ioaddr + MACCtrl0);
939 return;
940 }
941
942
943 duplex = (negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040;
944 if (np->mii_if.full_duplex != duplex) {
945 np->mii_if.full_duplex = duplex;
946 if (netif_msg_link(np))
947 printk(KERN_INFO "%s: Setting %s-duplex based on MII #%d "
948 "negotiated capability %4.4x.\n", dev->name,
949 duplex ? "full" : "half", np->phys[0], negotiated);
950 writew(readw(ioaddr + MACCtrl0) | duplex ? 0x20 : 0, ioaddr + MACCtrl0);
951 }
952}
953
954static void netdev_timer(unsigned long data)
955{
956 struct net_device *dev = (struct net_device *)data;
957 struct netdev_private *np = dev->priv;
958 long ioaddr = dev->base_addr;
959 int next_tick = 10*HZ;
960
961 if (netif_msg_timer(np)) {
962 printk(KERN_DEBUG "%s: Media selection timer tick, intr status %4.4x, "
963 "Tx %x Rx %x.\n",
964 dev->name, readw(ioaddr + IntrEnable),
965 readb(ioaddr + TxStatus), readl(ioaddr + RxStatus));
966 }
967 check_duplex(dev);
968 np->timer.expires = jiffies + next_tick;
969 add_timer(&np->timer);
970}
971
972static void tx_timeout(struct net_device *dev)
973{
974 struct netdev_private *np = dev->priv;
975 long ioaddr = dev->base_addr;
976 unsigned long flag;
977
978 netif_stop_queue(dev);
979 tasklet_disable(&np->tx_tasklet);
980 writew(0, ioaddr + IntrEnable);
981 printk(KERN_WARNING "%s: Transmit timed out, TxStatus %2.2x "
982 "TxFrameId %2.2x,"
983 " resetting...\n", dev->name, readb(ioaddr + TxStatus),
984 readb(ioaddr + TxFrameId));
985
986 {
987 int i;
988 for (i=0; i<TX_RING_SIZE; i++) {
989 printk(KERN_DEBUG "%02x %08Zx %08x %08x(%02x) %08x %08x\n", i,
990 np->tx_ring_dma + i*sizeof(*np->tx_ring),
991 le32_to_cpu(np->tx_ring[i].next_desc),
992 le32_to_cpu(np->tx_ring[i].status),
993 (le32_to_cpu(np->tx_ring[i].status) >> 2) & 0xff,
994 le32_to_cpu(np->tx_ring[i].frag[0].addr),
995 le32_to_cpu(np->tx_ring[i].frag[0].length));
996 }
997 printk(KERN_DEBUG "TxListPtr=%08x netif_queue_stopped=%d\n",
998 readl(dev->base_addr + TxListPtr),
999 netif_queue_stopped(dev));
1000 printk(KERN_DEBUG "cur_tx=%d(%02x) dirty_tx=%d(%02x)\n",
1001 np->cur_tx, np->cur_tx % TX_RING_SIZE,
1002 np->dirty_tx, np->dirty_tx % TX_RING_SIZE);
1003 printk(KERN_DEBUG "cur_rx=%d dirty_rx=%d\n", np->cur_rx, np->dirty_rx);
1004 printk(KERN_DEBUG "cur_task=%d\n", np->cur_task);
1005 }
1006 spin_lock_irqsave(&np->lock, flag);
1007
1008
1009 reset_tx(dev);
1010 spin_unlock_irqrestore(&np->lock, flag);
1011
1012 dev->if_port = 0;
1013
1014 dev->trans_start = jiffies;
1015 np->stats.tx_errors++;
1016 if (np->cur_tx - np->dirty_tx < TX_QUEUE_LEN - 4) {
1017 netif_wake_queue(dev);
1018 }
1019 writew(DEFAULT_INTR, ioaddr + IntrEnable);
1020 tasklet_enable(&np->tx_tasklet);
1021}
1022
1023
1024
1025static void init_ring(struct net_device *dev)
1026{
1027 struct netdev_private *np = dev->priv;
1028 int i;
1029
1030 np->cur_rx = np->cur_tx = 0;
1031 np->dirty_rx = np->dirty_tx = 0;
1032 np->cur_task = 0;
1033
1034 np->rx_buf_sz = (dev->mtu <= 1520 ? PKT_BUF_SZ : dev->mtu + 16);
1035
1036
1037 for (i = 0; i < RX_RING_SIZE; i++) {
1038 np->rx_ring[i].next_desc = cpu_to_le32(np->rx_ring_dma +
1039 ((i+1)%RX_RING_SIZE)*sizeof(*np->rx_ring));
1040 np->rx_ring[i].status = 0;
1041 np->rx_ring[i].frag[0].length = 0;
1042 np->rx_skbuff[i] = 0;
1043 }
1044
1045
1046 for (i = 0; i < RX_RING_SIZE; i++) {
1047 struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz);
1048 np->rx_skbuff[i] = skb;
1049 if (skb == NULL)
1050 break;
1051 skb->dev = dev;
1052 skb_reserve(skb, 2);
1053 np->rx_ring[i].frag[0].addr = cpu_to_le32(
1054 pci_map_single(np->pci_dev, skb->tail, np->rx_buf_sz,
1055 PCI_DMA_FROMDEVICE));
1056 np->rx_ring[i].frag[0].length = cpu_to_le32(np->rx_buf_sz | LastFrag);
1057 }
1058 np->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1059
1060 for (i = 0; i < TX_RING_SIZE; i++) {
1061 np->tx_skbuff[i] = 0;
1062 np->tx_ring[i].status = 0;
1063 }
1064 return;
1065}
1066
1067static void tx_poll (unsigned long data)
1068{
1069 struct net_device *dev = (struct net_device *)data;
1070 struct netdev_private *np = dev->priv;
1071 unsigned head = np->cur_task % TX_RING_SIZE;
1072 struct netdev_desc *txdesc =
1073 &np->tx_ring[(np->cur_tx - 1) % TX_RING_SIZE];
1074
1075
1076 for (; np->cur_tx - np->cur_task > 0; np->cur_task++) {
1077 int entry = np->cur_task % TX_RING_SIZE;
1078 txdesc = &np->tx_ring[entry];
1079 if (np->last_tx) {
1080 np->last_tx->next_desc = cpu_to_le32(np->tx_ring_dma +
1081 entry*sizeof(struct netdev_desc));
1082 }
1083 np->last_tx = txdesc;
1084 }
1085
1086 txdesc->status |= cpu_to_le32(DescIntrOnTx);
1087
1088 if (readl (dev->base_addr + TxListPtr) == 0)
1089 writel (np->tx_ring_dma + head * sizeof(struct netdev_desc),
1090 dev->base_addr + TxListPtr);
1091 return;
1092}
1093
1094static int
1095start_tx (struct sk_buff *skb, struct net_device *dev)
1096{
1097 struct netdev_private *np = dev->priv;
1098 struct netdev_desc *txdesc;
1099 unsigned entry;
1100
1101
1102 entry = np->cur_tx % TX_RING_SIZE;
1103 np->tx_skbuff[entry] = skb;
1104 txdesc = &np->tx_ring[entry];
1105
1106 txdesc->next_desc = 0;
1107 txdesc->status = cpu_to_le32 ((entry << 2) | DisableAlign);
1108 txdesc->frag[0].addr = cpu_to_le32 (pci_map_single (np->pci_dev, skb->data,
1109 skb->len,
1110 PCI_DMA_TODEVICE));
1111 txdesc->frag[0].length = cpu_to_le32 (skb->len | LastFrag);
1112
1113
1114 np->cur_tx++;
1115 mb();
1116
1117 tasklet_schedule(&np->tx_tasklet);
1118
1119
1120 if (np->cur_tx - np->dirty_tx < TX_QUEUE_LEN - 1
1121 && !netif_queue_stopped(dev)) {
1122
1123 } else {
1124 netif_stop_queue (dev);
1125 }
1126 dev->trans_start = jiffies;
1127 if (netif_msg_tx_queued(np)) {
1128 printk (KERN_DEBUG
1129 "%s: Transmit frame #%d queued in slot %d.\n",
1130 dev->name, np->cur_tx, entry);
1131 }
1132 return 0;
1133}
1134
1135
1136static int
1137reset_tx (struct net_device *dev)
1138{
1139 struct netdev_private *np = (struct netdev_private*) dev->priv;
1140 long ioaddr = dev->base_addr;
1141 struct sk_buff *skb;
1142 int i;
1143 int irq = in_interrupt();
1144
1145
1146 writew (TxDisable, ioaddr + MACCtrl1);
1147 writew (TxReset | DMAReset | FIFOReset | NetworkReset,
1148 ioaddr + ASICCtrl + 2);
1149 for (i=50; i > 0; i--) {
1150 if ((readw(ioaddr + ASICCtrl + 2) & ResetBusy) == 0)
1151 break;
1152 mdelay(1);
1153 }
1154
1155 for (i = 0; i < TX_RING_SIZE; i++) {
1156 skb = np->tx_skbuff[i];
1157 if (skb) {
1158 pci_unmap_single(np->pci_dev,
1159 np->tx_ring[i].frag[0].addr, skb->len,
1160 PCI_DMA_TODEVICE);
1161 if (irq)
1162 dev_kfree_skb_irq (skb);
1163 else
1164 dev_kfree_skb (skb);
1165 np->tx_skbuff[i] = 0;
1166 np->stats.tx_dropped++;
1167 }
1168 }
1169 np->cur_tx = np->dirty_tx = 0;
1170 np->cur_task = 0;
1171 writew (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);
1172 return 0;
1173}
1174
1175
1176
1177static irqreturn_t intr_handler(int irq, void *dev_instance, struct pt_regs *rgs)
1178{
1179 struct net_device *dev = (struct net_device *)dev_instance;
1180 struct netdev_private *np;
1181 long ioaddr;
1182 int hw_frame_id;
1183 int tx_cnt;
1184 int tx_status;
1185 int handled = 0;
1186
1187 ioaddr = dev->base_addr;
1188 np = dev->priv;
1189
1190 do {
1191 int intr_status = readw(ioaddr + IntrStatus);
1192 writew(intr_status, ioaddr + IntrStatus);
1193
1194 if (netif_msg_intr(np))
1195 printk(KERN_DEBUG "%s: Interrupt, status %4.4x.\n",
1196 dev->name, intr_status);
1197
1198 if (!(intr_status & DEFAULT_INTR))
1199 break;
1200
1201 handled = 1;
1202
1203 if (intr_status & (IntrRxDMADone)) {
1204 writew(DEFAULT_INTR & ~(IntrRxDone|IntrRxDMADone),
1205 ioaddr + IntrEnable);
1206 if (np->budget < 0)
1207 np->budget = RX_BUDGET;
1208 tasklet_schedule(&np->rx_tasklet);
1209 }
1210 if (intr_status & (IntrTxDone | IntrDrvRqst)) {
1211 tx_status = readw (ioaddr + TxStatus);
1212 for (tx_cnt=32; tx_status & 0x80; --tx_cnt) {
1213 if (netif_msg_tx_done(np))
1214 printk
1215 ("%s: Transmit status is %2.2x.\n",
1216 dev->name, tx_status);
1217 if (tx_status & 0x1e) {
1218 np->stats.tx_errors++;
1219 if (tx_status & 0x10)
1220 np->stats.tx_fifo_errors++;
1221 if (tx_status & 0x08)
1222 np->stats.collisions++;
1223 if (tx_status & 0x02)
1224 np->stats.tx_window_errors++;
1225
1226 if (tx_status & 0x10) {
1227 np->stats.tx_fifo_errors++;
1228 spin_lock(&np->lock);
1229 reset_tx(dev);
1230 spin_unlock(&np->lock);
1231 }
1232 if (tx_status & 0x1e)
1233 writew (TxEnable,
1234 ioaddr + MACCtrl1);
1235 }
1236
1237 writew (0, ioaddr + TxStatus);
1238 tx_status = readw (ioaddr + TxStatus);
1239 if (tx_cnt < 0)
1240 break;
1241 }
1242 hw_frame_id = (tx_status >> 8) & 0xff;
1243 } else {
1244 hw_frame_id = readb(ioaddr + TxFrameId);
1245 }
1246
1247 if (np->pci_rev_id >= 0x14) {
1248 spin_lock(&np->lock);
1249 for (; np->cur_tx - np->dirty_tx > 0; np->dirty_tx++) {
1250 int entry = np->dirty_tx % TX_RING_SIZE;
1251 struct sk_buff *skb;
1252 int sw_frame_id;
1253 sw_frame_id = (le32_to_cpu(
1254 np->tx_ring[entry].status) >> 2) & 0xff;
1255 if (sw_frame_id == hw_frame_id &&
1256 !(le32_to_cpu(np->tx_ring[entry].status)
1257 & 0x00010000))
1258 break;
1259 if (sw_frame_id == (hw_frame_id + 1) %
1260 TX_RING_SIZE)
1261 break;
1262 skb = np->tx_skbuff[entry];
1263
1264 pci_unmap_single(np->pci_dev,
1265 np->tx_ring[entry].frag[0].addr,
1266 skb->len, PCI_DMA_TODEVICE);
1267 dev_kfree_skb_irq (np->tx_skbuff[entry]);
1268 np->tx_skbuff[entry] = 0;
1269 np->tx_ring[entry].frag[0].addr = 0;
1270 np->tx_ring[entry].frag[0].length = 0;
1271 }
1272 spin_unlock(&np->lock);
1273 } else {
1274 spin_lock(&np->lock);
1275 for (; np->cur_tx - np->dirty_tx > 0; np->dirty_tx++) {
1276 int entry = np->dirty_tx % TX_RING_SIZE;
1277 struct sk_buff *skb;
1278 if (!(le32_to_cpu(np->tx_ring[entry].status)
1279 & 0x00010000))
1280 break;
1281 skb = np->tx_skbuff[entry];
1282
1283 pci_unmap_single(np->pci_dev,
1284 np->tx_ring[entry].frag[0].addr,
1285 skb->len, PCI_DMA_TODEVICE);
1286 dev_kfree_skb_irq (np->tx_skbuff[entry]);
1287 np->tx_skbuff[entry] = 0;
1288 np->tx_ring[entry].frag[0].addr = 0;
1289 np->tx_ring[entry].frag[0].length = 0;
1290 }
1291 spin_unlock(&np->lock);
1292 }
1293
1294 if (netif_queue_stopped(dev) &&
1295 np->cur_tx - np->dirty_tx < TX_QUEUE_LEN - 4) {
1296
1297 netif_wake_queue (dev);
1298 }
1299
1300 if (intr_status & (IntrPCIErr | LinkChange | StatsMax))
1301 netdev_error(dev, intr_status);
1302 } while (0);
1303 if (netif_msg_intr(np))
1304 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1305 dev->name, readw(ioaddr + IntrStatus));
1306 writel(5000, ioaddr + DownCounter);
1307 return IRQ_RETVAL(handled);
1308}
1309
1310static void rx_poll(unsigned long data)
1311{
1312 struct net_device *dev = (struct net_device *)data;
1313 struct netdev_private *np = dev->priv;
1314 int entry = np->cur_rx % RX_RING_SIZE;
1315 int boguscnt = np->budget;
1316 long ioaddr = dev->base_addr;
1317 int received = 0;
1318
1319
1320 while (1) {
1321 struct netdev_desc *desc = &(np->rx_ring[entry]);
1322 u32 frame_status = le32_to_cpu(desc->status);
1323 int pkt_len;
1324
1325 if (--boguscnt < 0) {
1326 goto not_done;
1327 }
1328 if (!(frame_status & DescOwn))
1329 break;
1330 pkt_len = frame_status & 0x1fff;
1331 if (netif_msg_rx_status(np))
1332 printk(KERN_DEBUG " netdev_rx() status was %8.8x.\n",
1333 frame_status);
1334 pci_dma_sync_single(np->pci_dev, desc->frag[0].addr,
1335 np->rx_buf_sz, PCI_DMA_FROMDEVICE);
1336
1337 if (frame_status & 0x001f4000) {
1338
1339 if (netif_msg_rx_err(np))
1340 printk(KERN_DEBUG " netdev_rx() Rx error was %8.8x.\n",
1341 frame_status);
1342 np->stats.rx_errors++;
1343 if (frame_status & 0x00100000) np->stats.rx_length_errors++;
1344 if (frame_status & 0x00010000) np->stats.rx_fifo_errors++;
1345 if (frame_status & 0x00060000) np->stats.rx_frame_errors++;
1346 if (frame_status & 0x00080000) np->stats.rx_crc_errors++;
1347 if (frame_status & 0x00100000) {
1348 printk(KERN_WARNING "%s: Oversized Ethernet frame,"
1349 " status %8.8x.\n",
1350 dev->name, frame_status);
1351 }
1352 } else {
1353 struct sk_buff *skb;
1354#ifndef final_version
1355 if (netif_msg_rx_status(np))
1356 printk(KERN_DEBUG " netdev_rx() normal Rx pkt length %d"
1357 ", bogus_cnt %d.\n",
1358 pkt_len, boguscnt);
1359#endif
1360
1361
1362 if (pkt_len < rx_copybreak
1363 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1364 skb->dev = dev;
1365 skb_reserve(skb, 2);
1366 eth_copy_and_sum(skb, np->rx_skbuff[entry]->tail, pkt_len, 0);
1367 skb_put(skb, pkt_len);
1368 } else {
1369 pci_unmap_single(np->pci_dev,
1370 desc->frag[0].addr,
1371 np->rx_buf_sz,
1372 PCI_DMA_FROMDEVICE);
1373 skb_put(skb = np->rx_skbuff[entry], pkt_len);
1374 np->rx_skbuff[entry] = NULL;
1375 }
1376 skb->protocol = eth_type_trans(skb, dev);
1377
1378 netif_rx(skb);
1379 dev->last_rx = jiffies;
1380 }
1381 entry = (entry + 1) % RX_RING_SIZE;
1382 received++;
1383 }
1384 np->cur_rx = entry;
1385 refill_rx (dev);
1386 np->budget -= received;
1387 writew(DEFAULT_INTR, ioaddr + IntrEnable);
1388 return;
1389
1390not_done:
1391 np->cur_rx = entry;
1392 refill_rx (dev);
1393 if (!received)
1394 received = 1;
1395 np->budget -= received;
1396 if (np->budget <= 0)
1397 np->budget = RX_BUDGET;
1398 tasklet_schedule(&np->rx_tasklet);
1399 return;
1400}
1401
1402static void refill_rx (struct net_device *dev)
1403{
1404 struct netdev_private *np = dev->priv;
1405 int entry;
1406 int cnt = 0;
1407
1408
1409 for (;(np->cur_rx - np->dirty_rx + RX_RING_SIZE) % RX_RING_SIZE > 0;
1410 np->dirty_rx = (np->dirty_rx + 1) % RX_RING_SIZE) {
1411 struct sk_buff *skb;
1412 entry = np->dirty_rx % RX_RING_SIZE;
1413 if (np->rx_skbuff[entry] == NULL) {
1414 skb = dev_alloc_skb(np->rx_buf_sz);
1415 np->rx_skbuff[entry] = skb;
1416 if (skb == NULL)
1417 break;
1418 skb->dev = dev;
1419 skb_reserve(skb, 2);
1420 np->rx_ring[entry].frag[0].addr = cpu_to_le32(
1421 pci_map_single(np->pci_dev, skb->tail,
1422 np->rx_buf_sz, PCI_DMA_FROMDEVICE));
1423 }
1424
1425 np->rx_ring[entry].frag[0].length =
1426 cpu_to_le32(np->rx_buf_sz | LastFrag);
1427 np->rx_ring[entry].status = 0;
1428 cnt++;
1429 }
1430 return;
1431}
1432static void netdev_error(struct net_device *dev, int intr_status)
1433{
1434 long ioaddr = dev->base_addr;
1435 struct netdev_private *np = dev->priv;
1436 u16 mii_ctl, mii_advertise, mii_lpa;
1437 int speed;
1438
1439 if (intr_status & LinkChange) {
1440 if (np->an_enable) {
1441 mii_advertise = mdio_read (dev, np->phys[0], MII_ADVERTISE);
1442 mii_lpa= mdio_read (dev, np->phys[0], MII_LPA);
1443 mii_advertise &= mii_lpa;
1444 printk (KERN_INFO "%s: Link changed: ", dev->name);
1445 if (mii_advertise & ADVERTISE_100FULL) {
1446 np->speed = 100;
1447 printk ("100Mbps, full duplex\n");
1448 } else if (mii_advertise & ADVERTISE_100HALF) {
1449 np->speed = 100;
1450 printk ("100Mbps, half duplex\n");
1451 } else if (mii_advertise & ADVERTISE_10FULL) {
1452 np->speed = 10;
1453 printk ("10Mbps, full duplex\n");
1454 } else if (mii_advertise & ADVERTISE_10HALF) {
1455 np->speed = 10;
1456 printk ("10Mbps, half duplex\n");
1457 } else
1458 printk ("\n");
1459
1460 } else {
1461 mii_ctl = mdio_read (dev, np->phys[0], MII_BMCR);
1462 speed = (mii_ctl & BMCR_SPEED100) ? 100 : 10;
1463 np->speed = speed;
1464 printk (KERN_INFO "%s: Link changed: %dMbps ,",
1465 dev->name, speed);
1466 printk ("%s duplex.\n", (mii_ctl & BMCR_FULLDPLX) ?
1467 "full" : "half");
1468 }
1469 check_duplex (dev);
1470 if (np->flowctrl && np->mii_if.full_duplex) {
1471 writew(readw(ioaddr + MulticastFilter1+2) | 0x0200,
1472 ioaddr + MulticastFilter1+2);
1473 writew(readw(ioaddr + MACCtrl0) | EnbFlowCtrl,
1474 ioaddr + MACCtrl0);
1475 }
1476 }
1477 if (intr_status & StatsMax) {
1478 get_stats(dev);
1479 }
1480 if (intr_status & IntrPCIErr) {
1481 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1482 dev->name, intr_status);
1483
1484 }
1485}
1486
1487static struct net_device_stats *get_stats(struct net_device *dev)
1488{
1489 struct netdev_private *np = dev->priv;
1490 long ioaddr = dev->base_addr;
1491 int i;
1492
1493
1494
1495
1496
1497 np->stats.rx_missed_errors += readb(ioaddr + RxMissed);
1498 np->stats.tx_packets += readw(ioaddr + TxFramesOK);
1499 np->stats.rx_packets += readw(ioaddr + RxFramesOK);
1500 np->stats.collisions += readb(ioaddr + StatsLateColl);
1501 np->stats.collisions += readb(ioaddr + StatsMultiColl);
1502 np->stats.collisions += readb(ioaddr + StatsOneColl);
1503 np->stats.tx_carrier_errors += readb(ioaddr + StatsCarrierError);
1504 readb(ioaddr + StatsTxDefer);
1505 for (i = StatsTxDefer; i <= StatsMcastRx; i++)
1506 readb(ioaddr + i);
1507 np->stats.tx_bytes += readw(ioaddr + TxOctetsLow);
1508 np->stats.tx_bytes += readw(ioaddr + TxOctetsHigh) << 16;
1509 np->stats.rx_bytes += readw(ioaddr + RxOctetsLow);
1510 np->stats.rx_bytes += readw(ioaddr + RxOctetsHigh) << 16;
1511
1512 return &np->stats;
1513}
1514
1515static void set_rx_mode(struct net_device *dev)
1516{
1517 long ioaddr = dev->base_addr;
1518 struct netdev_private *np = dev->priv;
1519 u16 mc_filter[4];
1520 u32 rx_mode;
1521 int i;
1522
1523 if (dev->flags & IFF_PROMISC) {
1524
1525 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1526 memset(mc_filter, 0xff, sizeof(mc_filter));
1527 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptAll | AcceptMyPhys;
1528 } else if ((dev->mc_count > multicast_filter_limit)
1529 || (dev->flags & IFF_ALLMULTI)) {
1530
1531 memset(mc_filter, 0xff, sizeof(mc_filter));
1532 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
1533 } else if (dev->mc_count) {
1534 struct dev_mc_list *mclist;
1535 int bit;
1536 int index;
1537 int crc;
1538 memset (mc_filter, 0, sizeof (mc_filter));
1539 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1540 i++, mclist = mclist->next) {
1541 crc = ether_crc_le (ETH_ALEN, mclist->dmi_addr);
1542 for (index=0, bit=0; bit < 6; bit++, crc <<= 1)
1543 if (crc & 0x80000000) index |= 1 << bit;
1544 mc_filter[index/16] |= (1 << (index % 16));
1545 }
1546 rx_mode = AcceptBroadcast | AcceptMultiHash | AcceptMyPhys;
1547 } else {
1548 writeb(AcceptBroadcast | AcceptMyPhys, ioaddr + RxMode);
1549 return;
1550 }
1551 if (np->mii_if.full_duplex && np->flowctrl)
1552 mc_filter[3] |= 0x0200;
1553
1554 for (i = 0; i < 4; i++)
1555 writew(mc_filter[i], ioaddr + MulticastFilter0 + i*2);
1556 writeb(rx_mode, ioaddr + RxMode);
1557}
1558
1559static int __set_mac_addr(struct net_device *dev)
1560{
1561 u16 addr16;
1562
1563 addr16 = (dev->dev_addr[0] | (dev->dev_addr[1] << 8));
1564 writew(addr16, dev->base_addr + StationAddr);
1565 addr16 = (dev->dev_addr[2] | (dev->dev_addr[3] << 8));
1566 writew(addr16, dev->base_addr + StationAddr+2);
1567 addr16 = (dev->dev_addr[4] | (dev->dev_addr[5] << 8));
1568 writew(addr16, dev->base_addr + StationAddr+4);
1569 return 0;
1570}
1571
1572
1573static int netdev_ethtool_ioctl(struct net_device *dev, void *useraddr)
1574{
1575 struct netdev_private *np = dev->priv;
1576 u32 ethcmd;
1577
1578 if (copy_from_user(ðcmd, useraddr, sizeof(ethcmd)))
1579 return -EFAULT;
1580
1581 switch (ethcmd) {
1582
1583 case ETHTOOL_GDRVINFO: {
1584 struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
1585 strcpy(info.driver, DRV_NAME);
1586 strcpy(info.version, DRV_VERSION);
1587 strcpy(info.bus_info, pci_name(np->pci_dev));
1588 memset(&info.fw_version, 0, sizeof(info.fw_version));
1589 if (copy_to_user(useraddr, &info, sizeof(info)))
1590 return -EFAULT;
1591 return 0;
1592 }
1593
1594
1595 case ETHTOOL_GSET: {
1596 struct ethtool_cmd ecmd = { ETHTOOL_GSET };
1597 spin_lock_irq(&np->lock);
1598 mii_ethtool_gset(&np->mii_if, &ecmd);
1599 spin_unlock_irq(&np->lock);
1600 if (copy_to_user(useraddr, &ecmd, sizeof(ecmd)))
1601 return -EFAULT;
1602 return 0;
1603 }
1604
1605 case ETHTOOL_SSET: {
1606 int r;
1607 struct ethtool_cmd ecmd;
1608 if (copy_from_user(&ecmd, useraddr, sizeof(ecmd)))
1609 return -EFAULT;
1610 spin_lock_irq(&np->lock);
1611 r = mii_ethtool_sset(&np->mii_if, &ecmd);
1612 spin_unlock_irq(&np->lock);
1613 return r;
1614 }
1615
1616
1617 case ETHTOOL_NWAY_RST: {
1618 return mii_nway_restart(&np->mii_if);
1619 }
1620
1621
1622 case ETHTOOL_GLINK: {
1623 struct ethtool_value edata = {ETHTOOL_GLINK};
1624 edata.data = mii_link_ok(&np->mii_if);
1625 if (copy_to_user(useraddr, &edata, sizeof(edata)))
1626 return -EFAULT;
1627 return 0;
1628 }
1629
1630
1631 case ETHTOOL_GMSGLVL: {
1632 struct ethtool_value edata = {ETHTOOL_GMSGLVL};
1633 edata.data = np->msg_enable;
1634 if (copy_to_user(useraddr, &edata, sizeof(edata)))
1635 return -EFAULT;
1636 return 0;
1637 }
1638
1639 case ETHTOOL_SMSGLVL: {
1640 struct ethtool_value edata;
1641 if (copy_from_user(&edata, useraddr, sizeof(edata)))
1642 return -EFAULT;
1643 np->msg_enable = edata.data;
1644 return 0;
1645 }
1646
1647 default:
1648 return -EOPNOTSUPP;
1649
1650 }
1651}
1652
1653static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1654{
1655 struct netdev_private *np = dev->priv;
1656 struct mii_ioctl_data *data = (struct mii_ioctl_data *) & rq->ifr_data;
1657 int rc;
1658 int i;
1659 long ioaddr = dev->base_addr;
1660
1661 if (!netif_running(dev))
1662 return -EINVAL;
1663
1664 if (cmd == SIOCETHTOOL)
1665 rc = netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
1666
1667 else {
1668 spin_lock_irq(&np->lock);
1669 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1670 spin_unlock_irq(&np->lock);
1671 }
1672 switch (cmd) {
1673 case SIOCDEVPRIVATE:
1674 for (i=0; i<TX_RING_SIZE; i++) {
1675 printk(KERN_DEBUG "%02x %08Zx %08x %08x(%02x) %08x %08x\n", i,
1676 np->tx_ring_dma + i*sizeof(*np->tx_ring),
1677 le32_to_cpu(np->tx_ring[i].next_desc),
1678 le32_to_cpu(np->tx_ring[i].status),
1679 (le32_to_cpu(np->tx_ring[i].status) >> 2)
1680 & 0xff,
1681 le32_to_cpu(np->tx_ring[i].frag[0].addr),
1682 le32_to_cpu(np->tx_ring[i].frag[0].length));
1683 }
1684 printk(KERN_DEBUG "TxListPtr=%08x netif_queue_stopped=%d\n",
1685 readl(dev->base_addr + TxListPtr),
1686 netif_queue_stopped(dev));
1687 printk(KERN_DEBUG "cur_tx=%d(%02x) dirty_tx=%d(%02x)\n",
1688 np->cur_tx, np->cur_tx % TX_RING_SIZE,
1689 np->dirty_tx, np->dirty_tx % TX_RING_SIZE);
1690 printk(KERN_DEBUG "cur_rx=%d dirty_rx=%d\n", np->cur_rx, np->dirty_rx);
1691 printk(KERN_DEBUG "cur_task=%d\n", np->cur_task);
1692 printk(KERN_DEBUG "TxStatus=%04x\n", readw(ioaddr + TxStatus));
1693 return 0;
1694 }
1695
1696
1697 return rc;
1698}
1699
1700static int netdev_close(struct net_device *dev)
1701{
1702 long ioaddr = dev->base_addr;
1703 struct netdev_private *np = dev->priv;
1704 struct sk_buff *skb;
1705 int i;
1706
1707 netif_stop_queue(dev);
1708
1709 if (netif_msg_ifdown(np)) {
1710 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %2.2x "
1711 "Rx %4.4x Int %2.2x.\n",
1712 dev->name, readb(ioaddr + TxStatus),
1713 readl(ioaddr + RxStatus), readw(ioaddr + IntrStatus));
1714 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1715 dev->name, np->cur_tx, np->dirty_tx, np->cur_rx, np->dirty_rx);
1716 }
1717
1718
1719 writew(0x0000, ioaddr + IntrEnable);
1720
1721
1722 writew(TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl1);
1723
1724
1725 tasklet_kill(&np->rx_tasklet);
1726 tasklet_kill(&np->tx_tasklet);
1727
1728#ifdef __i386__
1729 if (netif_msg_hw(np)) {
1730 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1731 (int)(np->tx_ring_dma));
1732 for (i = 0; i < TX_RING_SIZE; i++)
1733 printk(" #%d desc. %4.4x %8.8x %8.8x.\n",
1734 i, np->tx_ring[i].status, np->tx_ring[i].frag[0].addr,
1735 np->tx_ring[i].frag[0].length);
1736 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1737 (int)(np->rx_ring_dma));
1738 for (i = 0; i < 4 ; i++) {
1739 printk(KERN_DEBUG " #%d desc. %4.4x %4.4x %8.8x\n",
1740 i, np->rx_ring[i].status, np->rx_ring[i].frag[0].addr,
1741 np->rx_ring[i].frag[0].length);
1742 }
1743 }
1744#endif
1745
1746 free_irq(dev->irq, dev);
1747
1748 del_timer_sync(&np->timer);
1749
1750
1751 for (i = 0; i < RX_RING_SIZE; i++) {
1752 np->rx_ring[i].status = 0;
1753 np->rx_ring[i].frag[0].addr = 0xBADF00D0;
1754 skb = np->rx_skbuff[i];
1755 if (skb) {
1756 pci_unmap_single(np->pci_dev,
1757 np->rx_ring[i].frag[0].addr, np->rx_buf_sz,
1758 PCI_DMA_FROMDEVICE);
1759 dev_kfree_skb(skb);
1760 np->rx_skbuff[i] = 0;
1761 }
1762 }
1763 for (i = 0; i < TX_RING_SIZE; i++) {
1764 skb = np->tx_skbuff[i];
1765 if (skb) {
1766 pci_unmap_single(np->pci_dev,
1767 np->tx_ring[i].frag[0].addr, skb->len,
1768 PCI_DMA_TODEVICE);
1769 dev_kfree_skb(skb);
1770 np->tx_skbuff[i] = 0;
1771 }
1772 }
1773
1774 return 0;
1775}
1776
1777static void __devexit sundance_remove1 (struct pci_dev *pdev)
1778{
1779 struct net_device *dev = pci_get_drvdata(pdev);
1780
1781 if (dev) {
1782 struct netdev_private *np = dev->priv;
1783
1784 unregister_netdev(dev);
1785 pci_free_consistent(pdev, RX_TOTAL_SIZE, np->rx_ring,
1786 np->rx_ring_dma);
1787 pci_free_consistent(pdev, TX_TOTAL_SIZE, np->tx_ring,
1788 np->tx_ring_dma);
1789 pci_release_regions(pdev);
1790#ifndef USE_IO_OPS
1791 iounmap((char *)(dev->base_addr));
1792#endif
1793 free_netdev(dev);
1794 pci_set_drvdata(pdev, NULL);
1795 }
1796}
1797
1798static struct pci_driver sundance_driver = {
1799 .name = DRV_NAME,
1800 .id_table = sundance_pci_tbl,
1801 .probe = sundance_probe1,
1802 .remove = __devexit_p(sundance_remove1),
1803};
1804
1805static int __init sundance_init(void)
1806{
1807
1808#ifdef MODULE
1809 printk(version);
1810#endif
1811 return pci_module_init(&sundance_driver);
1812}
1813
1814static void __exit sundance_exit(void)
1815{
1816 pci_unregister_driver(&sundance_driver);
1817}
1818
1819module_init(sundance_init);
1820module_exit(sundance_exit);
1821
1822
1823