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49#include <linux/module.h>
50#include <linux/kernel.h>
51#include <linux/string.h>
52#include <linux/timer.h>
53#include <linux/errno.h>
54#include <linux/ioport.h>
55#include <linux/slab.h>
56#include <linux/interrupt.h>
57#include <linux/pci.h>
58#include <linux/netdevice.h>
59#include <linux/init.h>
60#include <linux/mii.h>
61#include <linux/etherdevice.h>
62#include <linux/skbuff.h>
63#include <linux/delay.h>
64#include <linux/ethtool.h>
65#include <linux/crc32.h>
66
67#include <asm/processor.h>
68#include <asm/bitops.h>
69#include <asm/io.h>
70#include <asm/uaccess.h>
71
72#include "sis900.h"
73
74#define SIS900_MODULE_NAME "sis900"
75#define SIS900_DRV_VERSION "v1.08.06 9/24/2002"
76
77static char version[] __devinitdata =
78KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
79
80static int max_interrupt_work = 40;
81static int multicast_filter_limit = 128;
82
83#define sis900_debug debug
84static int sis900_debug;
85
86
87#define TX_TIMEOUT (4*HZ)
88
89#define SIS900_DMA_MASK 0xffffffff
90
91enum {
92 SIS_900 = 0,
93 SIS_7016
94};
95static char * card_names[] = {
96 "SiS 900 PCI Fast Ethernet",
97 "SiS 7016 PCI Fast Ethernet"
98};
99static struct pci_device_id sis900_pci_tbl [] = {
100 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
101 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
102 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
103 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
104 {0,}
105};
106MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
107
108static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
109
110static struct mii_chip_info {
111 const char * name;
112 u16 phy_id0;
113 u16 phy_id1;
114 u8 phy_types;
115#define HOME 0x0001
116#define LAN 0x0002
117#define MIX 0x0003
118} mii_chip_table[] = {
119 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
120 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
121 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
122 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
123 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
124 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
125 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
126 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
127 {0,},
128};
129
130struct mii_phy {
131 struct mii_phy * next;
132 int phy_addr;
133 u16 phy_id0;
134 u16 phy_id1;
135 u16 status;
136 u8 phy_types;
137};
138
139typedef struct _BufferDesc {
140 u32 link;
141 u32 cmdsts;
142 u32 bufptr;
143} BufferDesc;
144
145struct sis900_private {
146 struct net_device_stats stats;
147 struct pci_dev * pci_dev;
148
149 spinlock_t lock;
150
151 struct mii_phy * mii;
152 struct mii_phy * first_mii;
153 unsigned int cur_phy;
154
155 struct timer_list timer;
156 u8 autong_complete;
157
158 unsigned int cur_rx, dirty_rx;
159 unsigned int cur_tx, dirty_tx;
160
161
162 struct sk_buff *tx_skbuff[NUM_TX_DESC];
163 struct sk_buff *rx_skbuff[NUM_RX_DESC];
164 BufferDesc *tx_ring;
165 BufferDesc *rx_ring;
166
167 dma_addr_t tx_ring_dma;
168 dma_addr_t rx_ring_dma;
169
170 unsigned int tx_full;
171 u8 host_bridge_rev;
172};
173
174MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
175MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
176MODULE_LICENSE("GPL");
177
178MODULE_PARM(multicast_filter_limit, "i");
179MODULE_PARM(max_interrupt_work, "i");
180MODULE_PARM(debug, "i");
181MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
182MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
183MODULE_PARM_DESC(debug, "SiS 900/7016 debug level (2-4)");
184
185static int sis900_open(struct net_device *net_dev);
186static int sis900_mii_probe (struct net_device * net_dev);
187static void sis900_init_rxfilter (struct net_device * net_dev);
188static u16 read_eeprom(long ioaddr, int location);
189static u16 mdio_read(struct net_device *net_dev, int phy_id, int location);
190static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
191static void sis900_timer(unsigned long data);
192static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
193static void sis900_tx_timeout(struct net_device *net_dev);
194static void sis900_init_tx_ring(struct net_device *net_dev);
195static void sis900_init_rx_ring(struct net_device *net_dev);
196static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
197static int sis900_rx(struct net_device *net_dev);
198static void sis900_finish_xmit (struct net_device *net_dev);
199static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
200static int sis900_close(struct net_device *net_dev);
201static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
202static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
203static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
204static void set_rx_mode(struct net_device *net_dev);
205static void sis900_reset(struct net_device *net_dev);
206static void sis630_set_eq(struct net_device *net_dev, u8 revision);
207static int sis900_set_config(struct net_device *dev, struct ifmap *map);
208static u16 sis900_default_phy(struct net_device * net_dev);
209static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
210static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
211static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
212static void sis900_set_mode (long ioaddr, int speed, int duplex);
213static struct ethtool_ops sis900_ethtool_ops;
214
215
216
217
218
219
220
221
222
223
224static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
225{
226 long ioaddr = pci_resource_start(pci_dev, 0);
227 u16 signature;
228 int i;
229
230
231 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
232 if (signature == 0xffff || signature == 0x0000) {
233 printk (KERN_INFO "%s: Error EERPOM read %x\n",
234 net_dev->name, signature);
235 return 0;
236 }
237
238
239 for (i = 0; i < 3; i++)
240 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
241
242 return 1;
243}
244
245
246
247
248
249
250
251
252
253
254
255static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
256{
257 struct pci_dev *isa_bridge = NULL;
258 u8 reg;
259 int i;
260
261 if ((isa_bridge = pci_find_device(0x1039, 0x0008, isa_bridge)) == NULL) {
262 printk("%s: Can not find ISA bridge\n", net_dev->name);
263 return 0;
264 }
265 pci_read_config_byte(isa_bridge, 0x48, ®);
266 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
267
268 for (i = 0; i < 6; i++) {
269 outb(0x09 + i, 0x70);
270 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
271 }
272 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
273
274 return 1;
275}
276
277
278
279
280
281
282
283
284
285
286
287
288static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
289{
290 long ioaddr = net_dev->base_addr;
291 u32 rfcrSave;
292 u32 i;
293
294 rfcrSave = inl(rfcr + ioaddr);
295
296 outl(rfcrSave | RELOAD, ioaddr + cr);
297 outl(0, ioaddr + cr);
298
299
300 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
301
302
303 for (i = 0 ; i < 3 ; i++) {
304 outl((i << RFADDR_shift), ioaddr + rfcr);
305 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
306 }
307
308
309 outl(rfcrSave | RFEN, rfcr + ioaddr);
310
311 return 1;
312}
313
314
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323
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325
326
327
328
329
330static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
331{
332 long ioaddr = net_dev->base_addr;
333 long ee_addr = ioaddr + mear;
334 u32 waittime = 0;
335 int i;
336
337 outl(EEREQ, ee_addr);
338 while(waittime < 2000) {
339 if(inl(ee_addr) & EEGNT) {
340
341
342 for (i = 0; i < 3; i++)
343 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
344
345 outl(EEDONE, ee_addr);
346 return 1;
347 } else {
348 udelay(1);
349 waittime ++;
350 }
351 }
352 outl(EEDONE, ee_addr);
353 return 0;
354}
355
356
357
358
359
360
361
362
363
364
365
366
367static int __devinit sis900_probe (struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
368{
369 struct sis900_private *sis_priv;
370 struct net_device *net_dev;
371 struct pci_dev *dev;
372 dma_addr_t ring_dma;
373 void *ring_space;
374 long ioaddr;
375 int i, ret;
376 u8 revision;
377 char *card_name = card_names[pci_id->driver_data];
378
379
380#ifndef MODULE
381 static int printed_version;
382 if (!printed_version++)
383 printk(version);
384#endif
385
386
387 ret = pci_enable_device(pci_dev);
388 if(ret) return ret;
389
390 i = pci_set_dma_mask(pci_dev, SIS900_DMA_MASK);
391 if(i){
392 printk(KERN_ERR "sis900.c: architecture does not support"
393 "32bit PCI busmaster DMA\n");
394 return i;
395 }
396
397 pci_set_master(pci_dev);
398
399 net_dev = alloc_etherdev(sizeof(struct sis900_private));
400 if (!net_dev)
401 return -ENOMEM;
402 SET_MODULE_OWNER(net_dev);
403 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
404
405
406 ioaddr = pci_resource_start(pci_dev, 0);
407 ret = pci_request_regions(pci_dev, "sis900");
408 if (ret)
409 goto err_out;
410
411 sis_priv = net_dev->priv;
412 net_dev->base_addr = ioaddr;
413 net_dev->irq = pci_dev->irq;
414 sis_priv->pci_dev = pci_dev;
415 spin_lock_init(&sis_priv->lock);
416
417 pci_set_drvdata(pci_dev, net_dev);
418
419 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
420 if (!ring_space) {
421 ret = -ENOMEM;
422 goto err_out_cleardev;
423 }
424 sis_priv->tx_ring = (BufferDesc *)ring_space;
425 sis_priv->tx_ring_dma = ring_dma;
426
427 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
428 if (!ring_space) {
429 ret = -ENOMEM;
430 goto err_unmap_tx;
431 }
432 sis_priv->rx_ring = (BufferDesc *)ring_space;
433 sis_priv->rx_ring_dma = ring_dma;
434
435
436 net_dev->open = &sis900_open;
437 net_dev->hard_start_xmit = &sis900_start_xmit;
438 net_dev->stop = &sis900_close;
439 net_dev->get_stats = &sis900_get_stats;
440 net_dev->set_config = &sis900_set_config;
441 net_dev->set_multicast_list = &set_rx_mode;
442 net_dev->do_ioctl = &mii_ioctl;
443 net_dev->tx_timeout = sis900_tx_timeout;
444 net_dev->watchdog_timeo = TX_TIMEOUT;
445 net_dev->ethtool_ops = &sis900_ethtool_ops;
446
447 ret = register_netdev(net_dev);
448 if (ret)
449 goto err_unmap_rx;
450
451
452 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision);
453 ret = 0;
454
455 if (revision == SIS630E_900_REV)
456 ret = sis630e_get_mac_addr(pci_dev, net_dev);
457 else if ((revision > 0x81) && (revision <= 0x90) )
458 ret = sis635_get_mac_addr(pci_dev, net_dev);
459 else if (revision == SIS96x_900_REV)
460 ret = sis96x_get_mac_addr(pci_dev, net_dev);
461 else
462 ret = sis900_get_mac_addr(pci_dev, net_dev);
463
464 if (ret == 0) {
465 ret = -ENODEV;
466 goto err_out_unregister;
467 }
468
469
470 if (revision == SIS630ET_900_REV)
471 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
472
473
474 if (sis900_mii_probe(net_dev) == 0) {
475 ret = -ENODEV;
476 goto err_out_unregister;
477 }
478
479
480 dev = pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
481 if (dev)
482 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
483
484
485 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
486 card_name, ioaddr, net_dev->irq);
487 for (i = 0; i < 5; i++)
488 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
489 printk("%2.2x.\n", net_dev->dev_addr[i]);
490
491 return 0;
492
493 err_out_unregister:
494 unregister_netdev(net_dev);
495 err_unmap_rx:
496 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
497 sis_priv->rx_ring_dma);
498 err_unmap_tx:
499 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
500 sis_priv->tx_ring_dma);
501 err_out_cleardev:
502 pci_set_drvdata(pci_dev, NULL);
503 pci_release_regions(pci_dev);
504 err_out:
505 free_netdev(net_dev);
506 return ret;
507}
508
509
510
511
512
513
514
515
516
517
518static int __init sis900_mii_probe (struct net_device * net_dev)
519{
520 struct sis900_private * sis_priv = net_dev->priv;
521 u16 poll_bit = MII_STAT_LINK, status = 0;
522 unsigned long timeout = jiffies + 5 * HZ;
523 int phy_addr;
524 u8 revision;
525
526 sis_priv->mii = NULL;
527
528
529 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
530 struct mii_phy * mii_phy = NULL;
531 u16 mii_status;
532 int i;
533
534 mii_phy = NULL;
535 for(i = 0; i < 2; i++)
536 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
537
538 if (mii_status == 0xffff || mii_status == 0x0000)
539
540 continue;
541
542 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
543 printk(KERN_INFO "Cannot allocate mem for struct mii_phy\n");
544 mii_phy = sis_priv->first_mii;
545 while (mii_phy) {
546 struct mii_phy *phy;
547 phy = mii_phy;
548 mii_phy = mii_phy->next;
549 kfree(phy);
550 }
551 return 0;
552 }
553
554 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
555 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
556 mii_phy->phy_addr = phy_addr;
557 mii_phy->status = mii_status;
558 mii_phy->next = sis_priv->mii;
559 sis_priv->mii = mii_phy;
560 sis_priv->first_mii = mii_phy;
561
562 for (i = 0; mii_chip_table[i].phy_id1; i++)
563 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
564 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
565 mii_phy->phy_types = mii_chip_table[i].phy_types;
566 if (mii_chip_table[i].phy_types == MIX)
567 mii_phy->phy_types =
568 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
569 printk(KERN_INFO "%s: %s transceiver found at address %d.\n",
570 net_dev->name, mii_chip_table[i].name, phy_addr);
571 break;
572 }
573
574 if( !mii_chip_table[i].phy_id1 )
575 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
576 net_dev->name, phy_addr);
577 }
578
579 if (sis_priv->mii == NULL) {
580 printk(KERN_INFO "%s: No MII transceivers found!\n",
581 net_dev->name);
582 return 0;
583 }
584
585
586 sis_priv->mii = NULL;
587 sis900_default_phy( net_dev );
588
589
590 if ((sis_priv->mii->phy_id0 == 0x001D) &&
591 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
592 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
593
594
595 if ((sis_priv->mii->phy_id0 == 0x0015) &&
596 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
597 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
598
599 if(status & MII_STAT_LINK){
600 while (poll_bit) {
601 yield();
602
603 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
604 if (time_after_eq(jiffies, timeout)) {
605 printk(KERN_WARNING "%s: reset phy and link down now\n", net_dev->name);
606 return -ETIME;
607 }
608 }
609 }
610
611 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
612 if (revision == SIS630E_900_REV) {
613
614 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
615 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
616 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
617 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
618
619 }
620
621 if (sis_priv->mii->status & MII_STAT_LINK)
622 netif_carrier_on(net_dev);
623 else
624 netif_carrier_off(net_dev);
625
626 return 1;
627}
628
629
630
631
632
633
634
635
636
637
638static u16 sis900_default_phy(struct net_device * net_dev)
639{
640 struct sis900_private * sis_priv = net_dev->priv;
641 struct mii_phy *phy = NULL, *phy_home = NULL, *default_phy = NULL;
642 u16 status;
643
644 for( phy=sis_priv->first_mii; phy; phy=phy->next ){
645 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
646 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
647
648
649 if ( (status & MII_STAT_LINK) && !(default_phy) )
650 default_phy = phy;
651 else{
652 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
653 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
654 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
655 if( phy->phy_types == HOME )
656 phy_home = phy;
657 }
658 }
659
660 if( (!default_phy) && phy_home )
661 default_phy = phy_home;
662 else if(!default_phy)
663 default_phy = sis_priv->first_mii;
664
665 if( sis_priv->mii != default_phy ){
666 sis_priv->mii = default_phy;
667 sis_priv->cur_phy = default_phy->phy_addr;
668 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", net_dev->name,sis_priv->cur_phy);
669 }
670
671 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
672 status &= (~MII_CNTL_ISOLATE);
673
674 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
675 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
676 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
677
678 return status;
679}
680
681
682
683
684
685
686
687
688
689
690
691static void sis900_set_capability( struct net_device *net_dev , struct mii_phy *phy )
692{
693 u16 cap;
694 u16 status;
695
696 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
697 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
698
699 cap = MII_NWAY_CSMA_CD |
700 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
701 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
702 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
703 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
704
705 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
706}
707
708
709
710#define eeprom_delay() inl(ee_addr)
711
712
713
714
715
716
717
718
719
720
721static u16 __devinit read_eeprom(long ioaddr, int location)
722{
723 int i;
724 u16 retval = 0;
725 long ee_addr = ioaddr + mear;
726 u32 read_cmd = location | EEread;
727
728 outl(0, ee_addr);
729 eeprom_delay();
730 outl(EECS, ee_addr);
731 eeprom_delay();
732
733
734 for (i = 8; i >= 0; i--) {
735 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
736 outl(dataval, ee_addr);
737 eeprom_delay();
738 outl(dataval | EECLK, ee_addr);
739 eeprom_delay();
740 }
741 outl(EECS, ee_addr);
742 eeprom_delay();
743
744
745 for (i = 16; i > 0; i--) {
746 outl(EECS, ee_addr);
747 eeprom_delay();
748 outl(EECS | EECLK, ee_addr);
749 eeprom_delay();
750 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
751 eeprom_delay();
752 }
753
754
755 outl(0, ee_addr);
756 eeprom_delay();
757
758 return (retval);
759}
760
761
762
763
764#define mdio_delay() inl(mdio_addr)
765
766static void mdio_idle(long mdio_addr)
767{
768 outl(MDIO | MDDIR, mdio_addr);
769 mdio_delay();
770 outl(MDIO | MDDIR | MDC, mdio_addr);
771}
772
773
774static void mdio_reset(long mdio_addr)
775{
776 int i;
777
778 for (i = 31; i >= 0; i--) {
779 outl(MDDIR | MDIO, mdio_addr);
780 mdio_delay();
781 outl(MDDIR | MDIO | MDC, mdio_addr);
782 mdio_delay();
783 }
784 return;
785}
786
787
788
789
790
791
792
793
794
795
796
797
798static u16 mdio_read(struct net_device *net_dev, int phy_id, int location)
799{
800 long mdio_addr = net_dev->base_addr + mear;
801 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
802 u16 retval = 0;
803 int i;
804
805 mdio_reset(mdio_addr);
806 mdio_idle(mdio_addr);
807
808 for (i = 15; i >= 0; i--) {
809 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
810 outl(dataval, mdio_addr);
811 mdio_delay();
812 outl(dataval | MDC, mdio_addr);
813 mdio_delay();
814 }
815
816
817 for (i = 16; i > 0; i--) {
818 outl(0, mdio_addr);
819 mdio_delay();
820 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
821 outl(MDC, mdio_addr);
822 mdio_delay();
823 }
824 outl(0x00, mdio_addr);
825
826 return retval;
827}
828
829
830
831
832
833
834
835
836
837
838
839
840
841static void mdio_write(struct net_device *net_dev, int phy_id, int location, int value)
842{
843 long mdio_addr = net_dev->base_addr + mear;
844 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
845 int i;
846
847 mdio_reset(mdio_addr);
848 mdio_idle(mdio_addr);
849
850
851 for (i = 15; i >= 0; i--) {
852 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
853 outb(dataval, mdio_addr);
854 mdio_delay();
855 outb(dataval | MDC, mdio_addr);
856 mdio_delay();
857 }
858 mdio_delay();
859
860
861 for (i = 15; i >= 0; i--) {
862 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
863 outl(dataval, mdio_addr);
864 mdio_delay();
865 outl(dataval | MDC, mdio_addr);
866 mdio_delay();
867 }
868 mdio_delay();
869
870
871 for (i = 2; i > 0; i--) {
872 outb(0, mdio_addr);
873 mdio_delay();
874 outb(MDC, mdio_addr);
875 mdio_delay();
876 }
877 outl(0x00, mdio_addr);
878
879 return;
880}
881
882
883
884
885
886
887
888
889
890
891
892
893static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
894{
895 int i = 0;
896 u16 status;
897
898 while (i++ < 2)
899 status = mdio_read(net_dev, phy_addr, MII_STATUS);
900
901 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
902
903 return status;
904}
905
906
907
908
909
910
911
912
913
914static int
915sis900_open(struct net_device *net_dev)
916{
917 struct sis900_private *sis_priv = net_dev->priv;
918 long ioaddr = net_dev->base_addr;
919 u8 revision;
920 int ret;
921
922
923 sis900_reset(net_dev);
924
925
926 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
927 sis630_set_eq(net_dev, revision);
928
929 ret = request_irq(net_dev->irq, &sis900_interrupt, SA_SHIRQ, net_dev->name, net_dev);
930 if (ret)
931 return ret;
932
933 sis900_init_rxfilter(net_dev);
934
935 sis900_init_tx_ring(net_dev);
936 sis900_init_rx_ring(net_dev);
937
938 set_rx_mode(net_dev);
939
940 netif_start_queue(net_dev);
941
942
943 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
944
945
946 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
947 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
948 outl(IE, ioaddr + ier);
949
950 sis900_check_mode(net_dev, sis_priv->mii);
951
952
953
954 init_timer(&sis_priv->timer);
955 sis_priv->timer.expires = jiffies + HZ;
956 sis_priv->timer.data = (unsigned long)net_dev;
957 sis_priv->timer.function = &sis900_timer;
958 add_timer(&sis_priv->timer);
959
960 return 0;
961}
962
963
964
965
966
967
968
969
970
971static void
972sis900_init_rxfilter (struct net_device * net_dev)
973{
974 long ioaddr = net_dev->base_addr;
975 u32 rfcrSave;
976 u32 i;
977
978 rfcrSave = inl(rfcr + ioaddr);
979
980
981 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
982
983
984 for (i = 0 ; i < 3 ; i++) {
985 u32 w;
986
987 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
988 outl((i << RFADDR_shift), ioaddr + rfcr);
989 outl(w, ioaddr + rfdr);
990
991 if (sis900_debug > 2) {
992 printk(KERN_INFO "%s: Receive Filter Addrss[%d]=%x\n",
993 net_dev->name, i, inl(ioaddr + rfdr));
994 }
995 }
996
997
998 outl(rfcrSave | RFEN, rfcr + ioaddr);
999}
1000
1001
1002
1003
1004
1005
1006
1007
1008static void
1009sis900_init_tx_ring(struct net_device *net_dev)
1010{
1011 struct sis900_private *sis_priv = net_dev->priv;
1012 long ioaddr = net_dev->base_addr;
1013 int i;
1014
1015 sis_priv->tx_full = 0;
1016 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1017
1018 for (i = 0; i < NUM_TX_DESC; i++) {
1019 sis_priv->tx_skbuff[i] = NULL;
1020
1021 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1022 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1023 sis_priv->tx_ring[i].cmdsts = 0;
1024 sis_priv->tx_ring[i].bufptr = 0;
1025 }
1026
1027
1028 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1029 if (sis900_debug > 2)
1030 printk(KERN_INFO "%s: TX descriptor register loaded with: %8.8x\n",
1031 net_dev->name, inl(ioaddr + txdp));
1032}
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042static void
1043sis900_init_rx_ring(struct net_device *net_dev)
1044{
1045 struct sis900_private *sis_priv = net_dev->priv;
1046 long ioaddr = net_dev->base_addr;
1047 int i;
1048
1049 sis_priv->cur_rx = 0;
1050 sis_priv->dirty_rx = 0;
1051
1052
1053 for (i = 0; i < NUM_RX_DESC; i++) {
1054 sis_priv->rx_skbuff[i] = NULL;
1055
1056 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1057 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1058 sis_priv->rx_ring[i].cmdsts = 0;
1059 sis_priv->rx_ring[i].bufptr = 0;
1060 }
1061
1062
1063 for (i = 0; i < NUM_RX_DESC; i++) {
1064 struct sk_buff *skb;
1065
1066 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1067
1068
1069
1070
1071 break;
1072 }
1073 skb->dev = net_dev;
1074 sis_priv->rx_skbuff[i] = skb;
1075 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1076 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1077 skb->tail, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1078 }
1079 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1080
1081
1082 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1083 if (sis900_debug > 2)
1084 printk(KERN_INFO "%s: RX descriptor register loaded with: %8.8x\n",
1085 net_dev->name, inl(ioaddr + rxdp));
1086}
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1116{
1117 struct sis900_private *sis_priv = net_dev->priv;
1118 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1119 int i, maxcount=10;
1120
1121 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1122 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1123 return;
1124
1125 if (netif_carrier_ok(net_dev)) {
1126 reg14h=mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1127 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, (0x2200 | reg14h) & 0xBFFF);
1128 for (i=0; i < maxcount; i++) {
1129 eq_value=(0x00F8 & mdio_read(net_dev, sis_priv->cur_phy, MII_RESV)) >> 3;
1130 if (i == 0)
1131 max_value=min_value=eq_value;
1132 max_value=(eq_value > max_value) ? eq_value : max_value;
1133 min_value=(eq_value < min_value) ? eq_value : min_value;
1134 }
1135
1136 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1137 revision == SIS630ET_900_REV) {
1138 if (max_value < 5)
1139 eq_value=max_value;
1140 else if (max_value >= 5 && max_value < 15)
1141 eq_value=(max_value == min_value) ? max_value+2 : max_value+1;
1142 else if (max_value >= 15)
1143 eq_value=(max_value == min_value) ? max_value+6 : max_value+5;
1144 }
1145
1146 if (revision == SIS630A_900_REV &&
1147 (sis_priv->host_bridge_rev == SIS630B0 ||
1148 sis_priv->host_bridge_rev == SIS630B1)) {
1149 if (max_value == 0)
1150 eq_value=3;
1151 else
1152 eq_value=(max_value+min_value+1)/2;
1153 }
1154
1155 reg14h=mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1156 reg14h=(reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1157 reg14h=(reg14h | 0x6000) & 0xFDFF;
1158 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1159 }
1160 else {
1161 reg14h=mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1162 if (revision == SIS630A_900_REV &&
1163 (sis_priv->host_bridge_rev == SIS630B0 ||
1164 sis_priv->host_bridge_rev == SIS630B1))
1165 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, (reg14h | 0x2200) & 0xBFFF);
1166 else
1167 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, (reg14h | 0x2000) & 0xBFFF);
1168 }
1169 return;
1170}
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180static void sis900_timer(unsigned long data)
1181{
1182 struct net_device *net_dev = (struct net_device *)data;
1183 struct sis900_private *sis_priv = net_dev->priv;
1184 struct mii_phy *mii_phy = sis_priv->mii;
1185 static int next_tick = 5*HZ;
1186 u16 status;
1187 u8 revision;
1188
1189 if (!sis_priv->autong_complete){
1190 int speed, duplex = 0;
1191
1192 sis900_read_mode(net_dev, &speed, &duplex);
1193 if (duplex){
1194 sis900_set_mode(net_dev->base_addr, speed, duplex);
1195 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
1196 sis630_set_eq(net_dev, revision);
1197 netif_start_queue(net_dev);
1198 }
1199
1200 sis_priv->timer.expires = jiffies + HZ;
1201 add_timer(&sis_priv->timer);
1202 return;
1203 }
1204
1205 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1206 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1207
1208
1209 if (!netif_carrier_ok(net_dev)) {
1210 LookForLink:
1211
1212 status = sis900_default_phy(net_dev);
1213 mii_phy = sis_priv->mii;
1214
1215 if (status & MII_STAT_LINK){
1216 sis900_check_mode(net_dev, mii_phy);
1217 netif_carrier_on(net_dev);
1218 }
1219 }
1220
1221 else {
1222 if (!(status & MII_STAT_LINK)){
1223 netif_carrier_off(net_dev);
1224 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1225
1226
1227 if ((mii_phy->phy_id0 == 0x001D) &&
1228 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1229 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1230
1231 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
1232 sis630_set_eq(net_dev, revision);
1233
1234 goto LookForLink;
1235 }
1236 }
1237
1238 sis_priv->timer.expires = jiffies + next_tick;
1239 add_timer(&sis_priv->timer);
1240}
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy)
1255{
1256 struct sis900_private *sis_priv = net_dev->priv;
1257 long ioaddr = net_dev->base_addr;
1258 int speed, duplex;
1259
1260 if( mii_phy->phy_types == LAN ){
1261 outl( ~EXD & inl( ioaddr + cfg ), ioaddr + cfg);
1262 sis900_set_capability(net_dev , mii_phy);
1263 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1264 }else{
1265 outl(EXD | inl( ioaddr + cfg ), ioaddr + cfg);
1266 speed = HW_SPEED_HOME;
1267 duplex = FDX_CAPABLE_HALF_SELECTED;
1268 sis900_set_mode(ioaddr, speed, duplex);
1269 sis_priv->autong_complete = 1;
1270 }
1271}
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286static void sis900_set_mode (long ioaddr, int speed, int duplex)
1287{
1288 u32 tx_flags = 0, rx_flags = 0;
1289
1290 if( inl(ioaddr + cfg) & EDB_MASTER_EN ){
1291 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | (TX_FILL_THRESH << TxFILLT_shift);
1292 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1293 }
1294 else{
1295 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | (TX_FILL_THRESH << TxFILLT_shift);
1296 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1297 }
1298
1299 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS ) {
1300 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1301 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1302 }
1303 else {
1304 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1305 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1306 }
1307
1308 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1309 tx_flags |= (TxCSI | TxHBI);
1310 rx_flags |= RxATX;
1311 }
1312
1313 outl (tx_flags, ioaddr + txcfg);
1314 outl (rx_flags, ioaddr + rxcfg);
1315}
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1329{
1330 struct sis900_private *sis_priv = net_dev->priv;
1331 int i = 0;
1332 u32 status;
1333
1334 while (i++ < 2)
1335 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1336
1337 if (!(status & MII_STAT_LINK)){
1338 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1339 sis_priv->autong_complete = 1;
1340 netif_carrier_off(net_dev);
1341 return;
1342 }
1343
1344
1345 mdio_write(net_dev, phy_addr, MII_CONTROL,
1346 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1347 sis_priv->autong_complete = 0;
1348}
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1363{
1364 struct sis900_private *sis_priv = net_dev->priv;
1365 struct mii_phy *phy = sis_priv->mii;
1366 int phy_addr = sis_priv->cur_phy;
1367 u32 status;
1368 u16 autoadv, autorec;
1369 int i = 0;
1370
1371 while (i++ < 2)
1372 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1373
1374 if (!(status & MII_STAT_LINK))
1375 return;
1376
1377
1378 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1379 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1380 status = autoadv & autorec;
1381
1382 *speed = HW_SPEED_10_MBPS;
1383 *duplex = FDX_CAPABLE_HALF_SELECTED;
1384
1385 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1386 *speed = HW_SPEED_100_MBPS;
1387 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1388 *duplex = FDX_CAPABLE_FULL_SELECTED;
1389
1390 sis_priv->autong_complete = 1;
1391
1392
1393 if((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)){
1394 if(mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1395 *duplex = FDX_CAPABLE_FULL_SELECTED;
1396 if(mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1397 *speed = HW_SPEED_100_MBPS;
1398 }
1399
1400 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1401 net_dev->name,
1402 *speed == HW_SPEED_100_MBPS ?
1403 "100mbps" : "10mbps",
1404 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1405 "full" : "half");
1406}
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416static void sis900_tx_timeout(struct net_device *net_dev)
1417{
1418 struct sis900_private *sis_priv = net_dev->priv;
1419 long ioaddr = net_dev->base_addr;
1420 unsigned long flags;
1421 int i;
1422
1423 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1424 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1425
1426
1427 outl(0x0000, ioaddr + imr);
1428
1429
1430 spin_lock_irqsave(&sis_priv->lock, flags);
1431
1432
1433 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1434 for (i = 0; i < NUM_TX_DESC; i++) {
1435 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1436
1437 if (skb) {
1438 pci_unmap_single(sis_priv->pci_dev,
1439 sis_priv->tx_ring[i].bufptr, skb->len,
1440 PCI_DMA_TODEVICE);
1441 dev_kfree_skb_irq(skb);
1442 sis_priv->tx_skbuff[i] = 0;
1443 sis_priv->tx_ring[i].cmdsts = 0;
1444 sis_priv->tx_ring[i].bufptr = 0;
1445 sis_priv->stats.tx_dropped++;
1446 }
1447 }
1448 sis_priv->tx_full = 0;
1449 netif_wake_queue(net_dev);
1450
1451 spin_unlock_irqrestore(&sis_priv->lock, flags);
1452
1453 net_dev->trans_start = jiffies;
1454
1455
1456 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1457
1458
1459 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1460 return;
1461}
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473static int
1474sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1475{
1476 struct sis900_private *sis_priv = net_dev->priv;
1477 long ioaddr = net_dev->base_addr;
1478 unsigned int entry;
1479 unsigned long flags;
1480 unsigned int index_cur_tx, index_dirty_tx;
1481 unsigned int count_dirty_tx;
1482
1483
1484 if(!sis_priv->autong_complete){
1485 netif_stop_queue(net_dev);
1486 return 1;
1487 }
1488
1489 spin_lock_irqsave(&sis_priv->lock, flags);
1490
1491
1492 entry = sis_priv->cur_tx % NUM_TX_DESC;
1493 sis_priv->tx_skbuff[entry] = skb;
1494
1495
1496 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1497 skb->data, skb->len, PCI_DMA_TODEVICE);
1498 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1499 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1500
1501 sis_priv->cur_tx ++;
1502 index_cur_tx = sis_priv->cur_tx;
1503 index_dirty_tx = sis_priv->dirty_tx;
1504
1505 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1506 count_dirty_tx ++;
1507
1508 if (index_cur_tx == index_dirty_tx) {
1509
1510 sis_priv->tx_full = 1;
1511 netif_stop_queue(net_dev);
1512 } else if (count_dirty_tx < NUM_TX_DESC) {
1513
1514 netif_start_queue(net_dev);
1515 } else {
1516
1517 sis_priv->tx_full = 1;
1518 netif_stop_queue(net_dev);
1519 }
1520
1521 spin_unlock_irqrestore(&sis_priv->lock, flags);
1522
1523 net_dev->trans_start = jiffies;
1524
1525 if (sis900_debug > 3)
1526 printk(KERN_INFO "%s: Queued Tx packet at %p size %d "
1527 "to slot %d.\n",
1528 net_dev->name, skb->data, (int)skb->len, entry);
1529
1530 return 0;
1531}
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1544{
1545 struct net_device *net_dev = dev_instance;
1546 struct sis900_private *sis_priv = net_dev->priv;
1547 int boguscnt = max_interrupt_work;
1548 long ioaddr = net_dev->base_addr;
1549 u32 status;
1550 unsigned int handled = 0;
1551
1552 spin_lock (&sis_priv->lock);
1553
1554 do {
1555 status = inl(ioaddr + isr);
1556
1557 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1558
1559 break;
1560 handled = 1;
1561
1562
1563 if (status & (RxORN | RxERR | RxOK))
1564
1565 sis900_rx(net_dev);
1566
1567 if (status & (TxURN | TxERR | TxIDLE))
1568
1569 sis900_finish_xmit(net_dev);
1570
1571
1572 if (status & HIBERR) {
1573 printk(KERN_INFO "%s: Abnormal interrupt,"
1574 "status %#8.8x.\n", net_dev->name, status);
1575 break;
1576 }
1577 if (--boguscnt < 0) {
1578 printk(KERN_INFO "%s: Too much work at interrupt, "
1579 "interrupt status = %#8.8x.\n",
1580 net_dev->name, status);
1581 break;
1582 }
1583 } while (1);
1584
1585 if (sis900_debug > 3)
1586 printk(KERN_INFO "%s: exiting interrupt, "
1587 "interrupt status = 0x%#8.8x.\n",
1588 net_dev->name, inl(ioaddr + isr));
1589
1590 spin_unlock (&sis_priv->lock);
1591 return IRQ_RETVAL(handled);
1592}
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604static int sis900_rx(struct net_device *net_dev)
1605{
1606 struct sis900_private *sis_priv = net_dev->priv;
1607 long ioaddr = net_dev->base_addr;
1608 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1609 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1610
1611 if (sis900_debug > 3)
1612 printk(KERN_INFO "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1613 "status:0x%8.8x\n",
1614 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1615
1616 while (rx_status & OWN) {
1617 unsigned int rx_size;
1618
1619 rx_size = (rx_status & DSIZE) - CRC_SIZE;
1620
1621 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1622
1623 if (sis900_debug > 3)
1624 printk(KERN_INFO "%s: Corrupted packet "
1625 "received, buffer status = 0x%8.8x.\n",
1626 net_dev->name, rx_status);
1627 sis_priv->stats.rx_errors++;
1628 if (rx_status & OVERRUN)
1629 sis_priv->stats.rx_over_errors++;
1630 if (rx_status & (TOOLONG|RUNT))
1631 sis_priv->stats.rx_length_errors++;
1632 if (rx_status & (RXISERR | FAERR))
1633 sis_priv->stats.rx_frame_errors++;
1634 if (rx_status & CRCERR)
1635 sis_priv->stats.rx_crc_errors++;
1636
1637 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1638 } else {
1639 struct sk_buff * skb;
1640
1641
1642
1643
1644 if (sis_priv->rx_skbuff[entry] == NULL) {
1645 printk(KERN_INFO "%s: NULL pointer "
1646 "encountered in Rx ring, skipping\n",
1647 net_dev->name);
1648 break;
1649 }
1650
1651 pci_dma_sync_single(sis_priv->pci_dev,
1652 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1653 PCI_DMA_FROMDEVICE);
1654 pci_unmap_single(sis_priv->pci_dev,
1655 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1656 PCI_DMA_FROMDEVICE);
1657
1658 skb = sis_priv->rx_skbuff[entry];
1659 skb_put(skb, rx_size);
1660 skb->protocol = eth_type_trans(skb, net_dev);
1661 netif_rx(skb);
1662
1663
1664 if ((rx_status & BCAST) == MCAST)
1665 sis_priv->stats.multicast++;
1666 net_dev->last_rx = jiffies;
1667 sis_priv->stats.rx_bytes += rx_size;
1668 sis_priv->stats.rx_packets++;
1669
1670
1671
1672 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1673
1674
1675
1676
1677 printk(KERN_INFO "%s: Memory squeeze,"
1678 "deferring packet.\n",
1679 net_dev->name);
1680 sis_priv->rx_skbuff[entry] = NULL;
1681
1682 sis_priv->rx_ring[entry].cmdsts = 0;
1683 sis_priv->rx_ring[entry].bufptr = 0;
1684 sis_priv->stats.rx_dropped++;
1685 break;
1686 }
1687 skb->dev = net_dev;
1688 sis_priv->rx_skbuff[entry] = skb;
1689 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1690 sis_priv->rx_ring[entry].bufptr =
1691 pci_map_single(sis_priv->pci_dev, skb->tail,
1692 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1693 sis_priv->dirty_rx++;
1694 }
1695 sis_priv->cur_rx++;
1696 entry = sis_priv->cur_rx % NUM_RX_DESC;
1697 rx_status = sis_priv->rx_ring[entry].cmdsts;
1698 }
1699
1700
1701
1702 for (;sis_priv->cur_rx - sis_priv->dirty_rx > 0; sis_priv->dirty_rx++) {
1703 struct sk_buff *skb;
1704
1705 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1706
1707 if (sis_priv->rx_skbuff[entry] == NULL) {
1708 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1709
1710
1711
1712
1713 printk(KERN_INFO "%s: Memory squeeze,"
1714 "deferring packet.\n",
1715 net_dev->name);
1716 sis_priv->stats.rx_dropped++;
1717 break;
1718 }
1719 skb->dev = net_dev;
1720 sis_priv->rx_skbuff[entry] = skb;
1721 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1722 sis_priv->rx_ring[entry].bufptr =
1723 pci_map_single(sis_priv->pci_dev, skb->tail,
1724 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1725 }
1726 }
1727
1728 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1729
1730 return 0;
1731}
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743static void sis900_finish_xmit (struct net_device *net_dev)
1744{
1745 struct sis900_private *sis_priv = net_dev->priv;
1746
1747 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1748 struct sk_buff *skb;
1749 unsigned int entry;
1750 u32 tx_status;
1751
1752 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1753 tx_status = sis_priv->tx_ring[entry].cmdsts;
1754
1755 if (tx_status & OWN) {
1756
1757
1758
1759 break;
1760 }
1761
1762 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1763
1764 if (sis900_debug > 3)
1765 printk(KERN_INFO "%s: Transmit "
1766 "error, Tx status %8.8x.\n",
1767 net_dev->name, tx_status);
1768 sis_priv->stats.tx_errors++;
1769 if (tx_status & UNDERRUN)
1770 sis_priv->stats.tx_fifo_errors++;
1771 if (tx_status & ABORT)
1772 sis_priv->stats.tx_aborted_errors++;
1773 if (tx_status & NOCARRIER)
1774 sis_priv->stats.tx_carrier_errors++;
1775 if (tx_status & OWCOLL)
1776 sis_priv->stats.tx_window_errors++;
1777 } else {
1778
1779 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1780 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1781 sis_priv->stats.tx_packets++;
1782 }
1783
1784 skb = sis_priv->tx_skbuff[entry];
1785 pci_unmap_single(sis_priv->pci_dev,
1786 sis_priv->tx_ring[entry].bufptr, skb->len,
1787 PCI_DMA_TODEVICE);
1788 dev_kfree_skb_irq(skb);
1789 sis_priv->tx_skbuff[entry] = NULL;
1790 sis_priv->tx_ring[entry].bufptr = 0;
1791 sis_priv->tx_ring[entry].cmdsts = 0;
1792 }
1793
1794 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1795 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1796
1797
1798 sis_priv->tx_full = 0;
1799 netif_wake_queue (net_dev);
1800 }
1801}
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811static int
1812sis900_close(struct net_device *net_dev)
1813{
1814 long ioaddr = net_dev->base_addr;
1815 struct sis900_private *sis_priv = net_dev->priv;
1816 struct sk_buff *skb;
1817 int i;
1818
1819 netif_stop_queue(net_dev);
1820
1821
1822 outl(0x0000, ioaddr + imr);
1823 outl(0x0000, ioaddr + ier);
1824
1825
1826 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1827
1828 del_timer(&sis_priv->timer);
1829
1830 free_irq(net_dev->irq, net_dev);
1831
1832
1833 for (i = 0; i < NUM_RX_DESC; i++) {
1834 skb = sis_priv->rx_skbuff[i];
1835 if (skb) {
1836 pci_unmap_single(sis_priv->pci_dev,
1837 sis_priv->rx_ring[i].bufptr,
1838 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1839 dev_kfree_skb(skb);
1840 sis_priv->rx_skbuff[i] = 0;
1841 }
1842 }
1843 for (i = 0; i < NUM_TX_DESC; i++) {
1844 skb = sis_priv->tx_skbuff[i];
1845 if (skb) {
1846 pci_unmap_single(sis_priv->pci_dev,
1847 sis_priv->tx_ring[i].bufptr, skb->len,
1848 PCI_DMA_TODEVICE);
1849 dev_kfree_skb(skb);
1850 sis_priv->tx_skbuff[i] = 0;
1851 }
1852 }
1853
1854
1855
1856 return 0;
1857}
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867static void sis900_get_drvinfo(struct net_device *net_dev,
1868 struct ethtool_drvinfo *info)
1869{
1870 struct sis900_private *sis_priv = net_dev->priv;
1871
1872 strcpy (info->driver, SIS900_MODULE_NAME);
1873 strcpy (info->version, SIS900_DRV_VERSION);
1874 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1875}
1876
1877static struct ethtool_ops sis900_ethtool_ops = {
1878 .get_drvinfo = sis900_get_drvinfo,
1879};
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
1891{
1892 struct sis900_private *sis_priv = net_dev->priv;
1893 struct mii_ioctl_data *data = (struct mii_ioctl_data *)&rq->ifr_data;
1894
1895 switch(cmd) {
1896 case SIOCGMIIPHY:
1897 data->phy_id = sis_priv->mii->phy_addr;
1898
1899
1900 case SIOCGMIIREG:
1901 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
1902 return 0;
1903
1904 case SIOCSMIIREG:
1905 if (!capable(CAP_NET_ADMIN))
1906 return -EPERM;
1907 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1908 return 0;
1909 default:
1910 return -EOPNOTSUPP;
1911 }
1912}
1913
1914
1915
1916
1917
1918
1919
1920
1921static struct net_device_stats *
1922sis900_get_stats(struct net_device *net_dev)
1923{
1924 struct sis900_private *sis_priv = net_dev->priv;
1925
1926 return &sis_priv->stats;
1927}
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939static int sis900_set_config(struct net_device *dev, struct ifmap *map)
1940{
1941 struct sis900_private *sis_priv = dev->priv;
1942 struct mii_phy *mii_phy = sis_priv->mii;
1943
1944 u16 status;
1945
1946 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1947
1948
1949
1950
1951
1952
1953
1954 switch(map->port){
1955 case IF_PORT_UNKNOWN:
1956 dev->if_port = map->port;
1957
1958
1959
1960
1961 netif_carrier_off(dev);
1962
1963
1964 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
1965
1966
1967
1968
1969 mdio_write(dev, mii_phy->phy_addr,
1970 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1971
1972 break;
1973
1974 case IF_PORT_10BASET:
1975 dev->if_port = map->port;
1976
1977
1978
1979
1980
1981 netif_carrier_off(dev);
1982
1983
1984
1985 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
1986
1987
1988 mdio_write(dev, mii_phy->phy_addr,
1989 MII_CONTROL, status & ~(MII_CNTL_SPEED | MII_CNTL_AUTO));
1990 break;
1991
1992 case IF_PORT_100BASET:
1993 case IF_PORT_100BASETX:
1994 dev->if_port = map->port;
1995
1996
1997
1998
1999
2000 netif_carrier_off(dev);
2001
2002
2003
2004 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2005 mdio_write(dev, mii_phy->phy_addr,
2006 MII_CONTROL, (status & ~MII_CNTL_SPEED) | MII_CNTL_SPEED);
2007
2008 break;
2009
2010 case IF_PORT_10BASE2:
2011 case IF_PORT_AUI:
2012 case IF_PORT_100BASEFX:
2013
2014 printk(KERN_INFO "Not supported");
2015 return -EOPNOTSUPP;
2016 break;
2017
2018 default:
2019 printk(KERN_INFO "Invalid");
2020 return -EINVAL;
2021 }
2022 }
2023 return 0;
2024}
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2038{
2039
2040 u32 crc = ether_crc(6, addr);
2041
2042
2043 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2044 return ((int)(crc >> 24));
2045 else
2046 return ((int)(crc >> 25));
2047}
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058static void set_rx_mode(struct net_device *net_dev)
2059{
2060 long ioaddr = net_dev->base_addr;
2061 struct sis900_private * sis_priv = net_dev->priv;
2062 u16 mc_filter[16] = {0};
2063 int i, table_entries;
2064 u32 rx_mode;
2065 u8 revision;
2066
2067
2068 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
2069 if((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2070 table_entries = 16;
2071 else
2072 table_entries = 8;
2073
2074 if (net_dev->flags & IFF_PROMISC) {
2075
2076 rx_mode = RFPromiscuous;
2077 for (i = 0; i < table_entries; i++)
2078 mc_filter[i] = 0xffff;
2079 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2080 (net_dev->flags & IFF_ALLMULTI)) {
2081
2082 rx_mode = RFAAB | RFAAM;
2083 for (i = 0; i < table_entries; i++)
2084 mc_filter[i] = 0xffff;
2085 } else {
2086
2087
2088 struct dev_mc_list *mclist;
2089 rx_mode = RFAAB;
2090 for (i = 0, mclist = net_dev->mc_list; mclist && i < net_dev->mc_count;
2091 i++, mclist = mclist->next) {
2092 unsigned int bit_nr =
2093 sis900_mcast_bitnr(mclist->dmi_addr, revision);
2094 mc_filter[bit_nr >> 4] |= (1 << bit_nr);
2095 }
2096 }
2097
2098
2099 for (i = 0; i < table_entries; i++) {
2100
2101 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2102 outl(mc_filter[i], ioaddr + rfdr);
2103 }
2104
2105 outl(RFEN | rx_mode, ioaddr + rfcr);
2106
2107
2108 if (net_dev->flags & IFF_LOOPBACK) {
2109 u32 cr_saved;
2110
2111 cr_saved = inl(ioaddr + cr);
2112 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2113
2114 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2115 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2116
2117 outl(cr_saved, ioaddr + cr);
2118 }
2119
2120 return;
2121}
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132static void sis900_reset(struct net_device *net_dev)
2133{
2134 struct sis900_private * sis_priv = net_dev->priv;
2135 long ioaddr = net_dev->base_addr;
2136 int i = 0;
2137 u32 status = TxRCMP | RxRCMP;
2138 u8 revision;
2139
2140 outl(0, ioaddr + ier);
2141 outl(0, ioaddr + imr);
2142 outl(0, ioaddr + rfcr);
2143
2144 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2145
2146
2147 while (status && (i++ < 1000)) {
2148 status ^= (inl(isr + ioaddr) & status);
2149 }
2150
2151 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
2152 if( (revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV) )
2153 outl(PESEL | RND_CNT, ioaddr + cfg);
2154 else
2155 outl(PESEL, ioaddr + cfg);
2156}
2157
2158
2159
2160
2161
2162
2163
2164
2165static void __devexit sis900_remove(struct pci_dev *pci_dev)
2166{
2167 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2168 struct sis900_private * sis_priv = net_dev->priv;
2169 struct mii_phy *phy = NULL;
2170
2171 while (sis_priv->first_mii) {
2172 phy = sis_priv->first_mii;
2173 sis_priv->first_mii = phy->next;
2174 kfree(phy);
2175 }
2176
2177 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2178 sis_priv->rx_ring_dma);
2179 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2180 sis_priv->tx_ring_dma);
2181 unregister_netdev(net_dev);
2182 free_netdev(net_dev);
2183 pci_release_regions(pci_dev);
2184 pci_set_drvdata(pci_dev, NULL);
2185}
2186
2187static struct pci_driver sis900_pci_driver = {
2188 .name = SIS900_MODULE_NAME,
2189 .id_table = sis900_pci_tbl,
2190 .probe = sis900_probe,
2191 .remove = __devexit_p(sis900_remove),
2192};
2193
2194static int __init sis900_init_module(void)
2195{
2196
2197#ifdef MODULE
2198 printk(version);
2199#endif
2200
2201 return pci_module_init(&sis900_pci_driver);
2202}
2203
2204static void __exit sis900_cleanup_module(void)
2205{
2206 pci_unregister_driver(&sis900_pci_driver);
2207}
2208
2209module_init(sis900_init_module);
2210module_exit(sis900_cleanup_module);
2211
2212