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38#include <linux/module.h>
39#include <linux/pci.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/delay.h>
43#include <linux/crc32.h>
44#include <linux/init.h>
45
46#include <asm/io.h>
47
48#define RTL8169_VERSION "1.2"
49#define MODULENAME "r8169"
50#define RTL8169_DRIVER_NAME MODULENAME " Gigabit Ethernet driver " RTL8169_VERSION
51#define PFX MODULENAME ": "
52
53#ifdef RTL8169_DEBUG
54#define assert(expr) \
55 if(!(expr)) { \
56 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
57 #expr,__FILE__,__FUNCTION__,__LINE__); \
58 }
59#else
60#define assert(expr) do {} while (0)
61#endif
62
63
64#define MAX_UNITS 8
65static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
66
67
68static int max_interrupt_work = 20;
69
70
71
72static int multicast_filter_limit = 32;
73
74
75#define MAC_ADDR_LEN 6
76
77
78#define MAX_ETH_FRAME_SIZE 1536
79
80#define TX_FIFO_THRESH 256
81
82#define RX_FIFO_THRESH 7
83#define RX_DMA_BURST 6
84#define TX_DMA_BURST 6
85#define EarlyTxThld 0x3F
86#define RxPacketMaxSize 0x0800
87#define InterFrameGap 0x03
88
89#define NUM_TX_DESC 64
90#define NUM_RX_DESC 64
91#define RX_BUF_SIZE 1536
92
93#define RTL_MIN_IO_SIZE 0x80
94#define TX_TIMEOUT (6*HZ)
95
96
97#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
98#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
99#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
100#define RTL_R8(reg) readb (ioaddr + (reg))
101#define RTL_R16(reg) readw (ioaddr + (reg))
102#define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
103
104static struct {
105 const char *name;
106} board_info[] __devinitdata = {
107 {
108"RealTek RTL8169 Gigabit Ethernet"},};
109
110static struct pci_device_id rtl8169_pci_tbl[] = {
111 {0x10ec, 0x8169, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
112 {0,},
113};
114
115MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
116
117enum RTL8169_registers {
118 MAC0 = 0,
119 MAR0 = 8,
120 TxDescStartAddr = 0x20,
121 TxHDescStartAddr = 0x28,
122 FLASH = 0x30,
123 ERSR = 0x36,
124 ChipCmd = 0x37,
125 TxPoll = 0x38,
126 IntrMask = 0x3C,
127 IntrStatus = 0x3E,
128 TxConfig = 0x40,
129 RxConfig = 0x44,
130 RxMissed = 0x4C,
131 Cfg9346 = 0x50,
132 Config0 = 0x51,
133 Config1 = 0x52,
134 Config2 = 0x53,
135 Config3 = 0x54,
136 Config4 = 0x55,
137 Config5 = 0x56,
138 MultiIntr = 0x5C,
139 PHYAR = 0x60,
140 TBICSR = 0x64,
141 TBI_ANAR = 0x68,
142 TBI_LPAR = 0x6A,
143 PHYstatus = 0x6C,
144 RxMaxSize = 0xDA,
145 CPlusCmd = 0xE0,
146 RxDescStartAddr = 0xE4,
147 EarlyTxThres = 0xEC,
148 FuncEvent = 0xF0,
149 FuncEventMask = 0xF4,
150 FuncPresetState = 0xF8,
151 FuncForceEvent = 0xFC,
152};
153
154enum RTL8169_register_content {
155
156 SYSErr = 0x8000,
157 PCSTimeout = 0x4000,
158 SWInt = 0x0100,
159 TxDescUnavail = 0x80,
160 RxFIFOOver = 0x40,
161 RxUnderrun = 0x20,
162 RxOverflow = 0x10,
163 TxErr = 0x08,
164 TxOK = 0x04,
165 RxErr = 0x02,
166 RxOK = 0x01,
167
168
169 RxRES = 0x00200000,
170 RxCRC = 0x00080000,
171 RxRUNT = 0x00100000,
172 RxRWT = 0x00400000,
173
174
175 CmdReset = 0x10,
176 CmdRxEnb = 0x08,
177 CmdTxEnb = 0x04,
178 RxBufEmpty = 0x01,
179
180
181 Cfg9346_Lock = 0x00,
182 Cfg9346_Unlock = 0xC0,
183
184
185 AcceptErr = 0x20,
186 AcceptRunt = 0x10,
187 AcceptBroadcast = 0x08,
188 AcceptMulticast = 0x04,
189 AcceptMyPhys = 0x02,
190 AcceptAllPhys = 0x01,
191
192
193 RxCfgFIFOShift = 13,
194 RxCfgDMAShift = 8,
195
196
197 TxInterFrameGapShift = 24,
198 TxDMAShift = 8,
199
200
201 TBI_Enable = 0x80,
202 TxFlowCtrl = 0x40,
203 RxFlowCtrl = 0x20,
204 _1000bpsF = 0x10,
205 _100bps = 0x08,
206 _10bps = 0x04,
207 LinkStatus = 0x02,
208 FullDup = 0x01,
209
210
211 PHY_CTRL_REG = 0,
212 PHY_STAT_REG = 1,
213 PHY_AUTO_NEGO_REG = 4,
214 PHY_1000_CTRL_REG = 9,
215
216
217 PHY_Restart_Auto_Nego = 0x0200,
218 PHY_Enable_Auto_Nego = 0x1000,
219
220
221 PHY_Auto_Neco_Comp = 0x0020,
222
223
224 PHY_Cap_10_Half = 0x0020,
225 PHY_Cap_10_Full = 0x0040,
226 PHY_Cap_100_Half = 0x0080,
227 PHY_Cap_100_Full = 0x0100,
228
229
230 PHY_Cap_1000_Full = 0x0200,
231
232 PHY_Cap_Null = 0x0,
233
234
235 _10_Half = 0x01,
236 _10_Full = 0x02,
237 _100_Half = 0x04,
238 _100_Full = 0x08,
239 _1000_Full = 0x10,
240
241
242 TBILinkOK = 0x02000000,
243};
244
245const static struct {
246 const char *name;
247 u8 version;
248 u32 RxConfigMask;
249} rtl_chip_info[] = {
250 {
251"RTL-8169", 0x00, 0xff7e1880,},};
252
253enum _DescStatusBit {
254 OWNbit = 0x80000000,
255 EORbit = 0x40000000,
256 FSbit = 0x20000000,
257 LSbit = 0x10000000,
258};
259
260struct TxDesc {
261 u32 status;
262 u32 vlan_tag;
263 u32 buf_addr;
264 u32 buf_Haddr;
265};
266
267struct RxDesc {
268 u32 status;
269 u32 vlan_tag;
270 u32 buf_addr;
271 u32 buf_Haddr;
272};
273
274struct rtl8169_private {
275 void *mmio_addr;
276 struct pci_dev *pci_dev;
277 struct net_device_stats stats;
278 spinlock_t lock;
279 int chipset;
280 unsigned long cur_rx;
281 unsigned long cur_tx;
282 unsigned long dirty_tx;
283 unsigned char *TxDescArrays;
284 unsigned char *RxDescArrays;
285 struct TxDesc *TxDescArray;
286 struct RxDesc *RxDescArray;
287 unsigned char *RxBufferRings;
288 unsigned char *RxBufferRing[NUM_RX_DESC];
289 struct sk_buff *Tx_skbuff[NUM_TX_DESC];
290};
291
292MODULE_AUTHOR("Realtek");
293MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
294MODULE_PARM(media, "1-" __MODULE_STRING(MAX_UNITS) "i");
295MODULE_LICENSE("GPL");
296
297static int rtl8169_open(struct net_device *dev);
298static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
299static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance,
300 struct pt_regs *regs);
301static void rtl8169_init_ring(struct net_device *dev);
302static void rtl8169_hw_start(struct net_device *dev);
303static int rtl8169_close(struct net_device *dev);
304static void rtl8169_set_rx_mode(struct net_device *dev);
305static void rtl8169_tx_timeout(struct net_device *dev);
306static struct net_device_stats *rtl8169_get_stats(struct net_device *netdev);
307
308static const u16 rtl8169_intr_mask =
309 SYSErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver | TxErr | TxOK |
310 RxErr | RxOK;
311static const unsigned int rtl8169_rx_config =
312 (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
313
314void
315mdio_write(void *ioaddr, int RegAddr, int value)
316{
317 int i;
318
319 RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
320 udelay(1000);
321
322 for (i = 2000; i > 0; i--) {
323
324 if (!(RTL_R32(PHYAR) & 0x80000000)) {
325 break;
326 } else {
327 udelay(100);
328 }
329 }
330}
331
332int
333mdio_read(void *ioaddr, int RegAddr)
334{
335 int i, value = -1;
336
337 RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
338 udelay(1000);
339
340 for (i = 2000; i > 0; i--) {
341
342 if (RTL_R32(PHYAR) & 0x80000000) {
343 value = (int) (RTL_R32(PHYAR) & 0xFFFF);
344 break;
345 } else {
346 udelay(100);
347 }
348 }
349 return value;
350}
351
352static int __devinit
353rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out,
354 void **ioaddr_out)
355{
356 void *ioaddr = NULL;
357 struct net_device *dev;
358 struct rtl8169_private *tp;
359 int rc, i;
360 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
361 u32 tmp;
362
363 assert(pdev != NULL);
364 assert(ioaddr_out != NULL);
365
366 *ioaddr_out = NULL;
367 *dev_out = NULL;
368
369
370 dev = alloc_etherdev(sizeof (*tp));
371 if (dev == NULL) {
372 printk(KERN_ERR PFX "unable to alloc new ethernet\n");
373 return -ENOMEM;
374 }
375
376 SET_MODULE_OWNER(dev);
377 SET_NETDEV_DEV(dev, &pdev->dev);
378 tp = dev->priv;
379
380
381 rc = pci_enable_device(pdev);
382 if (rc)
383 goto err_out;
384
385 mmio_start = pci_resource_start(pdev, 1);
386 mmio_end = pci_resource_end(pdev, 1);
387 mmio_flags = pci_resource_flags(pdev, 1);
388 mmio_len = pci_resource_len(pdev, 1);
389
390
391 if (!(mmio_flags & IORESOURCE_MEM)) {
392 printk(KERN_ERR PFX
393 "region #1 not an MMIO resource, aborting\n");
394 rc = -ENODEV;
395 goto err_out_disable;
396 }
397
398 if (mmio_len < RTL_MIN_IO_SIZE) {
399 printk(KERN_ERR PFX "Invalid PCI region size(s), aborting\n");
400 rc = -ENODEV;
401 goto err_out_disable;
402 }
403
404 rc = pci_request_regions(pdev, dev->name);
405 if (rc)
406 goto err_out_disable;
407
408
409 pci_set_master(pdev);
410
411
412 ioaddr = ioremap(mmio_start, mmio_len);
413 if (ioaddr == NULL) {
414 printk(KERN_ERR PFX "cannot remap MMIO, aborting\n");
415 rc = -EIO;
416 goto err_out_free_res;
417 }
418
419
420 RTL_W8(ChipCmd, CmdReset);
421
422
423 for (i = 1000; i > 0; i--)
424 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
425 break;
426 else
427 udelay(10);
428
429
430 tmp = RTL_R32(TxConfig);
431 tmp = ((tmp & 0x7c000000) + ((tmp & 0x00800000) << 2)) >> 24;
432
433 for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--)
434 if (tmp == rtl_chip_info[i].version) {
435 tp->chipset = i;
436 goto match;
437 }
438
439 printk(KERN_DEBUG PFX
440 "PCI device %s: unknown chip version, assuming RTL-8169\n",
441 pci_name(pdev));
442 printk(KERN_DEBUG PFX "PCI device %s: TxConfig = 0x%lx\n",
443 pci_name(pdev), (unsigned long) RTL_R32(TxConfig));
444 tp->chipset = 0;
445
446match:
447 *ioaddr_out = ioaddr;
448 *dev_out = dev;
449 return 0;
450
451err_out_free_res:
452 pci_release_regions(pdev);
453
454err_out_disable:
455 pci_disable_device(pdev);
456
457err_out:
458 free_netdev(dev);
459 return rc;
460}
461
462static int __devinit
463rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
464{
465 struct net_device *dev = NULL;
466 struct rtl8169_private *tp = NULL;
467 void *ioaddr = NULL;
468 static int board_idx = -1;
469 static int printed_version = 0;
470 int i, rc;
471 int option = -1, Cap10_100 = 0, Cap1000 = 0;
472
473 assert(pdev != NULL);
474 assert(ent != NULL);
475
476 board_idx++;
477
478 if (!printed_version) {
479 printk(KERN_INFO RTL8169_DRIVER_NAME " loaded\n");
480 printed_version = 1;
481 }
482
483 rc = rtl8169_init_board(pdev, &dev, &ioaddr);
484 if (rc)
485 return rc;
486
487 tp = dev->priv;
488 assert(ioaddr != NULL);
489 assert(dev != NULL);
490 assert(tp != NULL);
491
492
493 for (i = 0; i < MAC_ADDR_LEN; i++)
494 dev->dev_addr[i] = RTL_R8(MAC0 + i);
495
496 dev->open = rtl8169_open;
497 dev->hard_start_xmit = rtl8169_start_xmit;
498 dev->get_stats = rtl8169_get_stats;
499 dev->stop = rtl8169_close;
500 dev->tx_timeout = rtl8169_tx_timeout;
501 dev->set_multicast_list = rtl8169_set_rx_mode;
502 dev->watchdog_timeo = TX_TIMEOUT;
503 dev->irq = pdev->irq;
504 dev->base_addr = (unsigned long) ioaddr;
505
506
507 tp = dev->priv;
508 tp->pci_dev = pdev;
509 tp->mmio_addr = ioaddr;
510
511 spin_lock_init(&tp->lock);
512
513 rc = register_netdev(dev);
514 if (rc) {
515 iounmap(ioaddr);
516 pci_release_regions(pdev);
517 pci_disable_device(pdev);
518 free_netdev(dev);
519 return rc;
520 }
521
522 printk(KERN_DEBUG "%s: Identified chip type is '%s'.\n", dev->name,
523 rtl_chip_info[tp->chipset].name);
524
525 pci_set_drvdata(pdev, dev);
526
527 printk(KERN_INFO "%s: %s at 0x%lx, "
528 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
529 "IRQ %d\n",
530 dev->name,
531 board_info[ent->driver_data].name,
532 dev->base_addr,
533 dev->dev_addr[0], dev->dev_addr[1],
534 dev->dev_addr[2], dev->dev_addr[3],
535 dev->dev_addr[4], dev->dev_addr[5], dev->irq);
536
537
538 if (!(RTL_R8(PHYstatus) & TBI_Enable)) {
539 int val = mdio_read(ioaddr, PHY_AUTO_NEGO_REG);
540
541 option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
542
543 if (option > 0) {
544 printk(KERN_INFO "%s: Force-mode Enabled.\n",
545 dev->name);
546 Cap10_100 = 0, Cap1000 = 0;
547 switch (option) {
548 case _10_Half:
549 Cap10_100 = PHY_Cap_10_Half;
550 Cap1000 = PHY_Cap_Null;
551 break;
552 case _10_Full:
553 Cap10_100 = PHY_Cap_10_Full;
554 Cap1000 = PHY_Cap_Null;
555 break;
556 case _100_Half:
557 Cap10_100 = PHY_Cap_100_Half;
558 Cap1000 = PHY_Cap_Null;
559 break;
560 case _100_Full:
561 Cap10_100 = PHY_Cap_100_Full;
562 Cap1000 = PHY_Cap_Null;
563 break;
564 case _1000_Full:
565 Cap10_100 = PHY_Cap_Null;
566 Cap1000 = PHY_Cap_1000_Full;
567 break;
568 default:
569 break;
570 }
571 mdio_write(ioaddr, PHY_AUTO_NEGO_REG, Cap10_100 | (val & 0x1F));
572 mdio_write(ioaddr, PHY_1000_CTRL_REG, Cap1000);
573 } else {
574 printk(KERN_INFO "%s: Auto-negotiation Enabled.\n",
575 dev->name);
576
577
578 mdio_write(ioaddr, PHY_AUTO_NEGO_REG,
579 PHY_Cap_10_Half | PHY_Cap_10_Full |
580 PHY_Cap_100_Half | PHY_Cap_100_Full | (val &
581 0x1F));
582
583
584 mdio_write(ioaddr, PHY_1000_CTRL_REG,
585 PHY_Cap_1000_Full);
586
587 }
588
589
590 mdio_write(ioaddr, PHY_CTRL_REG,
591 PHY_Enable_Auto_Nego | PHY_Restart_Auto_Nego);
592 udelay(100);
593
594
595 for (i = 10000; i > 0; i--) {
596
597 if (mdio_read(ioaddr, PHY_STAT_REG) &
598 PHY_Auto_Neco_Comp) {
599 udelay(100);
600 option = RTL_R8(PHYstatus);
601 if (option & _1000bpsF) {
602 printk(KERN_INFO
603 "%s: 1000Mbps Full-duplex operation.\n",
604 dev->name);
605 } else {
606 printk(KERN_INFO
607 "%s: %sMbps %s-duplex operation.\n",
608 dev->name,
609 (option & _100bps) ? "100" :
610 "10",
611 (option & FullDup) ? "Full" :
612 "Half");
613 }
614 break;
615 } else {
616 udelay(100);
617 }
618 }
619
620 } else {
621 udelay(100);
622 printk(KERN_INFO
623 "%s: 1000Mbps Full-duplex operation, TBI Link %s!\n",
624 dev->name,
625 (RTL_R32(TBICSR) & TBILinkOK) ? "OK" : "Failed");
626
627 }
628
629 return 0;
630}
631
632static void __devexit
633rtl8169_remove_one(struct pci_dev *pdev)
634{
635 struct net_device *dev = pci_get_drvdata(pdev);
636 struct rtl8169_private *tp = dev->priv;
637
638 assert(dev != NULL);
639 assert(tp != NULL);
640
641 unregister_netdev(dev);
642 iounmap(tp->mmio_addr);
643 pci_release_regions(pdev);
644
645 pci_disable_device(pdev);
646 free_netdev(dev);
647 pci_set_drvdata(pdev, NULL);
648}
649
650static int
651rtl8169_open(struct net_device *dev)
652{
653 struct rtl8169_private *tp = dev->priv;
654 int retval;
655 u8 diff;
656 u32 TxPhyAddr, RxPhyAddr;
657
658 retval =
659 request_irq(dev->irq, rtl8169_interrupt, SA_SHIRQ, dev->name, dev);
660 if (retval) {
661 return retval;
662 }
663
664 tp->TxDescArrays =
665 kmalloc(NUM_TX_DESC * sizeof (struct TxDesc) + 256, GFP_KERNEL);
666
667 TxPhyAddr = virt_to_bus(tp->TxDescArrays);
668 diff = 256 - (TxPhyAddr - ((TxPhyAddr >> 8) << 8));
669 TxPhyAddr += diff;
670 tp->TxDescArray = (struct TxDesc *) (tp->TxDescArrays + diff);
671
672 tp->RxDescArrays =
673 kmalloc(NUM_RX_DESC * sizeof (struct RxDesc) + 256, GFP_KERNEL);
674
675 RxPhyAddr = virt_to_bus(tp->RxDescArrays);
676 diff = 256 - (RxPhyAddr - ((RxPhyAddr >> 8) << 8));
677 RxPhyAddr += diff;
678 tp->RxDescArray = (struct RxDesc *) (tp->RxDescArrays + diff);
679
680 if (tp->TxDescArrays == NULL || tp->RxDescArrays == NULL) {
681 printk(KERN_INFO
682 "Allocate RxDescArray or TxDescArray failed\n");
683 free_irq(dev->irq, dev);
684 if (tp->TxDescArrays)
685 kfree(tp->TxDescArrays);
686 if (tp->RxDescArrays)
687 kfree(tp->RxDescArrays);
688 return -ENOMEM;
689 }
690 tp->RxBufferRings = kmalloc(RX_BUF_SIZE * NUM_RX_DESC, GFP_KERNEL);
691 if (tp->RxBufferRings == NULL) {
692 printk(KERN_INFO "Allocate RxBufferRing failed\n");
693 }
694
695 rtl8169_init_ring(dev);
696 rtl8169_hw_start(dev);
697
698 return 0;
699
700}
701
702static void
703rtl8169_hw_start(struct net_device *dev)
704{
705 struct rtl8169_private *tp = dev->priv;
706 void *ioaddr = tp->mmio_addr;
707 u32 i;
708
709
710 RTL_W8(ChipCmd, CmdReset);
711
712
713 for (i = 1000; i > 0; i--) {
714 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
715 break;
716 else
717 udelay(10);
718 }
719
720 RTL_W8(Cfg9346, Cfg9346_Unlock);
721 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
722 RTL_W8(EarlyTxThres, EarlyTxThld);
723
724
725 RTL_W16(RxMaxSize, RxPacketMaxSize);
726
727
728 i = rtl8169_rx_config | (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].
729 RxConfigMask);
730 RTL_W32(RxConfig, i);
731
732
733 RTL_W32(TxConfig,
734 (TX_DMA_BURST << TxDMAShift) | (InterFrameGap <<
735 TxInterFrameGapShift));
736
737 tp->cur_rx = 0;
738
739 RTL_W32(TxDescStartAddr, virt_to_bus(tp->TxDescArray));
740 RTL_W32(RxDescStartAddr, virt_to_bus(tp->RxDescArray));
741 RTL_W8(Cfg9346, Cfg9346_Lock);
742 udelay(10);
743
744 RTL_W32(RxMissed, 0);
745
746 rtl8169_set_rx_mode(dev);
747
748
749 RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
750
751
752 RTL_W16(IntrMask, rtl8169_intr_mask);
753
754 netif_start_queue(dev);
755
756}
757
758static void
759rtl8169_init_ring(struct net_device *dev)
760{
761 struct rtl8169_private *tp = dev->priv;
762 int i;
763
764 tp->cur_rx = 0;
765 tp->cur_tx = 0;
766 tp->dirty_tx = 0;
767 memset(tp->TxDescArray, 0x0, NUM_TX_DESC * sizeof (struct TxDesc));
768 memset(tp->RxDescArray, 0x0, NUM_RX_DESC * sizeof (struct RxDesc));
769
770 for (i = 0; i < NUM_TX_DESC; i++) {
771 tp->Tx_skbuff[i] = NULL;
772 }
773 for (i = 0; i < NUM_RX_DESC; i++) {
774 if (i == (NUM_RX_DESC - 1))
775 tp->RxDescArray[i].status =
776 (OWNbit | EORbit) + RX_BUF_SIZE;
777 else
778 tp->RxDescArray[i].status = OWNbit + RX_BUF_SIZE;
779
780 tp->RxBufferRing[i] = &(tp->RxBufferRings[i * RX_BUF_SIZE]);
781 tp->RxDescArray[i].buf_addr = virt_to_bus(tp->RxBufferRing[i]);
782 }
783}
784
785static void
786rtl8169_tx_clear(struct rtl8169_private *tp)
787{
788 int i;
789
790 tp->cur_tx = 0;
791 for (i = 0; i < NUM_TX_DESC; i++) {
792 if (tp->Tx_skbuff[i] != NULL) {
793 dev_kfree_skb(tp->Tx_skbuff[i]);
794 tp->Tx_skbuff[i] = NULL;
795 tp->stats.tx_dropped++;
796 }
797 }
798}
799
800static void
801rtl8169_tx_timeout(struct net_device *dev)
802{
803 struct rtl8169_private *tp = dev->priv;
804 void *ioaddr = tp->mmio_addr;
805 u8 tmp8;
806
807
808 tmp8 = RTL_R8(ChipCmd);
809 if (tmp8 & CmdTxEnb)
810 RTL_W8(ChipCmd, tmp8 & ~CmdTxEnb);
811
812
813 RTL_W16(IntrMask, 0x0000);
814
815
816 spin_lock_irq(&tp->lock);
817 rtl8169_tx_clear(tp);
818 spin_unlock_irq(&tp->lock);
819
820
821 rtl8169_hw_start(dev);
822
823 netif_wake_queue(dev);
824}
825
826static int
827rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
828{
829 struct rtl8169_private *tp = dev->priv;
830 void *ioaddr = tp->mmio_addr;
831 int entry = tp->cur_tx % NUM_TX_DESC;
832
833 if (skb->len < ETH_ZLEN) {
834 skb = skb_padto(skb, ETH_ZLEN);
835 if (skb == NULL)
836 return 0;
837 }
838
839 spin_lock_irq(&tp->lock);
840
841 if ((tp->TxDescArray[entry].status & OWNbit) == 0) {
842 tp->Tx_skbuff[entry] = skb;
843 tp->TxDescArray[entry].buf_addr = virt_to_bus(skb->data);
844 if (entry != (NUM_TX_DESC - 1))
845 tp->TxDescArray[entry].status =
846 (OWNbit | FSbit | LSbit) | ((skb->len > ETH_ZLEN) ?
847 skb->len : ETH_ZLEN);
848 else
849 tp->TxDescArray[entry].status =
850 (OWNbit | EORbit | FSbit | LSbit) |
851 ((skb->len > ETH_ZLEN) ? skb->len : ETH_ZLEN);
852
853 RTL_W8(TxPoll, 0x40);
854
855 dev->trans_start = jiffies;
856
857 tp->cur_tx++;
858 }
859
860 spin_unlock_irq(&tp->lock);
861
862 if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx) {
863 netif_stop_queue(dev);
864 }
865
866 return 0;
867}
868
869static void
870rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
871 void *ioaddr)
872{
873 unsigned long dirty_tx, tx_left = 0;
874 int entry = tp->cur_tx % NUM_TX_DESC;
875
876 assert(dev != NULL);
877 assert(tp != NULL);
878 assert(ioaddr != NULL);
879
880 dirty_tx = tp->dirty_tx;
881 tx_left = tp->cur_tx - dirty_tx;
882
883 while (tx_left > 0) {
884 if ((tp->TxDescArray[entry].status & OWNbit) == 0) {
885 dev_kfree_skb_irq(tp->
886 Tx_skbuff[dirty_tx % NUM_TX_DESC]);
887 tp->Tx_skbuff[dirty_tx % NUM_TX_DESC] = NULL;
888 tp->stats.tx_packets++;
889 dirty_tx++;
890 tx_left--;
891 entry++;
892 }
893 }
894
895 if (tp->dirty_tx != dirty_tx) {
896 tp->dirty_tx = dirty_tx;
897 if (netif_queue_stopped(dev))
898 netif_wake_queue(dev);
899 }
900}
901
902static void
903rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
904 void *ioaddr)
905{
906 int cur_rx;
907 struct sk_buff *skb;
908 int pkt_size = 0;
909
910 assert(dev != NULL);
911 assert(tp != NULL);
912 assert(ioaddr != NULL);
913
914 cur_rx = tp->cur_rx;
915
916 while ((tp->RxDescArray[cur_rx].status & OWNbit) == 0) {
917
918 if (tp->RxDescArray[cur_rx].status & RxRES) {
919 printk(KERN_INFO "%s: Rx ERROR!!!\n", dev->name);
920 tp->stats.rx_errors++;
921 if (tp->RxDescArray[cur_rx].status & (RxRWT | RxRUNT))
922 tp->stats.rx_length_errors++;
923 if (tp->RxDescArray[cur_rx].status & RxCRC)
924 tp->stats.rx_crc_errors++;
925 } else {
926 pkt_size =
927 (int) (tp->RxDescArray[cur_rx].
928 status & 0x00001FFF) - 4;
929 skb = dev_alloc_skb(pkt_size + 2);
930 if (skb != NULL) {
931 skb->dev = dev;
932 skb_reserve(skb, 2);
933 eth_copy_and_sum(skb, tp->RxBufferRing[cur_rx],
934 pkt_size, 0);
935 skb_put(skb, pkt_size);
936 skb->protocol = eth_type_trans(skb, dev);
937 netif_rx(skb);
938
939 if (cur_rx == (NUM_RX_DESC - 1))
940 tp->RxDescArray[cur_rx].status =
941 (OWNbit | EORbit) + RX_BUF_SIZE;
942 else
943 tp->RxDescArray[cur_rx].status =
944 OWNbit + RX_BUF_SIZE;
945
946 tp->RxDescArray[cur_rx].buf_addr =
947 virt_to_bus(tp->RxBufferRing[cur_rx]);
948 dev->last_rx = jiffies;
949 tp->stats.rx_bytes += pkt_size;
950 tp->stats.rx_packets++;
951 } else {
952 printk(KERN_WARNING
953 "%s: Memory squeeze, deferring packet.\n",
954 dev->name);
955
956
957 tp->stats.rx_dropped++;
958 }
959 }
960
961 cur_rx = (cur_rx + 1) % NUM_RX_DESC;
962
963 }
964
965 tp->cur_rx = cur_rx;
966}
967
968
969static irqreturn_t
970rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
971{
972 struct net_device *dev = (struct net_device *) dev_instance;
973 struct rtl8169_private *tp = dev->priv;
974 int boguscnt = max_interrupt_work;
975 void *ioaddr = tp->mmio_addr;
976 int status = 0;
977 int handled = 0;
978
979 do {
980 status = RTL_R16(IntrStatus);
981
982
983 if (status == 0xFFFF)
984 break;
985
986 handled = 1;
987
988
989
990
991 RTL_W16(IntrStatus,
992 (status & RxFIFOOver) ? (status | RxOverflow) : status);
993
994 if ((status &
995 (SYSErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver
996 | TxErr | TxOK | RxErr | RxOK)) == 0)
997 break;
998
999
1000 if (status & (RxOK | RxUnderrun | RxOverflow | RxFIFOOver)) {
1001 rtl8169_rx_interrupt(dev, tp, ioaddr);
1002 }
1003
1004 if (status & (TxOK | TxErr)) {
1005 spin_lock(&tp->lock);
1006 rtl8169_tx_interrupt(dev, tp, ioaddr);
1007 spin_unlock(&tp->lock);
1008 }
1009
1010 boguscnt--;
1011 } while (boguscnt > 0);
1012
1013 if (boguscnt <= 0) {
1014 printk(KERN_WARNING "%s: Too much work at interrupt!\n",
1015 dev->name);
1016
1017 RTL_W16(IntrStatus, 0xffff);
1018 }
1019 return IRQ_RETVAL(handled);
1020}
1021
1022static int
1023rtl8169_close(struct net_device *dev)
1024{
1025 struct rtl8169_private *tp = dev->priv;
1026 void *ioaddr = tp->mmio_addr;
1027 int i;
1028
1029 netif_stop_queue(dev);
1030
1031 spin_lock_irq(&tp->lock);
1032
1033
1034 RTL_W8(ChipCmd, 0x00);
1035
1036
1037 RTL_W16(IntrMask, 0x0000);
1038
1039
1040 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
1041 RTL_W32(RxMissed, 0);
1042
1043 spin_unlock_irq(&tp->lock);
1044
1045 synchronize_irq(dev->irq);
1046 free_irq(dev->irq, dev);
1047
1048 rtl8169_tx_clear(tp);
1049 kfree(tp->TxDescArrays);
1050 kfree(tp->RxDescArrays);
1051 tp->TxDescArrays = NULL;
1052 tp->RxDescArrays = NULL;
1053 tp->TxDescArray = NULL;
1054 tp->RxDescArray = NULL;
1055 kfree(tp->RxBufferRings);
1056 for (i = 0; i < NUM_RX_DESC; i++) {
1057 tp->RxBufferRing[i] = NULL;
1058 }
1059
1060 return 0;
1061}
1062
1063static void
1064rtl8169_set_rx_mode(struct net_device *dev)
1065{
1066 struct rtl8169_private *tp = dev->priv;
1067 void *ioaddr = tp->mmio_addr;
1068 unsigned long flags;
1069 u32 mc_filter[2];
1070 int i, rx_mode;
1071 u32 tmp = 0;
1072
1073 if (dev->flags & IFF_PROMISC) {
1074
1075 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
1076 dev->name);
1077 rx_mode =
1078 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
1079 AcceptAllPhys;
1080 mc_filter[1] = mc_filter[0] = 0xffffffff;
1081 } else if ((dev->mc_count > multicast_filter_limit)
1082 || (dev->flags & IFF_ALLMULTI)) {
1083
1084 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
1085 mc_filter[1] = mc_filter[0] = 0xffffffff;
1086 } else {
1087 struct dev_mc_list *mclist;
1088 rx_mode = AcceptBroadcast | AcceptMyPhys;
1089 mc_filter[1] = mc_filter[0] = 0;
1090 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1091 i++, mclist = mclist->next) {
1092 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1093 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1094 rx_mode |= AcceptMulticast;
1095 }
1096 }
1097
1098 spin_lock_irqsave(&tp->lock, flags);
1099
1100 tmp =
1101 rtl8169_rx_config | rx_mode | (RTL_R32(RxConfig) &
1102 rtl_chip_info[tp->chipset].
1103 RxConfigMask);
1104
1105 RTL_W32(RxConfig, tmp);
1106 RTL_W32(MAR0 + 0, mc_filter[0]);
1107 RTL_W32(MAR0 + 4, mc_filter[1]);
1108
1109 spin_unlock_irqrestore(&tp->lock, flags);
1110}
1111
1112struct net_device_stats *
1113rtl8169_get_stats(struct net_device *dev)
1114{
1115 struct rtl8169_private *tp = dev->priv;
1116
1117 return &tp->stats;
1118}
1119
1120static struct pci_driver rtl8169_pci_driver = {
1121 .name = MODULENAME,
1122 .id_table = rtl8169_pci_tbl,
1123 .probe = rtl8169_init_one,
1124 .remove = __devexit_p(rtl8169_remove_one),
1125 .suspend = NULL,
1126 .resume = NULL,
1127};
1128
1129static int __init
1130rtl8169_init_module(void)
1131{
1132 return pci_module_init(&rtl8169_pci_driver);
1133}
1134
1135static void __exit
1136rtl8169_cleanup_module(void)
1137{
1138 pci_unregister_driver(&rtl8169_pci_driver);
1139}
1140
1141module_init(rtl8169_init_module);
1142module_exit(rtl8169_cleanup_module);
1143
