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28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/crc32.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/skbuff.h>
40#include <linux/if_arp.h>
41#include <linux/ioport.h>
42#include <linux/ethtool.h>
43#include <linux/mii.h>
44
45#include <pcmcia/version.h>
46#include <pcmcia/cs_types.h>
47#include <pcmcia/cs.h>
48#include <pcmcia/cistpl.h>
49#include <pcmcia/cisreg.h>
50#include <pcmcia/ciscode.h>
51#include <pcmcia/ds.h>
52
53#include <asm/io.h>
54#include <asm/system.h>
55#include <asm/uaccess.h>
56
57
58#include "ositech.h"
59
60
61
62static char *if_names[] = { "auto", "10baseT", "10base2"};
63
64
65
66MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
67MODULE_LICENSE("GPL");
68
69#define INT_MODULE_PARM(n, v) static int n = v; MODULE_PARM(n, "i")
70
71
72
73
74
75
76
77INT_MODULE_PARM(if_port, 0);
78
79
80INT_MODULE_PARM(irq_mask, 0xdeb8);
81static int irq_list[4] = { -1 };
82MODULE_PARM(irq_list, "1-4i");
83
84#ifdef PCMCIA_DEBUG
85INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
86static const char *version =
87"smc91c92_cs.c 0.09 1996/8/4 Donald Becker, becker@scyld.com.\n";
88#define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
89#else
90#define DEBUG(n, args...)
91#endif
92
93#define DRV_NAME "smc91c92_cs"
94#define DRV_VERSION "1.122"
95
96
97
98
99
100
101#define TX_TIMEOUT ((400*HZ)/1000)
102
103
104#define INTR_WORK 4
105
106
107
108#define MEMORY_WAIT_TIME 8
109
110static dev_info_t dev_info = "smc91c92_cs";
111
112static dev_link_t *dev_list;
113
114struct smc_private {
115 dev_link_t link;
116 spinlock_t lock;
117 u_short manfid;
118 u_short cardid;
119 struct net_device_stats stats;
120 dev_node_t node;
121 struct sk_buff *saved_skb;
122 int packets_waiting;
123 caddr_t base;
124 u_short cfg;
125 struct timer_list media;
126 int watchdog, tx_err;
127 u_short media_status;
128 u_short fast_poll;
129 u_short link_status;
130 struct mii_if_info mii_if;
131 int duplex;
132 int rx_ovrn;
133};
134
135
136#define MEGAHERTZ_ISR 0x0380
137
138
139#define MOT_LAN 0x0000
140#define MOT_UART 0x0020
141#define MOT_EEPROM 0x20
142
143#define MOT_NORMAL \
144(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
145
146
147#define OSITECH_AUI_CTL 0x0c
148#define OSITECH_PWRDOWN 0x0d
149#define OSITECH_RESET 0x0e
150#define OSITECH_ISR 0x0f
151#define OSITECH_AUI_PWR 0x0c
152#define OSITECH_RESET_ISR 0x0e
153
154#define OSI_AUI_PWR 0x40
155#define OSI_LAN_PWRDOWN 0x02
156#define OSI_MODEM_PWRDOWN 0x01
157#define OSI_LAN_RESET 0x02
158#define OSI_MODEM_RESET 0x01
159
160
161#define BANK_SELECT 14
162#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
163
164
165#define TCR 0
166#define TCR_CLEAR 0
167#define TCR_ENABLE 0x0001
168#define TCR_PAD_EN 0x0080
169#define TCR_MONCSN 0x0400
170#define TCR_FDUPLX 0x0800
171#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
172
173#define EPH 2
174#define EPH_TX_SUC 0x0001
175#define EPH_SNGLCOL 0x0002
176#define EPH_MULCOL 0x0004
177#define EPH_LTX_MULT 0x0008
178#define EPH_16COL 0x0010
179#define EPH_SQET 0x0020
180#define EPH_LTX_BRD 0x0040
181#define EPH_TX_DEFR 0x0080
182#define EPH_LAT_COL 0x0200
183#define EPH_LOST_CAR 0x0400
184#define EPH_EXC_DEF 0x0800
185#define EPH_CTR_ROL 0x1000
186#define EPH_RX_OVRN 0x2000
187#define EPH_LINK_OK 0x4000
188#define EPH_TX_UNRN 0x8000
189#define MEMINFO 8
190#define MEMCFG 10
191
192
193#define CONFIG 0
194#define CFG_MII_SELECT 0x8000
195#define CFG_NO_WAIT 0x1000
196#define CFG_FULL_STEP 0x0400
197#define CFG_SET_SQLCH 0x0200
198#define CFG_AUI_SELECT 0x0100
199#define CFG_16BIT 0x0080
200#define CFG_DIS_LINK 0x0040
201#define CFG_STATIC 0x0030
202#define CFG_IRQ_SEL_1 0x0004
203#define CFG_IRQ_SEL_0 0x0002
204#define BASE_ADDR 2
205#define ADDR0 4
206#define GENERAL 10
207#define CONTROL 12
208#define CTL_STORE 0x0001
209#define CTL_RELOAD 0x0002
210#define CTL_EE_SELECT 0x0004
211#define CTL_TE_ENABLE 0x0020
212#define CTL_CR_ENABLE 0x0040
213#define CTL_LE_ENABLE 0x0080
214#define CTL_AUTO_RELEASE 0x0800
215#define CTL_POWERDOWN 0x2000
216
217
218#define MMU_CMD 0
219#define MC_ALLOC 0x20
220#define MC_RESET 0x40
221#define MC_RELEASE 0x80
222#define MC_FREEPKT 0xA0
223#define MC_ENQUEUE 0xC0
224#define PNR_ARR 2
225#define FIFO_PORTS 4
226#define FP_RXEMPTY 0x8000
227#define POINTER 6
228#define PTR_AUTO_INC 0x0040
229#define PTR_READ 0x2000
230#define PTR_AUTOINC 0x4000
231#define PTR_RCV 0x8000
232#define DATA_1 8
233#define INTERRUPT 12
234#define IM_RCV_INT 0x1
235#define IM_TX_INT 0x2
236#define IM_TX_EMPTY_INT 0x4
237#define IM_ALLOC_INT 0x8
238#define IM_RX_OVRN_INT 0x10
239#define IM_EPH_INT 0x20
240
241#define RCR 4
242enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
243 RxEnable = 0x0100, RxStripCRC = 0x0200};
244#define RCR_SOFTRESET 0x8000
245#define RCR_STRIP_CRC 0x200
246#define RCR_ENABLE 0x100
247#define RCR_ALMUL 0x4
248#define RCR_PROMISC 0x2
249
250
251#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
252#define RCR_CLEAR 0x0
253#define COUNTER 6
254
255
256#define MULTICAST0 0
257#define MULTICAST2 2
258#define MULTICAST4 4
259#define MULTICAST6 6
260#define MGMT 8
261#define REVISION 0x0a
262
263
264#define TS_SUCCESS 0x0001
265#define TS_16COL 0x0010
266#define TS_LATCOL 0x0200
267#define TS_LOSTCAR 0x0400
268
269
270#define RS_ALGNERR 0x8000
271#define RS_BADCRC 0x2000
272#define RS_ODDFRAME 0x1000
273#define RS_TOOLONG 0x0800
274#define RS_TOOSHORT 0x0400
275#define RS_MULTICAST 0x0001
276#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
277
278#define set_bits(v, p) outw(inw(p)|(v), (p))
279#define mask_bits(v, p) outw(inw(p)&(v), (p))
280
281
282
283static dev_link_t *smc91c92_attach(void);
284static void smc91c92_detach(dev_link_t *);
285static void smc91c92_config(dev_link_t *link);
286static void smc91c92_release(dev_link_t *link);
287static int smc91c92_event(event_t event, int priority,
288 event_callback_args_t *args);
289
290static int smc_open(struct net_device *dev);
291static int smc_close(struct net_device *dev);
292static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
293static void smc_tx_timeout(struct net_device *dev);
294static int smc_start_xmit(struct sk_buff *skb, struct net_device *dev);
295static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
296static void smc_rx(struct net_device *dev);
297static struct net_device_stats *smc_get_stats(struct net_device *dev);
298static void set_rx_mode(struct net_device *dev);
299static int s9k_config(struct net_device *dev, struct ifmap *map);
300static void smc_set_xcvr(struct net_device *dev, int if_port);
301static void smc_reset(struct net_device *dev);
302static void media_check(u_long arg);
303static void mdio_sync(ioaddr_t addr);
304static int mdio_read(struct net_device *dev, int phy_id, int loc);
305static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
306static int smc_link_ok(struct net_device *dev);
307
308
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313
314
315
316static dev_link_t *smc91c92_attach(void)
317{
318 client_reg_t client_reg;
319 struct smc_private *smc;
320 dev_link_t *link;
321 struct net_device *dev;
322 int i, ret;
323
324 DEBUG(0, "smc91c92_attach()\n");
325
326
327 dev = alloc_etherdev(sizeof(struct smc_private));
328 if (!dev)
329 return NULL;
330 smc = dev->priv;
331 link = &smc->link;
332 link->priv = dev;
333
334 spin_lock_init(&smc->lock);
335 link->io.NumPorts1 = 16;
336 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
337 link->io.IOAddrLines = 4;
338 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
339 link->irq.IRQInfo1 = IRQ_INFO2_VALID|IRQ_LEVEL_ID;
340 if (irq_list[0] == -1)
341 link->irq.IRQInfo2 = irq_mask;
342 else
343 for (i = 0; i < 4; i++)
344 link->irq.IRQInfo2 |= 1 << irq_list[i];
345 link->irq.Handler = &smc_interrupt;
346 link->irq.Instance = dev;
347 link->conf.Attributes = CONF_ENABLE_IRQ;
348 link->conf.Vcc = 50;
349 link->conf.IntType = INT_MEMORY_AND_IO;
350
351
352 SET_MODULE_OWNER(dev);
353 dev->hard_start_xmit = &smc_start_xmit;
354 dev->get_stats = &smc_get_stats;
355 dev->set_config = &s9k_config;
356 dev->set_multicast_list = &set_rx_mode;
357 dev->open = &smc_open;
358 dev->stop = &smc_close;
359 dev->do_ioctl = &smc_ioctl;
360#ifdef HAVE_TX_TIMEOUT
361 dev->tx_timeout = smc_tx_timeout;
362 dev->watchdog_timeo = TX_TIMEOUT;
363#endif
364
365 smc->mii_if.dev = dev;
366 smc->mii_if.mdio_read = mdio_read;
367 smc->mii_if.mdio_write = mdio_write;
368 smc->mii_if.phy_id_mask = 0x1f;
369 smc->mii_if.reg_num_mask = 0x1f;
370
371
372 link->next = dev_list;
373 dev_list = link;
374 client_reg.dev_info = &dev_info;
375 client_reg.Attributes = INFO_IO_CLIENT | INFO_CARD_SHARE;
376 client_reg.EventMask = CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL |
377 CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET |
378 CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME;
379 client_reg.event_handler = &smc91c92_event;
380 client_reg.Version = 0x0210;
381 client_reg.event_callback_args.client_data = link;
382 ret = CardServices(RegisterClient, &link->handle, &client_reg);
383 if (ret != 0) {
384 cs_error(link->handle, RegisterClient, ret);
385 smc91c92_detach(link);
386 return NULL;
387 }
388
389 return link;
390}
391
392
393
394
395
396
397
398
399
400
401static void smc91c92_detach(dev_link_t *link)
402{
403 struct net_device *dev = link->priv;
404 dev_link_t **linkp;
405
406 DEBUG(0, "smc91c92_detach(0x%p)\n", link);
407
408
409 for (linkp = &dev_list; *linkp; linkp = &(*linkp)->next)
410 if (*linkp == link) break;
411 if (*linkp == NULL)
412 return;
413
414 if (link->state & DEV_CONFIG) {
415 smc91c92_release(link);
416 if (link->state & DEV_STALE_CONFIG)
417 return;
418 }
419
420 if (link->handle)
421 CardServices(DeregisterClient, link->handle);
422
423
424 *linkp = link->next;
425 if (link->dev) {
426 unregister_netdev(dev);
427 free_netdev(dev);
428 } else
429 kfree(dev);
430
431}
432
433
434
435static int cvt_ascii_address(struct net_device *dev, char *s)
436{
437 int i, j, da, c;
438
439 if (strlen(s) != 12)
440 return -1;
441 for (i = 0; i < 6; i++) {
442 da = 0;
443 for (j = 0; j < 2; j++) {
444 c = *s++;
445 da <<= 4;
446 da += ((c >= '0') && (c <= '9')) ?
447 (c - '0') : ((c & 0x0f) + 9);
448 }
449 dev->dev_addr[i] = da;
450 }
451 return 0;
452}
453
454
455
456static int get_tuple(int fn, client_handle_t handle, tuple_t *tuple,
457 cisparse_t *parse)
458{
459 int i;
460 i = CardServices(fn, handle, tuple);
461 if (i != CS_SUCCESS) return i;
462 i = CardServices(GetTupleData, handle, tuple);
463 if (i != CS_SUCCESS) return i;
464 return CardServices(ParseTuple, handle, tuple, parse);
465}
466
467#define first_tuple(a, b, c) get_tuple(GetFirstTuple, a, b, c)
468#define next_tuple(a, b, c) get_tuple(GetNextTuple, a, b, c)
469
470
471
472
473
474
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476
477
478
479
480
481static int mhz_3288_power(dev_link_t *link)
482{
483 struct net_device *dev = link->priv;
484 struct smc_private *smc = dev->priv;
485 u_char tmp;
486
487
488 readb(smc->base+MEGAHERTZ_ISR);
489 udelay(5);
490 readb(smc->base+MEGAHERTZ_ISR);
491
492
493 mdelay(200);
494
495
496 tmp = readb(smc->base + link->conf.ConfigBase + CISREG_COR);
497 udelay(5);
498 writeb(tmp, smc->base + link->conf.ConfigBase + CISREG_COR);
499
500 return 0;
501}
502
503static int mhz_mfc_config(dev_link_t *link)
504{
505 struct net_device *dev = link->priv;
506 struct smc_private *smc = dev->priv;
507 tuple_t tuple;
508 cisparse_t parse;
509 u_char buf[255];
510 cistpl_cftable_entry_t *cf = &parse.cftable_entry;
511 win_req_t req;
512 memreq_t mem;
513 int i, k;
514
515 link->conf.Attributes |= CONF_ENABLE_SPKR;
516 link->conf.Status = CCSR_AUDIO_ENA;
517 link->irq.Attributes =
518 IRQ_TYPE_DYNAMIC_SHARING|IRQ_FIRST_SHARED|IRQ_HANDLE_PRESENT;
519 link->io.IOAddrLines = 16;
520 link->io.Attributes2 = IO_DATA_PATH_WIDTH_8;
521 link->io.NumPorts2 = 8;
522
523 tuple.Attributes = tuple.TupleOffset = 0;
524 tuple.TupleData = (cisdata_t *)buf;
525 tuple.TupleDataMax = sizeof(buf);
526 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
527
528 i = first_tuple(link->handle, &tuple, &parse);
529
530
531 while (i == CS_SUCCESS) {
532 link->conf.ConfigIndex = cf->index;
533 link->io.BasePort2 = cf->io.win[0].base;
534 for (k = 0; k < 0x400; k += 0x10) {
535 if (k & 0x80) continue;
536 link->io.BasePort1 = k ^ 0x300;
537 i = CardServices(RequestIO, link->handle, &link->io);
538 if (i == CS_SUCCESS) break;
539 }
540 if (i == CS_SUCCESS) break;
541 i = next_tuple(link->handle, &tuple, &parse);
542 }
543 if (i != CS_SUCCESS)
544 return i;
545 dev->base_addr = link->io.BasePort1;
546
547
548 req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
549 req.Base = req.Size = 0;
550 req.AccessSpeed = 0;
551 link->win = (window_handle_t)link->handle;
552 i = CardServices(RequestWindow, &link->win, &req);
553 if (i != CS_SUCCESS)
554 return i;
555 smc->base = ioremap(req.Base, req.Size);
556 mem.CardOffset = mem.Page = 0;
557 if (smc->manfid == MANFID_MOTOROLA)
558 mem.CardOffset = link->conf.ConfigBase;
559 i = CardServices(MapMemPage, link->win, &mem);
560
561 if ((i == CS_SUCCESS)
562 && (smc->manfid == MANFID_MEGAHERTZ)
563 && (smc->cardid == PRODID_MEGAHERTZ_EM3288))
564 mhz_3288_power(link);
565
566 return i;
567}
568
569static int mhz_setup(dev_link_t *link)
570{
571 client_handle_t handle = link->handle;
572 struct net_device *dev = link->priv;
573 tuple_t tuple;
574 cisparse_t parse;
575 u_char buf[255], *station_addr;
576
577 tuple.Attributes = tuple.TupleOffset = 0;
578 tuple.TupleData = buf;
579 tuple.TupleDataMax = sizeof(buf);
580
581
582
583 tuple.DesiredTuple = CISTPL_VERS_1;
584 if (first_tuple(handle, &tuple, &parse) != CS_SUCCESS)
585 return -1;
586
587 if (next_tuple(handle, &tuple, &parse) != CS_SUCCESS)
588 first_tuple(handle, &tuple, &parse);
589 if (parse.version_1.ns > 3) {
590 station_addr = parse.version_1.str + parse.version_1.ofs[3];
591 if (cvt_ascii_address(dev, station_addr) == 0)
592 return 0;
593 }
594
595
596 tuple.DesiredTuple = 0x81;
597 if (CardServices(GetFirstTuple, handle, &tuple) != CS_SUCCESS)
598 return -1;
599 if (CardServices(GetTupleData, handle, &tuple) != CS_SUCCESS)
600 return -1;
601 buf[12] = '\0';
602 if (cvt_ascii_address(dev, buf) == 0)
603 return 0;
604
605 return -1;
606}
607
608
609
610
611
612
613
614
615
616
617static void mot_config(dev_link_t *link)
618{
619 struct net_device *dev = link->priv;
620 struct smc_private *smc = dev->priv;
621 ioaddr_t ioaddr = dev->base_addr;
622 ioaddr_t iouart = link->io.BasePort2;
623
624
625 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
626 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
627 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
628
629
630 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
631 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
632 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
633
634
635 mdelay(100);
636}
637
638static int mot_setup(dev_link_t *link)
639{
640 struct net_device *dev = link->priv;
641 ioaddr_t ioaddr = dev->base_addr;
642 int i, wait, loop;
643 u_int addr;
644
645
646
647 for (i = 0; i < 3; i++) {
648 SMC_SELECT_BANK(2);
649 outw(MOT_EEPROM + i, ioaddr + POINTER);
650 SMC_SELECT_BANK(1);
651 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
652
653 for (loop = wait = 0; loop < 200; loop++) {
654 udelay(10);
655 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
656 if (wait == 0) break;
657 }
658
659 if (wait)
660 return -1;
661
662 addr = inw(ioaddr + GENERAL);
663 dev->dev_addr[2*i] = addr & 0xff;
664 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
665 }
666
667 return 0;
668}
669
670
671
672static int smc_config(dev_link_t *link)
673{
674 struct net_device *dev = link->priv;
675 tuple_t tuple;
676 cisparse_t parse;
677 u_char buf[255];
678 cistpl_cftable_entry_t *cf = &parse.cftable_entry;
679 int i;
680
681 tuple.Attributes = tuple.TupleOffset = 0;
682 tuple.TupleData = (cisdata_t *)buf;
683 tuple.TupleDataMax = sizeof(buf);
684 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
685
686 link->io.NumPorts1 = 16;
687 i = first_tuple(link->handle, &tuple, &parse);
688 while (i != CS_NO_MORE_ITEMS) {
689 if (i == CS_SUCCESS) {
690 link->conf.ConfigIndex = cf->index;
691 link->io.BasePort1 = cf->io.win[0].base;
692 link->io.IOAddrLines = cf->io.flags & CISTPL_IO_LINES_MASK;
693 i = CardServices(RequestIO, link->handle, &link->io);
694 if (i == CS_SUCCESS) break;
695 }
696 i = next_tuple(link->handle, &tuple, &parse);
697 }
698 if (i == CS_SUCCESS)
699 dev->base_addr = link->io.BasePort1;
700 return i;
701}
702
703static int smc_setup(dev_link_t *link)
704{
705 client_handle_t handle = link->handle;
706 struct net_device *dev = link->priv;
707 tuple_t tuple;
708 cisparse_t parse;
709 cistpl_lan_node_id_t *node_id;
710 u_char buf[255], *station_addr;
711 int i;
712
713 tuple.Attributes = tuple.TupleOffset = 0;
714 tuple.TupleData = buf;
715 tuple.TupleDataMax = sizeof(buf);
716
717
718 tuple.DesiredTuple = CISTPL_FUNCE;
719 i = first_tuple(handle, &tuple, &parse);
720 while (i == CS_SUCCESS) {
721 if (parse.funce.type == CISTPL_FUNCE_LAN_NODE_ID)
722 break;
723 i = next_tuple(handle, &tuple, &parse);
724 }
725 if (i == CS_SUCCESS) {
726 node_id = (cistpl_lan_node_id_t *)parse.funce.data;
727 if (node_id->nb == 6) {
728 for (i = 0; i < 6; i++)
729 dev->dev_addr[i] = node_id->id[i];
730 return 0;
731 }
732 }
733
734 tuple.DesiredTuple = CISTPL_VERS_1;
735 if (first_tuple(handle, &tuple, &parse) != CS_SUCCESS)
736 return -1;
737 station_addr = parse.version_1.str + parse.version_1.ofs[2];
738 if (cvt_ascii_address(dev, station_addr) == 0)
739 return 0;
740
741 return -1;
742}
743
744
745
746static int osi_config(dev_link_t *link)
747{
748 struct net_device *dev = link->priv;
749 static ioaddr_t com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
750 int i, j;
751
752 link->conf.Attributes |= CONF_ENABLE_SPKR;
753 link->conf.Status = CCSR_AUDIO_ENA;
754 link->irq.Attributes =
755 IRQ_TYPE_DYNAMIC_SHARING|IRQ_FIRST_SHARED|IRQ_HANDLE_PRESENT;
756 link->io.NumPorts1 = 64;
757 link->io.Attributes2 = IO_DATA_PATH_WIDTH_8;
758 link->io.NumPorts2 = 8;
759 link->io.IOAddrLines = 16;
760
761
762 link->conf.ConfigIndex = 0x23;
763
764 for (i = j = 0; j < 4; j++) {
765 link->io.BasePort2 = com[j];
766 i = CardServices(RequestIO, link->handle, &link->io);
767 if (i == CS_SUCCESS) break;
768 }
769 if (i != CS_SUCCESS) {
770
771 link->conf.ConfigIndex = 0x03;
772 link->io.NumPorts2 = 0;
773 i = CardServices(RequestIO, link->handle, &link->io);
774 }
775 dev->base_addr = link->io.BasePort1 + 0x10;
776 return i;
777}
778
779static int osi_setup(dev_link_t *link, u_short manfid, u_short cardid)
780{
781 client_handle_t handle = link->handle;
782 struct net_device *dev = link->priv;
783 tuple_t tuple;
784 u_char buf[255];
785 int i;
786
787 tuple.Attributes = TUPLE_RETURN_COMMON;
788 tuple.TupleData = buf;
789 tuple.TupleDataMax = sizeof(buf);
790 tuple.TupleOffset = 0;
791
792
793 tuple.DesiredTuple = 0x90;
794 i = CardServices(GetFirstTuple, handle, &tuple);
795 while (i == CS_SUCCESS) {
796 i = CardServices(GetTupleData, handle, &tuple);
797 if ((i != CS_SUCCESS) || (buf[0] == 0x04))
798 break;
799 i = CardServices(GetNextTuple, handle, &tuple);
800 }
801 if (i != CS_SUCCESS)
802 return -1;
803 for (i = 0; i < 6; i++)
804 dev->dev_addr[i] = buf[i+2];
805
806 if (((manfid == MANFID_OSITECH) &&
807 (cardid == PRODID_OSITECH_SEVEN)) ||
808 ((manfid == MANFID_PSION) &&
809 (cardid == PRODID_PSION_NET100))) {
810
811 for (i = 0; i < sizeof(__Xilinx7OD); i++) {
812 outb(__Xilinx7OD[i], link->io.BasePort1+2);
813 udelay(50);
814 }
815 } else if (manfid == MANFID_OSITECH) {
816
817 set_bits(0x300, link->io.BasePort1 + OSITECH_AUI_PWR);
818
819 set_bits(0x300, link->io.BasePort1 + OSITECH_RESET_ISR);
820 DEBUG(2, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
821 inw(link->io.BasePort1 + OSITECH_AUI_PWR),
822 inw(link->io.BasePort1 + OSITECH_RESET_ISR));
823 }
824
825 return 0;
826}
827
828
829
830
831
832
833
834
835static int check_sig(dev_link_t *link)
836{
837 struct net_device *dev = link->priv;
838 ioaddr_t ioaddr = dev->base_addr;
839 int width;
840 u_short s;
841
842 SMC_SELECT_BANK(1);
843 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
844
845 outw(0, ioaddr + CONTROL);
846 mdelay(55);
847 }
848
849
850 width = (link->io.Attributes1 == IO_DATA_PATH_WIDTH_AUTO);
851 s = inb(ioaddr + CONFIG);
852 if (width)
853 s |= CFG_16BIT;
854 else
855 s &= ~CFG_16BIT;
856 outb(s, ioaddr + CONFIG);
857
858
859 s = inw(ioaddr + BASE_ADDR);
860 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
861 ((s >> 8) != (s & 0xff))) {
862 SMC_SELECT_BANK(3);
863 s = inw(ioaddr + REVISION);
864 return (s & 0xff);
865 }
866
867 if (width) {
868 event_callback_args_t args;
869 printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n");
870 args.client_data = link;
871 smc91c92_event(CS_EVENT_RESET_PHYSICAL, 0, &args);
872 CardServices(ReleaseIO, link->handle, &link->io);
873 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
874 CardServices(RequestIO, link->handle, &link->io);
875 smc91c92_event(CS_EVENT_CARD_RESET, 0, &args);
876 return check_sig(link);
877 }
878 return -ENODEV;
879}
880
881
882
883
884
885
886
887
888
889#define CS_EXIT_TEST(ret, svc, label) \
890if (ret != CS_SUCCESS) { cs_error(link->handle, svc, ret); goto label; }
891
892static void smc91c92_config(dev_link_t *link)
893{
894 client_handle_t handle = link->handle;
895 struct net_device *dev = link->priv;
896 struct smc_private *smc = dev->priv;
897 tuple_t tuple;
898 cisparse_t parse;
899 u_short buf[32];
900 char *name;
901 int i, j, rev;
902 ioaddr_t ioaddr;
903
904 DEBUG(0, "smc91c92_config(0x%p)\n", link);
905
906 tuple.Attributes = tuple.TupleOffset = 0;
907 tuple.TupleData = (cisdata_t *)buf;
908 tuple.TupleDataMax = sizeof(buf);
909
910 tuple.DesiredTuple = CISTPL_CONFIG;
911 i = first_tuple(handle, &tuple, &parse);
912 CS_EXIT_TEST(i, ParseTuple, config_failed);
913 link->conf.ConfigBase = parse.config.base;
914 link->conf.Present = parse.config.rmask[0];
915
916 tuple.DesiredTuple = CISTPL_MANFID;
917 tuple.Attributes = TUPLE_RETURN_COMMON;
918 if (first_tuple(handle, &tuple, &parse) == CS_SUCCESS) {
919 smc->manfid = parse.manfid.manf;
920 smc->cardid = parse.manfid.card;
921 }
922
923
924 link->state |= DEV_CONFIG;
925
926 if ((smc->manfid == MANFID_OSITECH) &&
927 (smc->cardid != PRODID_OSITECH_SEVEN)) {
928 i = osi_config(link);
929 } else if ((smc->manfid == MANFID_MOTOROLA) ||
930 ((smc->manfid == MANFID_MEGAHERTZ) &&
931 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
932 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
933 i = mhz_mfc_config(link);
934 } else {
935 i = smc_config(link);
936 }
937 CS_EXIT_TEST(i, RequestIO, config_failed);
938
939 i = CardServices(RequestIRQ, link->handle, &link->irq);
940 CS_EXIT_TEST(i, RequestIRQ, config_failed);
941 i = CardServices(RequestConfiguration, link->handle, &link->conf);
942 CS_EXIT_TEST(i, RequestConfiguration, config_failed);
943
944 if (smc->manfid == MANFID_MOTOROLA)
945 mot_config(link);
946
947 dev->irq = link->irq.AssignedIRQ;
948
949 if ((if_port >= 0) && (if_port <= 2))
950 dev->if_port = if_port;
951 else
952 printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n");
953
954 if (register_netdev(dev) != 0) {
955 printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n");
956 goto config_undo;
957 }
958
959 switch (smc->manfid) {
960 case MANFID_OSITECH:
961 case MANFID_PSION:
962 i = osi_setup(link, smc->manfid, smc->cardid); break;
963 case MANFID_SMC:
964 case MANFID_NEW_MEDIA:
965 i = smc_setup(link); break;
966 case 0x128:
967 case MANFID_MEGAHERTZ:
968 i = mhz_setup(link); break;
969 case MANFID_MOTOROLA:
970 default:
971 i = mot_setup(link); break;
972 }
973
974 if (i != 0) {
975 printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n");
976 goto config_undo;
977 }
978
979 strcpy(smc->node.dev_name, dev->name);
980 link->dev = &smc->node;
981 smc->duplex = 0;
982 smc->rx_ovrn = 0;
983
984 rev = check_sig(link);
985 name = "???";
986 if (rev > 0)
987 switch (rev >> 4) {
988 case 3: name = "92"; break;
989 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
990 case 5: name = "95"; break;
991 case 7: name = "100"; break;
992 case 8: name = "100-FD"; break;
993 case 9: name = "110"; break;
994 }
995 printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, "
996 "hw_addr ", dev->name, name, (rev & 0x0f), dev->base_addr,
997 dev->irq);
998 for (i = 0; i < 6; i++)
999 printk("%02X%s", dev->dev_addr[i], ((i<5) ? ":" : "\n"));
1000
1001 ioaddr = dev->base_addr;
1002 if (rev > 0) {
1003 u_long mir, mcr;
1004 SMC_SELECT_BANK(0);
1005 mir = inw(ioaddr + MEMINFO) & 0xff;
1006 if (mir == 0xff) mir++;
1007
1008 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
1009 mir *= 128 * (1<<((mcr >> 9) & 7));
1010 if (mir & 0x3ff)
1011 printk(KERN_INFO " %lu byte", mir);
1012 else
1013 printk(KERN_INFO " %lu kb", mir>>10);
1014 SMC_SELECT_BANK(1);
1015 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
1016 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
1017 if (smc->manfid == MANFID_OSITECH)
1018 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
1019 if ((rev >> 4) >= 7)
1020 smc->cfg |= CFG_MII_SELECT;
1021 printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ?
1022 "MII" : if_names[dev->if_port]);
1023 }
1024
1025 if (smc->cfg & CFG_MII_SELECT) {
1026 SMC_SELECT_BANK(3);
1027
1028 for (i = 0; i < 32; i++) {
1029 j = mdio_read(dev, i, 1);
1030 if ((j != 0) && (j != 0xffff)) break;
1031 }
1032 smc->mii_if.phy_id = (i < 32) ? i : -1;
1033 if (i < 32) {
1034 DEBUG(0, " MII transceiver at index %d, status %x.\n", i, j);
1035 } else {
1036 printk(KERN_NOTICE " No MII transceivers found!\n");
1037 }
1038
1039 SMC_SELECT_BANK(0);
1040 }
1041
1042 link->state &= ~DEV_CONFIG_PENDING;
1043 return;
1044
1045config_undo:
1046 unregister_netdev(dev);
1047config_failed:
1048 smc91c92_release(link);
1049 link->state &= ~DEV_CONFIG_PENDING;
1050
1051}
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061static void smc91c92_release(dev_link_t *link)
1062{
1063
1064 DEBUG(0, "smc91c92_release(0x%p)\n", link);
1065
1066 if (link->open) {
1067 DEBUG(1, "smc91c92_cs: release postponed, '%s' still open\n",
1068 link->dev->dev_name);
1069 link->state |= DEV_STALE_CONFIG;
1070 return;
1071 }
1072
1073 CardServices(ReleaseConfiguration, link->handle);
1074 CardServices(ReleaseIO, link->handle, &link->io);
1075 CardServices(ReleaseIRQ, link->handle, &link->irq);
1076 if (link->win) {
1077 struct net_device *dev = link->priv;
1078 struct smc_private *smc = dev->priv;
1079 iounmap(smc->base);
1080 CardServices(ReleaseWindow, link->win);
1081 }
1082
1083 link->state &= ~DEV_CONFIG;
1084
1085 if (link->state & DEV_STALE_CONFIG)
1086 smc91c92_detach(link);
1087}
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098static int smc91c92_event(event_t event, int priority,
1099 event_callback_args_t *args)
1100{
1101 dev_link_t *link = args->client_data;
1102 struct net_device *dev = link->priv;
1103 struct smc_private *smc = dev->priv;
1104 int i;
1105
1106 DEBUG(1, "smc91c92_event(0x%06x)\n", event);
1107
1108 switch (event) {
1109 case CS_EVENT_CARD_REMOVAL:
1110 link->state &= ~DEV_PRESENT;
1111 if (link->state & DEV_CONFIG) {
1112 netif_device_detach(dev);
1113 smc91c92_release(link);
1114 }
1115 break;
1116 case CS_EVENT_CARD_INSERTION:
1117 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
1118 smc91c92_config(link);
1119 break;
1120 case CS_EVENT_PM_SUSPEND:
1121 link->state |= DEV_SUSPEND;
1122
1123 case CS_EVENT_RESET_PHYSICAL:
1124 if (link->state & DEV_CONFIG) {
1125 if (link->open)
1126 netif_device_detach(dev);
1127 CardServices(ReleaseConfiguration, link->handle);
1128 }
1129 break;
1130 case CS_EVENT_PM_RESUME:
1131 link->state &= ~DEV_SUSPEND;
1132
1133 case CS_EVENT_CARD_RESET:
1134 if (link->state & DEV_CONFIG) {
1135 if ((smc->manfid == MANFID_MEGAHERTZ) &&
1136 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
1137 mhz_3288_power(link);
1138 CardServices(RequestConfiguration, link->handle, &link->conf);
1139 if (smc->manfid == MANFID_MOTOROLA)
1140 mot_config(link);
1141 if ((smc->manfid == MANFID_OSITECH) &&
1142 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1143
1144 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
1145 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
1146 }
1147 if (((smc->manfid == MANFID_OSITECH) &&
1148 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
1149 ((smc->manfid == MANFID_PSION) &&
1150 (smc->cardid == PRODID_PSION_NET100))) {
1151
1152 for (i = 0; i < sizeof(__Xilinx7OD); i++) {
1153 outb(__Xilinx7OD[i], link->io.BasePort1+2);
1154 udelay(50);
1155 }
1156 }
1157 if (link->open) {
1158 smc_reset(dev);
1159 netif_device_attach(dev);
1160 }
1161 }
1162 break;
1163 }
1164 return 0;
1165}
1166
1167
1168
1169
1170
1171
1172#define MDIO_SHIFT_CLK 0x04
1173#define MDIO_DATA_OUT 0x01
1174#define MDIO_DIR_WRITE 0x08
1175#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
1176#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
1177#define MDIO_DATA_READ 0x02
1178
1179static void mdio_sync(ioaddr_t addr)
1180{
1181 int bits;
1182 for (bits = 0; bits < 32; bits++) {
1183 outb(MDIO_DATA_WRITE1, addr);
1184 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
1185 }
1186}
1187
1188static int mdio_read(struct net_device *dev, int phy_id, int loc)
1189{
1190 ioaddr_t addr = dev->base_addr + MGMT;
1191 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
1192 int i, retval = 0;
1193
1194 mdio_sync(addr);
1195 for (i = 13; i >= 0; i--) {
1196 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1197 outb(dat, addr);
1198 outb(dat | MDIO_SHIFT_CLK, addr);
1199 }
1200 for (i = 19; i > 0; i--) {
1201 outb(0, addr);
1202 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1203 outb(MDIO_SHIFT_CLK, addr);
1204 }
1205 return (retval>>1) & 0xffff;
1206}
1207
1208static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1209{
1210 ioaddr_t addr = dev->base_addr + MGMT;
1211 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1212 int i;
1213
1214 mdio_sync(addr);
1215 for (i = 31; i >= 0; i--) {
1216 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1217 outb(dat, addr);
1218 outb(dat | MDIO_SHIFT_CLK, addr);
1219 }
1220 for (i = 1; i >= 0; i--) {
1221 outb(0, addr);
1222 outb(MDIO_SHIFT_CLK, addr);
1223 }
1224}
1225
1226
1227
1228
1229
1230
1231
1232
1233#ifdef PCMCIA_DEBUG
1234static void smc_dump(struct net_device *dev)
1235{
1236 ioaddr_t ioaddr = dev->base_addr;
1237 u_short i, w, save;
1238 save = inw(ioaddr + BANK_SELECT);
1239 for (w = 0; w < 4; w++) {
1240 SMC_SELECT_BANK(w);
1241 printk(KERN_DEBUG "bank %d: ", w);
1242 for (i = 0; i < 14; i += 2)
1243 printk(" %04x", inw(ioaddr + i));
1244 printk("\n");
1245 }
1246 outw(save, ioaddr + BANK_SELECT);
1247}
1248#endif
1249
1250static int smc_open(struct net_device *dev)
1251{
1252 struct smc_private *smc = dev->priv;
1253 dev_link_t *link = &smc->link;
1254
1255#ifdef PCMCIA_DEBUG
1256 DEBUG(0, "%s: smc_open(%p), ID/Window %4.4x.\n",
1257 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
1258 if (pc_debug > 1) smc_dump(dev);
1259#endif
1260
1261
1262 if (!DEV_OK(link))
1263 return -ENODEV;
1264
1265 if (check_sig(link) < 0) {
1266 printk("smc91c92_cs: Yikes! Bad chip signature!\n");
1267 return -ENODEV;
1268 }
1269 link->open++;
1270
1271 netif_start_queue(dev);
1272 smc->saved_skb = 0;
1273 smc->packets_waiting = 0;
1274
1275 smc_reset(dev);
1276 init_timer(&smc->media);
1277 smc->media.function = &media_check;
1278 smc->media.data = (u_long) dev;
1279 smc->media.expires = jiffies + HZ;
1280 add_timer(&smc->media);
1281
1282 return 0;
1283}
1284
1285
1286
1287static int smc_close(struct net_device *dev)
1288{
1289 struct smc_private *smc = dev->priv;
1290 dev_link_t *link = &smc->link;
1291 ioaddr_t ioaddr = dev->base_addr;
1292
1293 DEBUG(0, "%s: smc_close(), status %4.4x.\n",
1294 dev->name, inw(ioaddr + BANK_SELECT));
1295
1296 netif_stop_queue(dev);
1297
1298
1299
1300 SMC_SELECT_BANK(2);
1301 outw(0, ioaddr + INTERRUPT);
1302 SMC_SELECT_BANK(0);
1303 mask_bits(0xff00, ioaddr + RCR);
1304 mask_bits(0xff00, ioaddr + TCR);
1305
1306
1307 SMC_SELECT_BANK(1);
1308 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1309
1310 link->open--;
1311 del_timer_sync(&smc->media);
1312 if (link->state & DEV_STALE_CONFIG)
1313 smc91c92_release(link);
1314
1315 return 0;
1316}
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326static void smc_hardware_send_packet(struct net_device * dev)
1327{
1328 struct smc_private *smc = dev->priv;
1329 struct sk_buff *skb = smc->saved_skb;
1330 ioaddr_t ioaddr = dev->base_addr;
1331 u_char packet_no;
1332
1333 if (!skb) {
1334 printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name);
1335 return;
1336 }
1337
1338
1339 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1340 if (packet_no & 0x80) {
1341
1342 printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation"
1343 " failed, status %#2.2x.\n", dev->name, packet_no);
1344 dev_kfree_skb_irq(skb);
1345 smc->saved_skb = NULL;
1346 netif_start_queue(dev);
1347 return;
1348 }
1349
1350 smc->stats.tx_bytes += skb->len;
1351
1352 outw(packet_no, ioaddr + PNR_ARR);
1353
1354 outw(PTR_AUTOINC , ioaddr + POINTER);
1355
1356
1357
1358 {
1359 u_char *buf = skb->data;
1360 u_int length = skb->len;
1361
1362 DEBUG(2, "%s: Trying to xmit packet of length %d.\n",
1363 dev->name, length);
1364
1365
1366 outw(0, ioaddr + DATA_1);
1367 outw(length + 6, ioaddr + DATA_1);
1368 outsw(ioaddr + DATA_1, buf, length >> 1);
1369
1370
1371 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1372 }
1373
1374
1375 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1376 (inw(ioaddr + INTERRUPT) & 0xff00),
1377 ioaddr + INTERRUPT);
1378
1379
1380 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1381
1382 smc->saved_skb = NULL;
1383 dev_kfree_skb_irq(skb);
1384 dev->trans_start = jiffies;
1385 netif_start_queue(dev);
1386 return;
1387}
1388
1389
1390
1391static void smc_tx_timeout(struct net_device *dev)
1392{
1393 struct smc_private *smc = dev->priv;
1394 ioaddr_t ioaddr = dev->base_addr;
1395
1396 printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, "
1397 "Tx_status %2.2x status %4.4x.\n",
1398 dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2));
1399 smc->stats.tx_errors++;
1400 smc_reset(dev);
1401 dev->trans_start = jiffies;
1402 smc->saved_skb = NULL;
1403 netif_wake_queue(dev);
1404}
1405
1406static int smc_start_xmit(struct sk_buff *skb, struct net_device *dev)
1407{
1408 struct smc_private *smc = dev->priv;
1409 ioaddr_t ioaddr = dev->base_addr;
1410 u_short num_pages;
1411 short time_out, ir;
1412
1413 netif_stop_queue(dev);
1414
1415 DEBUG(2, "%s: smc_start_xmit(length = %d) called,"
1416 " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2));
1417
1418 if (smc->saved_skb) {
1419
1420 smc->stats.tx_aborted_errors++;
1421 printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n",
1422 dev->name);
1423 return 1;
1424 }
1425 smc->saved_skb = skb;
1426
1427 num_pages = skb->len >> 8;
1428
1429 if (num_pages > 7) {
1430 printk(KERN_ERR "%s: Far too big packet error.\n", dev->name);
1431 dev_kfree_skb (skb);
1432 smc->saved_skb = NULL;
1433 smc->stats.tx_dropped++;
1434 return 0;
1435 }
1436
1437 smc->packets_waiting++;
1438
1439 SMC_SELECT_BANK(2);
1440
1441
1442 if (smc->rx_ovrn) {
1443 outw(MC_RESET, ioaddr + MMU_CMD);
1444 smc->rx_ovrn = 0;
1445 }
1446
1447
1448 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1449 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1450 ir = inw(ioaddr+INTERRUPT);
1451 if (ir & IM_ALLOC_INT) {
1452
1453 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1454 smc_hardware_send_packet(dev);
1455 return 0;
1456 }
1457 }
1458
1459
1460 DEBUG(2, "%s: memory allocation deferred.\n", dev->name);
1461 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
1462
1463 return 0;
1464}
1465
1466
1467
1468
1469
1470
1471
1472static void smc_tx_err(struct net_device * dev)
1473{
1474 struct smc_private *smc = (struct smc_private *)dev->priv;
1475 ioaddr_t ioaddr = dev->base_addr;
1476 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1477 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1478 int tx_status;
1479
1480
1481 outw(packet_no, ioaddr + PNR_ARR);
1482
1483
1484 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1485
1486 tx_status = inw(ioaddr + DATA_1);
1487
1488 smc->stats.tx_errors++;
1489 if (tx_status & TS_LOSTCAR) smc->stats.tx_carrier_errors++;
1490 if (tx_status & TS_LATCOL) smc->stats.tx_window_errors++;
1491 if (tx_status & TS_16COL) {
1492 smc->stats.tx_aborted_errors++;
1493 smc->tx_err++;
1494 }
1495
1496 if (tx_status & TS_SUCCESS) {
1497 printk(KERN_NOTICE "%s: Successful packet caused error "
1498 "interrupt?\n", dev->name);
1499 }
1500
1501 SMC_SELECT_BANK(0);
1502 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1503 SMC_SELECT_BANK(2);
1504
1505 outw(MC_FREEPKT, ioaddr + MMU_CMD);
1506
1507
1508 smc->packets_waiting--;
1509
1510 outw(saved_packet, ioaddr + PNR_ARR);
1511 return;
1512}
1513
1514
1515
1516static void smc_eph_irq(struct net_device *dev)
1517{
1518 struct smc_private *smc = dev->priv;
1519 ioaddr_t ioaddr = dev->base_addr;
1520 u_short card_stats, ephs;
1521
1522 SMC_SELECT_BANK(0);
1523 ephs = inw(ioaddr + EPH);
1524 DEBUG(2, "%s: Ethernet protocol handler interrupt, status"
1525 " %4.4x.\n", dev->name, ephs);
1526
1527 card_stats = inw(ioaddr + COUNTER);
1528
1529 smc->stats.collisions += card_stats & 0xF;
1530 card_stats >>= 4;
1531
1532 smc->stats.collisions += card_stats & 0xF;
1533#if 0
1534 card_stats >>= 4;
1535 card_stats >>= 4;
1536#endif
1537
1538 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1539
1540
1541 SMC_SELECT_BANK(1);
1542 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1543 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1544 ioaddr + CONTROL);
1545 SMC_SELECT_BANK(2);
1546}
1547
1548
1549
1550static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1551{
1552 struct net_device *dev = dev_id;
1553 struct smc_private *smc = dev->priv;
1554 ioaddr_t ioaddr;
1555 u_short saved_bank, saved_pointer, mask, status;
1556 unsigned int handled = 1;
1557 char bogus_cnt = INTR_WORK;
1558
1559 if (!netif_device_present(dev))
1560 return IRQ_NONE;
1561
1562 ioaddr = dev->base_addr;
1563
1564 DEBUG(3, "%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1565 irq, ioaddr);
1566
1567 smc->watchdog = 0;
1568 saved_bank = inw(ioaddr + BANK_SELECT);
1569 if ((saved_bank & 0xff00) != 0x3300) {
1570
1571
1572 DEBUG(1, "%s: SMC91c92 interrupt %d for non-existent"
1573 "/ejected device.\n", dev->name, irq);
1574 handled = 0;
1575 goto irq_done;
1576 }
1577
1578 SMC_SELECT_BANK(2);
1579 saved_pointer = inw(ioaddr + POINTER);
1580 mask = inw(ioaddr + INTERRUPT) >> 8;
1581
1582 outw(0, ioaddr + INTERRUPT);
1583
1584 do {
1585 status = inw(ioaddr + INTERRUPT) & 0xff;
1586 DEBUG(3, "%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1587 status, mask);
1588 if ((status & mask) == 0) {
1589 if (bogus_cnt == INTR_WORK)
1590 handled = 0;
1591 break;
1592 }
1593 if (status & IM_RCV_INT) {
1594
1595 smc_rx(dev);
1596 }
1597 if (status & IM_TX_INT) {
1598 smc_tx_err(dev);
1599 outw(IM_TX_INT, ioaddr + INTERRUPT);
1600 }
1601 status &= mask;
1602 if (status & IM_TX_EMPTY_INT) {
1603 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1604 mask &= ~IM_TX_EMPTY_INT;
1605 smc->stats.tx_packets += smc->packets_waiting;
1606 smc->packets_waiting = 0;
1607 }
1608 if (status & IM_ALLOC_INT) {
1609
1610 mask &= ~IM_ALLOC_INT;
1611
1612 smc_hardware_send_packet(dev);
1613
1614
1615 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1616
1617
1618 netif_wake_queue(dev);
1619 }
1620 if (status & IM_RX_OVRN_INT) {
1621 smc->stats.rx_errors++;
1622 smc->stats.rx_fifo_errors++;
1623 if (smc->duplex)
1624 smc->rx_ovrn = 1;
1625 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1626 }
1627 if (status & IM_EPH_INT)
1628 smc_eph_irq(dev);
1629 } while (--bogus_cnt);
1630
1631 DEBUG(3, " Restoring saved registers mask %2.2x bank %4.4x"
1632 " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1633
1634
1635 outw((mask<<8), ioaddr + INTERRUPT);
1636 outw(saved_pointer, ioaddr + POINTER);
1637 SMC_SELECT_BANK(saved_bank);
1638
1639 DEBUG(3, "%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1640
1641irq_done:
1642
1643 if ((smc->manfid == MANFID_OSITECH) &&
1644 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1645
1646 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1647 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1648 }
1649 if (smc->manfid == MANFID_MOTOROLA) {
1650 u_char cor;
1651 cor = readb(smc->base + MOT_UART + CISREG_COR);
1652 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1653 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1654 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1655 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1656 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1657 }
1658#ifdef DOES_NOT_WORK
1659 if (smc->base != NULL) {
1660 readb(smc->base+MEGAHERTZ_ISR);
1661 readb(smc->base+MEGAHERTZ_ISR);
1662 }
1663#endif
1664 return IRQ_RETVAL(handled);
1665}
1666
1667
1668
1669static void smc_rx(struct net_device *dev)
1670{
1671 struct smc_private *smc = (struct smc_private *)dev->priv;
1672 ioaddr_t ioaddr = dev->base_addr;
1673 int rx_status;
1674 int packet_length;
1675
1676
1677
1678
1679 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1680 printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n",
1681 dev->name);
1682 return;
1683 }
1684
1685
1686 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1687 rx_status = inw(ioaddr + DATA_1);
1688 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1689
1690 DEBUG(2, "%s: Receive status %4.4x length %d.\n",
1691 dev->name, rx_status, packet_length);
1692
1693 if (!(rx_status & RS_ERRORS)) {
1694
1695 struct sk_buff *skb;
1696
1697
1698 skb = dev_alloc_skb(packet_length+2);
1699
1700 if (skb == NULL) {
1701 DEBUG(1, "%s: Low memory, packet dropped.\n", dev->name);
1702 smc->stats.rx_dropped++;
1703 outw(MC_RELEASE, ioaddr + MMU_CMD);
1704 return;
1705 }
1706
1707 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1708 skb_reserve(skb, 2);
1709 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1710 (packet_length+1)>>1);
1711 skb->protocol = eth_type_trans(skb, dev);
1712
1713 skb->dev = dev;
1714 netif_rx(skb);
1715 dev->last_rx = jiffies;
1716 smc->stats.rx_packets++;
1717 smc->stats.rx_bytes += packet_length;
1718 if (rx_status & RS_MULTICAST)
1719 smc->stats.multicast++;
1720 } else {
1721
1722 smc->stats.rx_errors++;
1723
1724 if (rx_status & RS_ALGNERR) smc->stats.rx_frame_errors++;
1725 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
1726 smc->stats.rx_length_errors++;
1727 if (rx_status & RS_BADCRC) smc->stats.rx_crc_errors++;
1728 }
1729
1730 outw(MC_RELEASE, ioaddr + MMU_CMD);
1731
1732 return;
1733}
1734
1735
1736
1737static struct net_device_stats *smc_get_stats(struct net_device *dev)
1738{
1739 struct smc_private *smc = (struct smc_private *)dev->priv;
1740
1741 return &smc->stats;
1742}
1743
1744
1745
1746
1747
1748
1749
1750static void fill_multicast_tbl(int count, struct dev_mc_list *addrs,
1751 u_char *multicast_table)
1752{
1753 struct dev_mc_list *mc_addr;
1754
1755 for (mc_addr = addrs; mc_addr && --count > 0; mc_addr = mc_addr->next) {
1756 u_int position = ether_crc(6, mc_addr->dmi_addr);
1757#ifndef final_version
1758 if ((mc_addr->dmi_addr[0] & 1) == 0)
1759 continue;
1760#endif
1761 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1762 }
1763}
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776static void set_rx_mode(struct net_device *dev)
1777{
1778 ioaddr_t ioaddr = dev->base_addr;
1779 struct smc_private *smc = dev->priv;
1780 u_int multicast_table[ 2 ] = { 0, };
1781 unsigned long flags;
1782 u_short rx_cfg_setting;
1783
1784 if (dev->flags & IFF_PROMISC) {
1785 printk(KERN_NOTICE "%s: setting Rx mode to promiscuous.\n", dev->name);
1786 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1787 } else if (dev->flags & IFF_ALLMULTI)
1788 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1789 else {
1790 if (dev->mc_count) {
1791 fill_multicast_tbl(dev->mc_count, dev->mc_list,
1792 (u_char *)multicast_table);
1793 }
1794 rx_cfg_setting = RxStripCRC | RxEnable;
1795 }
1796
1797
1798 spin_lock_irqsave(&smc->lock, flags);
1799 SMC_SELECT_BANK(3);
1800 outl(multicast_table[0], ioaddr + MULTICAST0);
1801 outl(multicast_table[1], ioaddr + MULTICAST4);
1802 SMC_SELECT_BANK(0);
1803 outw(rx_cfg_setting, ioaddr + RCR);
1804 SMC_SELECT_BANK(2);
1805 spin_unlock_irqrestore(&smc->lock, flags);
1806
1807 return;
1808}
1809
1810
1811
1812
1813
1814
1815
1816static int s9k_config(struct net_device *dev, struct ifmap *map)
1817{
1818 struct smc_private *smc = dev->priv;
1819 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1820 if (smc->cfg & CFG_MII_SELECT)
1821 return -EOPNOTSUPP;
1822 else if (map->port > 2)
1823 return -EINVAL;
1824 dev->if_port = map->port;
1825 printk(KERN_INFO "%s: switched to %s port\n",
1826 dev->name, if_names[dev->if_port]);
1827 smc_reset(dev);
1828 }
1829 return 0;
1830}
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842static void smc_set_xcvr(struct net_device *dev, int if_port)
1843{
1844 struct smc_private *smc = (struct smc_private *)dev->priv;
1845 ioaddr_t ioaddr = dev->base_addr;
1846 u_short saved_bank;
1847
1848 saved_bank = inw(ioaddr + BANK_SELECT);
1849 SMC_SELECT_BANK(1);
1850 if (if_port == 2) {
1851 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1852 if ((smc->manfid == MANFID_OSITECH) &&
1853 (smc->cardid != PRODID_OSITECH_SEVEN))
1854 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1855 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1856 } else {
1857 outw(smc->cfg, ioaddr + CONFIG);
1858 if ((smc->manfid == MANFID_OSITECH) &&
1859 (smc->cardid != PRODID_OSITECH_SEVEN))
1860 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1861 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1862 }
1863 SMC_SELECT_BANK(saved_bank);
1864}
1865
1866static void smc_reset(struct net_device *dev)
1867{
1868 ioaddr_t ioaddr = dev->base_addr;
1869 struct smc_private *smc = dev->priv;
1870 int i;
1871
1872 DEBUG(0, "%s: smc91c92 reset called.\n", dev->name);
1873
1874
1875
1876 SMC_SELECT_BANK(0);
1877
1878 outw(RCR_SOFTRESET, ioaddr + RCR);
1879 udelay(10);
1880
1881
1882 outw(RCR_CLEAR, ioaddr + RCR);
1883 outw(TCR_CLEAR, ioaddr + TCR);
1884
1885
1886
1887 SMC_SELECT_BANK(1);
1888
1889
1890 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1891 ioaddr + CONTROL);
1892 smc_set_xcvr(dev, dev->if_port);
1893 if ((smc->manfid == MANFID_OSITECH) &&
1894 (smc->cardid != PRODID_OSITECH_SEVEN))
1895 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1896 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1897 ioaddr - 0x10 + OSITECH_AUI_PWR);
1898
1899
1900 for (i = 0; i < 6; i += 2)
1901 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1902 ioaddr + ADDR0 + i);
1903
1904
1905 SMC_SELECT_BANK(2);
1906 outw(MC_RESET, ioaddr + MMU_CMD);
1907 outw(0, ioaddr + INTERRUPT);
1908
1909
1910 SMC_SELECT_BANK(0);
1911 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1912 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1913 set_rx_mode(dev);
1914
1915 if (smc->cfg & CFG_MII_SELECT) {
1916 SMC_SELECT_BANK(3);
1917
1918
1919 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1920
1921
1922 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1923
1924
1925 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1926 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1927 }
1928
1929
1930 SMC_SELECT_BANK(2);
1931 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1932 ioaddr + INTERRUPT);
1933}
1934
1935
1936
1937
1938
1939
1940
1941static void media_check(u_long arg)
1942{
1943 struct net_device *dev = (struct net_device *) arg;
1944 struct smc_private *smc = dev->priv;
1945 ioaddr_t ioaddr = dev->base_addr;
1946 u_short i, media, saved_bank;
1947 u_short link;
1948
1949 saved_bank = inw(ioaddr + BANK_SELECT);
1950
1951 if (!netif_device_present(dev))
1952 goto reschedule;
1953
1954 SMC_SELECT_BANK(2);
1955
1956
1957 if (smc->rx_ovrn) {
1958 outw(MC_RESET, ioaddr + MMU_CMD);
1959 smc->rx_ovrn = 0;
1960 }
1961 i = inw(ioaddr + INTERRUPT);
1962 SMC_SELECT_BANK(0);
1963 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1964 SMC_SELECT_BANK(1);
1965 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1966
1967
1968
1969 if (smc->watchdog++ && ((i>>8) & i)) {
1970 if (!smc->fast_poll)
1971 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
1972 smc_interrupt(dev->irq, smc, NULL);
1973 smc->fast_poll = HZ;
1974 }
1975 if (smc->fast_poll) {
1976 smc->fast_poll--;
1977 smc->media.expires = jiffies + HZ/100;
1978 add_timer(&smc->media);
1979 SMC_SELECT_BANK(saved_bank);
1980 return;
1981 }
1982
1983 if (smc->cfg & CFG_MII_SELECT) {
1984 if (smc->mii_if.phy_id < 0)
1985 goto reschedule;
1986
1987 SMC_SELECT_BANK(3);
1988 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1989 if (!link || (link == 0xffff)) {
1990 printk(KERN_INFO "%s: MII is missing!\n", dev->name);
1991 smc->mii_if.phy_id = -1;
1992 goto reschedule;
1993 }
1994
1995 link &= 0x0004;
1996 if (link != smc->link_status) {
1997 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1998 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1999 (link) ? "found" : "lost");
2000 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
2001 ? TCR_FDUPLX : 0);
2002 if (link) {
2003 printk(KERN_INFO "%s: autonegotiation complete: "
2004 "%sbaseT-%cD selected\n", dev->name,
2005 ((p & 0x0180) ? "100" : "10"),
2006 (smc->duplex ? 'F' : 'H'));
2007 }
2008 SMC_SELECT_BANK(0);
2009 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
2010 smc->link_status = link;
2011 }
2012 goto reschedule;
2013 }
2014
2015
2016 if (jiffies - dev->last_rx > HZ) {
2017 if (smc->tx_err || (smc->media_status & EPH_16COL))
2018 media |= EPH_16COL;
2019 }
2020 smc->tx_err = 0;
2021
2022 if (media != smc->media_status) {
2023 if ((media & smc->media_status & 1) &&
2024 ((smc->media_status ^ media) & EPH_LINK_OK))
2025 printk(KERN_INFO "%s: %s link beat\n", dev->name,
2026 (smc->media_status & EPH_LINK_OK ? "lost" : "found"));
2027 else if ((media & smc->media_status & 2) &&
2028 ((smc->media_status ^ media) & EPH_16COL))
2029 printk(KERN_INFO "%s: coax cable %s\n", dev->name,
2030 (media & EPH_16COL ? "problem" : "ok"));
2031 if (dev->if_port == 0) {
2032 if (media & 1) {
2033 if (media & EPH_LINK_OK)
2034 printk(KERN_INFO "%s: flipped to 10baseT\n",
2035 dev->name);
2036 else
2037 smc_set_xcvr(dev, 2);
2038 } else {
2039 if (media & EPH_16COL)
2040 smc_set_xcvr(dev, 1);
2041 else
2042 printk(KERN_INFO "%s: flipped to 10base2\n",
2043 dev->name);
2044 }
2045 }
2046 smc->media_status = media;
2047 }
2048
2049reschedule:
2050 smc->media.expires = jiffies + HZ;
2051 add_timer(&smc->media);
2052 SMC_SELECT_BANK(saved_bank);
2053}
2054
2055static int smc_link_ok(struct net_device *dev)
2056{
2057 ioaddr_t ioaddr = dev->base_addr;
2058 struct smc_private *smc = dev->priv;
2059
2060 if (smc->cfg & CFG_MII_SELECT) {
2061 return mii_link_ok(&smc->mii_if);
2062 } else {
2063 SMC_SELECT_BANK(0);
2064 return inw(ioaddr + EPH) & EPH_LINK_OK;
2065 }
2066}
2067
2068static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
2069{
2070 u16 tmp;
2071 ioaddr_t ioaddr = dev->base_addr;
2072
2073 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
2074 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
2075
2076 SMC_SELECT_BANK(1);
2077 tmp = inw(ioaddr + CONFIG);
2078 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
2079 ecmd->transceiver = XCVR_INTERNAL;
2080 ecmd->speed = SPEED_10;
2081 ecmd->phy_address = ioaddr + MGMT;
2082
2083 SMC_SELECT_BANK(0);
2084 tmp = inw(ioaddr + TCR);
2085 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
2086
2087 return 0;
2088}
2089
2090static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
2091{
2092 u16 tmp;
2093 ioaddr_t ioaddr = dev->base_addr;
2094
2095 if (ecmd->speed != SPEED_10)
2096 return -EINVAL;
2097 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
2098 return -EINVAL;
2099 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
2100 return -EINVAL;
2101 if (ecmd->transceiver != XCVR_INTERNAL)
2102 return -EINVAL;
2103
2104 if (ecmd->port == PORT_AUI)
2105 smc_set_xcvr(dev, 1);
2106 else
2107 smc_set_xcvr(dev, 0);
2108
2109 SMC_SELECT_BANK(0);
2110 tmp = inw(ioaddr + TCR);
2111 if (ecmd->duplex == DUPLEX_FULL)
2112 tmp |= TCR_FDUPLX;
2113 else
2114 tmp &= ~TCR_FDUPLX;
2115 outw(ioaddr + TCR, tmp);
2116
2117 return 0;
2118}
2119
2120static int smc_ethtool_ioctl (struct net_device *dev, void *useraddr)
2121{
2122 u32 ethcmd;
2123 struct smc_private *smc = dev->priv;
2124
2125 if (get_user(ethcmd, (u32 *)useraddr))
2126 return -EFAULT;
2127
2128 switch (ethcmd) {
2129
2130 case ETHTOOL_GDRVINFO: {
2131 struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
2132 strcpy(info.driver, DRV_NAME);
2133 strcpy(info.version, DRV_VERSION);
2134 if (copy_to_user(useraddr, &info, sizeof(info)))
2135 return -EFAULT;
2136 return 0;
2137 }
2138
2139
2140 case ETHTOOL_GSET: {
2141 int ret;
2142 struct ethtool_cmd ecmd = { ETHTOOL_GSET };
2143 spin_lock_irq(&smc->lock);
2144 if (smc->cfg & CFG_MII_SELECT)
2145 ret = mii_ethtool_gset(&smc->mii_if, &ecmd);
2146 else
2147 ret = smc_netdev_get_ecmd(dev, &ecmd);
2148 spin_unlock_irq(&smc->lock);
2149 if (copy_to_user(useraddr, &ecmd, sizeof(ecmd)))
2150 return -EFAULT;
2151 return ret;
2152 }
2153
2154
2155 case ETHTOOL_SSET: {
2156 int ret;
2157 struct ethtool_cmd ecmd;
2158 if (copy_from_user(&ecmd, useraddr, sizeof(ecmd)))
2159 return -EFAULT;
2160 spin_lock_irq(&smc->lock);
2161 if (smc->cfg & CFG_MII_SELECT)
2162 ret = mii_ethtool_sset(&smc->mii_if, &ecmd);
2163 else
2164 ret = smc_netdev_set_ecmd(dev, &ecmd);
2165 spin_unlock_irq(&smc->lock);
2166 return ret;
2167 }
2168
2169
2170 case ETHTOOL_GLINK: {
2171 struct ethtool_value edata = { ETHTOOL_GLINK };
2172 spin_lock_irq(&smc->lock);
2173 edata.data = smc_link_ok(dev);
2174 spin_unlock_irq(&smc->lock);
2175 if (copy_to_user(useraddr, &edata, sizeof(edata)))
2176 return -EFAULT;
2177 return 0;
2178 }
2179
2180#ifdef PCMCIA_DEBUG
2181
2182 case ETHTOOL_GMSGLVL: {
2183 struct ethtool_value edata = { ETHTOOL_GMSGLVL };
2184 edata.data = pc_debug;
2185 if (copy_to_user(useraddr, &edata, sizeof(edata)))
2186 return -EFAULT;
2187 return 0;
2188 }
2189
2190
2191 case ETHTOOL_SMSGLVL: {
2192 struct ethtool_value edata;
2193 if (copy_from_user(&edata, useraddr, sizeof(edata)))
2194 return -EFAULT;
2195 pc_debug = edata.data;
2196 return 0;
2197 }
2198#endif
2199
2200 case ETHTOOL_NWAY_RST: {
2201 if (smc->cfg & CFG_MII_SELECT)
2202 return mii_nway_restart(&smc->mii_if);
2203 else
2204 return -EOPNOTSUPP;
2205 }
2206
2207 default:
2208 break;
2209 }
2210
2211 return -EOPNOTSUPP;
2212}
2213
2214static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
2215{
2216 struct smc_private *smc = dev->priv;
2217 struct mii_ioctl_data *mii;
2218 int rc = 0;
2219 u_short saved_bank;
2220 ioaddr_t ioaddr = dev->base_addr;
2221
2222 mii = (struct mii_ioctl_data *) &rq->ifr_data;
2223 if (!netif_running(dev))
2224 return -EINVAL;
2225
2226 switch (cmd) {
2227 case SIOCETHTOOL:
2228 saved_bank = inw(ioaddr + BANK_SELECT);
2229 SMC_SELECT_BANK(3);
2230 rc = smc_ethtool_ioctl(dev, (void *) rq->ifr_data);
2231 SMC_SELECT_BANK(saved_bank);
2232 break;
2233
2234 default:
2235 spin_lock_irq(&smc->lock);
2236 saved_bank = inw(ioaddr + BANK_SELECT);
2237 SMC_SELECT_BANK(3);
2238 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2239 SMC_SELECT_BANK(saved_bank);
2240 spin_unlock_irq(&smc->lock);
2241 break;
2242 }
2243
2244 return rc;
2245}
2246
2247static struct pcmcia_driver smc91c92_cs_driver = {
2248 .owner = THIS_MODULE,
2249 .drv = {
2250 .name = "smc91c92_cs",
2251 },
2252 .attach = smc91c92_attach,
2253 .detach = smc91c92_detach,
2254};
2255
2256static int __init init_smc91c92_cs(void)
2257{
2258 return pcmcia_register_driver(&smc91c92_cs_driver);
2259}
2260
2261static void __exit exit_smc91c92_cs(void)
2262{
2263 pcmcia_unregister_driver(&smc91c92_cs_driver);
2264 while (dev_list != NULL)
2265 smc91c92_detach(dev_list);
2266}
2267
2268module_init(init_smc91c92_cs);
2269module_exit(exit_smc91c92_cs);
2270