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36#define DRV_NAME "hamachi"
37#define DRV_VERSION "1.01+LK1.0.1"
38#define DRV_RELDATE "5/18/2001"
39
40
41
42
43static int debug = 1;
44#define final_version
45#define hamachi_debug debug
46
47static int max_interrupt_work = 40;
48static int mtu;
49
50
51
52
53static int max_rx_latency = 0x11;
54static int max_rx_gap = 0x05;
55static int min_rx_pkt = 0x18;
56static int max_tx_latency = 0x00;
57static int max_tx_gap = 0x00;
58static int min_tx_pkt = 0x30;
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63
64static int rx_copybreak;
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69
70static int force32;
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92#define MAX_UNITS 8
93static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
94static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
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110static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
111static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
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126#define TX_RING_SIZE 64
127#define RX_RING_SIZE 512
128#define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
129#define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
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147
148#undef TX_CHECKSUM
149#define RX_CHECKSUM
150
151
152
153#define TX_TIMEOUT (5*HZ)
154
155#include <linux/module.h>
156#include <linux/kernel.h>
157#include <linux/string.h>
158#include <linux/timer.h>
159#include <linux/time.h>
160#include <linux/errno.h>
161#include <linux/ioport.h>
162#include <linux/slab.h>
163#include <linux/interrupt.h>
164#include <linux/pci.h>
165#include <linux/init.h>
166#include <linux/ethtool.h>
167#include <linux/mii.h>
168#include <linux/netdevice.h>
169#include <linux/etherdevice.h>
170#include <linux/skbuff.h>
171#include <linux/ip.h>
172#include <linux/delay.h>
173
174#include <asm/uaccess.h>
175#include <asm/processor.h>
176#include <asm/bitops.h>
177#include <asm/io.h>
178#include <asm/unaligned.h>
179#include <asm/cache.h>
180
181static char version[] __devinitdata =
182KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
183KERN_INFO " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
184KERN_INFO " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
185
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190
191
192#ifndef IP_MF
193 #define IP_MF 0x2000
194#endif
195
196
197#ifndef IP_OFFSET
198 #ifdef IPOPT_OFFSET
199 #define IP_OFFSET IPOPT_OFFSET
200 #else
201 #define IP_OFFSET 2
202 #endif
203#endif
204
205#define RUN_AT(x) (jiffies + (x))
206
207
208#if ADDRLEN == 64
209#define cpu_to_leXX(addr) cpu_to_le64(addr)
210#define desc_to_virt(addr) bus_to_virt(le64_to_cpu(addr))
211#else
212#define cpu_to_leXX(addr) cpu_to_le32(addr)
213#define desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
214#endif
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415#define PKT_BUF_SZ 1538
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420
421#define MAX_FRAME_SIZE 1518
422
423
424
425static void hamachi_timer(unsigned long data);
426
427enum capability_flags {CanHaveMII=1, };
428static struct chip_info {
429 u16 vendor_id, device_id, device_id_mask, pad;
430 const char *name;
431 void (*media_timer)(unsigned long data);
432 int flags;
433} chip_tbl[] = {
434 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
435 {0,},
436};
437
438
439enum hamachi_offsets {
440 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
441 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
442 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
443 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
444 TxChecksum=0x074, RxChecksum=0x076,
445 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
446 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
447 EventStatus=0x08C,
448 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
449
450 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
451 AddrMode=0x0D0, StationAddr=0x0D2,
452
453 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
454 ANLinkPartnerAbility=0x0EA,
455 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
456 FIFOcfg=0x0F8,
457};
458
459
460enum MII_offsets {
461 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
462 MII_Status=0xAE,
463};
464
465
466enum intr_status_bits {
467 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
468 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
469 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
470
471
472struct hamachi_desc {
473 u32 status_n_length;
474#if ADDRLEN == 64
475 u32 pad;
476 u64 addr;
477#else
478 u32 addr;
479#endif
480};
481
482
483enum desc_status_bits {
484 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
485 DescIntr=0x10000000,
486};
487
488#define PRIV_ALIGN 15
489#define MII_CNT 4
490struct hamachi_private {
491
492
493 struct hamachi_desc *rx_ring;
494 struct hamachi_desc *tx_ring;
495 struct sk_buff* rx_skbuff[RX_RING_SIZE];
496 struct sk_buff* tx_skbuff[TX_RING_SIZE];
497 dma_addr_t tx_ring_dma;
498 dma_addr_t rx_ring_dma;
499 struct net_device_stats stats;
500 struct timer_list timer;
501
502 spinlock_t lock;
503 int chip_id;
504 unsigned int cur_rx, dirty_rx;
505 unsigned int cur_tx, dirty_tx;
506 unsigned int rx_buf_sz;
507 unsigned int tx_full:1;
508 unsigned int duplex_lock:1;
509 unsigned int default_port:4;
510
511 int mii_cnt;
512 struct mii_if_info mii_if;
513 unsigned char phys[MII_CNT];
514 u32 rx_int_var, tx_int_var;
515 u32 option;
516 struct pci_dev *pci_dev;
517};
518
519MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
520MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
521MODULE_LICENSE("GPL");
522
523MODULE_PARM(max_interrupt_work, "i");
524MODULE_PARM(mtu, "i");
525MODULE_PARM(debug, "i");
526MODULE_PARM(min_rx_pkt, "i");
527MODULE_PARM(max_rx_gap, "i");
528MODULE_PARM(max_rx_latency, "i");
529MODULE_PARM(min_tx_pkt, "i");
530MODULE_PARM(max_tx_gap, "i");
531MODULE_PARM(max_tx_latency, "i");
532MODULE_PARM(rx_copybreak, "i");
533MODULE_PARM(rx_params, "1-" __MODULE_STRING(MAX_UNITS) "i");
534MODULE_PARM(tx_params, "1-" __MODULE_STRING(MAX_UNITS) "i");
535MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
536MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
537MODULE_PARM(force32, "i");
538MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
539MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
540MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
541MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
542MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
543MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
544MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
545MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
546MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
547MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
548MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
549MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
550MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
551MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
552MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
553
554static int read_eeprom(long ioaddr, int location);
555static int mdio_read(struct net_device *dev, int phy_id, int location);
556static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
557static int hamachi_open(struct net_device *dev);
558static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
559static void hamachi_timer(unsigned long data);
560static void hamachi_tx_timeout(struct net_device *dev);
561static void hamachi_init_ring(struct net_device *dev);
562static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev);
563static irqreturn_t hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
564static inline int hamachi_rx(struct net_device *dev);
565static inline int hamachi_tx(struct net_device *dev);
566static void hamachi_error(struct net_device *dev, int intr_status);
567static int hamachi_close(struct net_device *dev);
568static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
569static void set_rx_mode(struct net_device *dev);
570
571
572static int __devinit hamachi_init_one (struct pci_dev *pdev,
573 const struct pci_device_id *ent)
574{
575 struct hamachi_private *hmp;
576 int option, i, rx_int_var, tx_int_var, boguscnt;
577 int chip_id = ent->driver_data;
578 int irq;
579 long ioaddr;
580 static int card_idx;
581 struct net_device *dev;
582 void *ring_space;
583 dma_addr_t ring_dma;
584 int ret = -ENOMEM;
585
586
587#ifndef MODULE
588 static int printed_version;
589 if (!printed_version++)
590 printk(version);
591#endif
592
593 if (pci_enable_device(pdev)) {
594 ret = -EIO;
595 goto err_out;
596 }
597
598 ioaddr = pci_resource_start(pdev, 0);
599#ifdef __alpha__
600 ioaddr |= (pci_resource_start(pdev, 1) << 32);
601#endif
602
603 pci_set_master(pdev);
604
605 i = pci_request_regions(pdev, DRV_NAME);
606 if (i) return i;
607
608 irq = pdev->irq;
609 ioaddr = (long) ioremap(ioaddr, 0x400);
610 if (!ioaddr)
611 goto err_out_release;
612
613 dev = alloc_etherdev(sizeof(struct hamachi_private));
614 if (!dev)
615 goto err_out_iounmap;
616
617 SET_MODULE_OWNER(dev);
618 SET_NETDEV_DEV(dev, &pdev->dev);
619
620#ifdef TX_CHECKSUM
621 printk("check that skbcopy in ip_queue_xmit isn't happening\n");
622 dev->hard_header_len += 8;
623#endif
624
625 for (i = 0; i < 6; i++)
626 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
627 : readb(ioaddr + StationAddr + i);
628
629#if ! defined(final_version)
630 if (hamachi_debug > 4)
631 for (i = 0; i < 0x10; i++)
632 printk("%2.2x%s",
633 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
634#endif
635
636 hmp = dev->priv;
637 spin_lock_init(&hmp->lock);
638
639 hmp->mii_if.dev = dev;
640 hmp->mii_if.mdio_read = mdio_read;
641 hmp->mii_if.mdio_write = mdio_write;
642 hmp->mii_if.phy_id_mask = 0x1f;
643 hmp->mii_if.reg_num_mask = 0x1f;
644
645 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
646 if (!ring_space)
647 goto err_out_cleardev;
648 hmp->tx_ring = (struct hamachi_desc *)ring_space;
649 hmp->tx_ring_dma = ring_dma;
650
651 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
652 if (!ring_space)
653 goto err_out_unmap_tx;
654 hmp->rx_ring = (struct hamachi_desc *)ring_space;
655 hmp->rx_ring_dma = ring_dma;
656
657
658 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
659 if (dev->mem_start)
660 option = dev->mem_start;
661
662
663 force32 = force32 ? force32 :
664 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
665 if (force32)
666 writeb(force32, ioaddr + VirtualJumpers);
667
668
669 writeb(0x01, ioaddr + ChipReset);
670
671
672
673
674
675 udelay(10);
676 i = readb(ioaddr + PCIClkMeas);
677 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
678 udelay(10);
679 i = readb(ioaddr + PCIClkMeas);
680 }
681
682 dev->base_addr = ioaddr;
683 dev->irq = irq;
684 pci_set_drvdata(pdev, dev);
685
686 hmp->chip_id = chip_id;
687 hmp->pci_dev = pdev;
688
689
690 if (option > 0) {
691 hmp->option = option;
692 if (option & 0x200)
693 hmp->mii_if.full_duplex = 1;
694 else if (option & 0x080)
695 hmp->mii_if.full_duplex = 0;
696 hmp->default_port = option & 15;
697 if (hmp->default_port)
698 hmp->mii_if.force_media = 1;
699 }
700 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
701 hmp->mii_if.full_duplex = 1;
702
703
704 if (hmp->mii_if.full_duplex || (option & 0x080))
705 hmp->duplex_lock = 1;
706
707
708 max_rx_latency = max_rx_latency & 0x00ff;
709 max_rx_gap = max_rx_gap & 0x00ff;
710 min_rx_pkt = min_rx_pkt & 0x00ff;
711 max_tx_latency = max_tx_latency & 0x00ff;
712 max_tx_gap = max_tx_gap & 0x00ff;
713 min_tx_pkt = min_tx_pkt & 0x00ff;
714
715 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
716 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
717 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
718 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
719 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
720 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
721
722
723
724 dev->open = &hamachi_open;
725 dev->hard_start_xmit = &hamachi_start_xmit;
726 dev->stop = &hamachi_close;
727 dev->get_stats = &hamachi_get_stats;
728 dev->set_multicast_list = &set_rx_mode;
729 dev->do_ioctl = &netdev_ioctl;
730 dev->tx_timeout = &hamachi_tx_timeout;
731 dev->watchdog_timeo = TX_TIMEOUT;
732 if (mtu)
733 dev->mtu = mtu;
734
735 i = register_netdev(dev);
736 if (i) {
737 ret = i;
738 goto err_out_unmap_rx;
739 }
740
741 printk(KERN_INFO "%s: %s type %x at 0x%lx, ",
742 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
743 ioaddr);
744 for (i = 0; i < 5; i++)
745 printk("%2.2x:", dev->dev_addr[i]);
746 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
747 i = readb(ioaddr + PCIClkMeas);
748 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
749 "%2.2x, LPA %4.4x.\n",
750 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
751 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
752 readw(ioaddr + ANLinkPartnerAbility));
753
754 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
755 int phy, phy_idx = 0;
756 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
757 int mii_status = mdio_read(dev, phy, MII_BMSR);
758 if (mii_status != 0xffff &&
759 mii_status != 0x0000) {
760 hmp->phys[phy_idx++] = phy;
761 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
762 printk(KERN_INFO "%s: MII PHY found at address %d, status "
763 "0x%4.4x advertising %4.4x.\n",
764 dev->name, phy, mii_status, hmp->mii_if.advertising);
765 }
766 }
767 hmp->mii_cnt = phy_idx;
768 if (hmp->mii_cnt > 0)
769 hmp->mii_if.phy_id = hmp->phys[0];
770 else
771 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
772 }
773
774 writew(0x0400, ioaddr + ANXchngCtrl);
775 writew(0x08e0, ioaddr + ANAdvertise);
776 writew(0x1000, ioaddr + ANCtrl);
777
778 card_idx++;
779 return 0;
780
781err_out_unmap_rx:
782 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
783 hmp->rx_ring_dma);
784err_out_unmap_tx:
785 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
786 hmp->tx_ring_dma);
787err_out_cleardev:
788 free_netdev (dev);
789err_out_iounmap:
790 iounmap((char *)ioaddr);
791err_out_release:
792 pci_release_regions(pdev);
793err_out:
794 return ret;
795}
796
797static int __devinit read_eeprom(long ioaddr, int location)
798{
799 int bogus_cnt = 1000;
800
801
802 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
803 writew(location, ioaddr + EEAddr);
804 writeb(0x02, ioaddr + EECmdStatus);
805 bogus_cnt = 1000;
806 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
807 if (hamachi_debug > 5)
808 printk(" EEPROM status is %2.2x after %d ticks.\n",
809 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
810 return readb(ioaddr + EEData);
811}
812
813
814
815
816
817static int mdio_read(struct net_device *dev, int phy_id, int location)
818{
819 long ioaddr = dev->base_addr;
820 int i;
821
822
823 for (i = 10000; i >= 0; i--)
824 if ((readw(ioaddr + MII_Status) & 1) == 0)
825 break;
826 writew((phy_id<<8) + location, ioaddr + MII_Addr);
827 writew(0x0001, ioaddr + MII_Cmd);
828 for (i = 10000; i >= 0; i--)
829 if ((readw(ioaddr + MII_Status) & 1) == 0)
830 break;
831 return readw(ioaddr + MII_Rd_Data);
832}
833
834static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
835{
836 long ioaddr = dev->base_addr;
837 int i;
838
839
840 for (i = 10000; i >= 0; i--)
841 if ((readw(ioaddr + MII_Status) & 1) == 0)
842 break;
843 writew((phy_id<<8) + location, ioaddr + MII_Addr);
844 writew(value, ioaddr + MII_Wr_Data);
845
846
847 for (i = 10000; i >= 0; i--)
848 if ((readw(ioaddr + MII_Status) & 1) == 0)
849 break;
850 return;
851}
852
853
854static int hamachi_open(struct net_device *dev)
855{
856 struct hamachi_private *hmp = dev->priv;
857 long ioaddr = dev->base_addr;
858 int i;
859 u32 rx_int_var, tx_int_var;
860 u16 fifo_info;
861
862 i = request_irq(dev->irq, &hamachi_interrupt, SA_SHIRQ, dev->name, dev);
863 if (i)
864 return i;
865
866 if (hamachi_debug > 1)
867 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
868 dev->name, dev->irq);
869
870 hamachi_init_ring(dev);
871
872#if ADDRLEN == 64
873
874 writel(cpu_to_le64(hmp->rx_ring_dma), ioaddr + RxPtr);
875 writel(cpu_to_le64(hmp->rx_ring_dma) >> 32, ioaddr + RxPtr + 4);
876 writel(cpu_to_le64(hmp->tx_ring_dma), ioaddr + TxPtr);
877 writel(cpu_to_le64(hmp->tx_ring_dma) >> 32, ioaddr + TxPtr + 4);
878#else
879 writel(cpu_to_le32(hmp->rx_ring_dma), ioaddr + RxPtr);
880 writel(cpu_to_le32(hmp->tx_ring_dma), ioaddr + TxPtr);
881#endif
882
883
884
885
886 for (i = 0; i < 6; i++)
887 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
888
889
890
891
892
893 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
894 switch (fifo_info){
895 case 0 :
896
897 writew(0x0000, ioaddr + FIFOcfg);
898 break;
899 case 1 :
900
901 writew(0x0028, ioaddr + FIFOcfg);
902 break;
903 case 2 :
904
905 writew(0x004C, ioaddr + FIFOcfg);
906 break;
907 case 3 :
908
909 writew(0x006C, ioaddr + FIFOcfg);
910 break;
911 default :
912 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
913 dev->name);
914
915 writew(0x0000, ioaddr + FIFOcfg);
916 break;
917 }
918
919 if (dev->if_port == 0)
920 dev->if_port = hmp->default_port;
921
922
923
924
925 if (hmp->duplex_lock != 1)
926 hmp->mii_if.full_duplex = 1;
927
928
929 writew(0x0001, ioaddr + RxChecksum);
930#ifdef TX_CHECKSUM
931 writew(0x0001, ioaddr + TxChecksum);
932#else
933 writew(0x0000, ioaddr + TxChecksum);
934#endif
935 writew(0x8000, ioaddr + MACCnfg);
936 writew(0x215F, ioaddr + MACCnfg);
937 writew(0x000C, ioaddr + FrameGap0);
938
939 writew(0x1018, ioaddr + FrameGap1);
940
941 writew(0x0780, ioaddr + MACCnfg2);
942
943 writel(0x0030FFFF, ioaddr + FlowCtrl);
944 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize);
945
946
947 writew(0x0400, ioaddr + ANXchngCtrl);
948
949 writeb(0x03, ioaddr + LEDCtrl);
950
951
952
953
954 rx_int_var = hmp->rx_int_var;
955 tx_int_var = hmp->tx_int_var;
956
957 if (hamachi_debug > 1) {
958 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
959 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
960 (tx_int_var & 0x00ff0000) >> 16);
961 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
962 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
963 (rx_int_var & 0x00ff0000) >> 16);
964 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
965 }
966
967 writel(tx_int_var, ioaddr + TxIntrCtrl);
968 writel(rx_int_var, ioaddr + RxIntrCtrl);
969
970 set_rx_mode(dev);
971
972 netif_start_queue(dev);
973
974
975 writel(0x80878787, ioaddr + InterruptEnable);
976 writew(0x0000, ioaddr + EventStatus);
977
978
979
980#if ADDRLEN == 64
981 writew(0x005D, ioaddr + RxDMACtrl);
982 writew(0x005D, ioaddr + TxDMACtrl);
983#else
984 writew(0x001D, ioaddr + RxDMACtrl);
985 writew(0x001D, ioaddr + TxDMACtrl);
986#endif
987 writew(0x0001, dev->base_addr + RxCmd);
988
989 if (hamachi_debug > 2) {
990 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
991 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
992 }
993
994 init_timer(&hmp->timer);
995 hmp->timer.expires = RUN_AT((24*HZ)/10);
996 hmp->timer.data = (unsigned long)dev;
997 hmp->timer.function = &hamachi_timer;
998 add_timer(&hmp->timer);
999
1000 return 0;
1001}
1002
1003static inline int hamachi_tx(struct net_device *dev)
1004{
1005 struct hamachi_private *hmp = dev->priv;
1006
1007
1008
1009 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1010 int entry = hmp->dirty_tx % TX_RING_SIZE;
1011 struct sk_buff *skb;
1012
1013 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1014 break;
1015
1016 skb = hmp->tx_skbuff[entry];
1017 if (skb != 0) {
1018 pci_unmap_single(hmp->pci_dev,
1019 hmp->tx_ring[entry].addr, skb->len,
1020 PCI_DMA_TODEVICE);
1021 dev_kfree_skb(skb);
1022 hmp->tx_skbuff[entry] = 0;
1023 }
1024 hmp->tx_ring[entry].status_n_length = 0;
1025 if (entry >= TX_RING_SIZE-1)
1026 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1027 cpu_to_le32(DescEndRing);
1028 hmp->stats.tx_packets++;
1029 }
1030
1031 return 0;
1032}
1033
1034static void hamachi_timer(unsigned long data)
1035{
1036 struct net_device *dev = (struct net_device *)data;
1037 struct hamachi_private *hmp = dev->priv;
1038 long ioaddr = dev->base_addr;
1039 int next_tick = 10*HZ;
1040
1041 if (hamachi_debug > 2) {
1042 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1043 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1044 readw(ioaddr + ANLinkPartnerAbility));
1045 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1046 "%4.4x %4.4x %4.4x.\n", dev->name,
1047 readw(ioaddr + 0x0e0),
1048 readw(ioaddr + 0x0e2),
1049 readw(ioaddr + 0x0e4),
1050 readw(ioaddr + 0x0e6),
1051 readw(ioaddr + 0x0e8),
1052 readw(ioaddr + 0x0eA));
1053 }
1054
1055 hmp->timer.expires = RUN_AT(next_tick);
1056 add_timer(&hmp->timer);
1057}
1058
1059static void hamachi_tx_timeout(struct net_device *dev)
1060{
1061 int i;
1062 struct hamachi_private *hmp = dev->priv;
1063 long ioaddr = dev->base_addr;
1064
1065 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1066 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1067
1068 {
1069 int i;
1070 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1071 for (i = 0; i < RX_RING_SIZE; i++)
1072 printk(" %8.8x", (unsigned int)hmp->rx_ring[i].status_n_length);
1073 printk("\n"KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1074 for (i = 0; i < TX_RING_SIZE; i++)
1075 printk(" %4.4x", hmp->tx_ring[i].status_n_length);
1076 printk("\n");
1077 }
1078
1079
1080
1081
1082 dev->if_port = 0;
1083
1084
1085
1086
1087
1088
1089
1090 for (i = 0; i < RX_RING_SIZE; i++)
1091 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1092
1093
1094
1095
1096 for (i = 0; i < TX_RING_SIZE; i++){
1097 struct sk_buff *skb;
1098
1099 if (i >= TX_RING_SIZE - 1)
1100 hmp->tx_ring[i].status_n_length = cpu_to_le32(
1101 DescEndRing |
1102 (hmp->tx_ring[i].status_n_length & 0x0000FFFF));
1103 else
1104 hmp->tx_ring[i].status_n_length &= 0x0000ffff;
1105 skb = hmp->tx_skbuff[i];
1106 if (skb){
1107 pci_unmap_single(hmp->pci_dev, hmp->tx_ring[i].addr,
1108 skb->len, PCI_DMA_TODEVICE);
1109 dev_kfree_skb(skb);
1110 hmp->tx_skbuff[i] = 0;
1111 }
1112 }
1113
1114 udelay(60);
1115 writew(0x0002, dev->base_addr + RxCmd);
1116
1117 writeb(0x01, ioaddr + ChipReset);
1118
1119 hmp->tx_full = 0;
1120 hmp->cur_rx = hmp->cur_tx = 0;
1121 hmp->dirty_rx = hmp->dirty_tx = 0;
1122
1123
1124
1125 for (i = 0; i < RX_RING_SIZE; i++){
1126 struct sk_buff *skb = hmp->rx_skbuff[i];
1127
1128 if (skb){
1129 pci_unmap_single(hmp->pci_dev, hmp->rx_ring[i].addr,
1130 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1131 dev_kfree_skb(skb);
1132 hmp->rx_skbuff[i] = 0;
1133 }
1134 }
1135
1136 for (i = 0; i < RX_RING_SIZE; i++) {
1137 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1138 hmp->rx_skbuff[i] = skb;
1139 if (skb == NULL)
1140 break;
1141 skb->dev = dev;
1142 skb_reserve(skb, 2);
1143 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1144 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1145 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1146 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1147 }
1148 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1149
1150 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1151
1152
1153 dev->trans_start = jiffies;
1154 hmp->stats.tx_errors++;
1155
1156
1157 writew(0x0002, dev->base_addr + TxCmd);
1158 writew(0x0001, dev->base_addr + TxCmd);
1159 writew(0x0001, dev->base_addr + RxCmd);
1160
1161 netif_wake_queue(dev);
1162}
1163
1164
1165
1166static void hamachi_init_ring(struct net_device *dev)
1167{
1168 struct hamachi_private *hmp = dev->priv;
1169 int i;
1170
1171 hmp->tx_full = 0;
1172 hmp->cur_rx = hmp->cur_tx = 0;
1173 hmp->dirty_rx = hmp->dirty_tx = 0;
1174
1175#if 0
1176
1177
1178
1179
1180 hmp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1181#endif
1182
1183
1184
1185
1186
1187
1188 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1189 (((dev->mtu+26+7) & ~7) + 2 + 16));
1190
1191
1192 for (i = 0; i < RX_RING_SIZE; i++) {
1193 hmp->rx_ring[i].status_n_length = 0;
1194 hmp->rx_skbuff[i] = 0;
1195 }
1196
1197 for (i = 0; i < RX_RING_SIZE; i++) {
1198 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1199 hmp->rx_skbuff[i] = skb;
1200 if (skb == NULL)
1201 break;
1202 skb->dev = dev;
1203 skb_reserve(skb, 2);
1204 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1205 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1206
1207 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1208 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1209 }
1210 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1211 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1212
1213 for (i = 0; i < TX_RING_SIZE; i++) {
1214 hmp->tx_skbuff[i] = 0;
1215 hmp->tx_ring[i].status_n_length = 0;
1216 }
1217
1218 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1219
1220 return;
1221}
1222
1223
1224#ifdef TX_CHECKSUM
1225#define csum_add(it, val) \
1226do { \
1227 it += (u16) (val); \
1228 if (it & 0xffff0000) { \
1229 it &= 0xffff; \
1230 ++it; \
1231 } \
1232} while (0)
1233
1234
1235
1236#define pseudo_csum_udp(sum,ih,uh) do { \
1237 sum = 0; \
1238 csum_add(sum, (ih)->saddr >> 16); \
1239 csum_add(sum, (ih)->saddr & 0xffff); \
1240 csum_add(sum, (ih)->daddr >> 16); \
1241 csum_add(sum, (ih)->daddr & 0xffff); \
1242 csum_add(sum, __constant_htons(IPPROTO_UDP)); \
1243 csum_add(sum, (uh)->len); \
1244} while (0)
1245
1246
1247#define pseudo_csum_tcp(sum,ih,len) do { \
1248 sum = 0; \
1249 csum_add(sum, (ih)->saddr >> 16); \
1250 csum_add(sum, (ih)->saddr & 0xffff); \
1251 csum_add(sum, (ih)->daddr >> 16); \
1252 csum_add(sum, (ih)->daddr & 0xffff); \
1253 csum_add(sum, __constant_htons(IPPROTO_TCP)); \
1254 csum_add(sum, htons(len)); \
1255} while (0)
1256#endif
1257
1258static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1259{
1260 struct hamachi_private *hmp = dev->priv;
1261 unsigned entry;
1262 u16 status;
1263
1264
1265
1266
1267
1268
1269 if (hmp->tx_full) {
1270
1271 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1272
1273
1274
1275 status=readw(dev->base_addr + TxStatus);
1276 if( !(status & 0x0001) || (status & 0x0002))
1277 writew(0x0001, dev->base_addr + TxCmd);
1278 return 1;
1279 }
1280
1281
1282
1283
1284
1285 entry = hmp->cur_tx % TX_RING_SIZE;
1286
1287 hmp->tx_skbuff[entry] = skb;
1288
1289#ifdef TX_CHECKSUM
1290 {
1291
1292 u32 tagval = 0;
1293 struct ethhdr *eh = (struct ethhdr *)skb->data;
1294 if (eh->h_proto == __constant_htons(ETH_P_IP)) {
1295 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1296 if (ih->protocol == IPPROTO_UDP) {
1297 struct udphdr *uh
1298 = (struct udphdr *)((char *)ih + ih->ihl*4);
1299 u32 offset = ((unsigned char *)uh + 6) - skb->data;
1300 u32 pseudo;
1301 pseudo_csum_udp(pseudo, ih, uh);
1302 pseudo = htons(pseudo);
1303 printk("udp cksum was %04x, sending pseudo %04x\n",
1304 uh->check, pseudo);
1305 uh->check = 0;
1306
1307
1308
1309
1310 tagval = (14 << 24) | (offset << 16) | pseudo;
1311 } else if (ih->protocol == IPPROTO_TCP) {
1312 printk("tcp, no auto cksum\n");
1313 }
1314 }
1315 *(u32 *)skb_push(skb, 8) = tagval;
1316 }
1317#endif
1318
1319 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1320 skb->data, skb->len, PCI_DMA_TODEVICE));
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331 if (entry >= TX_RING_SIZE-1)
1332 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1333 DescEndPacket | DescEndRing | DescIntr | skb->len);
1334 else
1335 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1336 DescEndPacket | DescIntr | skb->len);
1337 hmp->cur_tx++;
1338
1339
1340
1341
1342
1343 status=readw(dev->base_addr + TxStatus);
1344 if( !(status & 0x0001) || (status & 0x0002))
1345 writew(0x0001, dev->base_addr + TxCmd);
1346
1347
1348 hamachi_tx(dev);
1349
1350
1351
1352
1353
1354
1355
1356 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1357 netif_wake_queue(dev);
1358 else {
1359 hmp->tx_full = 1;
1360 netif_stop_queue(dev);
1361 }
1362 dev->trans_start = jiffies;
1363
1364 if (hamachi_debug > 4) {
1365 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1366 dev->name, hmp->cur_tx, entry);
1367 }
1368 return 0;
1369}
1370
1371
1372
1373static irqreturn_t hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *rgs)
1374{
1375 struct net_device *dev = dev_instance;
1376 struct hamachi_private *hmp;
1377 long ioaddr, boguscnt = max_interrupt_work;
1378 int handled = 0;
1379
1380#ifndef final_version
1381 if (dev == NULL) {
1382 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1383 return IRQ_NONE;
1384 }
1385#endif
1386
1387 ioaddr = dev->base_addr;
1388 hmp = dev->priv;
1389 spin_lock(&hmp->lock);
1390
1391 do {
1392 u32 intr_status = readl(ioaddr + InterruptClear);
1393
1394 if (hamachi_debug > 4)
1395 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1396 dev->name, intr_status);
1397
1398 if (intr_status == 0)
1399 break;
1400
1401 handled = 1;
1402
1403 if (intr_status & IntrRxDone)
1404 hamachi_rx(dev);
1405
1406 if (intr_status & IntrTxDone){
1407
1408
1409
1410
1411 if (hmp->tx_full){
1412 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1413 int entry = hmp->dirty_tx % TX_RING_SIZE;
1414 struct sk_buff *skb;
1415
1416 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1417 break;
1418 skb = hmp->tx_skbuff[entry];
1419
1420 if (skb){
1421 pci_unmap_single(hmp->pci_dev,
1422 hmp->tx_ring[entry].addr,
1423 skb->len,
1424 PCI_DMA_TODEVICE);
1425 dev_kfree_skb_irq(skb);
1426 hmp->tx_skbuff[entry] = 0;
1427 }
1428 hmp->tx_ring[entry].status_n_length = 0;
1429 if (entry >= TX_RING_SIZE-1)
1430 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1431 cpu_to_le32(DescEndRing);
1432 hmp->stats.tx_packets++;
1433 }
1434 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1435
1436 hmp->tx_full = 0;
1437 netif_wake_queue(dev);
1438 }
1439 } else {
1440 netif_wake_queue(dev);
1441 }
1442 }
1443
1444
1445
1446 if (intr_status &
1447 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1448 LinkChange | NegotiationChange | StatsMax))
1449 hamachi_error(dev, intr_status);
1450
1451 if (--boguscnt < 0) {
1452 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1453 dev->name, intr_status);
1454 break;
1455 }
1456 } while (1);
1457
1458 if (hamachi_debug > 3)
1459 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1460 dev->name, readl(ioaddr + IntrStatus));
1461
1462#ifndef final_version
1463
1464 {
1465 static int stopit = 10;
1466 if (dev->start == 0 && --stopit < 0) {
1467 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1468 dev->name);
1469 free_irq(irq, dev);
1470 }
1471 }
1472#endif
1473
1474 spin_unlock(&hmp->lock);
1475 return IRQ_RETVAL(handled);
1476}
1477
1478
1479
1480static int hamachi_rx(struct net_device *dev)
1481{
1482 struct hamachi_private *hmp = dev->priv;
1483 int entry = hmp->cur_rx % RX_RING_SIZE;
1484 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1485
1486 if (hamachi_debug > 4) {
1487 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1488 entry, hmp->rx_ring[entry].status_n_length);
1489 }
1490
1491
1492 while (1) {
1493 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1494 u32 desc_status = le32_to_cpu(desc->status_n_length);
1495 u16 data_size = desc_status;
1496 u8 *buf_addr;
1497 s32 frame_status;
1498
1499 if (desc_status & DescOwn)
1500 break;
1501 pci_dma_sync_single(hmp->pci_dev, desc->addr, hmp->rx_buf_sz,
1502 PCI_DMA_FROMDEVICE);
1503 buf_addr = desc_to_virt(desc->addr);
1504 frame_status = le32_to_cpu(get_unaligned((s32*)&(buf_addr[data_size - 12])));
1505 if (hamachi_debug > 4)
1506 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1507 frame_status);
1508 if (--boguscnt < 0)
1509 break;
1510 if ( ! (desc_status & DescEndPacket)) {
1511 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1512 "multiple buffers, entry %#x length %d status %4.4x!\n",
1513 dev->name, hmp->cur_rx, data_size, desc_status);
1514 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1515 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1516 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1517 dev->name,
1518 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0xffff0000,
1519 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0x0000ffff,
1520 hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length);
1521 hmp->stats.rx_length_errors++;
1522 }
1523 if (frame_status & 0x00380000) {
1524
1525 if (hamachi_debug > 2)
1526 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1527 frame_status);
1528 hmp->stats.rx_errors++;
1529 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1530 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1531 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1532 if (frame_status < 0) hmp->stats.rx_dropped++;
1533 } else {
1534 struct sk_buff *skb;
1535
1536 u16 pkt_len = (frame_status & 0x07ff) - 4;
1537#ifdef RX_CHECKSUM
1538 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1539#endif
1540
1541
1542#ifndef final_version
1543 if (hamachi_debug > 4)
1544 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1545 " of %d, bogus_cnt %d.\n",
1546 pkt_len, data_size, boguscnt);
1547 if (hamachi_debug > 5)
1548 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1549 dev->name,
1550 *(s32*)&(buf_addr[data_size - 20]),
1551 *(s32*)&(buf_addr[data_size - 16]),
1552 *(s32*)&(buf_addr[data_size - 12]),
1553 *(s32*)&(buf_addr[data_size - 8]),
1554 *(s32*)&(buf_addr[data_size - 4]));
1555#endif
1556
1557
1558 if (pkt_len < rx_copybreak
1559 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1560#ifdef RX_CHECKSUM
1561 printk(KERN_ERR "%s: rx_copybreak non-zero "
1562 "not good with RX_CHECKSUM\n", dev->name);
1563#endif
1564 skb->dev = dev;
1565 skb_reserve(skb, 2);
1566
1567#if 1 || USE_IP_COPYSUM
1568 eth_copy_and_sum(skb,
1569 hmp->rx_skbuff[entry]->data, pkt_len, 0);
1570 skb_put(skb, pkt_len);
1571#else
1572 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1573 + entry*sizeof(*desc), pkt_len);
1574#endif
1575 } else {
1576 pci_unmap_single(hmp->pci_dev,
1577 hmp->rx_ring[entry].addr,
1578 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1579 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1580 hmp->rx_skbuff[entry] = NULL;
1581 }
1582 skb->protocol = eth_type_trans(skb, dev);
1583
1584
1585#ifdef RX_CHECKSUM
1586
1587 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1588 struct iphdr *ih = (struct iphdr *) skb->data;
1589
1590
1591
1592
1593 if (ntohs(ih->tot_len) >= 46){
1594
1595 if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) {
1596 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1597 u32 *p = (u32 *) &buf_addr[data_size - 20];
1598 register u32 crc, p_r, p_r1;
1599
1600 if (inv & 4) {
1601 inv &= ~4;
1602 --p;
1603 }
1604 p_r = *p;
1605 p_r1 = *(p-1);
1606 switch (inv) {
1607 case 0:
1608 crc = (p_r & 0xffff) + (p_r >> 16);
1609 break;
1610 case 1:
1611 crc = (p_r >> 16) + (p_r & 0xffff)
1612 + (p_r1 >> 16 & 0xff00);
1613 break;
1614 case 2:
1615 crc = p_r + (p_r1 >> 16);
1616 break;
1617 case 3:
1618 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1619 break;
1620 default: crc = 0;
1621 }
1622 if (crc & 0xffff0000) {
1623 crc &= 0xffff;
1624 ++crc;
1625 }
1626
1627 skb->csum = ntohs(pfck & 0xffff);
1628 if (skb->csum > crc)
1629 skb->csum -= crc;
1630 else
1631 skb->csum += (~crc & 0xffff);
1632
1633
1634
1635
1636 skb->ip_summed = CHECKSUM_HW;
1637 }
1638 }
1639 }
1640#endif
1641
1642 netif_rx(skb);
1643 dev->last_rx = jiffies;
1644 hmp->stats.rx_packets++;
1645 }
1646 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1647 }
1648
1649
1650 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1651 struct hamachi_desc *desc;
1652
1653 entry = hmp->dirty_rx % RX_RING_SIZE;
1654 desc = &(hmp->rx_ring[entry]);
1655 if (hmp->rx_skbuff[entry] == NULL) {
1656 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1657
1658 hmp->rx_skbuff[entry] = skb;
1659 if (skb == NULL)
1660 break;
1661 skb->dev = dev;
1662 skb_reserve(skb, 2);
1663 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1664 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1665 }
1666 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1667 if (entry >= RX_RING_SIZE-1)
1668 desc->status_n_length |= cpu_to_le32(DescOwn |
1669 DescEndPacket | DescEndRing | DescIntr);
1670 else
1671 desc->status_n_length |= cpu_to_le32(DescOwn |
1672 DescEndPacket | DescIntr);
1673 }
1674
1675
1676
1677 if (readw(dev->base_addr + RxStatus) & 0x0002)
1678 writew(0x0001, dev->base_addr + RxCmd);
1679
1680 return 0;
1681}
1682
1683
1684
1685static void hamachi_error(struct net_device *dev, int intr_status)
1686{
1687 long ioaddr = dev->base_addr;
1688 struct hamachi_private *hmp = dev->priv;
1689
1690 if (intr_status & (LinkChange|NegotiationChange)) {
1691 if (hamachi_debug > 1)
1692 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1693 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1694 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1695 readw(ioaddr + ANLinkPartnerAbility),
1696 readl(ioaddr + IntrStatus));
1697 if (readw(ioaddr + ANStatus) & 0x20)
1698 writeb(0x01, ioaddr + LEDCtrl);
1699 else
1700 writeb(0x03, ioaddr + LEDCtrl);
1701 }
1702 if (intr_status & StatsMax) {
1703 hamachi_get_stats(dev);
1704
1705 readl(ioaddr + 0x370);
1706 readl(ioaddr + 0x3F0);
1707 }
1708 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone))
1709 && hamachi_debug)
1710 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1711 dev->name, intr_status);
1712
1713 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1714 hmp->stats.tx_fifo_errors++;
1715 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1716 hmp->stats.rx_fifo_errors++;
1717}
1718
1719static int hamachi_close(struct net_device *dev)
1720{
1721 long ioaddr = dev->base_addr;
1722 struct hamachi_private *hmp = dev->priv;
1723 struct sk_buff *skb;
1724 int i;
1725
1726 netif_stop_queue(dev);
1727
1728 if (hamachi_debug > 1) {
1729 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1730 dev->name, readw(ioaddr + TxStatus),
1731 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1732 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1733 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1734 }
1735
1736
1737 writel(0x0000, ioaddr + InterruptEnable);
1738
1739
1740 writel(2, ioaddr + RxCmd);
1741 writew(2, ioaddr + TxCmd);
1742
1743#ifdef __i386__
1744 if (hamachi_debug > 2) {
1745 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1746 (int)hmp->tx_ring_dma);
1747 for (i = 0; i < TX_RING_SIZE; i++)
1748 printk(" %c #%d desc. %8.8x %8.8x.\n",
1749 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1750 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1751 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1752 (int)hmp->rx_ring_dma);
1753 for (i = 0; i < RX_RING_SIZE; i++) {
1754 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1755 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1756 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1757 if (hamachi_debug > 6) {
1758 if (*(u8*)hmp->rx_skbuff[i]->tail != 0x69) {
1759 u16 *addr = (u16 *)
1760 hmp->rx_skbuff[i]->tail;
1761 int j;
1762
1763 for (j = 0; j < 0x50; j++)
1764 printk(" %4.4x", addr[j]);
1765 printk("\n");
1766 }
1767 }
1768 }
1769 }
1770#endif
1771
1772 free_irq(dev->irq, dev);
1773
1774 del_timer_sync(&hmp->timer);
1775
1776
1777 for (i = 0; i < RX_RING_SIZE; i++) {
1778 skb = hmp->rx_skbuff[i];
1779 hmp->rx_ring[i].status_n_length = 0;
1780 hmp->rx_ring[i].addr = 0xBADF00D0;
1781 if (skb) {
1782 pci_unmap_single(hmp->pci_dev,
1783 hmp->rx_ring[i].addr, hmp->rx_buf_sz,
1784 PCI_DMA_FROMDEVICE);
1785 dev_kfree_skb(skb);
1786 hmp->rx_skbuff[i] = 0;
1787 }
1788 }
1789 for (i = 0; i < TX_RING_SIZE; i++) {
1790 skb = hmp->tx_skbuff[i];
1791 if (skb) {
1792 pci_unmap_single(hmp->pci_dev,
1793 hmp->tx_ring[i].addr, skb->len,
1794 PCI_DMA_TODEVICE);
1795 dev_kfree_skb(skb);
1796 hmp->tx_skbuff[i] = 0;
1797 }
1798 }
1799
1800 writeb(0x00, ioaddr + LEDCtrl);
1801
1802 return 0;
1803}
1804
1805static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1806{
1807 long ioaddr = dev->base_addr;
1808 struct hamachi_private *hmp = dev->priv;
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820 hmp->stats.rx_bytes = readl(ioaddr + 0x330);
1821 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0);
1822 hmp->stats.multicast = readl(ioaddr + 0x320);
1823
1824 hmp->stats.rx_length_errors = readl(ioaddr + 0x368);
1825 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C);
1826 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360);
1827 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364);
1828 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C);
1829
1830 return &hmp->stats;
1831}
1832
1833static void set_rx_mode(struct net_device *dev)
1834{
1835 long ioaddr = dev->base_addr;
1836
1837 if (dev->flags & IFF_PROMISC) {
1838
1839 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1840 writew(0x000F, ioaddr + AddrMode);
1841 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) {
1842
1843 writew(0x000B, ioaddr + AddrMode);
1844 } else if (dev->mc_count > 0) {
1845 struct dev_mc_list *mclist;
1846 int i;
1847 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1848 i++, mclist = mclist->next) {
1849 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1850 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1851 ioaddr + 0x104 + i*8);
1852 }
1853
1854 for (; i < 64; i++)
1855 writel(0, ioaddr + 0x104 + i*8);
1856 writew(0x0003, ioaddr + AddrMode);
1857 } else {
1858 writew(0x0001, ioaddr + AddrMode);
1859 }
1860}
1861
1862static int netdev_ethtool_ioctl(struct net_device *dev, void *useraddr)
1863{
1864 struct hamachi_private *np = dev->priv;
1865 u32 ethcmd;
1866
1867 if (copy_from_user(ðcmd, useraddr, sizeof(ethcmd)))
1868 return -EFAULT;
1869
1870 switch (ethcmd) {
1871 case ETHTOOL_GDRVINFO: {
1872 struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
1873 strcpy(info.driver, DRV_NAME);
1874 strcpy(info.version, DRV_VERSION);
1875 strcpy(info.bus_info, pci_name(np->pci_dev));
1876 if (copy_to_user(useraddr, &info, sizeof(info)))
1877 return -EFAULT;
1878 return 0;
1879 }
1880
1881
1882 case ETHTOOL_GSET: {
1883 struct ethtool_cmd ecmd = { ETHTOOL_GSET };
1884 if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1885 return -EINVAL;
1886 spin_lock_irq(&np->lock);
1887 mii_ethtool_gset(&np->mii_if, &ecmd);
1888 spin_unlock_irq(&np->lock);
1889 if (copy_to_user(useraddr, &ecmd, sizeof(ecmd)))
1890 return -EFAULT;
1891 return 0;
1892 }
1893
1894 case ETHTOOL_SSET: {
1895 int r;
1896 struct ethtool_cmd ecmd;
1897 if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1898 return -EINVAL;
1899 if (copy_from_user(&ecmd, useraddr, sizeof(ecmd)))
1900 return -EFAULT;
1901 spin_lock_irq(&np->lock);
1902 r = mii_ethtool_sset(&np->mii_if, &ecmd);
1903 spin_unlock_irq(&np->lock);
1904 return r;
1905 }
1906
1907 case ETHTOOL_NWAY_RST: {
1908 if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1909 return -EINVAL;
1910 return mii_nway_restart(&np->mii_if);
1911 }
1912
1913 case ETHTOOL_GLINK: {
1914 struct ethtool_value edata = {ETHTOOL_GLINK};
1915 if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1916 return -EINVAL;
1917 edata.data = mii_link_ok(&np->mii_if);
1918 if (copy_to_user(useraddr, &edata, sizeof(edata)))
1919 return -EFAULT;
1920 return 0;
1921 }
1922 }
1923
1924 return -EOPNOTSUPP;
1925}
1926
1927static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1928{
1929 struct hamachi_private *np = dev->priv;
1930 struct mii_ioctl_data *data = (struct mii_ioctl_data *) & rq->ifr_data;
1931 int rc;
1932
1933 if (!netif_running(dev))
1934 return -EINVAL;
1935
1936 if (cmd == SIOCETHTOOL)
1937 rc = netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
1938
1939 else if (cmd == (SIOCDEVPRIVATE+3)) {
1940 u32 *d = (u32 *)&rq->ifr_data;
1941
1942
1943
1944
1945
1946 if (!capable(CAP_NET_ADMIN))
1947 return -EPERM;
1948 writel(d[0], dev->base_addr + TxIntrCtrl);
1949 writel(d[1], dev->base_addr + RxIntrCtrl);
1950 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1951 (u32) readl(dev->base_addr + TxIntrCtrl),
1952 (u32) readl(dev->base_addr + RxIntrCtrl));
1953 rc = 0;
1954 }
1955
1956 else {
1957 spin_lock_irq(&np->lock);
1958 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1959 spin_unlock_irq(&np->lock);
1960 }
1961
1962 return rc;
1963}
1964
1965
1966static void __devexit hamachi_remove_one (struct pci_dev *pdev)
1967{
1968 struct net_device *dev = pci_get_drvdata(pdev);
1969
1970 if (dev) {
1971 struct hamachi_private *hmp = dev->priv;
1972
1973 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1974 hmp->rx_ring_dma);
1975 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1976 hmp->tx_ring_dma);
1977 unregister_netdev(dev);
1978 iounmap((char *)dev->base_addr);
1979 free_netdev(dev);
1980 pci_release_regions(pdev);
1981 pci_set_drvdata(pdev, NULL);
1982 }
1983}
1984
1985static struct pci_device_id hamachi_pci_tbl[] = {
1986 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1987 { 0, }
1988};
1989MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1990
1991static struct pci_driver hamachi_driver = {
1992 .name = DRV_NAME,
1993 .id_table = hamachi_pci_tbl,
1994 .probe = hamachi_init_one,
1995 .remove = __devexit_p(hamachi_remove_one),
1996};
1997
1998static int __init hamachi_init (void)
1999{
2000
2001#ifdef MODULE
2002 printk(version);
2003#endif
2004 if (pci_register_driver(&hamachi_driver) > 0)
2005 return 0;
2006 pci_unregister_driver(&hamachi_driver);
2007 return -ENODEV;
2008}
2009
2010static void __exit hamachi_exit (void)
2011{
2012 pci_unregister_driver(&hamachi_driver);
2013}
2014
2015
2016module_init(hamachi_init);
2017module_exit(hamachi_exit);
2018