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44
45#include <linux/config.h>
46#include <linux/crc32.h>
47#include <linux/delay.h>
48#include <linux/errno.h>
49#include <linux/if_ether.h>
50#include <linux/init.h>
51#include <linux/kernel.h>
52#include <linux/module.h>
53#include <linux/netdevice.h>
54#include <linux/etherdevice.h>
55#include <linux/spinlock.h>
56#include <linux/stddef.h>
57#include <linux/string.h>
58
59#include <asm/addrspace.h>
60#include <asm/dec/interrupts.h>
61#include <asm/dec/ioasic.h>
62#include <asm/dec/ioasic_addrs.h>
63#include <asm/dec/kn01.h>
64#include <asm/dec/machtype.h>
65#include <asm/dec/tc.h>
66#include <asm/system.h>
67
68static char version[] __devinitdata =
69"declance.c: v0.009 by Linux MIPS DECstation task force\n";
70
71MODULE_AUTHOR("Linux MIPS DECstation task force");
72MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver");
73MODULE_LICENSE("GPL");
74
75
76
77
78#define ASIC_LANCE 1
79#define PMAD_LANCE 2
80#define PMAX_LANCE 3
81
82#ifndef CONFIG_TC
83unsigned long system_base;
84unsigned long dmaptr;
85#endif
86
87#define LE_CSR0 0
88#define LE_CSR1 1
89#define LE_CSR2 2
90#define LE_CSR3 3
91
92#define LE_MO_PROM 0x8000
93
94#define LE_C0_ERR 0x8000
95#define LE_C0_BABL 0x4000
96#define LE_C0_CERR 0x2000
97#define LE_C0_MISS 0x1000
98#define LE_C0_MERR 0x0800
99#define LE_C0_RINT 0x0400
100#define LE_C0_TINT 0x0200
101#define LE_C0_IDON 0x0100
102#define LE_C0_INTR 0x0080
103#define LE_C0_INEA 0x0040
104#define LE_C0_RXON 0x0020
105#define LE_C0_TXON 0x0010
106#define LE_C0_TDMD 0x0008
107#define LE_C0_STOP 0x0004
108#define LE_C0_STRT 0x0002
109#define LE_C0_INIT 0x0001
110
111#define LE_C3_BSWP 0x4
112#define LE_C3_ACON 0x2
113#define LE_C3_BCON 0x1
114
115
116#define LE_R1_OWN 0x80
117#define LE_R1_ERR 0x40
118#define LE_R1_FRA 0x20
119#define LE_R1_OFL 0x10
120#define LE_R1_CRC 0x08
121#define LE_R1_BUF 0x04
122#define LE_R1_SOP 0x02
123#define LE_R1_EOP 0x01
124#define LE_R1_POK 0x03
125
126#define LE_T1_OWN 0x80
127#define LE_T1_ERR 0x40
128#define LE_T1_EMORE 0x10
129#define LE_T1_EONE 0x08
130#define LE_T1_EDEF 0x04
131#define LE_T1_SOP 0x02
132#define LE_T1_EOP 0x01
133#define LE_T1_POK 0x03
134
135#define LE_T3_BUF 0x8000
136#define LE_T3_UFL 0x4000
137#define LE_T3_LCOL 0x1000
138#define LE_T3_CLOS 0x0800
139#define LE_T3_RTY 0x0400
140#define LE_T3_TDR 0x03ff
141
142
143
144#ifndef LANCE_LOG_TX_BUFFERS
145#define LANCE_LOG_TX_BUFFERS 4
146#define LANCE_LOG_RX_BUFFERS 4
147#endif
148
149#define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
150#define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
151
152#define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
153#define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
154
155#define PKT_BUF_SZ 1536
156#define RX_BUFF_SIZE PKT_BUF_SZ
157#define TX_BUFF_SIZE PKT_BUF_SZ
158
159#undef TEST_HITS
160#define ZERO 0
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176struct lance_rx_desc {
177 unsigned short rmd0;
178 short gap0;
179 unsigned char rmd1_hadr;
180 unsigned char rmd1_bits;
181 short gap1;
182 short length;
183
184 short gap2;
185 unsigned short mblength;
186 short gap3;
187};
188
189struct lance_tx_desc {
190 unsigned short tmd0;
191 short gap0;
192 unsigned char tmd1_hadr;
193 unsigned char tmd1_bits;
194 short gap1;
195 short length;
196
197 short gap2;
198 unsigned short misc;
199 short gap3;
200};
201
202
203
204struct lance_init_block {
205 unsigned short mode;
206 short gap0;
207
208 unsigned char phys_addr[12];
209
210
211 unsigned short filter[8];
212
213
214
215
216 unsigned short rx_ptr;
217 short gap1;
218 unsigned short rx_len;
219 short gap2;
220 unsigned short tx_ptr;
221 short gap3;
222 unsigned short tx_len;
223 short gap4;
224 short gap5[8];
225
226
227 struct lance_rx_desc brx_ring[RX_RING_SIZE];
228 struct lance_tx_desc btx_ring[TX_RING_SIZE];
229};
230
231#define BUF_OFFSET_CPU sizeof(struct lance_init_block)
232#define BUF_OFFSET_LNC (sizeof(struct lance_init_block)>>1)
233
234#define libdesc_offset(rt, elem) \
235((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
236
237
238
239
240#define LANCE_ADDR(x) (PHYSADDR(x) >> 1)
241
242struct lance_private {
243 struct net_device *next;
244 int type;
245 int slot;
246 int dma_irq;
247 volatile struct lance_regs *ll;
248 volatile struct lance_init_block *init_block;
249
250 spinlock_t lock;
251
252 int rx_new, tx_new;
253 int rx_old, tx_old;
254
255 struct net_device_stats stats;
256
257 unsigned short busmaster_regval;
258
259 struct timer_list multicast_timer;
260
261
262 char *rx_buf_ptr_cpu[RX_RING_SIZE];
263 char *tx_buf_ptr_cpu[TX_RING_SIZE];
264
265
266 char *rx_buf_ptr_lnc[RX_RING_SIZE];
267 char *tx_buf_ptr_lnc[TX_RING_SIZE];
268};
269
270#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
271 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
272 lp->tx_old - lp->tx_new-1)
273
274
275
276
277
278
279
280struct lance_regs {
281 volatile unsigned short rdp;
282 unsigned short pad;
283 volatile unsigned short rap;
284};
285
286int dec_lance_debug = 2;
287
288static struct net_device *root_lance_dev;
289
290static inline void writereg(volatile unsigned short *regptr, short value)
291{
292 *regptr = value;
293 iob();
294}
295
296
297static void load_csrs(struct lance_private *lp)
298{
299 volatile struct lance_regs *ll = lp->ll;
300 int leptr;
301
302
303
304
305 leptr = 0;
306
307 writereg(&ll->rap, LE_CSR1);
308 writereg(&ll->rdp, (leptr & 0xFFFF));
309 writereg(&ll->rap, LE_CSR2);
310 writereg(&ll->rdp, leptr >> 16);
311 writereg(&ll->rap, LE_CSR3);
312 writereg(&ll->rdp, lp->busmaster_regval);
313
314
315 writereg(&ll->rap, LE_CSR0);
316}
317
318
319
320
321
322void cp_to_buf(const int type, void *to, const void *from, int len)
323{
324 unsigned short *tp, *fp, clen;
325 unsigned char *rtp, *rfp;
326
327 if (type == PMAX_LANCE) {
328 clen = len >> 1;
329 tp = (unsigned short *) to;
330 fp = (unsigned short *) from;
331
332 while (clen--) {
333 *tp++ = *fp++;
334 tp++;
335 }
336
337 clen = len & 1;
338 rtp = (unsigned char *) tp;
339 rfp = (unsigned char *) fp;
340 while (clen--) {
341 *rtp++ = *rfp++;
342 }
343 } else {
344
345
346
347 clen = len >> 4;
348 tp = (unsigned short *) to;
349 fp = (unsigned short *) from;
350 while (clen--) {
351 *tp++ = *fp++;
352 *tp++ = *fp++;
353 *tp++ = *fp++;
354 *tp++ = *fp++;
355 *tp++ = *fp++;
356 *tp++ = *fp++;
357 *tp++ = *fp++;
358 *tp++ = *fp++;
359 tp += 8;
360 }
361
362
363
364
365 clen = len & 15;
366 rtp = (unsigned char *) tp;
367 rfp = (unsigned char *) fp;
368 while (clen--) {
369 *rtp++ = *rfp++;
370 }
371 }
372
373 iob();
374}
375
376void cp_from_buf(const int type, void *to, const void *from, int len)
377{
378 unsigned short *tp, *fp, clen;
379 unsigned char *rtp, *rfp;
380
381 if (type == PMAX_LANCE) {
382 clen = len >> 1;
383 tp = (unsigned short *) to;
384 fp = (unsigned short *) from;
385 while (clen--) {
386 *tp++ = *fp++;
387 fp++;
388 }
389
390 clen = len & 1;
391
392 rtp = (unsigned char *) tp;
393 rfp = (unsigned char *) fp;
394
395 while (clen--) {
396 *rtp++ = *rfp++;
397 }
398 } else {
399
400
401
402
403 clen = len >> 4;
404 tp = (unsigned short *) to;
405 fp = (unsigned short *) from;
406 while (clen--) {
407 *tp++ = *fp++;
408 *tp++ = *fp++;
409 *tp++ = *fp++;
410 *tp++ = *fp++;
411 *tp++ = *fp++;
412 *tp++ = *fp++;
413 *tp++ = *fp++;
414 *tp++ = *fp++;
415 fp += 8;
416 }
417
418
419
420
421 clen = len & 15;
422 rtp = (unsigned char *) tp;
423 rfp = (unsigned char *) fp;
424 while (clen--) {
425 *rtp++ = *rfp++;
426 }
427
428
429 }
430
431}
432
433
434static void lance_init_ring(struct net_device *dev)
435{
436 struct lance_private *lp = (struct lance_private *) dev->priv;
437 volatile struct lance_init_block *ib;
438 int leptr;
439 int i;
440
441 ib = (struct lance_init_block *) (dev->mem_start);
442
443
444 netif_stop_queue(dev);
445 lp->rx_new = lp->tx_new = 0;
446 lp->rx_old = lp->tx_old = 0;
447
448
449
450
451 ib->phys_addr[0] = dev->dev_addr[0];
452 ib->phys_addr[1] = dev->dev_addr[1];
453 ib->phys_addr[4] = dev->dev_addr[2];
454 ib->phys_addr[5] = dev->dev_addr[3];
455 ib->phys_addr[8] = dev->dev_addr[4];
456 ib->phys_addr[9] = dev->dev_addr[5];
457
458
459
460 leptr = LANCE_ADDR(libdesc_offset(brx_ring, 0));
461 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
462 ib->rx_ptr = leptr;
463 if (ZERO)
464 printk("RX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(brx_ring, 0));
465
466
467 leptr = LANCE_ADDR(libdesc_offset(btx_ring, 0));
468 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
469 ib->tx_ptr = leptr;
470 if (ZERO)
471 printk("TX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(btx_ring, 0));
472
473 if (ZERO)
474 printk("TX rings:\n");
475
476
477 for (i = 0; i < TX_RING_SIZE; i++) {
478 leptr = (int) lp->tx_buf_ptr_lnc[i];
479 ib->btx_ring[i].tmd0 = leptr;
480 ib->btx_ring[i].tmd1_hadr = leptr >> 16;
481 ib->btx_ring[i].tmd1_bits = 0;
482 ib->btx_ring[i].length = 0xf000;
483 ib->btx_ring[i].misc = 0;
484 if (i < 3 && ZERO)
485 printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->tx_buf_ptr_cpu[i]);
486 }
487
488
489 if (ZERO)
490 printk("RX rings:\n");
491 for (i = 0; i < RX_RING_SIZE; i++) {
492 leptr = (int) lp->rx_buf_ptr_lnc[i];
493 ib->brx_ring[i].rmd0 = leptr;
494 ib->brx_ring[i].rmd1_hadr = leptr >> 16;
495 ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
496 ib->brx_ring[i].length = -RX_BUFF_SIZE | 0xf000;
497 ib->brx_ring[i].mblength = 0;
498 if (i < 3 && ZERO)
499 printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->rx_buf_ptr_cpu[i]);
500 }
501 iob();
502}
503
504static int init_restart_lance(struct lance_private *lp)
505{
506 volatile struct lance_regs *ll = lp->ll;
507 int i;
508
509 writereg(&ll->rap, LE_CSR0);
510 writereg(&ll->rdp, LE_C0_INIT);
511
512
513 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
514 udelay(10);
515 }
516 if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
517 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
518 return -1;
519 }
520 if ((ll->rdp & LE_C0_ERR)) {
521 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
522 return -1;
523 }
524 writereg(&ll->rdp, LE_C0_IDON);
525 writereg(&ll->rdp, LE_C0_STRT);
526 writereg(&ll->rdp, LE_C0_INEA);
527
528 return 0;
529}
530
531static int lance_rx(struct net_device *dev)
532{
533 struct lance_private *lp = (struct lance_private *) dev->priv;
534 volatile struct lance_init_block *ib;
535 volatile struct lance_rx_desc *rd = 0;
536 unsigned char bits;
537 int len = 0;
538 struct sk_buff *skb = 0;
539 ib = (struct lance_init_block *) (dev->mem_start);
540
541#ifdef TEST_HITS
542 {
543 int i;
544
545 printk("[");
546 for (i = 0; i < RX_RING_SIZE; i++) {
547 if (i == lp->rx_new)
548 printk("%s", ib->brx_ring[i].rmd1_bits &
549 LE_R1_OWN ? "_" : "X");
550 else
551 printk("%s", ib->brx_ring[i].rmd1_bits &
552 LE_R1_OWN ? "." : "1");
553 }
554 printk("]");
555 }
556#endif
557
558 for (rd = &ib->brx_ring[lp->rx_new];
559 !((bits = rd->rmd1_bits) & LE_R1_OWN);
560 rd = &ib->brx_ring[lp->rx_new]) {
561
562
563 if ((bits & LE_R1_POK) != LE_R1_POK) {
564 lp->stats.rx_over_errors++;
565 lp->stats.rx_errors++;
566 } else if (bits & LE_R1_ERR) {
567
568
569
570 if (bits & LE_R1_BUF)
571 lp->stats.rx_fifo_errors++;
572 if (bits & LE_R1_CRC)
573 lp->stats.rx_crc_errors++;
574 if (bits & LE_R1_OFL)
575 lp->stats.rx_over_errors++;
576 if (bits & LE_R1_FRA)
577 lp->stats.rx_frame_errors++;
578 if (bits & LE_R1_EOP)
579 lp->stats.rx_errors++;
580 } else {
581 len = (rd->mblength & 0xfff) - 4;
582 skb = dev_alloc_skb(len + 2);
583
584 if (skb == 0) {
585 printk("%s: Memory squeeze, deferring packet.\n",
586 dev->name);
587 lp->stats.rx_dropped++;
588 rd->mblength = 0;
589 rd->rmd1_bits = LE_R1_OWN;
590 lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
591 return 0;
592 }
593 lp->stats.rx_bytes += len;
594
595 skb->dev = dev;
596 skb_reserve(skb, 2);
597 skb_put(skb, len);
598
599 cp_from_buf(lp->type, skb->data,
600 (char *)lp->rx_buf_ptr_cpu[lp->rx_new],
601 len);
602
603 skb->protocol = eth_type_trans(skb, dev);
604 netif_rx(skb);
605 dev->last_rx = jiffies;
606 lp->stats.rx_packets++;
607 }
608
609
610 rd->mblength = 0;
611 rd->length = -RX_BUFF_SIZE | 0xf000;
612 rd->rmd1_bits = LE_R1_OWN;
613 lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
614 }
615 return 0;
616}
617
618static void lance_tx(struct net_device *dev)
619{
620 struct lance_private *lp = (struct lance_private *) dev->priv;
621 volatile struct lance_init_block *ib;
622 volatile struct lance_regs *ll = lp->ll;
623 volatile struct lance_tx_desc *td;
624 int i, j;
625 int status;
626 ib = (struct lance_init_block *) (dev->mem_start);
627 j = lp->tx_old;
628
629 spin_lock(&lp->lock);
630
631 for (i = j; i != lp->tx_new; i = j) {
632 td = &ib->btx_ring[i];
633
634 if (td->tmd1_bits & LE_T1_OWN)
635 break;
636
637 if (td->tmd1_bits & LE_T1_ERR) {
638 status = td->misc;
639
640 lp->stats.tx_errors++;
641 if (status & LE_T3_RTY)
642 lp->stats.tx_aborted_errors++;
643 if (status & LE_T3_LCOL)
644 lp->stats.tx_window_errors++;
645
646 if (status & LE_T3_CLOS) {
647 lp->stats.tx_carrier_errors++;
648 printk("%s: Carrier Lost\n", dev->name);
649
650 writereg(&ll->rap, LE_CSR0);
651 writereg(&ll->rdp, LE_C0_STOP);
652 lance_init_ring(dev);
653 load_csrs(lp);
654 init_restart_lance(lp);
655 goto out;
656 }
657
658
659
660 if (status & (LE_T3_BUF | LE_T3_UFL)) {
661 lp->stats.tx_fifo_errors++;
662
663 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
664 dev->name);
665
666 writereg(&ll->rap, LE_CSR0);
667 writereg(&ll->rdp, LE_C0_STOP);
668 lance_init_ring(dev);
669 load_csrs(lp);
670 init_restart_lance(lp);
671 goto out;
672 }
673 } else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
674
675
676
677 td->tmd1_bits &= ~(LE_T1_POK);
678
679
680 if (td->tmd1_bits & LE_T1_EONE)
681 lp->stats.collisions++;
682
683
684 if (td->tmd1_bits & LE_T1_EMORE)
685 lp->stats.collisions += 2;
686
687 lp->stats.tx_packets++;
688 }
689 j = (j + 1) & TX_RING_MOD_MASK;
690 }
691 lp->tx_old = j;
692out:
693 if (netif_queue_stopped(dev) &&
694 TX_BUFFS_AVAIL > 0)
695 netif_wake_queue(dev);
696
697 spin_unlock(&lp->lock);
698}
699
700static void lance_dma_merr_int(const int irq, void *dev_id,
701 struct pt_regs *regs)
702{
703 struct net_device *dev = (struct net_device *) dev_id;
704
705 printk("%s: DMA error\n", dev->name);
706}
707
708static irqreturn_t
709lance_interrupt(const int irq, void *dev_id, struct pt_regs *regs)
710{
711 struct net_device *dev = (struct net_device *) dev_id;
712 struct lance_private *lp = (struct lance_private *) dev->priv;
713 volatile struct lance_regs *ll = lp->ll;
714 int csr0;
715
716 writereg(&ll->rap, LE_CSR0);
717 csr0 = ll->rdp;
718
719
720 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
721
722 if ((csr0 & LE_C0_ERR)) {
723
724 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
725 LE_C0_CERR | LE_C0_MERR);
726 }
727 if (csr0 & LE_C0_RINT)
728 lance_rx(dev);
729
730 if (csr0 & LE_C0_TINT)
731 lance_tx(dev);
732
733 if (csr0 & LE_C0_BABL)
734 lp->stats.tx_errors++;
735
736 if (csr0 & LE_C0_MISS)
737 lp->stats.rx_errors++;
738
739 if (csr0 & LE_C0_MERR) {
740 printk("%s: Memory error, status %04x\n", dev->name, csr0);
741
742 writereg(&ll->rdp, LE_C0_STOP);
743
744 lance_init_ring(dev);
745 load_csrs(lp);
746 init_restart_lance(lp);
747 netif_wake_queue(dev);
748 }
749
750 writereg(&ll->rdp, LE_C0_INEA);
751 writereg(&ll->rdp, LE_C0_INEA);
752 return IRQ_HANDLED;
753}
754
755struct net_device *last_dev = 0;
756
757static int lance_open(struct net_device *dev)
758{
759 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
760 struct lance_private *lp = (struct lance_private *) dev->priv;
761 volatile struct lance_regs *ll = lp->ll;
762 int status = 0;
763
764 last_dev = dev;
765
766
767 writereg(&ll->rap, LE_CSR0);
768 writereg(&ll->rdp, LE_C0_STOP);
769
770
771
772
773
774
775
776 ib->mode = 0;
777 ib->filter [0] = 0;
778 ib->filter [2] = 0;
779 ib->filter [4] = 0;
780 ib->filter [6] = 0;
781
782 lance_init_ring(dev);
783 load_csrs(lp);
784
785 netif_start_queue(dev);
786
787
788 if (request_irq(dev->irq, &lance_interrupt, 0, "lance", dev)) {
789 printk("lance: Can't get IRQ %d\n", dev->irq);
790 return -EAGAIN;
791 }
792 if (lp->dma_irq >= 0) {
793 unsigned long flags;
794
795 if (request_irq(lp->dma_irq, &lance_dma_merr_int, 0,
796 "lance error", dev)) {
797 free_irq(dev->irq, dev);
798 printk("lance: Can't get DMA IRQ %d\n", lp->dma_irq);
799 return -EAGAIN;
800 }
801
802 spin_lock_irqsave(&ioasic_ssr_lock, flags);
803
804 fast_mb();
805
806 ioasic_write(IO_REG_SSR,
807 ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN);
808
809 fast_mb();
810 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
811 }
812
813 status = init_restart_lance(lp);
814
815
816
817
818
819
820 return status;
821}
822
823static int lance_close(struct net_device *dev)
824{
825 struct lance_private *lp = (struct lance_private *) dev->priv;
826 volatile struct lance_regs *ll = lp->ll;
827
828 netif_stop_queue(dev);
829 del_timer_sync(&lp->multicast_timer);
830
831
832 writereg(&ll->rap, LE_CSR0);
833 writereg(&ll->rdp, LE_C0_STOP);
834
835 if (lp->dma_irq >= 0) {
836 unsigned long flags;
837
838 spin_lock_irqsave(&ioasic_ssr_lock, flags);
839
840 fast_mb();
841
842 ioasic_write(IO_REG_SSR,
843 ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN);
844
845 fast_iob();
846 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
847
848 free_irq(lp->dma_irq, dev);
849 }
850 free_irq(dev->irq, dev);
851
852
853
854 return 0;
855}
856
857static inline int lance_reset(struct net_device *dev)
858{
859 struct lance_private *lp = (struct lance_private *) dev->priv;
860 volatile struct lance_regs *ll = lp->ll;
861 int status;
862
863
864 writereg(&ll->rap, LE_CSR0);
865 writereg(&ll->rdp, LE_C0_STOP);
866
867 lance_init_ring(dev);
868 load_csrs(lp);
869 dev->trans_start = jiffies;
870 status = init_restart_lance(lp);
871 return status;
872}
873
874static void lance_tx_timeout(struct net_device *dev)
875{
876 struct lance_private *lp = (struct lance_private *) dev->priv;
877 volatile struct lance_regs *ll = lp->ll;
878
879 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
880 dev->name, ll->rdp);
881 lance_reset(dev);
882 netif_wake_queue(dev);
883}
884
885static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
886{
887 struct lance_private *lp = (struct lance_private *) dev->priv;
888 volatile struct lance_regs *ll = lp->ll;
889 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
890 int entry, skblen, len;
891
892 skblen = skb->len;
893
894 len = skblen;
895
896 if (len < ETH_ZLEN) {
897 skb = skb_padto(skb, ETH_ZLEN);
898 if (skb == NULL)
899 return 0;
900 len = ETH_ZLEN;
901 }
902
903 lp->stats.tx_bytes += len;
904
905 entry = lp->tx_new & TX_RING_MOD_MASK;
906 ib->btx_ring[entry].length = (-len);
907 ib->btx_ring[entry].misc = 0;
908
909 cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data,
910 skblen);
911
912
913
914
915
916
917
918
919
920 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
921 lp->tx_new = (lp->tx_new + 1) & TX_RING_MOD_MASK;
922
923 if (TX_BUFFS_AVAIL <= 0)
924 netif_stop_queue(dev);
925
926
927 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
928
929 spin_unlock_irq(&lp->lock);
930
931 dev->trans_start = jiffies;
932 dev_kfree_skb(skb);
933
934 return 0;
935}
936
937static struct net_device_stats *lance_get_stats(struct net_device *dev)
938{
939 struct lance_private *lp = (struct lance_private *) dev->priv;
940
941 return &lp->stats;
942}
943
944static void lance_load_multicast(struct net_device *dev)
945{
946 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
947 volatile u16 *mcast_table = (u16 *) & ib->filter;
948 struct dev_mc_list *dmi = dev->mc_list;
949 char *addrs;
950 int i;
951 u32 crc;
952
953
954 if (dev->flags & IFF_ALLMULTI) {
955 ib->filter[0] = 0xffff;
956 ib->filter[2] = 0xffff;
957 ib->filter[4] = 0xffff;
958 ib->filter[6] = 0xffff;
959 return;
960 }
961
962 ib->filter[0] = 0;
963 ib->filter[2] = 0;
964 ib->filter[4] = 0;
965 ib->filter[6] = 0;
966
967
968 for (i = 0; i < dev->mc_count; i++) {
969 addrs = dmi->dmi_addr;
970 dmi = dmi->next;
971
972
973 if (!(*addrs & 1))
974 continue;
975
976 crc = ether_crc_le(ETH_ALEN, addrs);
977 crc = crc >> 26;
978 mcast_table[2 * (crc >> 4)] |= 1 << (crc & 0xf);
979 }
980 return;
981}
982
983static void lance_set_multicast(struct net_device *dev)
984{
985 struct lance_private *lp = (struct lance_private *) dev->priv;
986 volatile struct lance_init_block *ib;
987 volatile struct lance_regs *ll = lp->ll;
988
989 ib = (struct lance_init_block *) (dev->mem_start);
990
991 if (!netif_running(dev))
992 return;
993
994 if (lp->tx_old != lp->tx_new) {
995 mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100);
996 netif_wake_queue(dev);
997 return;
998 }
999
1000 netif_stop_queue(dev);
1001
1002 writereg(&ll->rap, LE_CSR0);
1003 writereg(&ll->rdp, LE_C0_STOP);
1004
1005 lance_init_ring(dev);
1006
1007 if (dev->flags & IFF_PROMISC) {
1008 ib->mode |= LE_MO_PROM;
1009 } else {
1010 ib->mode &= ~LE_MO_PROM;
1011 lance_load_multicast(dev);
1012 }
1013 load_csrs(lp);
1014 init_restart_lance(lp);
1015 netif_wake_queue(dev);
1016}
1017
1018static void lance_set_multicast_retry(unsigned long _opaque)
1019{
1020 struct net_device *dev = (struct net_device *) _opaque;
1021
1022 lance_set_multicast(dev);
1023}
1024
1025static int __init dec_lance_init(const int type, const int slot)
1026{
1027 static unsigned version_printed;
1028 struct net_device *dev;
1029 struct lance_private *lp;
1030 volatile struct lance_regs *ll;
1031 int i, ret;
1032 unsigned long esar_base;
1033 unsigned char *esar;
1034
1035#ifndef CONFIG_TC
1036 system_base = KN01_LANCE_BASE;
1037#endif
1038
1039 if (dec_lance_debug && version_printed++ == 0)
1040 printk(version);
1041
1042 dev = init_etherdev(NULL, sizeof(struct lance_private));
1043 if (!dev)
1044 return -ENOMEM;
1045 SET_MODULE_OWNER(dev);
1046
1047
1048
1049
1050
1051 lp = (struct lance_private *) dev->priv;
1052 spin_lock_init(&lp->lock);
1053
1054 lp->type = type;
1055 lp->slot = slot;
1056 switch (type) {
1057#ifdef CONFIG_TC
1058 case ASIC_LANCE:
1059 dev->base_addr = system_base + IOASIC_LANCE;
1060
1061
1062
1063
1064
1065 dev->mem_start = KSEG1ADDR(0x00020000);
1066 dev->mem_end = dev->mem_start + 0x00020000;
1067 dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1068 esar_base = system_base + IOASIC_ESAR;
1069
1070
1071 memset((void *)dev->mem_start, 0,
1072 dev->mem_end - dev->mem_start);
1073
1074
1075
1076
1077 for (i = 0; i < RX_RING_SIZE; i++) {
1078 lp->rx_buf_ptr_cpu[i] =
1079 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1080 2 * i * RX_BUFF_SIZE);
1081 lp->rx_buf_ptr_lnc[i] =
1082 (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1083 }
1084 for (i = 0; i < TX_RING_SIZE; i++) {
1085 lp->tx_buf_ptr_cpu[i] =
1086 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1087 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1088 2 * i * TX_BUFF_SIZE);
1089 lp->tx_buf_ptr_lnc[i] =
1090 (char *)(BUF_OFFSET_LNC +
1091 RX_RING_SIZE * RX_BUFF_SIZE +
1092 i * TX_BUFF_SIZE);
1093 }
1094
1095
1096 lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR];
1097 ioasic_write(IO_REG_LANCE_DMA_P,
1098 PHYSADDR(dev->mem_start) << 3);
1099
1100 break;
1101
1102 case PMAD_LANCE:
1103 claim_tc_card(slot);
1104
1105 dev->mem_start = get_tc_base_addr(slot);
1106 dev->base_addr = dev->mem_start + 0x100000;
1107 dev->irq = get_tc_irq_nr(slot);
1108 esar_base = dev->mem_start + 0x1c0002;
1109 lp->dma_irq = -1;
1110
1111 for (i = 0; i < RX_RING_SIZE; i++) {
1112 lp->rx_buf_ptr_cpu[i] =
1113 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1114 i * RX_BUFF_SIZE);
1115 lp->rx_buf_ptr_lnc[i] =
1116 (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1117 }
1118 for (i = 0; i < TX_RING_SIZE; i++) {
1119 lp->tx_buf_ptr_cpu[i] =
1120 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1121 RX_RING_SIZE * RX_BUFF_SIZE +
1122 i * TX_BUFF_SIZE);
1123 lp->tx_buf_ptr_lnc[i] =
1124 (char *)(BUF_OFFSET_LNC +
1125 RX_RING_SIZE * RX_BUFF_SIZE +
1126 i * TX_BUFF_SIZE);
1127 }
1128
1129 break;
1130#endif
1131
1132 case PMAX_LANCE:
1133 dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1134 dev->base_addr = KN01_LANCE_BASE;
1135 dev->mem_start = KN01_LANCE_BASE + 0x01000000;
1136 esar_base = KN01_RTC_BASE + 1;
1137 lp->dma_irq = -1;
1138
1139
1140
1141
1142 for (i = 0; i < RX_RING_SIZE; i++) {
1143 lp->rx_buf_ptr_cpu[i] =
1144 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1145 2 * i * RX_BUFF_SIZE);
1146 lp->rx_buf_ptr_lnc[i] =
1147 (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1148 }
1149 for (i = 0; i < TX_RING_SIZE; i++) {
1150 lp->tx_buf_ptr_cpu[i] =
1151 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1152 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1153 2 * i * TX_BUFF_SIZE);
1154 lp->tx_buf_ptr_lnc[i] =
1155 (char *)(BUF_OFFSET_LNC +
1156 RX_RING_SIZE * RX_BUFF_SIZE +
1157 i * TX_BUFF_SIZE);
1158 }
1159
1160 break;
1161
1162 default:
1163 printk("declance_init called with unknown type\n");
1164 ret = -ENODEV;
1165 goto err_out;
1166 }
1167
1168 ll = (struct lance_regs *) dev->base_addr;
1169 esar = (unsigned char *) esar_base;
1170
1171
1172
1173 if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
1174 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
1175 printk("Ethernet station address prom not found!\n");
1176 ret = -ENODEV;
1177 goto err_out;
1178 }
1179
1180 for (i = 0; i < 8; i++) {
1181 if (esar[i * 4] != esar[0x3c - i * 4] &&
1182 esar[i * 4] != esar[0x40 + i * 4] &&
1183 esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
1184 printk("Something is wrong with the ethernet "
1185 "station address prom!\n");
1186 ret = -ENODEV;
1187 goto err_out;
1188 }
1189 }
1190
1191 lp->next = root_lance_dev;
1192 root_lance_dev = dev;
1193
1194
1195
1196
1197
1198 switch (type) {
1199 case ASIC_LANCE:
1200 printk("%s: IOASIC onboard LANCE, addr = ", dev->name);
1201 break;
1202 case PMAD_LANCE:
1203 printk("%s: PMAD-AA, addr = ", dev->name);
1204 break;
1205 case PMAX_LANCE:
1206 printk("%s: PMAX onboard LANCE, addr = ", dev->name);
1207 break;
1208 }
1209 for (i = 0; i < 6; i++) {
1210 dev->dev_addr[i] = esar[i * 4];
1211 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':');
1212 }
1213
1214 printk(" irq = %d\n", dev->irq);
1215
1216 dev->open = &lance_open;
1217 dev->stop = &lance_close;
1218 dev->hard_start_xmit = &lance_start_xmit;
1219 dev->tx_timeout = &lance_tx_timeout;
1220 dev->watchdog_timeo = 5*HZ;
1221 dev->get_stats = &lance_get_stats;
1222 dev->set_multicast_list = &lance_set_multicast;
1223
1224
1225 lp->ll = ll;
1226
1227
1228
1229
1230 lp->busmaster_regval = 0;
1231
1232 dev->dma = 0;
1233
1234
1235
1236
1237
1238
1239 init_timer(&lp->multicast_timer);
1240 lp->multicast_timer.data = (unsigned long) dev;
1241 lp->multicast_timer.function = &lance_set_multicast_retry;
1242
1243 return 0;
1244
1245err_out:
1246 unregister_netdev(dev);
1247 free_netdev(dev);
1248 return ret;
1249}
1250
1251
1252
1253static int __init dec_lance_probe(void)
1254{
1255 int count = 0;
1256
1257
1258#ifdef CONFIG_TC
1259 if (TURBOCHANNEL) {
1260 int slot;
1261
1262 while ((slot = search_tc_card("PMAD-AA")) >= 0) {
1263 if (dec_lance_init(PMAD_LANCE, slot) < 0)
1264 break;
1265 count++;
1266 }
1267 }
1268#endif
1269
1270
1271 if (dec_interrupt[DEC_IRQ_LANCE] >= 0) {
1272 if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) {
1273#ifdef CONFIG_TC
1274 if (dec_lance_init(ASIC_LANCE, -1) >= 0)
1275 count++;
1276#endif
1277 } else if (!TURBOCHANNEL) {
1278 if (dec_lance_init(PMAX_LANCE, -1) >= 0)
1279 count++;
1280 }
1281 }
1282
1283 return (count > 0) ? 0 : -ENODEV;
1284}
1285
1286static void __exit dec_lance_cleanup(void)
1287{
1288 while (root_lance_dev) {
1289 struct net_device *dev = root_lance_dev;
1290 struct lance_private *lp = (struct lance_private *)dev->priv;
1291
1292#ifdef CONFIG_TC
1293 if (lp->slot >= 0)
1294 release_tc_card(lp->slot);
1295#endif
1296 root_lance_dev = lp->next;
1297 unregister_netdev(dev);
1298 free_netdev(dev);
1299 }
1300}
1301
1302module_init(dec_lance_probe);
1303module_exit(dec_lance_cleanup);
1304