1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34static const char versionA[] =
35"atp.c:v1.09=ac 2002/10/01 Donald Becker <becker@scyld.com>\n";
36static const char versionB[] =
37" http://www.scyld.com/network/atp.html\n";
38
39
40
41
42static int debug = 1;
43#define net_debug debug
44
45
46static int max_interrupt_work = 15;
47
48#define NUM_UNITS 2
49
50static int io[NUM_UNITS];
51static int irq[NUM_UNITS];
52static int xcvr[NUM_UNITS];
53
54
55
56
57#define TX_TIMEOUT (400*HZ/1000)
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127#include <linux/kernel.h>
128#include <linux/module.h>
129#include <linux/types.h>
130#include <linux/fcntl.h>
131#include <linux/interrupt.h>
132#include <linux/ioport.h>
133#include <linux/in.h>
134#include <linux/slab.h>
135#include <linux/string.h>
136#include <linux/errno.h>
137#include <linux/init.h>
138#include <linux/crc32.h>
139#include <linux/netdevice.h>
140#include <linux/etherdevice.h>
141#include <linux/skbuff.h>
142#include <linux/spinlock.h>
143#include <linux/delay.h>
144
145#include <asm/system.h>
146#include <asm/bitops.h>
147#include <asm/io.h>
148#include <asm/dma.h>
149
150#include "atp.h"
151
152MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
153MODULE_DESCRIPTION("RealTek RTL8002/8012 parallel port Ethernet driver");
154MODULE_LICENSE("GPL");
155
156MODULE_PARM(max_interrupt_work, "i");
157MODULE_PARM(debug, "i");
158MODULE_PARM(io, "1-" __MODULE_STRING(NUM_UNITS) "i");
159MODULE_PARM(irq, "1-" __MODULE_STRING(NUM_UNITS) "i");
160MODULE_PARM(xcvr, "1-" __MODULE_STRING(NUM_UNITS) "i");
161MODULE_PARM_DESC(max_interrupt_work, "ATP maximum events handled per interrupt");
162MODULE_PARM_DESC(debug, "ATP debug level (0-7)");
163MODULE_PARM_DESC(io, "ATP I/O base address(es)");
164MODULE_PARM_DESC(irq, "ATP IRQ number(s)");
165MODULE_PARM_DESC(xcvr, "ATP transceiver(s) (0=internal, 1=external)");
166
167
168#define ETHERCARD_TOTAL_SIZE 3
169
170
171static char mux_8012[] = { 0xff, 0xf7, 0xff, 0xfb, 0xf3, 0xfb, 0xff, 0xf7,};
172
173struct net_local {
174 spinlock_t lock;
175 struct net_device *next_module;
176 struct net_device_stats stats;
177 struct timer_list timer;
178 long last_rx_time;
179 int saved_tx_size;
180 unsigned int tx_unit_busy:1;
181 unsigned char re_tx,
182 addr_mode,
183 pac_cnt_in_tx_buf,
184 chip_type;
185};
186
187
188
189
190#define TIMED_CHECKER (HZ/4)
191#ifdef TIMED_CHECKER
192#include <linux/timer.h>
193static void atp_timed_checker(unsigned long ignored);
194#endif
195
196
197
198static int atp_probe1(struct net_device *dev, long ioaddr);
199static void get_node_ID(struct net_device *dev);
200static unsigned short eeprom_op(long ioaddr, unsigned int cmd);
201static int net_open(struct net_device *dev);
202static void hardware_init(struct net_device *dev);
203static void write_packet(long ioaddr, int length, unsigned char *packet, int pad, int mode);
204static void trigger_send(long ioaddr, int length);
205static int atp_send_packet(struct sk_buff *skb, struct net_device *dev);
206static irqreturn_t atp_interrupt(int irq, void *dev_id, struct pt_regs *regs);
207static void net_rx(struct net_device *dev);
208static void read_block(long ioaddr, int length, unsigned char *buffer, int data_mode);
209static int net_close(struct net_device *dev);
210static struct net_device_stats *net_get_stats(struct net_device *dev);
211static void set_rx_mode_8002(struct net_device *dev);
212static void set_rx_mode_8012(struct net_device *dev);
213static void tx_timeout(struct net_device *dev);
214
215
216
217static struct net_device *root_atp_dev;
218
219
220
221
222
223
224
225
226
227static int __init atp_init(struct net_device *dev)
228{
229 int *port, ports[] = {0x378, 0x278, 0x3bc, 0};
230 int base_addr = dev ? dev->base_addr : io[0];
231
232 if (base_addr > 0x1ff)
233 return atp_probe1(dev, base_addr);
234 else if (base_addr == 1)
235 return -ENXIO;
236
237 for (port = ports; *port; port++) {
238 long ioaddr = *port;
239 outb(0x57, ioaddr + PAR_DATA);
240 if (inb(ioaddr + PAR_DATA) != 0x57)
241 continue;
242 if (atp_probe1(dev, ioaddr) == 0)
243 return 0;
244 }
245
246 return -ENODEV;
247}
248
249static int __init atp_probe1(struct net_device *dev, long ioaddr)
250{
251 struct net_local *lp;
252 int saved_ctrl_reg, status, i;
253
254 outb(0xff, ioaddr + PAR_DATA);
255
256
257 saved_ctrl_reg = inb(ioaddr + PAR_CONTROL);
258 if (net_debug > 3)
259 printk("atp: Control register was %#2.2x.\n", saved_ctrl_reg);
260
261 outb(0x04, ioaddr + PAR_CONTROL);
262#ifndef final_version
263 if (net_debug > 3) {
264
265 for (i = 0; i < 8; i++)
266 outb(mux_8012[i], ioaddr + PAR_DATA);
267 write_reg(ioaddr, MODSEL, 0x00);
268 printk("atp: Registers are ");
269 for (i = 0; i < 32; i++)
270 printk(" %2.2x", read_nibble(ioaddr, i));
271 printk(".\n");
272 }
273#endif
274
275 for (i = 0; i < 8; i++)
276 outb(mux_8012[i], ioaddr + PAR_DATA);
277 write_reg_high(ioaddr, CMR1, CMR1h_RESET);
278
279 status = read_nibble(ioaddr, CMR1);
280
281 if (net_debug > 3) {
282 printk(KERN_DEBUG "atp: Status nibble was %#2.2x..", status);
283 for (i = 0; i < 32; i++)
284 printk(" %2.2x", read_nibble(ioaddr, i));
285 printk("\n");
286 }
287
288 if ((status & 0x78) != 0x08) {
289
290 outb(saved_ctrl_reg, ioaddr + PAR_CONTROL);
291 return -ENODEV;
292 }
293 status = read_nibble(ioaddr, CMR2_h);
294 if ((status & 0x78) != 0x10) {
295 outb(saved_ctrl_reg, ioaddr + PAR_CONTROL);
296 return -ENODEV;
297 }
298
299 dev = init_etherdev(dev, sizeof(struct net_local));
300 if (!dev)
301 return -ENOMEM;
302 SET_MODULE_OWNER(dev);
303
304
305 write_reg_byte(ioaddr, CMR2, 0x01);
306 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
307
308
309 if (irq[0])
310 dev->irq = irq[0];
311 else if (ioaddr == 0x378)
312 dev->irq = 7;
313 else
314 dev->irq = 5;
315 write_reg_high(ioaddr, CMR1, CMR1h_TxRxOFF);
316 write_reg(ioaddr, CMR2, CMR2_NULL);
317
318 dev->base_addr = ioaddr;
319
320
321 get_node_ID(dev);
322
323#ifndef MODULE
324 if (net_debug)
325 printk(KERN_INFO "%s" KERN_INFO "%s", versionA, versionB);
326#endif
327
328 printk(KERN_NOTICE "%s: Pocket adapter found at %#3lx, IRQ %d, SAPROM "
329 "%02X:%02X:%02X:%02X:%02X:%02X.\n", dev->name, dev->base_addr,
330 dev->irq, dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
331 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
332
333
334 write_reg_high(ioaddr, CMR1, CMR1h_RESET | CMR1h_MUX);
335
336
337 ether_setup(dev);
338 if (dev->priv == NULL)
339 dev->priv = kmalloc(sizeof(struct net_local), GFP_KERNEL);
340 if (dev->priv == NULL)
341 return -ENOMEM;
342 memset(dev->priv, 0, sizeof(struct net_local));
343
344 lp = (struct net_local *)dev->priv;
345 lp->chip_type = RTL8002;
346 lp->addr_mode = CMR2h_Normal;
347 spin_lock_init(&lp->lock);
348
349 lp->next_module = root_atp_dev;
350 root_atp_dev = dev;
351
352
353 if (xcvr[0])
354 dev->if_port = xcvr[0];
355 else
356 dev->if_port = (dev->mem_start & 0xf) ? (dev->mem_start & 0x7) : 4;
357 if (dev->mem_end & 0xf)
358 net_debug = dev->mem_end & 7;
359
360 dev->open = net_open;
361 dev->stop = net_close;
362 dev->hard_start_xmit = atp_send_packet;
363 dev->get_stats = net_get_stats;
364 dev->set_multicast_list =
365 lp->chip_type == RTL8002 ? &set_rx_mode_8002 : &set_rx_mode_8012;
366 dev->tx_timeout = tx_timeout;
367 dev->watchdog_timeo = TX_TIMEOUT;
368
369 return 0;
370}
371
372
373static void __init get_node_ID(struct net_device *dev)
374{
375 long ioaddr = dev->base_addr;
376 int sa_offset = 0;
377 int i;
378
379 write_reg(ioaddr, CMR2, CMR2_EEPROM);
380
381
382
383 if (eeprom_op(ioaddr, EE_READ(0)) == 0xffff)
384 sa_offset = 15;
385
386 for (i = 0; i < 3; i++)
387 ((u16 *)dev->dev_addr)[i] =
388 be16_to_cpu(eeprom_op(ioaddr, EE_READ(sa_offset + i)));
389
390 write_reg(ioaddr, CMR2, CMR2_NULL);
391}
392
393
394
395
396
397
398
399
400
401
402
403
404
405static unsigned short __init eeprom_op(long ioaddr, u32 cmd)
406{
407 unsigned eedata_out = 0;
408 int num_bits = EE_CMD_SIZE;
409
410 while (--num_bits >= 0) {
411 char outval = (cmd & (1<<num_bits)) ? EE_DATA_WRITE : 0;
412 write_reg_high(ioaddr, PROM_CMD, outval | EE_CLK_LOW);
413 write_reg_high(ioaddr, PROM_CMD, outval | EE_CLK_HIGH);
414 eedata_out <<= 1;
415 if (read_nibble(ioaddr, PROM_DATA) & EE_DATA_READ)
416 eedata_out++;
417 }
418 write_reg_high(ioaddr, PROM_CMD, EE_CLK_LOW & ~EE_CS);
419 return eedata_out;
420}
421
422
423
424
425
426
427
428
429
430
431
432
433static int net_open(struct net_device *dev)
434{
435 struct net_local *lp = (struct net_local *)dev->priv;
436 int ret;
437
438
439
440
441 ret = request_irq(dev->irq, &atp_interrupt, 0, dev->name, dev);
442 if (ret)
443 return ret;
444
445 hardware_init(dev);
446
447 init_timer(&lp->timer);
448 lp->timer.expires = jiffies + TIMED_CHECKER;
449 lp->timer.data = (unsigned long)dev;
450 lp->timer.function = &atp_timed_checker;
451 add_timer(&lp->timer);
452
453 netif_start_queue(dev);
454 return 0;
455}
456
457
458
459static void hardware_init(struct net_device *dev)
460{
461 struct net_local *lp = (struct net_local *)dev->priv;
462 long ioaddr = dev->base_addr;
463 int i;
464
465
466 for (i = 0; i < 8; i++)
467 outb(mux_8012[i], ioaddr + PAR_DATA);
468 write_reg_high(ioaddr, CMR1, CMR1h_RESET);
469
470 for (i = 0; i < 6; i++)
471 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
472
473 write_reg_high(ioaddr, CMR2, lp->addr_mode);
474
475 if (net_debug > 2) {
476 printk(KERN_DEBUG "%s: Reset: current Rx mode %d.\n", dev->name,
477 (read_nibble(ioaddr, CMR2_h) >> 3) & 0x0f);
478 }
479
480 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
481 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
482
483
484 outb(Ctrl_SelData + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
485
486
487 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
488 write_reg_high(ioaddr, IMR, ISRh_RxErr);
489
490 lp->tx_unit_busy = 0;
491 lp->pac_cnt_in_tx_buf = 0;
492 lp->saved_tx_size = 0;
493}
494
495static void trigger_send(long ioaddr, int length)
496{
497 write_reg_byte(ioaddr, TxCNT0, length & 0xff);
498 write_reg(ioaddr, TxCNT1, length >> 8);
499 write_reg(ioaddr, CMR1, CMR1_Xmit);
500}
501
502static void write_packet(long ioaddr, int length, unsigned char *packet, int pad_len, int data_mode)
503{
504 if (length & 1)
505 {
506 length++;
507 pad_len++;
508 }
509
510 outb(EOC+MAR, ioaddr + PAR_DATA);
511 if ((data_mode & 1) == 0) {
512
513 outb(WrAddr+MAR, ioaddr + PAR_DATA);
514 do {
515 write_byte_mode0(ioaddr, *packet++);
516 } while (--length > pad_len) ;
517 do {
518 write_byte_mode0(ioaddr, 0);
519 } while (--length > 0) ;
520 } else {
521
522 unsigned char outbyte = *packet++;
523
524 outb(Ctrl_LNibWrite + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
525 outb(WrAddr+MAR, ioaddr + PAR_DATA);
526
527 outb((outbyte & 0x0f)|0x40, ioaddr + PAR_DATA);
528 outb(outbyte & 0x0f, ioaddr + PAR_DATA);
529 outbyte >>= 4;
530 outb(outbyte & 0x0f, ioaddr + PAR_DATA);
531 outb(Ctrl_HNibWrite + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
532 while (--length > pad_len)
533 write_byte_mode1(ioaddr, *packet++);
534 while (--length > 0)
535 write_byte_mode1(ioaddr, 0);
536 }
537
538 outb(0xff, ioaddr + PAR_DATA);
539 outb(Ctrl_HNibWrite | Ctrl_SelData | Ctrl_IRQEN, ioaddr + PAR_CONTROL);
540}
541
542static void tx_timeout(struct net_device *dev)
543{
544 struct net_local *np = (struct net_local *)dev->priv;
545 long ioaddr = dev->base_addr;
546
547 printk(KERN_WARNING "%s: Transmit timed out, %s?\n", dev->name,
548 inb(ioaddr + PAR_CONTROL) & 0x10 ? "network cable problem"
549 : "IRQ conflict");
550 np->stats.tx_errors++;
551
552 hardware_init(dev);
553 dev->trans_start = jiffies;
554 netif_wake_queue(dev);
555 np->stats.tx_errors++;
556}
557
558static int atp_send_packet(struct sk_buff *skb, struct net_device *dev)
559{
560 struct net_local *lp = (struct net_local *)dev->priv;
561 long ioaddr = dev->base_addr;
562 int length;
563 unsigned long flags;
564
565 length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
566
567 netif_stop_queue(dev);
568
569
570
571
572 spin_lock_irqsave(&lp->lock, flags);
573 write_reg(ioaddr, IMR, 0);
574 write_reg_high(ioaddr, IMR, 0);
575 spin_unlock_irqrestore(&lp->lock, flags);
576
577 write_packet(ioaddr, length, skb->data, length-skb->len, dev->if_port);
578
579 lp->pac_cnt_in_tx_buf++;
580 if (lp->tx_unit_busy == 0) {
581 trigger_send(ioaddr, length);
582 lp->saved_tx_size = 0;
583 lp->re_tx = 0;
584 lp->tx_unit_busy = 1;
585 } else
586 lp->saved_tx_size = length;
587
588 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
589 write_reg_high(ioaddr, IMR, ISRh_RxErr);
590
591 dev->trans_start = jiffies;
592 dev_kfree_skb (skb);
593 return 0;
594}
595
596
597
598
599static irqreturn_t
600atp_interrupt(int irq, void *dev_instance, struct pt_regs * regs)
601{
602 struct net_device *dev = (struct net_device *)dev_instance;
603 struct net_local *lp;
604 long ioaddr;
605 static int num_tx_since_rx;
606 int boguscount = max_interrupt_work;
607 int handled = 0;
608
609 if (dev == NULL) {
610 printk(KERN_ERR "ATP_interrupt(): irq %d for unknown device.\n", irq);
611 return IRQ_NONE;
612 }
613 ioaddr = dev->base_addr;
614 lp = (struct net_local *)dev->priv;
615
616 spin_lock(&lp->lock);
617
618
619 outb(Ctrl_SelData, ioaddr + PAR_CONTROL);
620
621
622 write_reg(ioaddr, CMR2, CMR2_NULL);
623 write_reg(ioaddr, IMR, 0);
624
625 if (net_debug > 5) printk(KERN_DEBUG "%s: In interrupt ", dev->name);
626 while (--boguscount > 0) {
627 int status = read_nibble(ioaddr, ISR);
628 if (net_debug > 5) printk("loop status %02x..", status);
629
630 if (status & (ISR_RxOK<<3)) {
631 handled = 1;
632 write_reg(ioaddr, ISR, ISR_RxOK);
633 do {
634 int read_status = read_nibble(ioaddr, CMR1);
635 if (net_debug > 6)
636 printk("handling Rx packet %02x..", read_status);
637
638
639 if (read_status & (CMR1_IRQ << 3)) {
640 lp->stats.rx_over_errors++;
641
642 write_reg_high(ioaddr, CMR2, CMR2h_OFF);
643 net_rx(dev);
644
645 write_reg_high(ioaddr, ISR, ISRh_RxErr);
646 write_reg_high(ioaddr, CMR2, lp->addr_mode);
647 } else if ((read_status & (CMR1_BufEnb << 3)) == 0) {
648 net_rx(dev);
649 num_tx_since_rx = 0;
650 } else
651 break;
652 } while (--boguscount > 0);
653 } else if (status & ((ISR_TxErr + ISR_TxOK)<<3)) {
654 handled = 1;
655 if (net_debug > 6) printk("handling Tx done..");
656
657
658 write_reg(ioaddr, ISR, ISR_TxErr + ISR_TxOK);
659 if (status & (ISR_TxErr<<3)) {
660 lp->stats.collisions++;
661 if (++lp->re_tx > 15) {
662 lp->stats.tx_aborted_errors++;
663 hardware_init(dev);
664 break;
665 }
666
667 if (net_debug > 6) printk("attempting to ReTx");
668 write_reg(ioaddr, CMR1, CMR1_ReXmit + CMR1_Xmit);
669 } else {
670
671 lp->stats.tx_packets++;
672 lp->pac_cnt_in_tx_buf--;
673 if ( lp->saved_tx_size) {
674 trigger_send(ioaddr, lp->saved_tx_size);
675 lp->saved_tx_size = 0;
676 lp->re_tx = 0;
677 } else
678 lp->tx_unit_busy = 0;
679 netif_wake_queue(dev);
680 }
681 num_tx_since_rx++;
682 } else if (num_tx_since_rx > 8
683 && time_after(jiffies, dev->last_rx + HZ)) {
684 if (net_debug > 2)
685 printk(KERN_DEBUG "%s: Missed packet? No Rx after %d Tx and "
686 "%ld jiffies status %02x CMR1 %02x.\n", dev->name,
687 num_tx_since_rx, jiffies - dev->last_rx, status,
688 (read_nibble(ioaddr, CMR1) >> 3) & 15);
689 lp->stats.rx_missed_errors++;
690 hardware_init(dev);
691 num_tx_since_rx = 0;
692 break;
693 } else
694 break;
695 }
696
697
698
699 {
700 int i;
701 for (i = 0; i < 6; i++)
702 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
703#if 0 && defined(TIMED_CHECKER)
704 mod_timer(&lp->timer, jiffies + TIMED_CHECKER);
705#endif
706 }
707
708
709 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
710
711 outb(Ctrl_SelData + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
712
713 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
714 write_reg_high(ioaddr, IMR, ISRh_RxErr);
715
716 spin_unlock(&lp->lock);
717
718 if (net_debug > 5) printk("exiting interrupt.\n");
719 return IRQ_RETVAL(handled);
720}
721
722#ifdef TIMED_CHECKER
723
724
725static void atp_timed_checker(unsigned long data)
726{
727 struct net_device *dev = (struct net_device *)data;
728 long ioaddr = dev->base_addr;
729 struct net_local *lp = (struct net_local *)dev->priv;
730 int tickssofar = jiffies - lp->last_rx_time;
731 int i;
732
733 spin_lock(&lp->lock);
734 if (tickssofar > 2*HZ) {
735#if 1
736 for (i = 0; i < 6; i++)
737 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
738 lp->last_rx_time = jiffies;
739#else
740 for (i = 0; i < 6; i++)
741 if (read_cmd_byte(ioaddr, PAR0 + i) != atp_timed_dev->dev_addr[i])
742 {
743 struct net_local *lp = (struct net_local *)atp_timed_dev->priv;
744 write_reg_byte(ioaddr, PAR0 + i, atp_timed_dev->dev_addr[i]);
745 if (i == 2)
746 lp->stats.tx_errors++;
747 else if (i == 3)
748 lp->stats.tx_dropped++;
749 else if (i == 4)
750 lp->stats.collisions++;
751 else
752 lp->stats.rx_errors++;
753 }
754#endif
755 }
756 spin_unlock(&lp->lock);
757 lp->timer.expires = jiffies + TIMED_CHECKER;
758 add_timer(&lp->timer);
759}
760#endif
761
762
763static void net_rx(struct net_device *dev)
764{
765 struct net_local *lp = (struct net_local *)dev->priv;
766 long ioaddr = dev->base_addr;
767 struct rx_header rx_head;
768
769
770 outb(EOC+MAR, ioaddr + PAR_DATA);
771 read_block(ioaddr, 8, (unsigned char*)&rx_head, dev->if_port);
772 if (net_debug > 5)
773 printk(KERN_DEBUG " rx_count %04x %04x %04x %04x..", rx_head.pad,
774 rx_head.rx_count, rx_head.rx_status, rx_head.cur_addr);
775 if ((rx_head.rx_status & 0x77) != 0x01) {
776 lp->stats.rx_errors++;
777 if (rx_head.rx_status & 0x0004) lp->stats.rx_frame_errors++;
778 else if (rx_head.rx_status & 0x0002) lp->stats.rx_crc_errors++;
779 if (net_debug > 3)
780 printk(KERN_DEBUG "%s: Unknown ATP Rx error %04x.\n",
781 dev->name, rx_head.rx_status);
782 if (rx_head.rx_status & 0x0020) {
783 lp->stats.rx_fifo_errors++;
784 write_reg_high(ioaddr, CMR1, CMR1h_TxENABLE);
785 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
786 } else if (rx_head.rx_status & 0x0050)
787 hardware_init(dev);
788 return;
789 } else {
790
791 int pkt_len = (rx_head.rx_count & 0x7ff) - 4;
792 struct sk_buff *skb;
793
794 skb = dev_alloc_skb(pkt_len + 2);
795 if (skb == NULL) {
796 printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n",
797 dev->name);
798 lp->stats.rx_dropped++;
799 goto done;
800 }
801 skb->dev = dev;
802
803 skb_reserve(skb, 2);
804 read_block(ioaddr, pkt_len, skb_put(skb,pkt_len), dev->if_port);
805 skb->protocol = eth_type_trans(skb, dev);
806 netif_rx(skb);
807 dev->last_rx = jiffies;
808 lp->stats.rx_packets++;
809 lp->stats.rx_bytes += pkt_len;
810 }
811 done:
812 write_reg(ioaddr, CMR1, CMR1_NextPkt);
813 lp->last_rx_time = jiffies;
814 return;
815}
816
817static void read_block(long ioaddr, int length, unsigned char *p, int data_mode)
818{
819
820 if (data_mode <= 3) {
821 outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL);
822 outb(length == 8 ? RdAddr | HNib | MAR : RdAddr | MAR,
823 ioaddr + PAR_DATA);
824 if (data_mode <= 1) {
825 do *p++ = read_byte_mode0(ioaddr); while (--length > 0);
826 } else
827 do *p++ = read_byte_mode2(ioaddr); while (--length > 0);
828 } else if (data_mode <= 5)
829 do *p++ = read_byte_mode4(ioaddr); while (--length > 0);
830 else
831 do *p++ = read_byte_mode6(ioaddr); while (--length > 0);
832
833 outb(EOC+HNib+MAR, ioaddr + PAR_DATA);
834 outb(Ctrl_SelData, ioaddr + PAR_CONTROL);
835}
836
837
838static int
839net_close(struct net_device *dev)
840{
841 struct net_local *lp = (struct net_local *)dev->priv;
842 long ioaddr = dev->base_addr;
843
844 netif_stop_queue(dev);
845
846 del_timer_sync(&lp->timer);
847
848
849 lp->addr_mode = CMR2h_OFF;
850 write_reg_high(ioaddr, CMR2, CMR2h_OFF);
851
852
853 outb(0x00, ioaddr + PAR_CONTROL);
854 free_irq(dev->irq, dev);
855
856
857 write_reg_high(ioaddr, CMR1, CMR1h_RESET | CMR1h_MUX);
858 return 0;
859}
860
861
862
863static struct net_device_stats *
864net_get_stats(struct net_device *dev)
865{
866 struct net_local *lp = (struct net_local *)dev->priv;
867 return &lp->stats;
868}
869
870
871
872
873
874static void set_rx_mode_8002(struct net_device *dev)
875{
876 struct net_local *lp = (struct net_local *)dev->priv;
877 long ioaddr = dev->base_addr;
878
879 if ( dev->mc_count > 0 || (dev->flags & (IFF_ALLMULTI|IFF_PROMISC))) {
880
881
882
883
884 dev->flags|=IFF_PROMISC;
885 lp->addr_mode = CMR2h_PROMISC;
886 } else
887 lp->addr_mode = CMR2h_Normal;
888 write_reg_high(ioaddr, CMR2, lp->addr_mode);
889}
890
891static void set_rx_mode_8012(struct net_device *dev)
892{
893 struct net_local *lp = (struct net_local *)dev->priv;
894 long ioaddr = dev->base_addr;
895 unsigned char new_mode, mc_filter[8];
896 int i;
897
898 if (dev->flags & IFF_PROMISC) {
899 new_mode = CMR2h_PROMISC;
900 } else if ((dev->mc_count > 1000) || (dev->flags & IFF_ALLMULTI)) {
901
902 memset(mc_filter, 0xff, sizeof(mc_filter));
903 new_mode = CMR2h_Normal;
904 } else {
905 struct dev_mc_list *mclist;
906
907 memset(mc_filter, 0, sizeof(mc_filter));
908 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
909 i++, mclist = mclist->next)
910 {
911 int filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x3f;
912 mc_filter[filterbit >> 5] |= cpu_to_le32(1 << (filterbit & 31));
913 }
914 new_mode = CMR2h_Normal;
915 }
916 lp->addr_mode = new_mode;
917 write_reg(ioaddr, CMR2, CMR2_IRQOUT | 0x04);
918 for (i = 0; i < 8; i++)
919 write_reg_byte(ioaddr, i, mc_filter[i]);
920 if (net_debug > 2 || 1) {
921 lp->addr_mode = 1;
922 printk(KERN_DEBUG "%s: Mode %d, setting multicast filter to",
923 dev->name, lp->addr_mode);
924 for (i = 0; i < 8; i++)
925 printk(" %2.2x", mc_filter[i]);
926 printk(".\n");
927 }
928
929 write_reg_high(ioaddr, CMR2, lp->addr_mode);
930 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
931}
932
933static int __init atp_init_module(void) {
934 if (debug)
935 printk(KERN_INFO "%s" KERN_INFO "%s", versionA, versionB);
936 return atp_init(NULL);
937}
938
939static void __exit atp_cleanup_module(void) {
940 struct net_device *next_dev;
941
942 while (root_atp_dev) {
943 next_dev = ((struct net_local *)root_atp_dev->priv)->next_module;
944 unregister_netdev(root_atp_dev);
945
946 free_netdev(root_atp_dev);
947 root_atp_dev = next_dev;
948 }
949}
950
951module_init(atp_init_module);
952module_exit(atp_cleanup_module);
953