1 2/* 3 * Index to functions. 4 */ 5 6int el1_probe(struct net_device *dev); 7static int el1_probe1(struct net_device *dev, int ioaddr); 8static int el_open(struct net_device *dev); 9static void el_timeout(struct net_device *dev); 10static int el_start_xmit(struct sk_buff *skb, struct net_device *dev); 11static irqreturn_t el_interrupt(int irq, void *dev_id, struct pt_regs *regs); 12static void el_receive(struct net_device *dev); 13static void el_reset(struct net_device *dev); 14static int el1_close(struct net_device *dev); 15static struct net_device_stats *el1_get_stats(struct net_device *dev); 16static void set_multicast_list(struct net_device *dev); 17static struct ethtool_ops netdev_ethtool_ops; 18 19#define EL1_IO_EXTENT 16 20 21#ifndef EL_DEBUG 22#define EL_DEBUG 0 /* use 0 for production, 1 for devel., >2 for debug */ 23#endif /* Anything above 5 is wordy death! */ 24#define debug el_debug 25static int el_debug = EL_DEBUG; 26 27/* 28 * Board-specific info in dev->priv. 29 */ 30 31struct net_local 32{ 33 struct net_device_stats stats; 34 int tx_pkt_start; /* The length of the current Tx packet. */ 35 int collisions; /* Tx collisions this packet */ 36 int loading; /* Spot buffer load collisions */ 37 int txing; /* True if card is in TX mode */ 38 spinlock_t lock; /* Serializing lock */ 39}; 40 41 42#define RX_STATUS (ioaddr + 0x06) 43#define RX_CMD RX_STATUS 44#define TX_STATUS (ioaddr + 0x07) 45#define TX_CMD TX_STATUS 46#define GP_LOW (ioaddr + 0x08) 47#define GP_HIGH (ioaddr + 0x09) 48#define RX_BUF_CLR (ioaddr + 0x0A) 49#define RX_LOW (ioaddr + 0x0A) 50#define RX_HIGH (ioaddr + 0x0B) 51#define SAPROM (ioaddr + 0x0C) 52#define AX_STATUS (ioaddr + 0x0E) 53#define AX_CMD AX_STATUS 54#define DATAPORT (ioaddr + 0x0F) 55#define TX_RDY 0x08 /* In TX_STATUS */ 56 57#define EL1_DATAPTR 0x08 58#define EL1_RXPTR 0x0A 59#define EL1_SAPROM 0x0C 60#define EL1_DATAPORT 0x0f 61 62/* 63 * Writes to the ax command register. 64 */ 65 66#define AX_OFF 0x00 /* Irq off, buffer access on */ 67#define AX_SYS 0x40 /* Load the buffer */ 68#define AX_XMIT 0x44 /* Transmit a packet */ 69#define AX_RX 0x48 /* Receive a packet */ 70#define AX_LOOP 0x0C /* Loopback mode */ 71#define AX_RESET 0x80 72 73/* 74 * Normal receive mode written to RX_STATUS. We must intr on short packets 75 * to avoid bogus rx lockups. 76 */ 77 78#define RX_NORM 0xA8 /* 0x68 == all addrs, 0xA8 only to me. */ 79#define RX_PROM 0x68 /* Senior Prom, uhmm promiscuous mode. */ 80#define RX_MULT 0xE8 /* Accept multicast packets. */ 81#define TX_NORM 0x0A /* Interrupt on everything that might hang the chip */ 82 83/* 84 * TX_STATUS register. 85 */ 86 87#define TX_COLLISION 0x02 88#define TX_16COLLISIONS 0x04 89#define TX_READY 0x08 90 91#define RX_RUNT 0x08 92#define RX_MISSED 0x01 /* Missed a packet due to 3c501 braindamage. */ 93#define RX_GOOD 0x30 /* Good packet 0x20, or simple overflow 0x10. */ 94 95

