1# 2# This file contains rules which are shared between multiple Makefiles. 3# 4 5# Some standard vars 6 7comma := , 8empty := 9space := $(empty) $(empty) 10 11# Figure out paths 12# --------------------------------------------------------------------------- 13# Find the path relative to the toplevel dir, $(RELDIR), and express 14# the toplevel dir as a relative path from this dir, $(TOPDIR_REL) 15 16ifeq ($(findstring $(TOPDIR),$(CURDIR)),) 17 # Can only happen when something is built out of tree 18 RELDIR := $(CURDIR) 19 TOPDIR_REL := $(TOPDIR) 20else 21 RELDIR := $(subst $(TOPDIR)/,,$(CURDIR)) 22 TOPDIR_REL := $(subst $(space),,$(foreach d,$(subst /, ,$(RELDIR)),../)) 23endif 24 25# Some paths for the Makefiles to use 26# --------------------------------------------------------------------------- 27 28# Usage: 29# 30# $(obj)/target.o : target.o in the build dir 31# $(src)/target.c : target.c in the source dir 32# $(objtree)/include/linux/version.h : Some file relative to the build 33# dir root 34# $(srctree)/include/linux/module.h : Some file relative to the source 35# dir root 36# 37# $(obj) and $(src) can only be used in the section after 38# include $(TOPDIR)/Rules.make, i.e for generated files and the like. 39# Intentionally. 40# 41# We don't support separate source / object yet, so these are just 42# placeholders for now 43 44obj := . 45src := . 46 47# For use in the quiet output 48 49echo_target = $(RELDIR)/$@ 50 51# Figure out what we need to build from the various variables 52# =========================================================================== 53 54# When an object is listed to be built compiled-in and modular, 55# only build the compiled-in version 56 57obj-m := $(filter-out $(obj-y),$(obj-m)) 58 59# Handle objects in subdirs 60# --------------------------------------------------------------------------- 61# o if we encounter foo/ in $(obj-y), replace it by foo/built-in.o 62# and add the directory to the list of dirs to descend into: $(subdir-y) 63# o if we encounter foo/ in $(obj-m), remove it from $(obj-m) 64# and add the directory to the list of dirs to descend into: $(subdir-m) 65 66__subdir-y := $(patsubst %/,%,$(filter %/, $(obj-y))) 67subdir-y += $(__subdir-y) 68__subdir-m := $(patsubst %/,%,$(filter %/, $(obj-m))) 69subdir-m += $(__subdir-m) 70__subdir-n := $(patsubst %/,%,$(filter %/, $(obj-n))) 71subdir-n += $(__subdir-n) 72__subdir- := $(patsubst %/,%,$(filter %/, $(obj-))) 73subdir- += $(__subdir-) 74obj-y := $(patsubst %/, %/built-in.o, $(obj-y)) 75obj-m := $(filter-out %/, $(obj-m)) 76 77# Subdirectories we need to descend into 78 79subdir-ym := $(sort $(subdir-y) $(subdir-m)) 80 81# export.o is never a composite object, since $(export-objs) has a 82# fixed meaning (== objects which EXPORT_SYMBOL()) 83__obj-y = $(filter-out export.o,$(obj-y)) 84__obj-m = $(filter-out export.o,$(obj-m)) 85 86# if $(foo-objs) exists, foo.o is a composite object 87__multi-used-y := $(sort $(foreach m,$(__obj-y), $(if $($(m:.o=-objs)), $(m)))) 88__multi-used-m := $(sort $(foreach m,$(__obj-m), $(if $($(m:.o=-objs)), $(m)))) 89 90# FIXME: Rip this out later 91# Backwards compatibility: if a composite object is listed in 92# $(list-multi), skip it here, since the Makefile will have an explicit 93# link rule for it 94 95multi-used-y := $(filter-out $(list-multi),$(__multi-used-y)) 96multi-used-m := $(filter-out $(list-multi),$(__multi-used-m)) 97 98# Build list of the parts of our composite objects, our composite 99# objects depend on those (obviously) 100multi-objs-y := $(foreach m, $(multi-used-y), $($(m:.o=-objs))) 101multi-objs-m := $(foreach m, $(multi-used-m), $($(m:.o=-objs))) 102 103# $(subdir-obj-y) is the list of objects in $(obj-y) which do not live 104# in the local directory 105subdir-obj-y := $(foreach o,$(obj-y),$(if $(filter-out $(o),$(notdir $(o))),$(o))) 106 107# Replace multi-part objects by their individual parts, look at local dir only 108real-objs-y := $(foreach m, $(filter-out $(subdir-obj-y), $(obj-y)), $(if $($(m:.o=-objs)),$($(m:.o=-objs)),$(m))) $(EXTRA_TARGETS) 109real-objs-m := $(foreach m, $(obj-m), $(if $($(m:.o=-objs)),$($(m:.o=-objs)),$(m))) 110 111# Only build module versions for files which are selected to be built 112export-objs := $(filter $(export-objs),$(real-objs-y) $(real-objs-m)) 113 114# The temporary file to save gcc -MD generated dependencies must not 115# contain a comma 116depfile = $(subst $(comma),_,$(@D)/.$(@F).d) 117 118# We're called for one of three purposes: 119# o fastdep: build module version files (.ver) for $(export-objs) in 120# the current directory 121# o modules_install: install the modules in the current directory 122# o build: When no target is given, first_rule is the default and 123# will build the built-in and modular objects in this dir 124# (or a subset thereof, depending on $(KBUILD_MODULES),$(KBUILD_BUILTIN) 125# When targets are given directly (like foo.o), we just build these 126# targets (That happens when someone does make some/dir/foo.[ois]) 127 128ifeq ($(MAKECMDGOALS),fastdep) 129 130# =========================================================================== 131# Module versions 132# =========================================================================== 133 134ifeq ($(strip $(export-objs)),) 135 136# If we don't export any symbols in this dir, just descend 137# --------------------------------------------------------------------------- 138 139fastdep: sub_dirs 140 @echo -n 141 142else 143 144# This sets version suffixes on exported symbols 145# --------------------------------------------------------------------------- 146 147MODVERDIR := $(TOPDIR)/include/linux/modules/$(RELDIR) 148 149# 150# Added the SMP separator to stop module accidents between uniprocessor 151# and SMP Intel boxes - AC - from bits by Michael Chastain 152# 153 154ifdef CONFIG_SMP 155 genksyms_smp_prefix := -p smp_ 156else 157 genksyms_smp_prefix := 158endif 159 160# Don't include modversions.h, we're just about to generate it here. 161 162CFLAGS_MODULE := $(filter-out -include $(HPATH)/linux/modversions.h,$(CFLAGS_MODULE)) 163 164$(addprefix $(MODVERDIR)/,$(real-objs-y:.o=.ver)): modkern_cflags := $(CFLAGS_KERNEL) 165$(addprefix $(MODVERDIR)/,$(real-objs-m:.o=.ver)): modkern_cflags := $(CFLAGS_MODULE) 166$(addprefix $(MODVERDIR)/,$(export-objs:.o=.ver)): export_flags := -D__GENKSYMS__ 167 168c_flags = -Wp,-MD,$(depfile) $(CFLAGS) $(NOSTDINC_FLAGS) \ 169 $(modkern_cflags) $(EXTRA_CFLAGS) $(CFLAGS_$(*F).o) \ 170 -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) \ 171 $(export_flags) 172 173# Our objects only depend on modversions.h, not on the individual .ver 174# files (fix-dep filters them), so touch modversions.h if any of the .ver 175# files changes 176 177quiet_cmd_cc_ver_c = MKVER include/linux/modules/$(RELDIR)/$*.ver 178cmd_cc_ver_c = $(CPP) $(c_flags) $< | $(GENKSYMS) $(genksyms_smp_prefix) \ 179 -k $(VERSION).$(PATCHLEVEL).$(SUBLEVEL) > $@.tmp 180 181# Okay, let's explain what's happening in rule_make_cc_ver_c: 182# o echo the command 183# o execute the command 184# o If the $(CPP) fails, we won't notice because it's output is piped 185# to $(GENKSYMS) which does not fail. We recognize this case by 186# looking if the generated $(depfile) exists, though. 187# o If the .ver file changed, touch modversions.h, which is our maker 188# of any changed .ver files. 189# o Move command line and deps into their normal .*.cmd place. 190 191define rule_cc_ver_c 192 $(if $($(quiet)cmd_cc_ver_c),echo ' $($(quiet)cmd_cc_ver_c)';) \ 193 $(cmd_cc_ver_c); \ 194 if [ ! -r $(depfile) ]; then exit 1; fi; \ 195 $(TOPDIR)/scripts/fixdep $(depfile) $@ $(TOPDIR) '$(cmd_cc_ver_c)' > $(@D)/.$(@F).tmp; \ 196 rm -f $(depfile); \ 197 if [ ! -r $@ ] || cmp -s $@ $@.tmp; then \ 198 touch $(TOPDIR)/include/linux/modversions.h; \ 199 fi; \ 200 mv -f $@.tmp $@ 201 mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd 202endef 203 204$(MODVERDIR)/%.ver: %.c FORCE 205 @$(call if_changed_rule,cc_ver_c) 206 207targets := $(addprefix $(MODVERDIR)/,$(export-objs:.o=.ver)) 208 209fastdep: $(targets) sub_dirs 210 @mkdir -p $(TOPDIR)/.tmp_export-objs/modules/$(RELDIR) 211 @touch $(addprefix $(TOPDIR)/.tmp_export-objs/modules/$(RELDIR)/,$(export-objs:.o=.ver)) 212 213endif # export-objs 214 215else # ! fastdep 216ifeq ($(MAKECMDGOALS),modules_install) 217 218# ========================================================================== 219# Installing modules 220# ========================================================================== 221 222.PHONY: modules_install 223 224modules_install: sub_dirs 225ifneq ($(obj-m),) 226 @echo Installing modules in $(MODLIB)/kernel/$(RELDIR) 227 @mkdir -p $(MODLIB)/kernel/$(RELDIR) 228 @cp $(obj-m) $(MODLIB)/kernel/$(RELDIR) 229else 230 @echo -n 231endif 232 233else # ! modules_install 234 235# ========================================================================== 236# Building 237# ========================================================================== 238 239# If a Makefile does define neither O_TARGET nor L_TARGET, 240# use a standard O_TARGET named "built-in.o" 241 242ifndef O_TARGET 243ifndef L_TARGET 244O_TARGET := built-in.o 245endif 246endif 247 248# The echo suppresses the "Nothing to be done for first_rule" 249first_rule: $(if $(KBUILD_BUILTIN),$(O_TARGET) $(L_TARGET) $(EXTRA_TARGETS)) \ 250 $(if $(KBUILD_MODULES),$(obj-m)) \ 251 sub_dirs 252 @echo -n 253 254# Compile C sources (.c) 255# --------------------------------------------------------------------------- 256 257# Default is built-in, unless we know otherwise 258modkern_cflags := $(CFLAGS_KERNEL) 259 260$(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE) 261$(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE) 262$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE) 263 264$(export-objs) : export_flags := $(EXPORT_FLAGS) 265$(export-objs:.o=.i) : export_flags := $(EXPORT_FLAGS) 266$(export-objs:.o=.s) : export_flags := $(EXPORT_FLAGS) 267$(export-objs:.o=.lst): export_flags := $(EXPORT_FLAGS) 268 269c_flags = -Wp,-MD,$(depfile) $(CFLAGS) $(NOSTDINC_FLAGS) \ 270 $(modkern_cflags) $(EXTRA_CFLAGS) $(CFLAGS_$(*F).o) \ 271 -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) \ 272 $(export_flags) 273 274quiet_cmd_cc_s_c = CC $(echo_target) 275cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $< 276 277%.s: %.c FORCE 278 $(call if_changed_dep,cc_s_c) 279 280quiet_cmd_cc_i_c = CPP $(echo_target) 281cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $< 282 283%.i: %.c FORCE 284 $(call if_changed_dep,cc_i_c) 285 286quiet_cmd_cc_o_c = CC $(echo_target) 287cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $< 288 289%.o: %.c FORCE 290 $(call if_changed_dep,cc_o_c) 291 292quiet_cmd_cc_lst_c = MKLST $(echo_target) 293cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && $(TOPDIR)/scripts/makelst $*.o $(TOPDIR)/System.map $(OBJDUMP) > $@ 294 295%.lst: %.c FORCE 296 $(call if_changed_dep,cc_lst_c) 297 298# Compile assembler sources (.S) 299# --------------------------------------------------------------------------- 300 301modkern_aflags := $(AFLAGS_KERNEL) 302 303$(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE) 304$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE) 305 306a_flags = -Wp,-MD,$(depfile) $(AFLAGS) $(NOSTDINC_FLAGS) \ 307 $(modkern_aflags) $(EXTRA_AFLAGS) $(AFLAGS_$(*F).o) 308 309quiet_cmd_as_s_S = CPP $(echo_target) 310cmd_as_s_S = $(CPP) $(a_flags) -o $@ $< 311 312%.s: %.S FORCE 313 $(call if_changed_dep,as_s_S) 314 315quiet_cmd_as_o_S = AS $(echo_target) 316cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $< 317 318%.o: %.S FORCE 319 $(call if_changed_dep,as_o_S) 320 321targets += $(real-objs-y) $(real-objs-m) $(EXTRA_TARGETS) $(MAKECMDGOALS) 322 323# Build the compiled-in targets 324# --------------------------------------------------------------------------- 325 326# To build objects in subdirs, we need to descend into the directories 327$(sort $(subdir-obj-y)): sub_dirs ; 328 329# 330# Rule to compile a set of .o files into one .o file 331# 332ifdef O_TARGET 333quiet_cmd_link_o_target = LD $(echo_target) 334# If the list of objects to link is empty, just create an empty O_TARGET 335cmd_link_o_target = $(if $(strip $(obj-y)),\ 336 $(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) -r -o $@ $(filter $(obj-y), $^),\ 337 rm -f $@; $(AR) rcs $@) 338 339$(O_TARGET): $(obj-y) FORCE 340 $(call if_changed,link_o_target) 341 342targets += $(O_TARGET) 343endif # O_TARGET 344 345# 346# Rule to compile a set of .o files into one .a file 347# 348ifdef L_TARGET 349quiet_cmd_link_l_target = AR $(echo_target) 350cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(obj-y) 351 352$(L_TARGET): $(obj-y) FORCE 353 $(call if_changed,link_l_target) 354 355targets += $(L_TARGET) 356endif 357 358# 359# Rule to link composite objects 360# 361 362quiet_cmd_link_multi = LD $(echo_target) 363cmd_link_multi = $(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) -r -o $@ $(filter $($(basename $@)-objs),$^) 364 365# We would rather have a list of rules like 366# foo.o: $(foo-objs) 367# but that's not so easy, so we rather make all composite objects depend 368# on the set of all their parts 369$(multi-used-y) : %.o: $(multi-objs-y) FORCE 370 $(call if_changed,link_multi) 371 372$(multi-used-m) : %.o: $(multi-objs-m) FORCE 373 $(call if_changed,link_multi) 374 375targets += $(multi-used-y) $(multi-used-m) 376 377# Compile programs on the host 378# =========================================================================== 379 380host-progs-single := $(foreach m,$(host-progs),$(if $($(m)-objs),,$(m))) 381host-progs-multi := $(foreach m,$(host-progs),$(if $($(m)-objs),$(m))) 382host-progs-multi-objs := $(foreach m,$(host-progs-multi),$($(m)-objs)) 383 384quiet_cmd_host_cc__c = HOSTCC $(echo_target) 385cmd_host_cc__c = $(HOSTCC) -Wp,-MD,$(depfile) \ 386 $(HOSTCFLAGS) $(HOST_EXTRACFLAGS) \ 387 $(HOST_LOADLIBES) -o $@ $< 388 389$(host-progs-single): %: %.c FORCE 390 $(call if_changed_dep,host_cc__c) 391 392quiet_cmd_host_cc_o_c = HOSTCC $(echo_target) 393cmd_host_cc_o_c = $(HOSTCC) -Wp,-MD,$(depfile) \ 394 $(HOSTCFLAGS) $(HOST_EXTRACFLAGS) -c -o $@ $< 395 396$(host-progs-multi-objs): %.o: %.c FORCE 397 $(call if_changed_dep,host_cc_o_c) 398 399quiet_cmd_host_cc__o = HOSTLD $(echo_target) 400cmd_host_cc__o = $(HOSTCC) $(HOSTLDFLAGS) -o $@ $($@-objs) \ 401 $(HOST_LOADLIBES) 402 403$(host-progs-multi): %: $(host-progs-multi-objs) FORCE 404 $(call if_changed,host_cc__o) 405 406targets += $(host-progs-single) $(host-progs-multi-objs) $(host-progs-multi) 407 408endif # ! modules_install 409endif # ! fastdep 410 411# Shipped files 412# =========================================================================== 413 414quiet_cmd_shipped = SHIPPED $(echo_target) 415cmd_shipped = cat $< > $@ 416 417%:: %_shipped 418 $(call cmd,shipped) 419 420# Commands useful for building a boot image 421# =========================================================================== 422# 423# Use as following: 424# 425# target: source(s) FORCE 426# $(if_changed,ld/objcopy/gzip) 427# 428# and add target to EXTRA_TARGETS so that we know we have to 429# read in the saved command line 430 431# Linking 432# --------------------------------------------------------------------------- 433 434quiet_cmd_ld = LD $(echo_target) 435cmd_ld = $(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) $(LDFLAGS_$@) \ 436 $(filter-out FORCE,$^) -o $@ 437 438# Objcopy 439# --------------------------------------------------------------------------- 440 441quiet_cmd_objcopy = OBJCOPY $(echo_target) 442cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $< $@ 443 444# Gzip 445# --------------------------------------------------------------------------- 446 447quiet_cmd_gzip = GZIP $(echo_target) 448cmd_gzip = gzip -f -9 < $< > $@ 449 450# =========================================================================== 451# Generic stuff 452# =========================================================================== 453 454# Descending 455# --------------------------------------------------------------------------- 456 457.PHONY: sub_dirs $(subdir-ym) 458 459sub_dirs: $(subdir-ym) 460 461$(subdir-ym): 462 @$(MAKE) -C $@ $(MAKECMDGOALS) 463 464# Add FORCE to the prequisites of a target to force it to be always rebuilt. 465# --------------------------------------------------------------------------- 466 467.PHONY: FORCE 468 469FORCE: 470 471# 472# This sets version suffixes on exported symbols 473# Separate the object into "normal" objects and "exporting" objects 474# Exporting objects are: all objects that define symbol tables 475# 476 477# --------------------------------------------------------------------------- 478# Check if command line has changed 479 480# Usage: 481# normally one uses rules like 482# 483# %.o: %.c 484# <command line> 485# 486# However, these only rebuild the target when the source has changed, 487# but not when e.g. the command or the flags on the command line changed. 488# 489# This extension allows to do the following: 490# 491# command = <command line> 492# 493# %.o: %.c dummy 494# $(call if_changed,command) 495# 496# which will make sure to rebuild the target when either its prerequisites 497# change or the command line changes 498# 499# The magic works as follows: 500# The addition of dummy to the dependencies causes the rule for rebuilding 501# to be always executed. However, the if_changed function will generate 502# an empty command when 503# o none of the prequesites changed (i.e $? is empty) 504# o the command line did not change (we compare the old command line, 505# which is saved in .<target>.o, to the current command line using 506# the two filter-out commands) 507 508# Read all saved command lines and dependencies for the $(targets) we 509# may be building above, using $(if_changed{,_dep}). As an 510# optimization, we don't need to read them if the target does not 511# exist, we will rebuild anyway in that case. 512 513targets := $(wildcard $(sort $(targets))) 514cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd)) 515 516ifneq ($(cmd_files),) 517 include $(cmd_files) 518endif 519 520# function to only execute the passed command if necessary 521 522if_changed = $(if $(strip $? \ 523 $(filter-out $(cmd_$(1)),$(cmd_$@))\ 524 $(filter-out $(cmd_$@),$(cmd_$(1)))),\ 525 @set -e; \ 526 $(if $($(quiet)cmd_$(1)),echo ' $($(quiet)cmd_$(1))';) \ 527 $(cmd_$(1)); \ 528 echo 'cmd_$@ := $(cmd_$(1))' > $(@D)/.$(@F).cmd) 529 530 531# execute the command and also postprocess generated .d dependencies 532# file 533 534if_changed_dep = $(if $(strip $? $(filter-out FORCE $(wildcard $^),$^)\ 535 $(filter-out $(cmd_$(1)),$(cmd_$@))\ 536 $(filter-out $(cmd_$@),$(cmd_$(1)))),\ 537 @set -e; \ 538 $(if $($(quiet)cmd_$(1)),echo ' $($(quiet)cmd_$(1))';) \ 539 $(cmd_$(1)); \ 540 $(TOPDIR)/scripts/fixdep $(depfile) $@ $(TOPDIR) '$(cmd_$(1))' > $(@D)/.$(@F).tmp; \ 541 rm -f $(depfile); \ 542 mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd) 543 544# Usage: $(call if_changed_rule,foo) 545# will check if $(cmd_foo) changed, or any of the prequisites changed, 546# and if so will execute $(rule_foo) 547 548if_changed_rule = $(if $(strip $? \ 549 $(filter-out $(cmd_$(1)),$(cmd_$@))\ 550 $(filter-out $(cmd_$@),$(cmd_$(1)))),\ 551 @set -e; \ 552 mkdir -p $(dir $@); \ 553 $(rule_$(1))) 554 555# If quiet is set, only print short version of command 556 557cmd = @$(if $($(quiet)cmd_$(1)),echo ' $($(quiet)cmd_$(1))' &&) $(cmd_$(1)) 558 559# do_cmd is a shorthand used to support both compressed, verbose 560# and silent output in a single line. 561# Compared to cmd described avobe, do_cmd does no rely on any variables 562# previously assigned a value. 563# 564# Usage $(call do_cmd,CMD $@,cmd_to_execute bla bla) 565# Example: 566# $(call do_cmd,CP $@,cp -b $< $@) 567# make -s => nothing will be printed 568# make KBUILD_VERBOSE=1 => cp -b path/to/src.file path/to/dest.file 569# make KBUILD_VERBOSE=0 => CP path/to/dest.file 570define do_cmd 571 @$(if $(filter quiet_,$(quiet)), echo ' $(1)' &&, 572 $(if $(filter silent_,$(quiet)),, 573 echo "$(2)" &&)) \ 574 $(2) 575endef 576 577

